arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly vector_hashing = true;
 127 module_param(vector_hashing, bool, S_IRUGO);
 128
 129 static bool __read_mostly backwards_tsc_observed = false;
 130
 131 #define KVM_NR_SHARED_MSRS 16
 132
 133 struct kvm_shared_msrs_global {
 134         int nr;
 135         u32 msrs[KVM_NR_SHARED_MSRS];
 136 };
 137
 138 struct kvm_shared_msrs {
 139         struct user_return_notifier urn;
 140         bool registered;
 141         struct kvm_shared_msr_values {
 142                 u64 host;
 143                 u64 curr;
 144         } values[KVM_NR_SHARED_MSRS];
 145 };
 146
 147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 148 static struct kvm_shared_msrs __percpu *shared_msrs;
 149
 150 struct kvm_stats_debugfs_item debugfs_entries[] = {
 151         { "pf_fixed", VCPU_STAT(pf_fixed) },
 152         { "pf_guest", VCPU_STAT(pf_guest) },
 153         { "tlb_flush", VCPU_STAT(tlb_flush) },
 154         { "invlpg", VCPU_STAT(invlpg) },
 155         { "exits", VCPU_STAT(exits) },
 156         { "io_exits", VCPU_STAT(io_exits) },
 157         { "mmio_exits", VCPU_STAT(mmio_exits) },
 158         { "signal_exits", VCPU_STAT(signal_exits) },
 159         { "irq_window", VCPU_STAT(irq_window_exits) },
 160         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 161         { "halt_exits", VCPU_STAT(halt_exits) },
 162         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 163         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 164         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 165         { "hypercalls", VCPU_STAT(hypercalls) },
 166         { "request_irq", VCPU_STAT(request_irq_exits) },
 167         { "irq_exits", VCPU_STAT(irq_exits) },
 168         { "host_state_reload", VCPU_STAT(host_state_reload) },
 169         { "efer_reload", VCPU_STAT(efer_reload) },
 170         { "fpu_reload", VCPU_STAT(fpu_reload) },
 171         { "insn_emulation", VCPU_STAT(insn_emulation) },
 172         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 173         { "irq_injections", VCPU_STAT(irq_injections) },
 174         { "nmi_injections", VCPU_STAT(nmi_injections) },
 175         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 176         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 177         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 178         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 179         { "mmu_flooded", VM_STAT(mmu_flooded) },
 180         { "mmu_recycled", VM_STAT(mmu_recycled) },
 181         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 182         { "mmu_unsync", VM_STAT(mmu_unsync) },
 183         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 184         { "largepages", VM_STAT(lpages) },
 185         { NULL }
 186 };
 187
 188 u64 __read_mostly host_xcr0;
 189
 190 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 191
 192 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 193 {
 194         int i;
 195         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 196                 vcpu->arch.apf.gfns[i] = ~0;
 197 }
 198
 199 static void kvm_on_user_return(struct user_return_notifier *urn)
 200 {
 201         unsigned slot;
 202         struct kvm_shared_msrs *locals
 203                 = container_of(urn, struct kvm_shared_msrs, urn);
 204         struct kvm_shared_msr_values *values;
 205
 206         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 207                 values = &locals->values[slot];
 208                 if (values->host != values->curr) {
 209                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 210                         values->curr = values->host;
 211                 }
 212         }
 213         locals->registered = false;
 214         user_return_notifier_unregister(urn);
 215 }
 216
 217 static void shared_msr_update(unsigned slot, u32 msr)
 218 {
 219         u64 value;
 220         unsigned int cpu = smp_processor_id();
 221         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 222
 223         /* only read, and nobody should modify it at this time,
 224          * so don't need lock */
 225         if (slot >= shared_msrs_global.nr) {
 226                 printk(KERN_ERR "kvm: invalid MSR slot!");
 227                 return;
 228         }
 229         rdmsrl_safe(msr, &value);
 230         smsr->values[slot].host = value;
 231         smsr->values[slot].curr = value;
 232 }
 233
 234 void kvm_define_shared_msr(unsigned slot, u32 msr)
 235 {
 236         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 237         shared_msrs_global.msrs[slot] = msr;
 238         if (slot >= shared_msrs_global.nr)
 239                 shared_msrs_global.nr = slot + 1;
 240 }
 241 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 242
 243 static void kvm_shared_msr_cpu_online(void)
 244 {
 245         unsigned i;
 246
 247         for (i = 0; i < shared_msrs_global.nr; ++i)
 248                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 249 }
 250
 251 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 252 {
 253         unsigned int cpu = smp_processor_id();
 254         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 255         int err;
 256
 257         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 258                 return 0;
 259         smsr->values[slot].curr = value;
 260         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 261         if (err)
 262                 return 1;
 263
 264         if (!smsr->registered) {
 265                 smsr->urn.on_user_return = kvm_on_user_return;
 266                 user_return_notifier_register(&smsr->urn);
 267                 smsr->registered = true;
 268         }
 269         return 0;
 270 }
 271 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 272
 273 static void drop_user_return_notifiers(void)
 274 {
 275         unsigned int cpu = smp_processor_id();
 276         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 277
 278         if (smsr->registered)
 279                 kvm_on_user_return(&smsr->urn);
 280 }
 281
 282 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 283 {
 284         return vcpu->arch.apic_base;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 287
 288 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 289 {
 290         u64 old_state = vcpu->arch.apic_base &
 291                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 292         u64 new_state = msr_info->data &
 293                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 294         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 295                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 296
 297         if (!msr_info->host_initiated &&
 298             ((msr_info->data & reserved_bits) != 0 ||
 299              new_state == X2APIC_ENABLE ||
 300              (new_state == MSR_IA32_APICBASE_ENABLE &&
 301               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 302              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 303               old_state == 0)))
 304                 return 1;
 305
 306         kvm_lapic_set_base(vcpu, msr_info->data);
 307         return 0;
 308 }
 309 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 310
 311 asmlinkage __visible void kvm_spurious_fault(void)
 312 {
 313         /* Fault while not rebooting.  We want the trace. */
 314         BUG();
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 317
 318 #define EXCPT_BENIGN            0
 319 #define EXCPT_CONTRIBUTORY      1
 320 #define EXCPT_PF                2
 321
 322 static int exception_class(int vector)
 323 {
 324         switch (vector) {
 325         case PF_VECTOR:
 326                 return EXCPT_PF;
 327         case DE_VECTOR:
 328         case TS_VECTOR:
 329         case NP_VECTOR:
 330         case SS_VECTOR:
 331         case GP_VECTOR:
 332                 return EXCPT_CONTRIBUTORY;
 333         default:
 334                 break;
 335         }
 336         return EXCPT_BENIGN;
 337 }
 338
 339 #define EXCPT_FAULT             0
 340 #define EXCPT_TRAP              1
 341 #define EXCPT_ABORT             2
 342 #define EXCPT_INTERRUPT         3
 343
 344 static int exception_type(int vector)
 345 {
 346         unsigned int mask;
 347
 348         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 349                 return EXCPT_INTERRUPT;
 350
 351         mask = 1 << vector;
 352
 353         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 354         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 355                 return EXCPT_TRAP;
 356
 357         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 358                 return EXCPT_ABORT;
 359
 360         /* Reserved exceptions will result in fault */
 361         return EXCPT_FAULT;
 362 }
 363
 364 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 365                 unsigned nr, bool has_error, u32 error_code,
 366                 bool reinject)
 367 {
 368         u32 prev_nr;
 369         int class1, class2;
 370
 371         kvm_make_request(KVM_REQ_EVENT, vcpu);
 372
 373         if (!vcpu->arch.exception.pending) {
 374         queue:
 375                 if (has_error && !is_protmode(vcpu))
 376                         has_error = false;
 377                 vcpu->arch.exception.pending = true;
 378                 vcpu->arch.exception.has_error_code = has_error;
 379                 vcpu->arch.exception.nr = nr;
 380                 vcpu->arch.exception.error_code = error_code;
 381                 vcpu->arch.exception.reinject = reinject;
 382                 return;
 383         }
 384
 385         /* to check exception */
 386         prev_nr = vcpu->arch.exception.nr;
 387         if (prev_nr == DF_VECTOR) {
 388                 /* triple fault -> shutdown */
 389                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 390                 return;
 391         }
 392         class1 = exception_class(prev_nr);
 393         class2 = exception_class(nr);
 394         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 395                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 396                 /* generate double fault per SDM Table 5-5 */
 397                 vcpu->arch.exception.pending = true;
 398                 vcpu->arch.exception.has_error_code = true;
 399                 vcpu->arch.exception.nr = DF_VECTOR;
 400                 vcpu->arch.exception.error_code = 0;
 401         } else
 402                 /* replace previous exception with a new one in a hope
 403                    that instruction re-execution will regenerate lost
 404                    exception */
 405                 goto queue;
 406 }
 407
 408 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 409 {
 410         kvm_multiple_exception(vcpu, nr, false, 0, false);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 413
 414 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 415 {
 416         kvm_multiple_exception(vcpu, nr, false, 0, true);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 419
 420 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 421 {
 422         if (err)
 423                 kvm_inject_gp(vcpu, 0);
 424         else
 425                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 428
 429 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 430 {
 431         ++vcpu->stat.pf_guest;
 432         vcpu->arch.cr2 = fault->address;
 433         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 436
 437 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 438 {
 439         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 440                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 441         else
 442                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 443
 444         return fault->nested_page_fault;
 445 }
 446
 447 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 448 {
 449         atomic_inc(&vcpu->arch.nmi_queued);
 450         kvm_make_request(KVM_REQ_NMI, vcpu);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 453
 454 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 455 {
 456         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 459
 460 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 461 {
 462         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 465
 466 /*
 467  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 468  * a #GP and return false.
 469  */
 470 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 471 {
 472         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 473                 return true;
 474         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 478
 479 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 480 {
 481         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 482                 return true;
 483
 484         kvm_queue_exception(vcpu, UD_VECTOR);
 485         return false;
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_require_dr);
 488
 489 /*
 490  * This function will be used to read from the physical memory of the currently
 491  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 492  * can read from guest physical or from the guest's guest physical memory.
 493  */
 494 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 495                             gfn_t ngfn, void *data, int offset, int len,
 496                             u32 access)
 497 {
 498         struct x86_exception exception;
 499         gfn_t real_gfn;
 500         gpa_t ngpa;
 501
 502         ngpa     = gfn_to_gpa(ngfn);
 503         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 504         if (real_gfn == UNMAPPED_GVA)
 505                 return -EFAULT;
 506
 507         real_gfn = gpa_to_gfn(real_gfn);
 508
 509         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 512
 513 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 514                                void *data, int offset, int len, u32 access)
 515 {
 516         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 517                                        data, offset, len, access);
 518 }
 519
 520 /*
 521  * Load the pae pdptrs.  Return true is they are all valid.
 522  */
 523 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 524 {
 525         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 526         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 527         int i;
 528         int ret;
 529         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 530
 531         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 532                                       offset * sizeof(u64), sizeof(pdpte),
 533                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 534         if (ret < 0) {
 535                 ret = 0;
 536                 goto out;
 537         }
 538         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 539                 if (is_present_gpte(pdpte[i]) &&
 540                     (pdpte[i] &
 541                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 542                         ret = 0;
 543                         goto out;
 544                 }
 545         }
 546         ret = 1;
 547
 548         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 549         __set_bit(VCPU_EXREG_PDPTR,
 550                   (unsigned long *)&vcpu->arch.regs_avail);
 551         __set_bit(VCPU_EXREG_PDPTR,
 552                   (unsigned long *)&vcpu->arch.regs_dirty);
 553 out:
 554
 555         return ret;
 556 }
 557 EXPORT_SYMBOL_GPL(load_pdptrs);
 558
 559 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 560 {
 561         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 562         bool changed = true;
 563         int offset;
 564         gfn_t gfn;
 565         int r;
 566
 567         if (is_long_mode(vcpu) || !is_pae(vcpu))
 568                 return false;
 569
 570         if (!test_bit(VCPU_EXREG_PDPTR,
 571                       (unsigned long *)&vcpu->arch.regs_avail))
 572                 return true;
 573
 574         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 575         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 576         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 577                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 578         if (r < 0)
 579                 goto out;
 580         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 581 out:
 582
 583         return changed;
 584 }
 585
 586 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 587 {
 588         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 589         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 590
 591         cr0 |= X86_CR0_ET;
 592
 593 #ifdef CONFIG_X86_64
 594         if (cr0 & 0xffffffff00000000UL)
 595                 return 1;
 596 #endif
 597
 598         cr0 &= ~CR0_RESERVED_BITS;
 599
 600         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 601                 return 1;
 602
 603         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 604                 return 1;
 605
 606         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 607 #ifdef CONFIG_X86_64
 608                 if ((vcpu->arch.efer & EFER_LME)) {
 609                         int cs_db, cs_l;
 610
 611                         if (!is_pae(vcpu))
 612                                 return 1;
 613                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 614                         if (cs_l)
 615                                 return 1;
 616                 } else
 617 #endif
 618                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 619                                                  kvm_read_cr3(vcpu)))
 620                         return 1;
 621         }
 622
 623         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 624                 return 1;
 625
 626         kvm_x86_ops->set_cr0(vcpu, cr0);
 627
 628         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 629                 kvm_clear_async_pf_completion_queue(vcpu);
 630                 kvm_async_pf_hash_reset(vcpu);
 631         }
 632
 633         if ((cr0 ^ old_cr0) & update_bits)
 634                 kvm_mmu_reset_context(vcpu);
 635
 636         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 637             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 638             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 639                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 640
 641         return 0;
 642 }
 643 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 644
 645 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 646 {
 647         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_lmsw);
 650
 651 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 652 {
 653         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 654                         !vcpu->guest_xcr0_loaded) {
 655                 /* kvm_set_xcr() also depends on this */
 656                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 657                 vcpu->guest_xcr0_loaded = 1;
 658         }
 659 }
 660
 661 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 662 {
 663         if (vcpu->guest_xcr0_loaded) {
 664                 if (vcpu->arch.xcr0 != host_xcr0)
 665                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 666                 vcpu->guest_xcr0_loaded = 0;
 667         }
 668 }
 669
 670 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 671 {
 672         u64 xcr0 = xcr;
 673         u64 old_xcr0 = vcpu->arch.xcr0;
 674         u64 valid_bits;
 675
 676         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 677         if (index != XCR_XFEATURE_ENABLED_MASK)
 678                 return 1;
 679         if (!(xcr0 & XFEATURE_MASK_FP))
 680                 return 1;
 681         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 682                 return 1;
 683
 684         /*
 685          * Do not allow the guest to set bits that we do not support
 686          * saving.  However, xcr0 bit 0 is always set, even if the
 687          * emulated CPU does not support XSAVE (see fx_init).
 688          */
 689         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 690         if (xcr0 & ~valid_bits)
 691                 return 1;
 692
 693         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 694             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 695                 return 1;
 696
 697         if (xcr0 & XFEATURE_MASK_AVX512) {
 698                 if (!(xcr0 & XFEATURE_MASK_YMM))
 699                         return 1;
 700                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 701                         return 1;
 702         }
 703         kvm_put_guest_xcr0(vcpu);
 704         vcpu->arch.xcr0 = xcr0;
 705
 706         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 707                 kvm_update_cpuid(vcpu);
 708         return 0;
 709 }
 710
 711 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 712 {
 713         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 714             __kvm_set_xcr(vcpu, index, xcr)) {
 715                 kvm_inject_gp(vcpu, 0);
 716                 return 1;
 717         }
 718         return 0;
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 721
 722 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 723 {
 724         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 725         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 726                                    X86_CR4_SMEP | X86_CR4_SMAP;
 727
 728         if (cr4 & CR4_RESERVED_BITS)
 729                 return 1;
 730
 731         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 732                 return 1;
 733
 734         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 735                 return 1;
 736
 737         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 738                 return 1;
 739
 740         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 741                 return 1;
 742
 743         if (is_long_mode(vcpu)) {
 744                 if (!(cr4 & X86_CR4_PAE))
 745                         return 1;
 746         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 747                    && ((cr4 ^ old_cr4) & pdptr_bits)
 748                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 749                                    kvm_read_cr3(vcpu)))
 750                 return 1;
 751
 752         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 753                 if (!guest_cpuid_has_pcid(vcpu))
 754                         return 1;
 755
 756                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 757                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 758                         return 1;
 759         }
 760
 761         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 762                 return 1;
 763
 764         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 765             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 766                 kvm_mmu_reset_context(vcpu);
 767
 768         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 769                 kvm_update_cpuid(vcpu);
 770
 771         return 0;
 772 }
 773 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 774
 775 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 776 {
 777 #ifdef CONFIG_X86_64
 778         cr3 &= ~CR3_PCID_INVD;
 779 #endif
 780
 781         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 782                 kvm_mmu_sync_roots(vcpu);
 783                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 784                 return 0;
 785         }
 786
 787         if (is_long_mode(vcpu)) {
 788                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 789                         return 1;
 790         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 791                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 792                 return 1;
 793
 794         vcpu->arch.cr3 = cr3;
 795         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 796         kvm_mmu_new_cr3(vcpu);
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 800
 801 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 802 {
 803         if (cr8 & CR8_RESERVED_BITS)
 804                 return 1;
 805         if (lapic_in_kernel(vcpu))
 806                 kvm_lapic_set_tpr(vcpu, cr8);
 807         else
 808                 vcpu->arch.cr8 = cr8;
 809         return 0;
 810 }
 811 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 812
 813 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 814 {
 815         if (lapic_in_kernel(vcpu))
 816                 return kvm_lapic_get_cr8(vcpu);
 817         else
 818                 return vcpu->arch.cr8;
 819 }
 820 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 821
 822 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 823 {
 824         int i;
 825
 826         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 827                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 828                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 829                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 830         }
 831 }
 832
 833 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 834 {
 835         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 836                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 837 }
 838
 839 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 840 {
 841         unsigned long dr7;
 842
 843         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 844                 dr7 = vcpu->arch.guest_debug_dr7;
 845         else
 846                 dr7 = vcpu->arch.dr7;
 847         kvm_x86_ops->set_dr7(vcpu, dr7);
 848         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 849         if (dr7 & DR7_BP_EN_MASK)
 850                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 851 }
 852
 853 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 854 {
 855         u64 fixed = DR6_FIXED_1;
 856
 857         if (!guest_cpuid_has_rtm(vcpu))
 858                 fixed |= DR6_RTM;
 859         return fixed;
 860 }
 861
 862 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 863 {
 864         switch (dr) {
 865         case 0 ... 3:
 866                 vcpu->arch.db[dr] = val;
 867                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 868                         vcpu->arch.eff_db[dr] = val;
 869                 break;
 870         case 4:
 871                 /* fall through */
 872         case 6:
 873                 if (val & 0xffffffff00000000ULL)
 874                         return -1; /* #GP */
 875                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 876                 kvm_update_dr6(vcpu);
 877                 break;
 878         case 5:
 879                 /* fall through */
 880         default: /* 7 */
 881                 if (val & 0xffffffff00000000ULL)
 882                         return -1; /* #GP */
 883                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 884                 kvm_update_dr7(vcpu);
 885                 break;
 886         }
 887
 888         return 0;
 889 }
 890
 891 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 892 {
 893         if (__kvm_set_dr(vcpu, dr, val)) {
 894                 kvm_inject_gp(vcpu, 0);
 895                 return 1;
 896         }
 897         return 0;
 898 }
 899 EXPORT_SYMBOL_GPL(kvm_set_dr);
 900
 901 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 902 {
 903         switch (dr) {
 904         case 0 ... 3:
 905                 *val = vcpu->arch.db[dr];
 906                 break;
 907         case 4:
 908                 /* fall through */
 909         case 6:
 910                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 911                         *val = vcpu->arch.dr6;
 912                 else
 913                         *val = kvm_x86_ops->get_dr6(vcpu);
 914                 break;
 915         case 5:
 916                 /* fall through */
 917         default: /* 7 */
 918                 *val = vcpu->arch.dr7;
 919                 break;
 920         }
 921         return 0;
 922 }
 923 EXPORT_SYMBOL_GPL(kvm_get_dr);
 924
 925 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 926 {
 927         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 928         u64 data;
 929         int err;
 930
 931         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 932         if (err)
 933                 return err;
 934         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 935         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 936         return err;
 937 }
 938 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 939
 940 /*
 941  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 942  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 943  *
 944  * This list is modified at module load time to reflect the
 945  * capabilities of the host cpu. This capabilities test skips MSRs that are
 946  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 947  * may depend on host virtualization features rather than host cpu features.
 948  */
 949
 950 static u32 msrs_to_save[] = {
 951         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 952         MSR_STAR,
 953 #ifdef CONFIG_X86_64
 954         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 955 #endif
 956         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 957         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 958 };
 959
 960 static unsigned num_msrs_to_save;
 961
 962 static u32 emulated_msrs[] = {
 963         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 964         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 965         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 966         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 967         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 968         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 969         HV_X64_MSR_RESET,
 970         HV_X64_MSR_VP_INDEX,
 971         HV_X64_MSR_VP_RUNTIME,
 972         HV_X64_MSR_SCONTROL,
 973         HV_X64_MSR_STIMER0_CONFIG,
 974         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 975         MSR_KVM_PV_EOI_EN,
 976
 977         MSR_IA32_TSC_ADJUST,
 978         MSR_IA32_TSCDEADLINE,
 979         MSR_IA32_MISC_ENABLE,
 980         MSR_IA32_MCG_STATUS,
 981         MSR_IA32_MCG_CTL,
 982         MSR_IA32_SMBASE,
 983 };
 984
 985 static unsigned num_emulated_msrs;
 986
 987 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 988 {
 989         if (efer & efer_reserved_bits)
 990                 return false;
 991
 992         if (efer & EFER_FFXSR) {
 993                 struct kvm_cpuid_entry2 *feat;
 994
 995                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 996                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 997                         return false;
 998         }
 999
1000         if (efer & EFER_SVME) {
1001                 struct kvm_cpuid_entry2 *feat;
1002
1003                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1004                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1005                         return false;
1006         }
1007
1008         return true;
1009 }
1010 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1011
1012 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1013 {
1014         u64 old_efer = vcpu->arch.efer;
1015
1016         if (!kvm_valid_efer(vcpu, efer))
1017                 return 1;
1018
1019         if (is_paging(vcpu)
1020             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1021                 return 1;
1022
1023         efer &= ~EFER_LMA;
1024         efer |= vcpu->arch.efer & EFER_LMA;
1025
1026         kvm_x86_ops->set_efer(vcpu, efer);
1027
1028         /* Update reserved bits */
1029         if ((efer ^ old_efer) & EFER_NX)
1030                 kvm_mmu_reset_context(vcpu);
1031
1032         return 0;
1033 }
1034
1035 void kvm_enable_efer_bits(u64 mask)
1036 {
1037        efer_reserved_bits &= ~mask;
1038 }
1039 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1040
1041 /*
1042  * Writes msr value into into the appropriate "register".
1043  * Returns 0 on success, non-0 otherwise.
1044  * Assumes vcpu_load() was already called.
1045  */
1046 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1047 {
1048         switch (msr->index) {
1049         case MSR_FS_BASE:
1050         case MSR_GS_BASE:
1051         case MSR_KERNEL_GS_BASE:
1052         case MSR_CSTAR:
1053         case MSR_LSTAR:
1054                 if (is_noncanonical_address(msr->data))
1055                         return 1;
1056                 break;
1057         case MSR_IA32_SYSENTER_EIP:
1058         case MSR_IA32_SYSENTER_ESP:
1059                 /*
1060                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1061                  * non-canonical address is written on Intel but not on
1062                  * AMD (which ignores the top 32-bits, because it does
1063                  * not implement 64-bit SYSENTER).
1064                  *
1065                  * 64-bit code should hence be able to write a non-canonical
1066                  * value on AMD.  Making the address canonical ensures that
1067                  * vmentry does not fail on Intel after writing a non-canonical
1068                  * value, and that something deterministic happens if the guest
1069                  * invokes 64-bit SYSENTER.
1070                  */
1071                 msr->data = get_canonical(msr->data);
1072         }
1073         return kvm_x86_ops->set_msr(vcpu, msr);
1074 }
1075 EXPORT_SYMBOL_GPL(kvm_set_msr);
1076
1077 /*
1078  * Adapt set_msr() to msr_io()'s calling convention
1079  */
1080 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1081 {
1082         struct msr_data msr;
1083         int r;
1084
1085         msr.index = index;
1086         msr.host_initiated = true;
1087         r = kvm_get_msr(vcpu, &msr);
1088         if (r)
1089                 return r;
1090
1091         *data = msr.data;
1092         return 0;
1093 }
1094
1095 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1096 {
1097         struct msr_data msr;
1098
1099         msr.data = *data;
1100         msr.index = index;
1101         msr.host_initiated = true;
1102         return kvm_set_msr(vcpu, &msr);
1103 }
1104
1105 #ifdef CONFIG_X86_64
1106 struct pvclock_gtod_data {
1107         seqcount_t      seq;
1108
1109         struct { /* extract of a clocksource struct */
1110                 int vclock_mode;
1111                 cycle_t cycle_last;
1112                 cycle_t mask;
1113                 u32     mult;
1114                 u32     shift;
1115         } clock;
1116
1117         u64             boot_ns;
1118         u64             nsec_base;
1119 };
1120
1121 static struct pvclock_gtod_data pvclock_gtod_data;
1122
1123 static void update_pvclock_gtod(struct timekeeper *tk)
1124 {
1125         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1126         u64 boot_ns;
1127
1128         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1129
1130         write_seqcount_begin(&vdata->seq);
1131
1132         /* copy pvclock gtod data */
1133         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1134         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1135         vdata->clock.mask               = tk->tkr_mono.mask;
1136         vdata->clock.mult               = tk->tkr_mono.mult;
1137         vdata->clock.shift              = tk->tkr_mono.shift;
1138
1139         vdata->boot_ns                  = boot_ns;
1140         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1141
1142         write_seqcount_end(&vdata->seq);
1143 }
1144 #endif
1145
1146 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1147 {
1148         /*
1149          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1150          * vcpu_enter_guest.  This function is only called from
1151          * the physical CPU that is running vcpu.
1152          */
1153         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1154 }
1155
1156 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1157 {
1158         int version;
1159         int r;
1160         struct pvclock_wall_clock wc;
1161         struct timespec boot;
1162
1163         if (!wall_clock)
1164                 return;
1165
1166         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1167         if (r)
1168                 return;
1169
1170         if (version & 1)
1171                 ++version;  /* first time write, random junk */
1172
1173         ++version;
1174
1175         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1176                 return;
1177
1178         /*
1179          * The guest calculates current wall clock time by adding
1180          * system time (updated by kvm_guest_time_update below) to the
1181          * wall clock specified here.  guest system time equals host
1182          * system time for us, thus we must fill in host boot time here.
1183          */
1184         getboottime(&boot);
1185
1186         if (kvm->arch.kvmclock_offset) {
1187                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1188                 boot = timespec_sub(boot, ts);
1189         }
1190         wc.sec = boot.tv_sec;
1191         wc.nsec = boot.tv_nsec;
1192         wc.version = version;
1193
1194         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1195
1196         version++;
1197         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1198 }
1199
1200 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1201 {
1202         do_shl32_div32(dividend, divisor);
1203         return dividend;
1204 }
1205
1206 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1207                                s8 *pshift, u32 *pmultiplier)
1208 {
1209         uint64_t scaled64;
1210         int32_t  shift = 0;
1211         uint64_t tps64;
1212         uint32_t tps32;
1213
1214         tps64 = base_hz;
1215         scaled64 = scaled_hz;
1216         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1217                 tps64 >>= 1;
1218                 shift--;
1219         }
1220
1221         tps32 = (uint32_t)tps64;
1222         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1223                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1224                         scaled64 >>= 1;
1225                 else
1226                         tps32 <<= 1;
1227                 shift++;
1228         }
1229
1230         *pshift = shift;
1231         *pmultiplier = div_frac(scaled64, tps32);
1232
1233         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1234                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1235 }
1236
1237 #ifdef CONFIG_X86_64
1238 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1239 #endif
1240
1241 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1242 static unsigned long max_tsc_khz;
1243
1244 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1245 {
1246         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1247                                    vcpu->arch.virtual_tsc_shift);
1248 }
1249
1250 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1251 {
1252         u64 v = (u64)khz * (1000000 + ppm);
1253         do_div(v, 1000000);
1254         return v;
1255 }
1256
1257 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1258 {
1259         u64 ratio;
1260
1261         /* Guest TSC same frequency as host TSC? */
1262         if (!scale) {
1263                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1264                 return 0;
1265         }
1266
1267         /* TSC scaling supported? */
1268         if (!kvm_has_tsc_control) {
1269                 if (user_tsc_khz > tsc_khz) {
1270                         vcpu->arch.tsc_catchup = 1;
1271                         vcpu->arch.tsc_always_catchup = 1;
1272                         return 0;
1273                 } else {
1274                         WARN(1, "user requested TSC rate below hardware speed\n");
1275                         return -1;
1276                 }
1277         }
1278
1279         /* TSC scaling required  - calculate ratio */
1280         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1281                                 user_tsc_khz, tsc_khz);
1282
1283         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1284                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1285                           user_tsc_khz);
1286                 return -1;
1287         }
1288
1289         vcpu->arch.tsc_scaling_ratio = ratio;
1290         return 0;
1291 }
1292
1293 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1294 {
1295         u32 thresh_lo, thresh_hi;
1296         int use_scaling = 0;
1297
1298         /* tsc_khz can be zero if TSC calibration fails */
1299         if (user_tsc_khz == 0) {
1300                 /* set tsc_scaling_ratio to a safe value */
1301                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1302                 return -1;
1303         }
1304
1305         /* Compute a scale to convert nanoseconds in TSC cycles */
1306         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1307                            &vcpu->arch.virtual_tsc_shift,
1308                            &vcpu->arch.virtual_tsc_mult);
1309         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1310
1311         /*
1312          * Compute the variation in TSC rate which is acceptable
1313          * within the range of tolerance and decide if the
1314          * rate being applied is within that bounds of the hardware
1315          * rate.  If so, no scaling or compensation need be done.
1316          */
1317         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1318         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1319         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1320                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1321                 use_scaling = 1;
1322         }
1323         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1324 }
1325
1326 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1327 {
1328         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1329                                       vcpu->arch.virtual_tsc_mult,
1330                                       vcpu->arch.virtual_tsc_shift);
1331         tsc += vcpu->arch.this_tsc_write;
1332         return tsc;
1333 }
1334
1335 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1336 {
1337 #ifdef CONFIG_X86_64
1338         bool vcpus_matched;
1339         struct kvm_arch *ka = &vcpu->kvm->arch;
1340         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1341
1342         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1343                          atomic_read(&vcpu->kvm->online_vcpus));
1344
1345         /*
1346          * Once the masterclock is enabled, always perform request in
1347          * order to update it.
1348          *
1349          * In order to enable masterclock, the host clocksource must be TSC
1350          * and the vcpus need to have matched TSCs.  When that happens,
1351          * perform request to enable masterclock.
1352          */
1353         if (ka->use_master_clock ||
1354             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1355                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1356
1357         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1358                             atomic_read(&vcpu->kvm->online_vcpus),
1359                             ka->use_master_clock, gtod->clock.vclock_mode);
1360 #endif
1361 }
1362
1363 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1364 {
1365         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1366         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1367 }
1368
1369 /*
1370  * Multiply tsc by a fixed point number represented by ratio.
1371  *
1372  * The most significant 64-N bits (mult) of ratio represent the
1373  * integral part of the fixed point number; the remaining N bits
1374  * (frac) represent the fractional part, ie. ratio represents a fixed
1375  * point number (mult + frac * 2^(-N)).
1376  *
1377  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1378  */
1379 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1380 {
1381         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1382 }
1383
1384 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1385 {
1386         u64 _tsc = tsc;
1387         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1388
1389         if (ratio != kvm_default_tsc_scaling_ratio)
1390                 _tsc = __scale_tsc(ratio, tsc);
1391
1392         return _tsc;
1393 }
1394 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1395
1396 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1397 {
1398         u64 tsc;
1399
1400         tsc = kvm_scale_tsc(vcpu, rdtsc());
1401
1402         return target_tsc - tsc;
1403 }
1404
1405 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1406 {
1407         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1408 }
1409 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1410
1411 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1412 {
1413         struct kvm *kvm = vcpu->kvm;
1414         u64 offset, ns, elapsed;
1415         unsigned long flags;
1416         s64 usdiff;
1417         bool matched;
1418         bool already_matched;
1419         u64 data = msr->data;
1420
1421         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1422         offset = kvm_compute_tsc_offset(vcpu, data);
1423         ns = get_kernel_ns();
1424         elapsed = ns - kvm->arch.last_tsc_nsec;
1425
1426         if (vcpu->arch.virtual_tsc_khz) {
1427                 int faulted = 0;
1428
1429                 /* n.b - signed multiplication and division required */
1430                 usdiff = data - kvm->arch.last_tsc_write;
1431 #ifdef CONFIG_X86_64
1432                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1433 #else
1434                 /* do_div() only does unsigned */
1435                 asm("1: idivl %[divisor]\n"
1436                     "2: xor %%edx, %%edx\n"
1437                     "   movl $0, %[faulted]\n"
1438                     "3:\n"
1439                     ".section .fixup,\"ax\"\n"
1440                     "4: movl $1, %[faulted]\n"
1441                     "   jmp  3b\n"
1442                     ".previous\n"
1443
1444                 _ASM_EXTABLE(1b, 4b)
1445
1446                 : "=A"(usdiff), [faulted] "=r" (faulted)
1447                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1448
1449 #endif
1450                 do_div(elapsed, 1000);
1451                 usdiff -= elapsed;
1452                 if (usdiff < 0)
1453                         usdiff = -usdiff;
1454
1455                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1456                 if (faulted)
1457                         usdiff = USEC_PER_SEC;
1458         } else
1459                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1460
1461         /*
1462          * Special case: TSC write with a small delta (1 second) of virtual
1463          * cycle time against real time is interpreted as an attempt to
1464          * synchronize the CPU.
1465          *
1466          * For a reliable TSC, we can match TSC offsets, and for an unstable
1467          * TSC, we add elapsed time in this computation.  We could let the
1468          * compensation code attempt to catch up if we fall behind, but
1469          * it's better to try to match offsets from the beginning.
1470          */
1471         if (usdiff < USEC_PER_SEC &&
1472             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1473                 if (!check_tsc_unstable()) {
1474                         offset = kvm->arch.cur_tsc_offset;
1475                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1476                 } else {
1477                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1478                         data += delta;
1479                         offset = kvm_compute_tsc_offset(vcpu, data);
1480                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1481                 }
1482                 matched = true;
1483                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1484         } else {
1485                 /*
1486                  * We split periods of matched TSC writes into generations.
1487                  * For each generation, we track the original measured
1488                  * nanosecond time, offset, and write, so if TSCs are in
1489                  * sync, we can match exact offset, and if not, we can match
1490                  * exact software computation in compute_guest_tsc()
1491                  *
1492                  * These values are tracked in kvm->arch.cur_xxx variables.
1493                  */
1494                 kvm->arch.cur_tsc_generation++;
1495                 kvm->arch.cur_tsc_nsec = ns;
1496                 kvm->arch.cur_tsc_write = data;
1497                 kvm->arch.cur_tsc_offset = offset;
1498                 matched = false;
1499                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1500                          kvm->arch.cur_tsc_generation, data);
1501         }
1502
1503         /*
1504          * We also track th most recent recorded KHZ, write and time to
1505          * allow the matching interval to be extended at each write.
1506          */
1507         kvm->arch.last_tsc_nsec = ns;
1508         kvm->arch.last_tsc_write = data;
1509         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1510
1511         vcpu->arch.last_guest_tsc = data;
1512
1513         /* Keep track of which generation this VCPU has synchronized to */
1514         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1515         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1516         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1517
1518         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1519                 update_ia32_tsc_adjust_msr(vcpu, offset);
1520         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1521         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1522
1523         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1524         if (!matched) {
1525                 kvm->arch.nr_vcpus_matched_tsc = 0;
1526         } else if (!already_matched) {
1527                 kvm->arch.nr_vcpus_matched_tsc++;
1528         }
1529
1530         kvm_track_tsc_matching(vcpu);
1531         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1532 }
1533
1534 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1535
1536 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1537                                            s64 adjustment)
1538 {
1539         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1540 }
1541
1542 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1543 {
1544         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1545                 WARN_ON(adjustment < 0);
1546         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1547         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1548 }
1549
1550 #ifdef CONFIG_X86_64
1551
1552 static cycle_t read_tsc(void)
1553 {
1554         cycle_t ret = (cycle_t)rdtsc_ordered();
1555         u64 last = pvclock_gtod_data.clock.cycle_last;
1556
1557         if (likely(ret >= last))
1558                 return ret;
1559
1560         /*
1561          * GCC likes to generate cmov here, but this branch is extremely
1562          * predictable (it's just a funciton of time and the likely is
1563          * very likely) and there's a data dependence, so force GCC
1564          * to generate a branch instead.  I don't barrier() because
1565          * we don't actually need a barrier, and if this function
1566          * ever gets inlined it will generate worse code.
1567          */
1568         asm volatile ("");
1569         return last;
1570 }
1571
1572 static inline u64 vgettsc(cycle_t *cycle_now)
1573 {
1574         long v;
1575         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1576
1577         *cycle_now = read_tsc();
1578
1579         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1580         return v * gtod->clock.mult;
1581 }
1582
1583 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1584 {
1585         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1586         unsigned long seq;
1587         int mode;
1588         u64 ns;
1589
1590         do {
1591                 seq = read_seqcount_begin(&gtod->seq);
1592                 mode = gtod->clock.vclock_mode;
1593                 ns = gtod->nsec_base;
1594                 ns += vgettsc(cycle_now);
1595                 ns >>= gtod->clock.shift;
1596                 ns += gtod->boot_ns;
1597         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1598         *t = ns;
1599
1600         return mode;
1601 }
1602
1603 /* returns true if host is using tsc clocksource */
1604 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1605 {
1606         /* checked again under seqlock below */
1607         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1608                 return false;
1609
1610         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1611 }
1612 #endif
1613
1614 /*
1615  *
1616  * Assuming a stable TSC across physical CPUS, and a stable TSC
1617  * across virtual CPUs, the following condition is possible.
1618  * Each numbered line represents an event visible to both
1619  * CPUs at the next numbered event.
1620  *
1621  * "timespecX" represents host monotonic time. "tscX" represents
1622  * RDTSC value.
1623  *
1624  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1625  *
1626  * 1.  read timespec0,tsc0
1627  * 2.                                   | timespec1 = timespec0 + N
1628  *                                      | tsc1 = tsc0 + M
1629  * 3. transition to guest               | transition to guest
1630  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1631  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1632  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1633  *
1634  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1635  *
1636  *      - ret0 < ret1
1637  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1638  *              ...
1639  *      - 0 < N - M => M < N
1640  *
1641  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1642  * always the case (the difference between two distinct xtime instances
1643  * might be smaller then the difference between corresponding TSC reads,
1644  * when updating guest vcpus pvclock areas).
1645  *
1646  * To avoid that problem, do not allow visibility of distinct
1647  * system_timestamp/tsc_timestamp values simultaneously: use a master
1648  * copy of host monotonic time values. Update that master copy
1649  * in lockstep.
1650  *
1651  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1652  *
1653  */
1654
1655 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1656 {
1657 #ifdef CONFIG_X86_64
1658         struct kvm_arch *ka = &kvm->arch;
1659         int vclock_mode;
1660         bool host_tsc_clocksource, vcpus_matched;
1661
1662         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1663                         atomic_read(&kvm->online_vcpus));
1664
1665         /*
1666          * If the host uses TSC clock, then passthrough TSC as stable
1667          * to the guest.
1668          */
1669         host_tsc_clocksource = kvm_get_time_and_clockread(
1670                                         &ka->master_kernel_ns,
1671                                         &ka->master_cycle_now);
1672
1673         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1674                                 && !backwards_tsc_observed
1675                                 && !ka->boot_vcpu_runs_old_kvmclock;
1676
1677         if (ka->use_master_clock)
1678                 atomic_set(&kvm_guest_has_master_clock, 1);
1679
1680         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1681         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1682                                         vcpus_matched);
1683 #endif
1684 }
1685
1686 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1687 {
1688         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1689 }
1690
1691 static void kvm_gen_update_masterclock(struct kvm *kvm)
1692 {
1693 #ifdef CONFIG_X86_64
1694         int i;
1695         struct kvm_vcpu *vcpu;
1696         struct kvm_arch *ka = &kvm->arch;
1697
1698         spin_lock(&ka->pvclock_gtod_sync_lock);
1699         kvm_make_mclock_inprogress_request(kvm);
1700         /* no guest entries from this point */
1701         pvclock_update_vm_gtod_copy(kvm);
1702
1703         kvm_for_each_vcpu(i, vcpu, kvm)
1704                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1705
1706         /* guest entries allowed */
1707         kvm_for_each_vcpu(i, vcpu, kvm)
1708                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1709
1710         spin_unlock(&ka->pvclock_gtod_sync_lock);
1711 #endif
1712 }
1713
1714 static int kvm_guest_time_update(struct kvm_vcpu *v)
1715 {
1716         unsigned long flags, tgt_tsc_khz;
1717         struct kvm_vcpu_arch *vcpu = &v->arch;
1718         struct kvm_arch *ka = &v->kvm->arch;
1719         s64 kernel_ns;
1720         u64 tsc_timestamp, host_tsc;
1721         struct pvclock_vcpu_time_info guest_hv_clock;
1722         u8 pvclock_flags;
1723         bool use_master_clock;
1724
1725         kernel_ns = 0;
1726         host_tsc = 0;
1727
1728         /*
1729          * If the host uses TSC clock, then passthrough TSC as stable
1730          * to the guest.
1731          */
1732         spin_lock(&ka->pvclock_gtod_sync_lock);
1733         use_master_clock = ka->use_master_clock;
1734         if (use_master_clock) {
1735                 host_tsc = ka->master_cycle_now;
1736                 kernel_ns = ka->master_kernel_ns;
1737         }
1738         spin_unlock(&ka->pvclock_gtod_sync_lock);
1739
1740         /* Keep irq disabled to prevent changes to the clock */
1741         local_irq_save(flags);
1742         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1743         if (unlikely(tgt_tsc_khz == 0)) {
1744                 local_irq_restore(flags);
1745                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1746                 return 1;
1747         }
1748         if (!use_master_clock) {
1749                 host_tsc = rdtsc();
1750                 kernel_ns = get_kernel_ns();
1751         }
1752
1753         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1754
1755         /*
1756          * We may have to catch up the TSC to match elapsed wall clock
1757          * time for two reasons, even if kvmclock is used.
1758          *   1) CPU could have been running below the maximum TSC rate
1759          *   2) Broken TSC compensation resets the base at each VCPU
1760          *      entry to avoid unknown leaps of TSC even when running
1761          *      again on the same CPU.  This may cause apparent elapsed
1762          *      time to disappear, and the guest to stand still or run
1763          *      very slowly.
1764          */
1765         if (vcpu->tsc_catchup) {
1766                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1767                 if (tsc > tsc_timestamp) {
1768                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1769                         tsc_timestamp = tsc;
1770                 }
1771         }
1772
1773         local_irq_restore(flags);
1774
1775         if (!vcpu->pv_time_enabled)
1776                 return 0;
1777
1778         if (kvm_has_tsc_control)
1779                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1780
1781         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1782                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1783                                    &vcpu->hv_clock.tsc_shift,
1784                                    &vcpu->hv_clock.tsc_to_system_mul);
1785                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1786         }
1787
1788         /* With all the info we got, fill in the values */
1789         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1790         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1791         vcpu->last_guest_tsc = tsc_timestamp;
1792
1793         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1794                 &guest_hv_clock, sizeof(guest_hv_clock))))
1795                 return 0;
1796
1797         /* This VCPU is paused, but it's legal for a guest to read another
1798          * VCPU's kvmclock, so we really have to follow the specification where
1799          * it says that version is odd if data is being modified, and even after
1800          * it is consistent.
1801          *
1802          * Version field updates must be kept separate.  This is because
1803          * kvm_write_guest_cached might use a "rep movs" instruction, and
1804          * writes within a string instruction are weakly ordered.  So there
1805          * are three writes overall.
1806          *
1807          * As a small optimization, only write the version field in the first
1808          * and third write.  The vcpu->pv_time cache is still valid, because the
1809          * version field is the first in the struct.
1810          */
1811         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1812
1813         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1814         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1815                                 &vcpu->hv_clock,
1816                                 sizeof(vcpu->hv_clock.version));
1817
1818         smp_wmb();
1819
1820         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1821         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1822
1823         if (vcpu->pvclock_set_guest_stopped_request) {
1824                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1825                 vcpu->pvclock_set_guest_stopped_request = false;
1826         }
1827
1828         /* If the host uses TSC clocksource, then it is stable */
1829         if (use_master_clock)
1830                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1831
1832         vcpu->hv_clock.flags = pvclock_flags;
1833
1834         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1835
1836         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1837                                 &vcpu->hv_clock,
1838                                 sizeof(vcpu->hv_clock));
1839
1840         smp_wmb();
1841
1842         vcpu->hv_clock.version++;
1843         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1844                                 &vcpu->hv_clock,
1845                                 sizeof(vcpu->hv_clock.version));
1846         return 0;
1847 }
1848
1849 /*
1850  * kvmclock updates which are isolated to a given vcpu, such as
1851  * vcpu->cpu migration, should not allow system_timestamp from
1852  * the rest of the vcpus to remain static. Otherwise ntp frequency
1853  * correction applies to one vcpu's system_timestamp but not
1854  * the others.
1855  *
1856  * So in those cases, request a kvmclock update for all vcpus.
1857  * We need to rate-limit these requests though, as they can
1858  * considerably slow guests that have a large number of vcpus.
1859  * The time for a remote vcpu to update its kvmclock is bound
1860  * by the delay we use to rate-limit the updates.
1861  */
1862
1863 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1864
1865 static void kvmclock_update_fn(struct work_struct *work)
1866 {
1867         int i;
1868         struct delayed_work *dwork = to_delayed_work(work);
1869         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1870                                            kvmclock_update_work);
1871         struct kvm *kvm = container_of(ka, struct kvm, arch);
1872         struct kvm_vcpu *vcpu;
1873
1874         kvm_for_each_vcpu(i, vcpu, kvm) {
1875                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1876                 kvm_vcpu_kick(vcpu);
1877         }
1878 }
1879
1880 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1881 {
1882         struct kvm *kvm = v->kvm;
1883
1884         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1885         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1886                                         KVMCLOCK_UPDATE_DELAY);
1887 }
1888
1889 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1890
1891 static void kvmclock_sync_fn(struct work_struct *work)
1892 {
1893         struct delayed_work *dwork = to_delayed_work(work);
1894         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1895                                            kvmclock_sync_work);
1896         struct kvm *kvm = container_of(ka, struct kvm, arch);
1897
1898         if (!kvmclock_periodic_sync)
1899                 return;
1900
1901         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1902         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1903                                         KVMCLOCK_SYNC_PERIOD);
1904 }
1905
1906 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1907 {
1908         u64 mcg_cap = vcpu->arch.mcg_cap;
1909         unsigned bank_num = mcg_cap & 0xff;
1910
1911         switch (msr) {
1912         case MSR_IA32_MCG_STATUS:
1913                 vcpu->arch.mcg_status = data;
1914                 break;
1915         case MSR_IA32_MCG_CTL:
1916                 if (!(mcg_cap & MCG_CTL_P))
1917                         return 1;
1918                 if (data != 0 && data != ~(u64)0)
1919                         return -1;
1920                 vcpu->arch.mcg_ctl = data;
1921                 break;
1922         default:
1923                 if (msr >= MSR_IA32_MC0_CTL &&
1924                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1925                         u32 offset = msr - MSR_IA32_MC0_CTL;
1926                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1927                          * some Linux kernels though clear bit 10 in bank 4 to
1928                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1929                          * this to avoid an uncatched #GP in the guest
1930                          */
1931                         if ((offset & 0x3) == 0 &&
1932                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1933                                 return -1;
1934                         vcpu->arch.mce_banks[offset] = data;
1935                         break;
1936                 }
1937                 return 1;
1938         }
1939         return 0;
1940 }
1941
1942 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1943 {
1944         struct kvm *kvm = vcpu->kvm;
1945         int lm = is_long_mode(vcpu);
1946         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1947                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1948         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1949                 : kvm->arch.xen_hvm_config.blob_size_32;
1950         u32 page_num = data & ~PAGE_MASK;
1951         u64 page_addr = data & PAGE_MASK;
1952         u8 *page;
1953         int r;
1954
1955         r = -E2BIG;
1956         if (page_num >= blob_size)
1957                 goto out;
1958         r = -ENOMEM;
1959         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1960         if (IS_ERR(page)) {
1961                 r = PTR_ERR(page);
1962                 goto out;
1963         }
1964         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1965                 goto out_free;
1966         r = 0;
1967 out_free:
1968         kfree(page);
1969 out:
1970         return r;
1971 }
1972
1973 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1974 {
1975         gpa_t gpa = data & ~0x3f;
1976
1977         /* Bits 2:5 are reserved, Should be zero */
1978         if (data & 0x3c)
1979                 return 1;
1980
1981         vcpu->arch.apf.msr_val = data;
1982
1983         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1984                 kvm_clear_async_pf_completion_queue(vcpu);
1985                 kvm_async_pf_hash_reset(vcpu);
1986                 return 0;
1987         }
1988
1989         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1990                                         sizeof(u32)))
1991                 return 1;
1992
1993         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1994         kvm_async_pf_wakeup_all(vcpu);
1995         return 0;
1996 }
1997
1998 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1999 {
2000         vcpu->arch.pv_time_enabled = false;
2001 }
2002
2003 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2004 {
2005         u64 delta;
2006
2007         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2008                 return;
2009
2010         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2011         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2012         vcpu->arch.st.accum_steal = delta;
2013 }
2014
2015 static void record_steal_time(struct kvm_vcpu *vcpu)
2016 {
2017         accumulate_steal_time(vcpu);
2018
2019         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2020                 return;
2021
2022         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2023                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2024                 return;
2025
2026         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2027         vcpu->arch.st.steal.version += 2;
2028         vcpu->arch.st.accum_steal = 0;
2029
2030         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2031                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2032 }
2033
2034 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2035 {
2036         bool pr = false;
2037         u32 msr = msr_info->index;
2038         u64 data = msr_info->data;
2039
2040         switch (msr) {
2041         case MSR_AMD64_NB_CFG:
2042         case MSR_IA32_UCODE_REV:
2043         case MSR_IA32_UCODE_WRITE:
2044         case MSR_VM_HSAVE_PA:
2045         case MSR_AMD64_PATCH_LOADER:
2046         case MSR_AMD64_BU_CFG2:
2047                 break;
2048
2049         case MSR_EFER:
2050                 return set_efer(vcpu, data);
2051         case MSR_K7_HWCR:
2052                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2053                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2054                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2055                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2056                 if (data != 0) {
2057                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2058                                     data);
2059                         return 1;
2060                 }
2061                 break;
2062         case MSR_FAM10H_MMIO_CONF_BASE:
2063                 if (data != 0) {
2064                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2065                                     "0x%llx\n", data);
2066                         return 1;
2067                 }
2068                 break;
2069         case MSR_IA32_DEBUGCTLMSR:
2070                 if (!data) {
2071                         /* We support the non-activated case already */
2072                         break;
2073                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2074                         /* Values other than LBR and BTF are vendor-specific,
2075                            thus reserved and should throw a #GP */
2076                         return 1;
2077                 }
2078                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2079                             __func__, data);
2080                 break;
2081         case 0x200 ... 0x2ff:
2082                 return kvm_mtrr_set_msr(vcpu, msr, data);
2083         case MSR_IA32_APICBASE:
2084                 return kvm_set_apic_base(vcpu, msr_info);
2085         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2086                 return kvm_x2apic_msr_write(vcpu, msr, data);
2087         case MSR_IA32_TSCDEADLINE:
2088                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2089                 break;
2090         case MSR_IA32_TSC_ADJUST:
2091                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2092                         if (!msr_info->host_initiated) {
2093                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2094                                 adjust_tsc_offset_guest(vcpu, adj);
2095                         }
2096                         vcpu->arch.ia32_tsc_adjust_msr = data;
2097                 }
2098                 break;
2099         case MSR_IA32_MISC_ENABLE:
2100                 vcpu->arch.ia32_misc_enable_msr = data;
2101                 break;
2102         case MSR_IA32_SMBASE:
2103                 if (!msr_info->host_initiated)
2104                         return 1;
2105                 vcpu->arch.smbase = data;
2106                 break;
2107         case MSR_KVM_WALL_CLOCK_NEW:
2108         case MSR_KVM_WALL_CLOCK:
2109                 vcpu->kvm->arch.wall_clock = data;
2110                 kvm_write_wall_clock(vcpu->kvm, data);
2111                 break;
2112         case MSR_KVM_SYSTEM_TIME_NEW:
2113         case MSR_KVM_SYSTEM_TIME: {
2114                 u64 gpa_offset;
2115                 struct kvm_arch *ka = &vcpu->kvm->arch;
2116
2117                 kvmclock_reset(vcpu);
2118
2119                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2120                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2121
2122                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2123                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2124                                         &vcpu->requests);
2125
2126                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2127                 }
2128
2129                 vcpu->arch.time = data;
2130                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2131
2132                 /* we verify if the enable bit is set... */
2133                 if (!(data & 1))
2134                         break;
2135
2136                 gpa_offset = data & ~(PAGE_MASK | 1);
2137
2138                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2139                      &vcpu->arch.pv_time, data & ~1ULL,
2140                      sizeof(struct pvclock_vcpu_time_info)))
2141                         vcpu->arch.pv_time_enabled = false;
2142                 else
2143                         vcpu->arch.pv_time_enabled = true;
2144
2145                 break;
2146         }
2147         case MSR_KVM_ASYNC_PF_EN:
2148                 if (kvm_pv_enable_async_pf(vcpu, data))
2149                         return 1;
2150                 break;
2151         case MSR_KVM_STEAL_TIME:
2152
2153                 if (unlikely(!sched_info_on()))
2154                         return 1;
2155
2156                 if (data & KVM_STEAL_RESERVED_MASK)
2157                         return 1;
2158
2159                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2160                                                 data & KVM_STEAL_VALID_BITS,
2161                                                 sizeof(struct kvm_steal_time)))
2162                         return 1;
2163
2164                 vcpu->arch.st.msr_val = data;
2165
2166                 if (!(data & KVM_MSR_ENABLED))
2167                         break;
2168
2169                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2170
2171                 break;
2172         case MSR_KVM_PV_EOI_EN:
2173                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2174                         return 1;
2175                 break;
2176
2177         case MSR_IA32_MCG_CTL:
2178         case MSR_IA32_MCG_STATUS:
2179         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2180                 return set_msr_mce(vcpu, msr, data);
2181
2182         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2183         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2184                 pr = true; /* fall through */
2185         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2186         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2187                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2188                         return kvm_pmu_set_msr(vcpu, msr_info);
2189
2190                 if (pr || data != 0)
2191                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2192                                     "0x%x data 0x%llx\n", msr, data);
2193                 break;
2194         case MSR_K7_CLK_CTL:
2195                 /*
2196                  * Ignore all writes to this no longer documented MSR.
2197                  * Writes are only relevant for old K7 processors,
2198                  * all pre-dating SVM, but a recommended workaround from
2199                  * AMD for these chips. It is possible to specify the
2200                  * affected processor models on the command line, hence
2201                  * the need to ignore the workaround.
2202                  */
2203                 break;
2204         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2205         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2206         case HV_X64_MSR_CRASH_CTL:
2207         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2208                 return kvm_hv_set_msr_common(vcpu, msr, data,
2209                                              msr_info->host_initiated);
2210         case MSR_IA32_BBL_CR_CTL3:
2211                 /* Drop writes to this legacy MSR -- see rdmsr
2212                  * counterpart for further detail.
2213                  */
2214                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2215                 break;
2216         case MSR_AMD64_OSVW_ID_LENGTH:
2217                 if (!guest_cpuid_has_osvw(vcpu))
2218                         return 1;
2219                 vcpu->arch.osvw.length = data;
2220                 break;
2221         case MSR_AMD64_OSVW_STATUS:
2222                 if (!guest_cpuid_has_osvw(vcpu))
2223                         return 1;
2224                 vcpu->arch.osvw.status = data;
2225                 break;
2226         default:
2227                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2228                         return xen_hvm_config(vcpu, data);
2229                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2230                         return kvm_pmu_set_msr(vcpu, msr_info);
2231                 if (!ignore_msrs) {
2232                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2233                                     msr, data);
2234                         return 1;
2235                 } else {
2236                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2237                                     msr, data);
2238                         break;
2239                 }
2240         }
2241         return 0;
2242 }
2243 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2244
2245
2246 /*
2247  * Reads an msr value (of 'msr_index') into 'pdata'.
2248  * Returns 0 on success, non-0 otherwise.
2249  * Assumes vcpu_load() was already called.
2250  */
2251 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2252 {
2253         return kvm_x86_ops->get_msr(vcpu, msr);
2254 }
2255 EXPORT_SYMBOL_GPL(kvm_get_msr);
2256
2257 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2258 {
2259         u64 data;
2260         u64 mcg_cap = vcpu->arch.mcg_cap;
2261         unsigned bank_num = mcg_cap & 0xff;
2262
2263         switch (msr) {
2264         case MSR_IA32_P5_MC_ADDR:
2265         case MSR_IA32_P5_MC_TYPE:
2266                 data = 0;
2267                 break;
2268         case MSR_IA32_MCG_CAP:
2269                 data = vcpu->arch.mcg_cap;
2270                 break;
2271         case MSR_IA32_MCG_CTL:
2272                 if (!(mcg_cap & MCG_CTL_P))
2273                         return 1;
2274                 data = vcpu->arch.mcg_ctl;
2275                 break;
2276         case MSR_IA32_MCG_STATUS:
2277                 data = vcpu->arch.mcg_status;
2278                 break;
2279         default:
2280                 if (msr >= MSR_IA32_MC0_CTL &&
2281                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2282                         u32 offset = msr - MSR_IA32_MC0_CTL;
2283                         data = vcpu->arch.mce_banks[offset];
2284                         break;
2285                 }
2286                 return 1;
2287         }
2288         *pdata = data;
2289         return 0;
2290 }
2291
2292 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2293 {
2294         switch (msr_info->index) {
2295         case MSR_IA32_PLATFORM_ID:
2296         case MSR_IA32_EBL_CR_POWERON:
2297         case MSR_IA32_DEBUGCTLMSR:
2298         case MSR_IA32_LASTBRANCHFROMIP:
2299         case MSR_IA32_LASTBRANCHTOIP:
2300         case MSR_IA32_LASTINTFROMIP:
2301         case MSR_IA32_LASTINTTOIP:
2302         case MSR_K8_SYSCFG:
2303         case MSR_K8_TSEG_ADDR:
2304         case MSR_K8_TSEG_MASK:
2305         case MSR_K7_HWCR:
2306         case MSR_VM_HSAVE_PA:
2307         case MSR_K8_INT_PENDING_MSG:
2308         case MSR_AMD64_NB_CFG:
2309         case MSR_FAM10H_MMIO_CONF_BASE:
2310         case MSR_AMD64_BU_CFG2:
2311                 msr_info->data = 0;
2312                 break;
2313         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2314         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2315         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2316         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2317                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2318                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2319                 msr_info->data = 0;
2320                 break;
2321         case MSR_IA32_UCODE_REV:
2322                 msr_info->data = 0x100000000ULL;
2323                 break;
2324         case MSR_MTRRcap:
2325         case 0x200 ... 0x2ff:
2326                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2327         case 0xcd: /* fsb frequency */
2328                 msr_info->data = 3;
2329                 break;
2330                 /*
2331                  * MSR_EBC_FREQUENCY_ID
2332                  * Conservative value valid for even the basic CPU models.
2333                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2334                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2335                  * and 266MHz for model 3, or 4. Set Core Clock
2336                  * Frequency to System Bus Frequency Ratio to 1 (bits
2337                  * 31:24) even though these are only valid for CPU
2338                  * models > 2, however guests may end up dividing or
2339                  * multiplying by zero otherwise.
2340                  */
2341         case MSR_EBC_FREQUENCY_ID:
2342                 msr_info->data = 1 << 24;
2343                 break;
2344         case MSR_IA32_APICBASE:
2345                 msr_info->data = kvm_get_apic_base(vcpu);
2346                 break;
2347         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2348                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2349                 break;
2350         case MSR_IA32_TSCDEADLINE:
2351                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2352                 break;
2353         case MSR_IA32_TSC_ADJUST:
2354                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2355                 break;
2356         case MSR_IA32_MISC_ENABLE:
2357                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2358                 break;
2359         case MSR_IA32_SMBASE:
2360                 if (!msr_info->host_initiated)
2361                         return 1;
2362                 msr_info->data = vcpu->arch.smbase;
2363                 break;
2364         case MSR_IA32_PERF_STATUS:
2365                 /* TSC increment by tick */
2366                 msr_info->data = 1000ULL;
2367                 /* CPU multiplier */
2368                 msr_info->data |= (((uint64_t)4ULL) << 40);
2369                 break;
2370         case MSR_EFER:
2371                 msr_info->data = vcpu->arch.efer;
2372                 break;
2373         case MSR_KVM_WALL_CLOCK:
2374         case MSR_KVM_WALL_CLOCK_NEW:
2375                 msr_info->data = vcpu->kvm->arch.wall_clock;
2376                 break;
2377         case MSR_KVM_SYSTEM_TIME:
2378         case MSR_KVM_SYSTEM_TIME_NEW:
2379                 msr_info->data = vcpu->arch.time;
2380                 break;
2381         case MSR_KVM_ASYNC_PF_EN:
2382                 msr_info->data = vcpu->arch.apf.msr_val;
2383                 break;
2384         case MSR_KVM_STEAL_TIME:
2385                 msr_info->data = vcpu->arch.st.msr_val;
2386                 break;
2387         case MSR_KVM_PV_EOI_EN:
2388                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2389                 break;
2390         case MSR_IA32_P5_MC_ADDR:
2391         case MSR_IA32_P5_MC_TYPE:
2392         case MSR_IA32_MCG_CAP:
2393         case MSR_IA32_MCG_CTL:
2394         case MSR_IA32_MCG_STATUS:
2395         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2396                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2397         case MSR_K7_CLK_CTL:
2398                 /*
2399                  * Provide expected ramp-up count for K7. All other
2400                  * are set to zero, indicating minimum divisors for
2401                  * every field.
2402                  *
2403                  * This prevents guest kernels on AMD host with CPU
2404                  * type 6, model 8 and higher from exploding due to
2405                  * the rdmsr failing.
2406                  */
2407                 msr_info->data = 0x20000000;
2408                 break;
2409         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2410         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2411         case HV_X64_MSR_CRASH_CTL:
2412         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2413                 return kvm_hv_get_msr_common(vcpu,
2414                                              msr_info->index, &msr_info->data);
2415                 break;
2416         case MSR_IA32_BBL_CR_CTL3:
2417                 /* This legacy MSR exists but isn't fully documented in current
2418                  * silicon.  It is however accessed by winxp in very narrow
2419                  * scenarios where it sets bit #19, itself documented as
2420                  * a "reserved" bit.  Best effort attempt to source coherent
2421                  * read data here should the balance of the register be
2422                  * interpreted by the guest:
2423                  *
2424                  * L2 cache control register 3: 64GB range, 256KB size,
2425                  * enabled, latency 0x1, configured
2426                  */
2427                 msr_info->data = 0xbe702111;
2428                 break;
2429         case MSR_AMD64_OSVW_ID_LENGTH:
2430                 if (!guest_cpuid_has_osvw(vcpu))
2431                         return 1;
2432                 msr_info->data = vcpu->arch.osvw.length;
2433                 break;
2434         case MSR_AMD64_OSVW_STATUS:
2435                 if (!guest_cpuid_has_osvw(vcpu))
2436                         return 1;
2437                 msr_info->data = vcpu->arch.osvw.status;
2438                 break;
2439         default:
2440                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2441                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2442                 if (!ignore_msrs) {
2443                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2444                         return 1;
2445                 } else {
2446                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2447                         msr_info->data = 0;
2448                 }
2449                 break;
2450         }
2451         return 0;
2452 }
2453 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2454
2455 /*
2456  * Read or write a bunch of msrs. All parameters are kernel addresses.
2457  *
2458  * @return number of msrs set successfully.
2459  */
2460 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2461                     struct kvm_msr_entry *entries,
2462                     int (*do_msr)(struct kvm_vcpu *vcpu,
2463                                   unsigned index, u64 *data))
2464 {
2465         int i, idx;
2466
2467         idx = srcu_read_lock(&vcpu->kvm->srcu);
2468         for (i = 0; i < msrs->nmsrs; ++i)
2469                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2470                         break;
2471         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2472
2473         return i;
2474 }
2475
2476 /*
2477  * Read or write a bunch of msrs. Parameters are user addresses.
2478  *
2479  * @return number of msrs set successfully.
2480  */
2481 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2482                   int (*do_msr)(struct kvm_vcpu *vcpu,
2483                                 unsigned index, u64 *data),
2484                   int writeback)
2485 {
2486         struct kvm_msrs msrs;
2487         struct kvm_msr_entry *entries;
2488         int r, n;
2489         unsigned size;
2490
2491         r = -EFAULT;
2492         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2493                 goto out;
2494
2495         r = -E2BIG;
2496         if (msrs.nmsrs >= MAX_IO_MSRS)
2497                 goto out;
2498
2499         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2500         entries = memdup_user(user_msrs->entries, size);
2501         if (IS_ERR(entries)) {
2502                 r = PTR_ERR(entries);
2503                 goto out;
2504         }
2505
2506         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2507         if (r < 0)
2508                 goto out_free;
2509
2510         r = -EFAULT;
2511         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2512                 goto out_free;
2513
2514         r = n;
2515
2516 out_free:
2517         kfree(entries);
2518 out:
2519         return r;
2520 }
2521
2522 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2523 {
2524         int r;
2525
2526         switch (ext) {
2527         case KVM_CAP_IRQCHIP:
2528         case KVM_CAP_HLT:
2529         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2530         case KVM_CAP_SET_TSS_ADDR:
2531         case KVM_CAP_EXT_CPUID:
2532         case KVM_CAP_EXT_EMUL_CPUID:
2533         case KVM_CAP_CLOCKSOURCE:
2534         case KVM_CAP_PIT:
2535         case KVM_CAP_NOP_IO_DELAY:
2536         case KVM_CAP_MP_STATE:
2537         case KVM_CAP_SYNC_MMU:
2538         case KVM_CAP_USER_NMI:
2539         case KVM_CAP_REINJECT_CONTROL:
2540         case KVM_CAP_IRQ_INJECT_STATUS:
2541         case KVM_CAP_IOEVENTFD:
2542         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2543         case KVM_CAP_PIT2:
2544         case KVM_CAP_PIT_STATE2:
2545         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2546         case KVM_CAP_XEN_HVM:
2547         case KVM_CAP_ADJUST_CLOCK:
2548         case KVM_CAP_VCPU_EVENTS:
2549         case KVM_CAP_HYPERV:
2550         case KVM_CAP_HYPERV_VAPIC:
2551         case KVM_CAP_HYPERV_SPIN:
2552         case KVM_CAP_HYPERV_SYNIC:
2553         case KVM_CAP_PCI_SEGMENT:
2554         case KVM_CAP_DEBUGREGS:
2555         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2556         case KVM_CAP_XSAVE:
2557         case KVM_CAP_ASYNC_PF:
2558         case KVM_CAP_GET_TSC_KHZ:
2559         case KVM_CAP_KVMCLOCK_CTRL:
2560         case KVM_CAP_READONLY_MEM:
2561         case KVM_CAP_HYPERV_TIME:
2562         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2563         case KVM_CAP_TSC_DEADLINE_TIMER:
2564         case KVM_CAP_ENABLE_CAP_VM:
2565         case KVM_CAP_DISABLE_QUIRKS:
2566         case KVM_CAP_SET_BOOT_CPU_ID:
2567         case KVM_CAP_SPLIT_IRQCHIP:
2568 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2569         case KVM_CAP_ASSIGN_DEV_IRQ:
2570         case KVM_CAP_PCI_2_3:
2571 #endif
2572                 r = 1;
2573                 break;
2574         case KVM_CAP_X86_SMM:
2575                 /* SMBASE is usually relocated above 1M on modern chipsets,
2576                  * and SMM handlers might indeed rely on 4G segment limits,
2577                  * so do not report SMM to be available if real mode is
2578                  * emulated via vm86 mode.  Still, do not go to great lengths
2579                  * to avoid userspace's usage of the feature, because it is a
2580                  * fringe case that is not enabled except via specific settings
2581                  * of the module parameters.
2582                  */
2583                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2584                 break;
2585         case KVM_CAP_COALESCED_MMIO:
2586                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2587                 break;
2588         case KVM_CAP_VAPIC:
2589                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2590                 break;
2591         case KVM_CAP_NR_VCPUS:
2592                 r = KVM_SOFT_MAX_VCPUS;
2593                 break;
2594         case KVM_CAP_MAX_VCPUS:
2595                 r = KVM_MAX_VCPUS;
2596                 break;
2597         case KVM_CAP_NR_MEMSLOTS:
2598                 r = KVM_USER_MEM_SLOTS;
2599                 break;
2600         case KVM_CAP_PV_MMU:    /* obsolete */
2601                 r = 0;
2602                 break;
2603 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2604         case KVM_CAP_IOMMU:
2605                 r = iommu_present(&pci_bus_type);
2606                 break;
2607 #endif
2608         case KVM_CAP_MCE:
2609                 r = KVM_MAX_MCE_BANKS;
2610                 break;
2611         case KVM_CAP_XCRS:
2612                 r = cpu_has_xsave;
2613                 break;
2614         case KVM_CAP_TSC_CONTROL:
2615                 r = kvm_has_tsc_control;
2616                 break;
2617         default:
2618                 r = 0;
2619                 break;
2620         }
2621         return r;
2622
2623 }
2624
2625 long kvm_arch_dev_ioctl(struct file *filp,
2626                         unsigned int ioctl, unsigned long arg)
2627 {
2628         void __user *argp = (void __user *)arg;
2629         long r;
2630
2631         switch (ioctl) {
2632         case KVM_GET_MSR_INDEX_LIST: {
2633                 struct kvm_msr_list __user *user_msr_list = argp;
2634                 struct kvm_msr_list msr_list;
2635                 unsigned n;
2636
2637                 r = -EFAULT;
2638                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2639                         goto out;
2640                 n = msr_list.nmsrs;
2641                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2642                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2643                         goto out;
2644                 r = -E2BIG;
2645                 if (n < msr_list.nmsrs)
2646                         goto out;
2647                 r = -EFAULT;
2648                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2649                                  num_msrs_to_save * sizeof(u32)))
2650                         goto out;
2651                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2652                                  &emulated_msrs,
2653                                  num_emulated_msrs * sizeof(u32)))
2654                         goto out;
2655                 r = 0;
2656                 break;
2657         }
2658         case KVM_GET_SUPPORTED_CPUID:
2659         case KVM_GET_EMULATED_CPUID: {
2660                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2661                 struct kvm_cpuid2 cpuid;
2662
2663                 r = -EFAULT;
2664                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2665                         goto out;
2666
2667                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2668                                             ioctl);
2669                 if (r)
2670                         goto out;
2671
2672                 r = -EFAULT;
2673                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2679                 u64 mce_cap;
2680
2681                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2682                 r = -EFAULT;
2683                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2684                         goto out;
2685                 r = 0;
2686                 break;
2687         }
2688         default:
2689                 r = -EINVAL;
2690         }
2691 out:
2692         return r;
2693 }
2694
2695 static void wbinvd_ipi(void *garbage)
2696 {
2697         wbinvd();
2698 }
2699
2700 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2701 {
2702         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2703 }
2704
2705 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2706 {
2707         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2708 }
2709
2710 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2711 {
2712         /* Address WBINVD may be executed by guest */
2713         if (need_emulate_wbinvd(vcpu)) {
2714                 if (kvm_x86_ops->has_wbinvd_exit())
2715                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2716                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2717                         smp_call_function_single(vcpu->cpu,
2718                                         wbinvd_ipi, NULL, 1);
2719         }
2720
2721         kvm_x86_ops->vcpu_load(vcpu, cpu);
2722
2723         /* Apply any externally detected TSC adjustments (due to suspend) */
2724         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2725                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2726                 vcpu->arch.tsc_offset_adjustment = 0;
2727                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2728         }
2729
2730         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2731                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2732                                 rdtsc() - vcpu->arch.last_host_tsc;
2733                 if (tsc_delta < 0)
2734                         mark_tsc_unstable("KVM discovered backwards TSC");
2735                 if (check_tsc_unstable()) {
2736                         u64 offset = kvm_compute_tsc_offset(vcpu,
2737                                                 vcpu->arch.last_guest_tsc);
2738                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2739                         vcpu->arch.tsc_catchup = 1;
2740                 }
2741                 /*
2742                  * On a host with synchronized TSC, there is no need to update
2743                  * kvmclock on vcpu->cpu migration
2744                  */
2745                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2746                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2747                 if (vcpu->cpu != cpu)
2748                         kvm_migrate_timers(vcpu);
2749                 vcpu->cpu = cpu;
2750         }
2751
2752         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2753 }
2754
2755 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2756 {
2757         kvm_x86_ops->vcpu_put(vcpu);
2758         kvm_put_guest_fpu(vcpu);
2759         vcpu->arch.last_host_tsc = rdtsc();
2760 }
2761
2762 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2763                                     struct kvm_lapic_state *s)
2764 {
2765         if (vcpu->arch.apicv_active)
2766                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2767
2768         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2769
2770         return 0;
2771 }
2772
2773 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2774                                     struct kvm_lapic_state *s)
2775 {
2776         kvm_apic_post_state_restore(vcpu, s);
2777         update_cr8_intercept(vcpu);
2778
2779         return 0;
2780 }
2781
2782 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2783 {
2784         return (!lapic_in_kernel(vcpu) ||
2785                 kvm_apic_accept_pic_intr(vcpu));
2786 }
2787
2788 /*
2789  * if userspace requested an interrupt window, check that the
2790  * interrupt window is open.
2791  *
2792  * No need to exit to userspace if we already have an interrupt queued.
2793  */
2794 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2795 {
2796         return kvm_arch_interrupt_allowed(vcpu) &&
2797                 !kvm_cpu_has_interrupt(vcpu) &&
2798                 !kvm_event_needs_reinjection(vcpu) &&
2799                 kvm_cpu_accept_dm_intr(vcpu);
2800 }
2801
2802 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2803                                     struct kvm_interrupt *irq)
2804 {
2805         if (irq->irq >= KVM_NR_INTERRUPTS)
2806                 return -EINVAL;
2807
2808         if (!irqchip_in_kernel(vcpu->kvm)) {
2809                 kvm_queue_interrupt(vcpu, irq->irq, false);
2810                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2811                 return 0;
2812         }
2813
2814         /*
2815          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2816          * fail for in-kernel 8259.
2817          */
2818         if (pic_in_kernel(vcpu->kvm))
2819                 return -ENXIO;
2820
2821         if (vcpu->arch.pending_external_vector != -1)
2822                 return -EEXIST;
2823
2824         vcpu->arch.pending_external_vector = irq->irq;
2825         kvm_make_request(KVM_REQ_EVENT, vcpu);
2826         return 0;
2827 }
2828
2829 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2830 {
2831         kvm_inject_nmi(vcpu);
2832
2833         return 0;
2834 }
2835
2836 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2837 {
2838         kvm_make_request(KVM_REQ_SMI, vcpu);
2839
2840         return 0;
2841 }
2842
2843 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2844                                            struct kvm_tpr_access_ctl *tac)
2845 {
2846         if (tac->flags)
2847                 return -EINVAL;
2848         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2849         return 0;
2850 }
2851
2852 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2853                                         u64 mcg_cap)
2854 {
2855         int r;
2856         unsigned bank_num = mcg_cap & 0xff, bank;
2857
2858         r = -EINVAL;
2859         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2860                 goto out;
2861         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2862                 goto out;
2863         r = 0;
2864         vcpu->arch.mcg_cap = mcg_cap;
2865         /* Init IA32_MCG_CTL to all 1s */
2866         if (mcg_cap & MCG_CTL_P)
2867                 vcpu->arch.mcg_ctl = ~(u64)0;
2868         /* Init IA32_MCi_CTL to all 1s */
2869         for (bank = 0; bank < bank_num; bank++)
2870                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2871 out:
2872         return r;
2873 }
2874
2875 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2876                                       struct kvm_x86_mce *mce)
2877 {
2878         u64 mcg_cap = vcpu->arch.mcg_cap;
2879         unsigned bank_num = mcg_cap & 0xff;
2880         u64 *banks = vcpu->arch.mce_banks;
2881
2882         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2883                 return -EINVAL;
2884         /*
2885          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2886          * reporting is disabled
2887          */
2888         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2889             vcpu->arch.mcg_ctl != ~(u64)0)
2890                 return 0;
2891         banks += 4 * mce->bank;
2892         /*
2893          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2894          * reporting is disabled for the bank
2895          */
2896         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2897                 return 0;
2898         if (mce->status & MCI_STATUS_UC) {
2899                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2900                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2901                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2902                         return 0;
2903                 }
2904                 if (banks[1] & MCI_STATUS_VAL)
2905                         mce->status |= MCI_STATUS_OVER;
2906                 banks[2] = mce->addr;
2907                 banks[3] = mce->misc;
2908                 vcpu->arch.mcg_status = mce->mcg_status;
2909                 banks[1] = mce->status;
2910                 kvm_queue_exception(vcpu, MC_VECTOR);
2911         } else if (!(banks[1] & MCI_STATUS_VAL)
2912                    || !(banks[1] & MCI_STATUS_UC)) {
2913                 if (banks[1] & MCI_STATUS_VAL)
2914                         mce->status |= MCI_STATUS_OVER;
2915                 banks[2] = mce->addr;
2916                 banks[3] = mce->misc;
2917                 banks[1] = mce->status;
2918         } else
2919                 banks[1] |= MCI_STATUS_OVER;
2920         return 0;
2921 }
2922
2923 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2924                                                struct kvm_vcpu_events *events)
2925 {
2926         process_nmi(vcpu);
2927         events->exception.injected =
2928                 vcpu->arch.exception.pending &&
2929                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2930         events->exception.nr = vcpu->arch.exception.nr;
2931         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2932         events->exception.pad = 0;
2933         events->exception.error_code = vcpu->arch.exception.error_code;
2934
2935         events->interrupt.injected =
2936                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2937         events->interrupt.nr = vcpu->arch.interrupt.nr;
2938         events->interrupt.soft = 0;
2939         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2940
2941         events->nmi.injected = vcpu->arch.nmi_injected;
2942         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2943         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2944         events->nmi.pad = 0;
2945
2946         events->sipi_vector = 0; /* never valid when reporting to user space */
2947
2948         events->smi.smm = is_smm(vcpu);
2949         events->smi.pending = vcpu->arch.smi_pending;
2950         events->smi.smm_inside_nmi =
2951                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2952         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2953
2954         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2955                          | KVM_VCPUEVENT_VALID_SHADOW
2956                          | KVM_VCPUEVENT_VALID_SMM);
2957         memset(&events->reserved, 0, sizeof(events->reserved));
2958 }
2959
2960 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2961                                               struct kvm_vcpu_events *events)
2962 {
2963         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2964                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2965                               | KVM_VCPUEVENT_VALID_SHADOW
2966                               | KVM_VCPUEVENT_VALID_SMM))
2967                 return -EINVAL;
2968
2969         process_nmi(vcpu);
2970         vcpu->arch.exception.pending = events->exception.injected;
2971         vcpu->arch.exception.nr = events->exception.nr;
2972         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2973         vcpu->arch.exception.error_code = events->exception.error_code;
2974
2975         vcpu->arch.interrupt.pending = events->interrupt.injected;
2976         vcpu->arch.interrupt.nr = events->interrupt.nr;
2977         vcpu->arch.interrupt.soft = events->interrupt.soft;
2978         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2979                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2980                                                   events->interrupt.shadow);
2981
2982         vcpu->arch.nmi_injected = events->nmi.injected;
2983         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2984                 vcpu->arch.nmi_pending = events->nmi.pending;
2985         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2986
2987         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2988             lapic_in_kernel(vcpu))
2989                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2990
2991         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2992                 if (events->smi.smm)
2993                         vcpu->arch.hflags |= HF_SMM_MASK;
2994                 else
2995                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2996                 vcpu->arch.smi_pending = events->smi.pending;
2997                 if (events->smi.smm_inside_nmi)
2998                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2999                 else
3000                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3001                 if (lapic_in_kernel(vcpu)) {
3002                         if (events->smi.latched_init)
3003                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3004                         else
3005                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3006                 }
3007         }
3008
3009         kvm_make_request(KVM_REQ_EVENT, vcpu);
3010
3011         return 0;
3012 }
3013
3014 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3015                                              struct kvm_debugregs *dbgregs)
3016 {
3017         unsigned long val;
3018
3019         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3020         kvm_get_dr(vcpu, 6, &val);
3021         dbgregs->dr6 = val;
3022         dbgregs->dr7 = vcpu->arch.dr7;
3023         dbgregs->flags = 0;
3024         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3025 }
3026
3027 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3028                                             struct kvm_debugregs *dbgregs)
3029 {
3030         if (dbgregs->flags)
3031                 return -EINVAL;
3032
3033         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3034         kvm_update_dr0123(vcpu);
3035         vcpu->arch.dr6 = dbgregs->dr6;
3036         kvm_update_dr6(vcpu);
3037         vcpu->arch.dr7 = dbgregs->dr7;
3038         kvm_update_dr7(vcpu);
3039
3040         return 0;
3041 }
3042
3043 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3044
3045 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3046 {
3047         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3048         u64 xstate_bv = xsave->header.xfeatures;
3049         u64 valid;
3050
3051         /*
3052          * Copy legacy XSAVE area, to avoid complications with CPUID
3053          * leaves 0 and 1 in the loop below.
3054          */
3055         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3056
3057         /* Set XSTATE_BV */
3058         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3059
3060         /*
3061          * Copy each region from the possibly compacted offset to the
3062          * non-compacted offset.
3063          */
3064         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3065         while (valid) {
3066                 u64 feature = valid & -valid;
3067                 int index = fls64(feature) - 1;
3068                 void *src = get_xsave_addr(xsave, feature);
3069
3070                 if (src) {
3071                         u32 size, offset, ecx, edx;
3072                         cpuid_count(XSTATE_CPUID, index,
3073                                     &size, &offset, &ecx, &edx);
3074                         memcpy(dest + offset, src, size);
3075                 }
3076
3077                 valid -= feature;
3078         }
3079 }
3080
3081 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3082 {
3083         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3084         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3085         u64 valid;
3086
3087         /*
3088          * Copy legacy XSAVE area, to avoid complications with CPUID
3089          * leaves 0 and 1 in the loop below.
3090          */
3091         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3092
3093         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3094         xsave->header.xfeatures = xstate_bv;
3095         if (cpu_has_xsaves)
3096                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3097
3098         /*
3099          * Copy each region from the non-compacted offset to the
3100          * possibly compacted offset.
3101          */
3102         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3103         while (valid) {
3104                 u64 feature = valid & -valid;
3105                 int index = fls64(feature) - 1;
3106                 void *dest = get_xsave_addr(xsave, feature);
3107
3108                 if (dest) {
3109                         u32 size, offset, ecx, edx;
3110                         cpuid_count(XSTATE_CPUID, index,
3111                                     &size, &offset, &ecx, &edx);
3112                         memcpy(dest, src + offset, size);
3113                 }
3114
3115                 valid -= feature;
3116         }
3117 }
3118
3119 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3120                                          struct kvm_xsave *guest_xsave)
3121 {
3122         if (cpu_has_xsave) {
3123                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3124                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3125         } else {
3126                 memcpy(guest_xsave->region,
3127                         &vcpu->arch.guest_fpu.state.fxsave,
3128                         sizeof(struct fxregs_state));
3129                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3130                         XFEATURE_MASK_FPSSE;
3131         }
3132 }
3133
3134 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3135                                         struct kvm_xsave *guest_xsave)
3136 {
3137         u64 xstate_bv =
3138                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3139
3140         if (cpu_has_xsave) {
3141                 /*
3142                  * Here we allow setting states that are not present in
3143                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3144                  * with old userspace.
3145                  */
3146                 if (xstate_bv & ~kvm_supported_xcr0())
3147                         return -EINVAL;
3148                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3149         } else {
3150                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3151                         return -EINVAL;
3152                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3153                         guest_xsave->region, sizeof(struct fxregs_state));
3154         }
3155         return 0;
3156 }
3157
3158 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3159                                         struct kvm_xcrs *guest_xcrs)
3160 {
3161         if (!cpu_has_xsave) {
3162                 guest_xcrs->nr_xcrs = 0;
3163                 return;
3164         }
3165
3166         guest_xcrs->nr_xcrs = 1;
3167         guest_xcrs->flags = 0;
3168         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3169         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3170 }
3171
3172 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3173                                        struct kvm_xcrs *guest_xcrs)
3174 {
3175         int i, r = 0;
3176
3177         if (!cpu_has_xsave)
3178                 return -EINVAL;
3179
3180         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3181                 return -EINVAL;
3182
3183         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3184                 /* Only support XCR0 currently */
3185                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3186                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3187                                 guest_xcrs->xcrs[i].value);
3188                         break;
3189                 }
3190         if (r)
3191                 r = -EINVAL;
3192         return r;
3193 }
3194
3195 /*
3196  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3197  * stopped by the hypervisor.  This function will be called from the host only.
3198  * EINVAL is returned when the host attempts to set the flag for a guest that
3199  * does not support pv clocks.
3200  */
3201 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3202 {
3203         if (!vcpu->arch.pv_time_enabled)
3204                 return -EINVAL;
3205         vcpu->arch.pvclock_set_guest_stopped_request = true;
3206         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3207         return 0;
3208 }
3209
3210 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3211                                      struct kvm_enable_cap *cap)
3212 {
3213         if (cap->flags)
3214                 return -EINVAL;
3215
3216         switch (cap->cap) {
3217         case KVM_CAP_HYPERV_SYNIC:
3218                 return kvm_hv_activate_synic(vcpu);
3219         default:
3220                 return -EINVAL;
3221         }
3222 }
3223
3224 long kvm_arch_vcpu_ioctl(struct file *filp,
3225                          unsigned int ioctl, unsigned long arg)
3226 {
3227         struct kvm_vcpu *vcpu = filp->private_data;
3228         void __user *argp = (void __user *)arg;
3229         int r;
3230         union {
3231                 struct kvm_lapic_state *lapic;
3232                 struct kvm_xsave *xsave;
3233                 struct kvm_xcrs *xcrs;
3234                 void *buffer;
3235         } u;
3236
3237         u.buffer = NULL;
3238         switch (ioctl) {
3239         case KVM_GET_LAPIC: {
3240                 r = -EINVAL;
3241                 if (!lapic_in_kernel(vcpu))
3242                         goto out;
3243                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3244
3245                 r = -ENOMEM;
3246                 if (!u.lapic)
3247                         goto out;
3248                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3249                 if (r)
3250                         goto out;
3251                 r = -EFAULT;
3252                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3253                         goto out;
3254                 r = 0;
3255                 break;
3256         }
3257         case KVM_SET_LAPIC: {
3258                 r = -EINVAL;
3259                 if (!lapic_in_kernel(vcpu))
3260                         goto out;
3261                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3262                 if (IS_ERR(u.lapic))
3263                         return PTR_ERR(u.lapic);
3264
3265                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3266                 break;
3267         }
3268         case KVM_INTERRUPT: {
3269                 struct kvm_interrupt irq;
3270
3271                 r = -EFAULT;
3272                 if (copy_from_user(&irq, argp, sizeof irq))
3273                         goto out;
3274                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3275                 break;
3276         }
3277         case KVM_NMI: {
3278                 r = kvm_vcpu_ioctl_nmi(vcpu);
3279                 break;
3280         }
3281         case KVM_SMI: {
3282                 r = kvm_vcpu_ioctl_smi(vcpu);
3283                 break;
3284         }
3285         case KVM_SET_CPUID: {
3286                 struct kvm_cpuid __user *cpuid_arg = argp;
3287                 struct kvm_cpuid cpuid;
3288
3289                 r = -EFAULT;
3290                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3291                         goto out;
3292                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3293                 break;
3294         }
3295         case KVM_SET_CPUID2: {
3296                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3297                 struct kvm_cpuid2 cpuid;
3298
3299                 r = -EFAULT;
3300                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3301                         goto out;
3302                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3303                                               cpuid_arg->entries);
3304                 break;
3305         }
3306         case KVM_GET_CPUID2: {
3307                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3308                 struct kvm_cpuid2 cpuid;
3309
3310                 r = -EFAULT;
3311                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3312                         goto out;
3313                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3314                                               cpuid_arg->entries);
3315                 if (r)
3316                         goto out;
3317                 r = -EFAULT;
3318                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3319                         goto out;
3320                 r = 0;
3321                 break;
3322         }
3323         case KVM_GET_MSRS:
3324                 r = msr_io(vcpu, argp, do_get_msr, 1);
3325                 break;
3326         case KVM_SET_MSRS:
3327                 r = msr_io(vcpu, argp, do_set_msr, 0);
3328                 break;
3329         case KVM_TPR_ACCESS_REPORTING: {
3330                 struct kvm_tpr_access_ctl tac;
3331
3332                 r = -EFAULT;
3333                 if (copy_from_user(&tac, argp, sizeof tac))
3334                         goto out;
3335                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3336                 if (r)
3337                         goto out;
3338                 r = -EFAULT;
3339                 if (copy_to_user(argp, &tac, sizeof tac))
3340                         goto out;
3341                 r = 0;
3342                 break;
3343         };
3344         case KVM_SET_VAPIC_ADDR: {
3345                 struct kvm_vapic_addr va;
3346
3347                 r = -EINVAL;
3348                 if (!lapic_in_kernel(vcpu))
3349                         goto out;
3350                 r = -EFAULT;
3351                 if (copy_from_user(&va, argp, sizeof va))
3352                         goto out;
3353                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3354                 break;
3355         }
3356         case KVM_X86_SETUP_MCE: {
3357                 u64 mcg_cap;
3358
3359                 r = -EFAULT;
3360                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3361                         goto out;
3362                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3363                 break;
3364         }
3365         case KVM_X86_SET_MCE: {
3366                 struct kvm_x86_mce mce;
3367
3368                 r = -EFAULT;
3369                 if (copy_from_user(&mce, argp, sizeof mce))
3370                         goto out;
3371                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3372                 break;
3373         }
3374         case KVM_GET_VCPU_EVENTS: {
3375                 struct kvm_vcpu_events events;
3376
3377                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3378
3379                 r = -EFAULT;
3380                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3381                         break;
3382                 r = 0;
3383                 break;
3384         }
3385         case KVM_SET_VCPU_EVENTS: {
3386                 struct kvm_vcpu_events events;
3387
3388                 r = -EFAULT;
3389                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3390                         break;
3391
3392                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3393                 break;
3394         }
3395         case KVM_GET_DEBUGREGS: {
3396                 struct kvm_debugregs dbgregs;
3397
3398                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3399
3400                 r = -EFAULT;
3401                 if (copy_to_user(argp, &dbgregs,
3402                                  sizeof(struct kvm_debugregs)))
3403                         break;
3404                 r = 0;
3405                 break;
3406         }
3407         case KVM_SET_DEBUGREGS: {
3408                 struct kvm_debugregs dbgregs;
3409
3410                 r = -EFAULT;
3411                 if (copy_from_user(&dbgregs, argp,
3412                                    sizeof(struct kvm_debugregs)))
3413                         break;
3414
3415                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3416                 break;
3417         }
3418         case KVM_GET_XSAVE: {
3419                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3420                 r = -ENOMEM;
3421                 if (!u.xsave)
3422                         break;
3423
3424                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3425
3426                 r = -EFAULT;
3427                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3428                         break;
3429                 r = 0;
3430                 break;
3431         }
3432         case KVM_SET_XSAVE: {
3433                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3434                 if (IS_ERR(u.xsave))
3435                         return PTR_ERR(u.xsave);
3436
3437                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3438                 break;
3439         }
3440         case KVM_GET_XCRS: {
3441                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3442                 r = -ENOMEM;
3443                 if (!u.xcrs)
3444                         break;
3445
3446                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3447
3448                 r = -EFAULT;
3449                 if (copy_to_user(argp, u.xcrs,
3450                                  sizeof(struct kvm_xcrs)))
3451                         break;
3452                 r = 0;
3453                 break;
3454         }
3455         case KVM_SET_XCRS: {
3456                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3457                 if (IS_ERR(u.xcrs))
3458                         return PTR_ERR(u.xcrs);
3459
3460                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3461                 break;
3462         }
3463         case KVM_SET_TSC_KHZ: {
3464                 u32 user_tsc_khz;
3465
3466                 r = -EINVAL;
3467                 user_tsc_khz = (u32)arg;
3468
3469                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3470                         goto out;
3471
3472                 if (user_tsc_khz == 0)
3473                         user_tsc_khz = tsc_khz;
3474
3475                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3476                         r = 0;
3477
3478                 goto out;
3479         }
3480         case KVM_GET_TSC_KHZ: {
3481                 r = vcpu->arch.virtual_tsc_khz;
3482                 goto out;
3483         }
3484         case KVM_KVMCLOCK_CTRL: {
3485                 r = kvm_set_guest_paused(vcpu);
3486                 goto out;
3487         }
3488         case KVM_ENABLE_CAP: {
3489                 struct kvm_enable_cap cap;
3490
3491                 r = -EFAULT;
3492                 if (copy_from_user(&cap, argp, sizeof(cap)))
3493                         goto out;
3494                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3495                 break;
3496         }
3497         default:
3498                 r = -EINVAL;
3499         }
3500 out:
3501         kfree(u.buffer);
3502         return r;
3503 }
3504
3505 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3506 {
3507         return VM_FAULT_SIGBUS;
3508 }
3509
3510 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3511 {
3512         int ret;
3513
3514         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3515                 return -EINVAL;
3516         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3517         return ret;
3518 }
3519
3520 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3521                                               u64 ident_addr)
3522 {
3523         kvm->arch.ept_identity_map_addr = ident_addr;
3524         return 0;
3525 }
3526
3527 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3528                                           u32 kvm_nr_mmu_pages)
3529 {
3530         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3531                 return -EINVAL;
3532
3533         mutex_lock(&kvm->slots_lock);
3534
3535         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3536         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3537
3538         mutex_unlock(&kvm->slots_lock);
3539         return 0;
3540 }
3541
3542 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3543 {
3544         return kvm->arch.n_max_mmu_pages;
3545 }
3546
3547 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3548 {
3549         int r;
3550
3551         r = 0;
3552         switch (chip->chip_id) {
3553         case KVM_IRQCHIP_PIC_MASTER:
3554                 memcpy(&chip->chip.pic,
3555                         &pic_irqchip(kvm)->pics[0],
3556                         sizeof(struct kvm_pic_state));
3557                 break;
3558         case KVM_IRQCHIP_PIC_SLAVE:
3559                 memcpy(&chip->chip.pic,
3560                         &pic_irqchip(kvm)->pics[1],
3561                         sizeof(struct kvm_pic_state));
3562                 break;
3563         case KVM_IRQCHIP_IOAPIC:
3564                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3565                 break;
3566         default:
3567                 r = -EINVAL;
3568                 break;
3569         }
3570         return r;
3571 }
3572
3573 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3574 {
3575         int r;
3576
3577         r = 0;
3578         switch (chip->chip_id) {
3579         case KVM_IRQCHIP_PIC_MASTER:
3580                 spin_lock(&pic_irqchip(kvm)->lock);
3581                 memcpy(&pic_irqchip(kvm)->pics[0],
3582                         &chip->chip.pic,
3583                         sizeof(struct kvm_pic_state));
3584                 spin_unlock(&pic_irqchip(kvm)->lock);
3585                 break;
3586         case KVM_IRQCHIP_PIC_SLAVE:
3587                 spin_lock(&pic_irqchip(kvm)->lock);
3588                 memcpy(&pic_irqchip(kvm)->pics[1],
3589                         &chip->chip.pic,
3590                         sizeof(struct kvm_pic_state));
3591                 spin_unlock(&pic_irqchip(kvm)->lock);
3592                 break;
3593         case KVM_IRQCHIP_IOAPIC:
3594                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3595                 break;
3596         default:
3597                 r = -EINVAL;
3598                 break;
3599         }
3600         kvm_pic_update_irq(pic_irqchip(kvm));
3601         return r;
3602 }
3603
3604 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3605 {
3606         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3607
3608         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3609
3610         mutex_lock(&kps->lock);
3611         memcpy(ps, &kps->channels, sizeof(*ps));
3612         mutex_unlock(&kps->lock);
3613         return 0;
3614 }
3615
3616 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3617 {
3618         int i;
3619         struct kvm_pit *pit = kvm->arch.vpit;
3620
3621         mutex_lock(&pit->pit_state.lock);
3622         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3623         for (i = 0; i < 3; i++)
3624                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3625         mutex_unlock(&pit->pit_state.lock);
3626         return 0;
3627 }
3628
3629 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3630 {
3631         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3632         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3633                 sizeof(ps->channels));
3634         ps->flags = kvm->arch.vpit->pit_state.flags;
3635         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3636         memset(&ps->reserved, 0, sizeof(ps->reserved));
3637         return 0;
3638 }
3639
3640 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3641 {
3642         int start = 0;
3643         int i;
3644         u32 prev_legacy, cur_legacy;
3645         struct kvm_pit *pit = kvm->arch.vpit;
3646
3647         mutex_lock(&pit->pit_state.lock);
3648         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3649         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3650         if (!prev_legacy && cur_legacy)
3651                 start = 1;
3652         memcpy(&pit->pit_state.channels, &ps->channels,
3653                sizeof(pit->pit_state.channels));
3654         pit->pit_state.flags = ps->flags;
3655         for (i = 0; i < 3; i++)
3656                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3657                                    start && i == 0);
3658         mutex_unlock(&pit->pit_state.lock);
3659         return 0;
3660 }
3661
3662 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3663                                  struct kvm_reinject_control *control)
3664 {
3665         struct kvm_pit *pit = kvm->arch.vpit;
3666
3667         if (!pit)
3668                 return -ENXIO;
3669
3670         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3671          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3672          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3673          */
3674         mutex_lock(&pit->pit_state.lock);
3675         kvm_pit_set_reinject(pit, control->pit_reinject);
3676         mutex_unlock(&pit->pit_state.lock);
3677
3678         return 0;
3679 }
3680
3681 /**
3682  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3683  * @kvm: kvm instance
3684  * @log: slot id and address to which we copy the log
3685  *
3686  * Steps 1-4 below provide general overview of dirty page logging. See
3687  * kvm_get_dirty_log_protect() function description for additional details.
3688  *
3689  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3690  * always flush the TLB (step 4) even if previous step failed  and the dirty
3691  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3692  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3693  * writes will be marked dirty for next log read.
3694  *
3695  *   1. Take a snapshot of the bit and clear it if needed.
3696  *   2. Write protect the corresponding page.
3697  *   3. Copy the snapshot to the userspace.
3698  *   4. Flush TLB's if needed.
3699  */
3700 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3701 {
3702         bool is_dirty = false;
3703         int r;
3704
3705         mutex_lock(&kvm->slots_lock);
3706
3707         /*
3708          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3709          */
3710         if (kvm_x86_ops->flush_log_dirty)
3711                 kvm_x86_ops->flush_log_dirty(kvm);
3712
3713         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3714
3715         /*
3716          * All the TLBs can be flushed out of mmu lock, see the comments in
3717          * kvm_mmu_slot_remove_write_access().
3718          */
3719         lockdep_assert_held(&kvm->slots_lock);
3720         if (is_dirty)
3721                 kvm_flush_remote_tlbs(kvm);
3722
3723         mutex_unlock(&kvm->slots_lock);
3724         return r;
3725 }
3726
3727 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3728                         bool line_status)
3729 {
3730         if (!irqchip_in_kernel(kvm))
3731                 return -ENXIO;
3732
3733         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3734                                         irq_event->irq, irq_event->level,
3735                                         line_status);
3736         return 0;
3737 }
3738
3739 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3740                                    struct kvm_enable_cap *cap)
3741 {
3742         int r;
3743
3744         if (cap->flags)
3745                 return -EINVAL;
3746
3747         switch (cap->cap) {
3748         case KVM_CAP_DISABLE_QUIRKS:
3749                 kvm->arch.disabled_quirks = cap->args[0];
3750                 r = 0;
3751                 break;
3752         case KVM_CAP_SPLIT_IRQCHIP: {
3753                 mutex_lock(&kvm->lock);
3754                 r = -EINVAL;
3755                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3756                         goto split_irqchip_unlock;
3757                 r = -EEXIST;
3758                 if (irqchip_in_kernel(kvm))
3759                         goto split_irqchip_unlock;
3760                 if (atomic_read(&kvm->online_vcpus))
3761                         goto split_irqchip_unlock;
3762                 r = kvm_setup_empty_irq_routing(kvm);
3763                 if (r)
3764                         goto split_irqchip_unlock;
3765                 /* Pairs with irqchip_in_kernel. */
3766                 smp_wmb();
3767                 kvm->arch.irqchip_split = true;
3768                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3769                 r = 0;
3770 split_irqchip_unlock:
3771                 mutex_unlock(&kvm->lock);
3772                 break;
3773         }
3774         default:
3775                 r = -EINVAL;
3776                 break;
3777         }
3778         return r;
3779 }
3780
3781 long kvm_arch_vm_ioctl(struct file *filp,
3782                        unsigned int ioctl, unsigned long arg)
3783 {
3784         struct kvm *kvm = filp->private_data;
3785         void __user *argp = (void __user *)arg;
3786         int r = -ENOTTY;
3787         /*
3788          * This union makes it completely explicit to gcc-3.x
3789          * that these two variables' stack usage should be
3790          * combined, not added together.
3791          */
3792         union {
3793                 struct kvm_pit_state ps;
3794                 struct kvm_pit_state2 ps2;
3795                 struct kvm_pit_config pit_config;
3796         } u;
3797
3798         switch (ioctl) {
3799         case KVM_SET_TSS_ADDR:
3800                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3801                 break;
3802         case KVM_SET_IDENTITY_MAP_ADDR: {
3803                 u64 ident_addr;
3804
3805                 r = -EFAULT;
3806                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3807                         goto out;
3808                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3809                 break;
3810         }
3811         case KVM_SET_NR_MMU_PAGES:
3812                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3813                 break;
3814         case KVM_GET_NR_MMU_PAGES:
3815                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3816                 break;
3817         case KVM_CREATE_IRQCHIP: {
3818                 struct kvm_pic *vpic;
3819
3820                 mutex_lock(&kvm->lock);
3821                 r = -EEXIST;
3822                 if (kvm->arch.vpic)
3823                         goto create_irqchip_unlock;
3824                 r = -EINVAL;
3825                 if (atomic_read(&kvm->online_vcpus))
3826                         goto create_irqchip_unlock;
3827                 r = -ENOMEM;
3828                 vpic = kvm_create_pic(kvm);
3829                 if (vpic) {
3830                         r = kvm_ioapic_init(kvm);
3831                         if (r) {
3832                                 mutex_lock(&kvm->slots_lock);
3833                                 kvm_destroy_pic(vpic);
3834                                 mutex_unlock(&kvm->slots_lock);
3835                                 goto create_irqchip_unlock;
3836                         }
3837                 } else
3838                         goto create_irqchip_unlock;
3839                 r = kvm_setup_default_irq_routing(kvm);
3840                 if (r) {
3841                         mutex_lock(&kvm->slots_lock);
3842                         mutex_lock(&kvm->irq_lock);
3843                         kvm_ioapic_destroy(kvm);
3844                         kvm_destroy_pic(vpic);
3845                         mutex_unlock(&kvm->irq_lock);
3846                         mutex_unlock(&kvm->slots_lock);
3847                         goto create_irqchip_unlock;
3848                 }
3849                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3850                 smp_wmb();
3851                 kvm->arch.vpic = vpic;
3852         create_irqchip_unlock:
3853                 mutex_unlock(&kvm->lock);
3854                 break;
3855         }
3856         case KVM_CREATE_PIT:
3857                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3858                 goto create_pit;
3859         case KVM_CREATE_PIT2:
3860                 r = -EFAULT;
3861                 if (copy_from_user(&u.pit_config, argp,
3862                                    sizeof(struct kvm_pit_config)))
3863                         goto out;
3864         create_pit:
3865                 mutex_lock(&kvm->slots_lock);
3866                 r = -EEXIST;
3867                 if (kvm->arch.vpit)
3868                         goto create_pit_unlock;
3869                 r = -ENOMEM;
3870                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3871                 if (kvm->arch.vpit)
3872                         r = 0;
3873         create_pit_unlock:
3874                 mutex_unlock(&kvm->slots_lock);
3875                 break;
3876         case KVM_GET_IRQCHIP: {
3877                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3878                 struct kvm_irqchip *chip;
3879
3880                 chip = memdup_user(argp, sizeof(*chip));
3881                 if (IS_ERR(chip)) {
3882                         r = PTR_ERR(chip);
3883                         goto out;
3884                 }
3885
3886                 r = -ENXIO;
3887                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3888                         goto get_irqchip_out;
3889                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3890                 if (r)
3891                         goto get_irqchip_out;
3892                 r = -EFAULT;
3893                 if (copy_to_user(argp, chip, sizeof *chip))
3894                         goto get_irqchip_out;
3895                 r = 0;
3896         get_irqchip_out:
3897                 kfree(chip);
3898                 break;
3899         }
3900         case KVM_SET_IRQCHIP: {
3901                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3902                 struct kvm_irqchip *chip;
3903
3904                 chip = memdup_user(argp, sizeof(*chip));
3905                 if (IS_ERR(chip)) {
3906                         r = PTR_ERR(chip);
3907                         goto out;
3908                 }
3909
3910                 r = -ENXIO;
3911                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3912                         goto set_irqchip_out;
3913                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3914                 if (r)
3915                         goto set_irqchip_out;
3916                 r = 0;
3917         set_irqchip_out:
3918                 kfree(chip);
3919                 break;
3920         }
3921         case KVM_GET_PIT: {
3922                 r = -EFAULT;
3923                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3924                         goto out;
3925                 r = -ENXIO;
3926                 if (!kvm->arch.vpit)
3927                         goto out;
3928                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3929                 if (r)
3930                         goto out;
3931                 r = -EFAULT;
3932                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3933                         goto out;
3934                 r = 0;
3935                 break;
3936         }
3937         case KVM_SET_PIT: {
3938                 r = -EFAULT;
3939                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3940                         goto out;
3941                 r = -ENXIO;
3942                 if (!kvm->arch.vpit)
3943                         goto out;
3944                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3945                 break;
3946         }
3947         case KVM_GET_PIT2: {
3948                 r = -ENXIO;
3949                 if (!kvm->arch.vpit)
3950                         goto out;
3951                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3952                 if (r)
3953                         goto out;
3954                 r = -EFAULT;
3955                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3956                         goto out;
3957                 r = 0;
3958                 break;
3959         }
3960         case KVM_SET_PIT2: {
3961                 r = -EFAULT;
3962                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3963                         goto out;
3964                 r = -ENXIO;
3965                 if (!kvm->arch.vpit)
3966                         goto out;
3967                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3968                 break;
3969         }
3970         case KVM_REINJECT_CONTROL: {
3971                 struct kvm_reinject_control control;
3972                 r =  -EFAULT;
3973                 if (copy_from_user(&control, argp, sizeof(control)))
3974                         goto out;
3975                 r = kvm_vm_ioctl_reinject(kvm, &control);
3976                 break;
3977         }
3978         case KVM_SET_BOOT_CPU_ID:
3979                 r = 0;
3980                 mutex_lock(&kvm->lock);
3981                 if (atomic_read(&kvm->online_vcpus) != 0)
3982                         r = -EBUSY;
3983                 else
3984                         kvm->arch.bsp_vcpu_id = arg;
3985                 mutex_unlock(&kvm->lock);
3986                 break;
3987         case KVM_XEN_HVM_CONFIG: {
3988                 r = -EFAULT;
3989                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3990                                    sizeof(struct kvm_xen_hvm_config)))
3991                         goto out;
3992                 r = -EINVAL;
3993                 if (kvm->arch.xen_hvm_config.flags)
3994                         goto out;
3995                 r = 0;
3996                 break;
3997         }
3998         case KVM_SET_CLOCK: {
3999                 struct kvm_clock_data user_ns;
4000                 u64 now_ns;
4001                 s64 delta;
4002
4003                 r = -EFAULT;
4004                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4005                         goto out;
4006
4007                 r = -EINVAL;
4008                 if (user_ns.flags)
4009                         goto out;
4010
4011                 r = 0;
4012                 local_irq_disable();
4013                 now_ns = get_kernel_ns();
4014                 delta = user_ns.clock - now_ns;
4015                 local_irq_enable();
4016                 kvm->arch.kvmclock_offset = delta;
4017                 kvm_gen_update_masterclock(kvm);
4018                 break;
4019         }
4020         case KVM_GET_CLOCK: {
4021                 struct kvm_clock_data user_ns;
4022                 u64 now_ns;
4023
4024                 local_irq_disable();
4025                 now_ns = get_kernel_ns();
4026                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4027                 local_irq_enable();
4028                 user_ns.flags = 0;
4029                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4030
4031                 r = -EFAULT;
4032                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4033                         goto out;
4034                 r = 0;
4035                 break;
4036         }
4037         case KVM_ENABLE_CAP: {
4038                 struct kvm_enable_cap cap;
4039
4040                 r = -EFAULT;
4041                 if (copy_from_user(&cap, argp, sizeof(cap)))
4042                         goto out;
4043                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4044                 break;
4045         }
4046         default:
4047                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4048         }
4049 out:
4050         return r;
4051 }
4052
4053 static void kvm_init_msr_list(void)
4054 {
4055         u32 dummy[2];
4056         unsigned i, j;
4057
4058         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4059                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4060                         continue;
4061
4062                 /*
4063                  * Even MSRs that are valid in the host may not be exposed
4064                  * to the guests in some cases.
4065                  */
4066                 switch (msrs_to_save[i]) {
4067                 case MSR_IA32_BNDCFGS:
4068                         if (!kvm_x86_ops->mpx_supported())
4069                                 continue;
4070                         break;
4071                 case MSR_TSC_AUX:
4072                         if (!kvm_x86_ops->rdtscp_supported())
4073                                 continue;
4074                         break;
4075                 default:
4076                         break;
4077                 }
4078
4079                 if (j < i)
4080                         msrs_to_save[j] = msrs_to_save[i];
4081                 j++;
4082         }
4083         num_msrs_to_save = j;
4084
4085         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4086                 switch (emulated_msrs[i]) {
4087                 case MSR_IA32_SMBASE:
4088                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4089                                 continue;
4090                         break;
4091                 default:
4092                         break;
4093                 }
4094
4095                 if (j < i)
4096                         emulated_msrs[j] = emulated_msrs[i];
4097                 j++;
4098         }
4099         num_emulated_msrs = j;
4100 }
4101
4102 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4103                            const void *v)
4104 {
4105         int handled = 0;
4106         int n;
4107
4108         do {
4109                 n = min(len, 8);
4110                 if (!(lapic_in_kernel(vcpu) &&
4111                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4112                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4113                         break;
4114                 handled += n;
4115                 addr += n;
4116                 len -= n;
4117                 v += n;
4118         } while (len);
4119
4120         return handled;
4121 }
4122
4123 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4124 {
4125         int handled = 0;
4126         int n;
4127
4128         do {
4129                 n = min(len, 8);
4130                 if (!(lapic_in_kernel(vcpu) &&
4131                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4132                                          addr, n, v))
4133                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4134                         break;
4135                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4136                 handled += n;
4137                 addr += n;
4138                 len -= n;
4139                 v += n;
4140         } while (len);
4141
4142         return handled;
4143 }
4144
4145 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4146                         struct kvm_segment *var, int seg)
4147 {
4148         kvm_x86_ops->set_segment(vcpu, var, seg);
4149 }
4150
4151 void kvm_get_segment(struct kvm_vcpu *vcpu,
4152                      struct kvm_segment *var, int seg)
4153 {
4154         kvm_x86_ops->get_segment(vcpu, var, seg);
4155 }
4156
4157 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4158                            struct x86_exception *exception)
4159 {
4160         gpa_t t_gpa;
4161
4162         BUG_ON(!mmu_is_nested(vcpu));
4163
4164         /* NPT walks are always user-walks */
4165         access |= PFERR_USER_MASK;
4166         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4167
4168         return t_gpa;
4169 }
4170
4171 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4172                               struct x86_exception *exception)
4173 {
4174         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4175         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4176 }
4177
4178  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4179                                 struct x86_exception *exception)
4180 {
4181         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4182         access |= PFERR_FETCH_MASK;
4183         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4184 }
4185
4186 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4187                                struct x86_exception *exception)
4188 {
4189         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4190         access |= PFERR_WRITE_MASK;
4191         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4192 }
4193
4194 /* uses this to access any guest's mapped memory without checking CPL */
4195 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4196                                 struct x86_exception *exception)
4197 {
4198         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4199 }
4200
4201 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4202                                       struct kvm_vcpu *vcpu, u32 access,
4203                                       struct x86_exception *exception)
4204 {
4205         void *data = val;
4206         int r = X86EMUL_CONTINUE;
4207
4208         while (bytes) {
4209                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4210                                                             exception);
4211                 unsigned offset = addr & (PAGE_SIZE-1);
4212                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4213                 int ret;
4214
4215                 if (gpa == UNMAPPED_GVA)
4216                         return X86EMUL_PROPAGATE_FAULT;
4217                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4218                                                offset, toread);
4219                 if (ret < 0) {
4220                         r = X86EMUL_IO_NEEDED;
4221                         goto out;
4222                 }
4223
4224                 bytes -= toread;
4225                 data += toread;
4226                 addr += toread;
4227         }
4228 out:
4229         return r;
4230 }
4231
4232 /* used for instruction fetching */
4233 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4234                                 gva_t addr, void *val, unsigned int bytes,
4235                                 struct x86_exception *exception)
4236 {
4237         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4238         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4239         unsigned offset;
4240         int ret;
4241
4242         /* Inline kvm_read_guest_virt_helper for speed.  */
4243         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4244                                                     exception);
4245         if (unlikely(gpa == UNMAPPED_GVA))
4246                 return X86EMUL_PROPAGATE_FAULT;
4247
4248         offset = addr & (PAGE_SIZE-1);
4249         if (WARN_ON(offset + bytes > PAGE_SIZE))
4250                 bytes = (unsigned)PAGE_SIZE - offset;
4251         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4252                                        offset, bytes);
4253         if (unlikely(ret < 0))
4254                 return X86EMUL_IO_NEEDED;
4255
4256         return X86EMUL_CONTINUE;
4257 }
4258
4259 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4260                                gva_t addr, void *val, unsigned int bytes,
4261                                struct x86_exception *exception)
4262 {
4263         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4264         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4265
4266         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4267                                           exception);
4268 }
4269 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4270
4271 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4272                                       gva_t addr, void *val, unsigned int bytes,
4273                                       struct x86_exception *exception)
4274 {
4275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4276         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4277 }
4278
4279 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4280                 unsigned long addr, void *val, unsigned int bytes)
4281 {
4282         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4283         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4284
4285         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4286 }
4287
4288 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4289                                        gva_t addr, void *val,
4290                                        unsigned int bytes,
4291                                        struct x86_exception *exception)
4292 {
4293         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4294         void *data = val;
4295         int r = X86EMUL_CONTINUE;
4296
4297         while (bytes) {
4298                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4299                                                              PFERR_WRITE_MASK,
4300                                                              exception);
4301                 unsigned offset = addr & (PAGE_SIZE-1);
4302                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4303                 int ret;
4304
4305                 if (gpa == UNMAPPED_GVA)
4306                         return X86EMUL_PROPAGATE_FAULT;
4307                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4308                 if (ret < 0) {
4309                         r = X86EMUL_IO_NEEDED;
4310                         goto out;
4311                 }
4312
4313                 bytes -= towrite;
4314                 data += towrite;
4315                 addr += towrite;
4316         }
4317 out:
4318         return r;
4319 }
4320 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4321
4322 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4323                                 gpa_t *gpa, struct x86_exception *exception,
4324                                 bool write)
4325 {
4326         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4327                 | (write ? PFERR_WRITE_MASK : 0);
4328
4329         /*
4330          * currently PKRU is only applied to ept enabled guest so
4331          * there is no pkey in EPT page table for L1 guest or EPT
4332          * shadow page table for L2 guest.
4333          */
4334         if (vcpu_match_mmio_gva(vcpu, gva)
4335             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4336                                  vcpu->arch.access, 0, access)) {
4337                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4338                                         (gva & (PAGE_SIZE - 1));
4339                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4340                 return 1;
4341         }
4342
4343         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4344
4345         if (*gpa == UNMAPPED_GVA)
4346                 return -1;
4347
4348         /* For APIC access vmexit */
4349         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4350                 return 1;
4351
4352         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4353                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4354                 return 1;
4355         }
4356
4357         return 0;
4358 }
4359
4360 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4361                         const void *val, int bytes)
4362 {
4363         int ret;
4364
4365         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4366         if (ret < 0)
4367                 return 0;
4368         kvm_page_track_write(vcpu, gpa, val, bytes);
4369         return 1;
4370 }
4371
4372 struct read_write_emulator_ops {
4373         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4374                                   int bytes);
4375         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4376                                   void *val, int bytes);
4377         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4378                                int bytes, void *val);
4379         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4380                                     void *val, int bytes);
4381         bool write;
4382 };
4383
4384 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4385 {
4386         if (vcpu->mmio_read_completed) {
4387                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4388                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4389                 vcpu->mmio_read_completed = 0;
4390                 return 1;
4391         }
4392
4393         return 0;
4394 }
4395
4396 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4397                         void *val, int bytes)
4398 {
4399         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4400 }
4401
4402 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4403                          void *val, int bytes)
4404 {
4405         return emulator_write_phys(vcpu, gpa, val, bytes);
4406 }
4407
4408 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4409 {
4410         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4411         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4412 }
4413
4414 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4415                           void *val, int bytes)
4416 {
4417         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4418         return X86EMUL_IO_NEEDED;
4419 }
4420
4421 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4422                            void *val, int bytes)
4423 {
4424         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4425
4426         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4427         return X86EMUL_CONTINUE;
4428 }
4429
4430 static const struct read_write_emulator_ops read_emultor = {
4431         .read_write_prepare = read_prepare,
4432         .read_write_emulate = read_emulate,
4433         .read_write_mmio = vcpu_mmio_read,
4434         .read_write_exit_mmio = read_exit_mmio,
4435 };
4436
4437 static const struct read_write_emulator_ops write_emultor = {
4438         .read_write_emulate = write_emulate,
4439         .read_write_mmio = write_mmio,
4440         .read_write_exit_mmio = write_exit_mmio,
4441         .write = true,
4442 };
4443
4444 static int emulator_read_write_onepage(unsigned long addr, void *val,
4445                                        unsigned int bytes,
4446                                        struct x86_exception *exception,
4447                                        struct kvm_vcpu *vcpu,
4448                                        const struct read_write_emulator_ops *ops)
4449 {
4450         gpa_t gpa;
4451         int handled, ret;
4452         bool write = ops->write;
4453         struct kvm_mmio_fragment *frag;
4454
4455         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4456
4457         if (ret < 0)
4458                 return X86EMUL_PROPAGATE_FAULT;
4459
4460         /* For APIC access vmexit */
4461         if (ret)
4462                 goto mmio;
4463
4464         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4465                 return X86EMUL_CONTINUE;
4466
4467 mmio:
4468         /*
4469          * Is this MMIO handled locally?
4470          */
4471         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4472         if (handled == bytes)
4473                 return X86EMUL_CONTINUE;
4474
4475         gpa += handled;
4476         bytes -= handled;
4477         val += handled;
4478
4479         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4480         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4481         frag->gpa = gpa;
4482         frag->data = val;
4483         frag->len = bytes;
4484         return X86EMUL_CONTINUE;
4485 }
4486
4487 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4488                         unsigned long addr,
4489                         void *val, unsigned int bytes,
4490                         struct x86_exception *exception,
4491                         const struct read_write_emulator_ops *ops)
4492 {
4493         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4494         gpa_t gpa;
4495         int rc;
4496
4497         if (ops->read_write_prepare &&
4498                   ops->read_write_prepare(vcpu, val, bytes))
4499                 return X86EMUL_CONTINUE;
4500
4501         vcpu->mmio_nr_fragments = 0;
4502
4503         /* Crossing a page boundary? */
4504         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4505                 int now;
4506
4507                 now = -addr & ~PAGE_MASK;
4508                 rc = emulator_read_write_onepage(addr, val, now, exception,
4509                                                  vcpu, ops);
4510
4511                 if (rc != X86EMUL_CONTINUE)
4512                         return rc;
4513                 addr += now;
4514                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4515                         addr = (u32)addr;
4516                 val += now;
4517                 bytes -= now;
4518         }
4519
4520         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4521                                          vcpu, ops);
4522         if (rc != X86EMUL_CONTINUE)
4523                 return rc;
4524
4525         if (!vcpu->mmio_nr_fragments)
4526                 return rc;
4527
4528         gpa = vcpu->mmio_fragments[0].gpa;
4529
4530         vcpu->mmio_needed = 1;
4531         vcpu->mmio_cur_fragment = 0;
4532
4533         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4534         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4535         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4536         vcpu->run->mmio.phys_addr = gpa;
4537
4538         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4539 }
4540
4541 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4542                                   unsigned long addr,
4543                                   void *val,
4544                                   unsigned int bytes,
4545                                   struct x86_exception *exception)
4546 {
4547         return emulator_read_write(ctxt, addr, val, bytes,
4548                                    exception, &read_emultor);
4549 }
4550
4551 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4552                             unsigned long addr,
4553                             const void *val,
4554                             unsigned int bytes,
4555                             struct x86_exception *exception)
4556 {
4557         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4558                                    exception, &write_emultor);
4559 }
4560
4561 #define CMPXCHG_TYPE(t, ptr, old, new) \
4562         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4563
4564 #ifdef CONFIG_X86_64
4565 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4566 #else
4567 #  define CMPXCHG64(ptr, old, new) \
4568         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4569 #endif
4570
4571 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4572                                      unsigned long addr,
4573                                      const void *old,
4574                                      const void *new,
4575                                      unsigned int bytes,
4576                                      struct x86_exception *exception)
4577 {
4578         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4579         gpa_t gpa;
4580         struct page *page;
4581         char *kaddr;
4582         bool exchanged;
4583
4584         /* guests cmpxchg8b have to be emulated atomically */
4585         if (bytes > 8 || (bytes & (bytes - 1)))
4586                 goto emul_write;
4587
4588         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4589
4590         if (gpa == UNMAPPED_GVA ||
4591             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4592                 goto emul_write;
4593
4594         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4595                 goto emul_write;
4596
4597         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4598         if (is_error_page(page))
4599                 goto emul_write;
4600
4601         kaddr = kmap_atomic(page);
4602         kaddr += offset_in_page(gpa);
4603         switch (bytes) {
4604         case 1:
4605                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4606                 break;
4607         case 2:
4608                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4609                 break;
4610         case 4:
4611                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4612                 break;
4613         case 8:
4614                 exchanged = CMPXCHG64(kaddr, old, new);
4615                 break;
4616         default:
4617                 BUG();
4618         }
4619         kunmap_atomic(kaddr);
4620         kvm_release_page_dirty(page);
4621
4622         if (!exchanged)
4623                 return X86EMUL_CMPXCHG_FAILED;
4624
4625         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4626         kvm_page_track_write(vcpu, gpa, new, bytes);
4627
4628         return X86EMUL_CONTINUE;
4629
4630 emul_write:
4631         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4632
4633         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4634 }
4635
4636 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4637 {
4638         /* TODO: String I/O for in kernel device */
4639         int r;
4640
4641         if (vcpu->arch.pio.in)
4642                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4643                                     vcpu->arch.pio.size, pd);
4644         else
4645                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4646                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4647                                      pd);
4648         return r;
4649 }
4650
4651 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4652                                unsigned short port, void *val,
4653                                unsigned int count, bool in)
4654 {
4655         vcpu->arch.pio.port = port;
4656         vcpu->arch.pio.in = in;
4657         vcpu->arch.pio.count  = count;
4658         vcpu->arch.pio.size = size;
4659
4660         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4661                 vcpu->arch.pio.count = 0;
4662                 return 1;
4663         }
4664
4665         vcpu->run->exit_reason = KVM_EXIT_IO;
4666         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4667         vcpu->run->io.size = size;
4668         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4669         vcpu->run->io.count = count;
4670         vcpu->run->io.port = port;
4671
4672         return 0;
4673 }
4674
4675 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4676                                     int size, unsigned short port, void *val,
4677                                     unsigned int count)
4678 {
4679         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4680         int ret;
4681
4682         if (vcpu->arch.pio.count)
4683                 goto data_avail;
4684
4685         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4686         if (ret) {
4687 data_avail:
4688                 memcpy(val, vcpu->arch.pio_data, size * count);
4689                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4690                 vcpu->arch.pio.count = 0;
4691                 return 1;
4692         }
4693
4694         return 0;
4695 }
4696
4697 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4698                                      int size, unsigned short port,
4699                                      const void *val, unsigned int count)
4700 {
4701         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4702
4703         memcpy(vcpu->arch.pio_data, val, size * count);
4704         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4705         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4706 }
4707
4708 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4709 {
4710         return kvm_x86_ops->get_segment_base(vcpu, seg);
4711 }
4712
4713 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4714 {
4715         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4716 }
4717
4718 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4719 {
4720         if (!need_emulate_wbinvd(vcpu))
4721                 return X86EMUL_CONTINUE;
4722
4723         if (kvm_x86_ops->has_wbinvd_exit()) {
4724                 int cpu = get_cpu();
4725
4726                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4727                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4728                                 wbinvd_ipi, NULL, 1);
4729                 put_cpu();
4730                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4731         } else
4732                 wbinvd();
4733         return X86EMUL_CONTINUE;
4734 }
4735
4736 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4737 {
4738         kvm_x86_ops->skip_emulated_instruction(vcpu);
4739         return kvm_emulate_wbinvd_noskip(vcpu);
4740 }
4741 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4742
4743
4744
4745 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4746 {
4747         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4748 }
4749
4750 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4751                            unsigned long *dest)
4752 {
4753         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4754 }
4755
4756 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4757                            unsigned long value)
4758 {
4759
4760         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4761 }
4762
4763 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4764 {
4765         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4766 }
4767
4768 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4769 {
4770         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4771         unsigned long value;
4772
4773         switch (cr) {
4774         case 0:
4775                 value = kvm_read_cr0(vcpu);
4776                 break;
4777         case 2:
4778                 value = vcpu->arch.cr2;
4779                 break;
4780         case 3:
4781                 value = kvm_read_cr3(vcpu);
4782                 break;
4783         case 4:
4784                 value = kvm_read_cr4(vcpu);
4785                 break;
4786         case 8:
4787                 value = kvm_get_cr8(vcpu);
4788                 break;
4789         default:
4790                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4791                 return 0;
4792         }
4793
4794         return value;
4795 }
4796
4797 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4798 {
4799         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4800         int res = 0;
4801
4802         switch (cr) {
4803         case 0:
4804                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4805                 break;
4806         case 2:
4807                 vcpu->arch.cr2 = val;
4808                 break;
4809         case 3:
4810                 res = kvm_set_cr3(vcpu, val);
4811                 break;
4812         case 4:
4813                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4814                 break;
4815         case 8:
4816                 res = kvm_set_cr8(vcpu, val);
4817                 break;
4818         default:
4819                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4820                 res = -1;
4821         }
4822
4823         return res;
4824 }
4825
4826 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4827 {
4828         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4829 }
4830
4831 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4832 {
4833         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4834 }
4835
4836 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4837 {
4838         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4839 }
4840
4841 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4842 {
4843         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4844 }
4845
4846 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4847 {
4848         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4849 }
4850
4851 static unsigned long emulator_get_cached_segment_base(
4852         struct x86_emulate_ctxt *ctxt, int seg)
4853 {
4854         return get_segment_base(emul_to_vcpu(ctxt), seg);
4855 }
4856
4857 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4858                                  struct desc_struct *desc, u32 *base3,
4859                                  int seg)
4860 {
4861         struct kvm_segment var;
4862
4863         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4864         *selector = var.selector;
4865
4866         if (var.unusable) {
4867                 memset(desc, 0, sizeof(*desc));
4868                 return false;
4869         }
4870
4871         if (var.g)
4872                 var.limit >>= 12;
4873         set_desc_limit(desc, var.limit);
4874         set_desc_base(desc, (unsigned long)var.base);
4875 #ifdef CONFIG_X86_64
4876         if (base3)
4877                 *base3 = var.base >> 32;
4878 #endif
4879         desc->type = var.type;
4880         desc->s = var.s;
4881         desc->dpl = var.dpl;
4882         desc->p = var.present;
4883         desc->avl = var.avl;
4884         desc->l = var.l;
4885         desc->d = var.db;
4886         desc->g = var.g;
4887
4888         return true;
4889 }
4890
4891 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4892                                  struct desc_struct *desc, u32 base3,
4893                                  int seg)
4894 {
4895         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4896         struct kvm_segment var;
4897
4898         var.selector = selector;
4899         var.base = get_desc_base(desc);
4900 #ifdef CONFIG_X86_64
4901         var.base |= ((u64)base3) << 32;
4902 #endif
4903         var.limit = get_desc_limit(desc);
4904         if (desc->g)
4905                 var.limit = (var.limit << 12) | 0xfff;
4906         var.type = desc->type;
4907         var.dpl = desc->dpl;
4908         var.db = desc->d;
4909         var.s = desc->s;
4910         var.l = desc->l;
4911         var.g = desc->g;
4912         var.avl = desc->avl;
4913         var.present = desc->p;
4914         var.unusable = !var.present;
4915         var.padding = 0;
4916
4917         kvm_set_segment(vcpu, &var, seg);
4918         return;
4919 }
4920
4921 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4922                             u32 msr_index, u64 *pdata)
4923 {
4924         struct msr_data msr;
4925         int r;
4926
4927         msr.index = msr_index;
4928         msr.host_initiated = false;
4929         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4930         if (r)
4931                 return r;
4932
4933         *pdata = msr.data;
4934         return 0;
4935 }
4936
4937 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4938                             u32 msr_index, u64 data)
4939 {
4940         struct msr_data msr;
4941
4942         msr.data = data;
4943         msr.index = msr_index;
4944         msr.host_initiated = false;
4945         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4946 }
4947
4948 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4949 {
4950         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4951
4952         return vcpu->arch.smbase;
4953 }
4954
4955 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4956 {
4957         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4958
4959         vcpu->arch.smbase = smbase;
4960 }
4961
4962 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4963                               u32 pmc)
4964 {
4965         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4966 }
4967
4968 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4969                              u32 pmc, u64 *pdata)
4970 {
4971         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4972 }
4973
4974 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4975 {
4976         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4977 }
4978
4979 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4980 {
4981         preempt_disable();
4982         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4983         /*
4984          * CR0.TS may reference the host fpu state, not the guest fpu state,
4985          * so it may be clear at this point.
4986          */
4987         clts();
4988 }
4989
4990 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4991 {
4992         preempt_enable();
4993 }
4994
4995 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4996                               struct x86_instruction_info *info,
4997                               enum x86_intercept_stage stage)
4998 {
4999         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5000 }
5001
5002 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5003                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5004 {
5005         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5006 }
5007
5008 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5009 {
5010         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5011 }
5012
5013 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5014 {
5015         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5016 }
5017
5018 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5019 {
5020         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5021 }
5022
5023 static const struct x86_emulate_ops emulate_ops = {
5024         .read_gpr            = emulator_read_gpr,
5025         .write_gpr           = emulator_write_gpr,
5026         .read_std            = kvm_read_guest_virt_system,
5027         .write_std           = kvm_write_guest_virt_system,
5028         .read_phys           = kvm_read_guest_phys_system,
5029         .fetch               = kvm_fetch_guest_virt,
5030         .read_emulated       = emulator_read_emulated,
5031         .write_emulated      = emulator_write_emulated,
5032         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5033         .invlpg              = emulator_invlpg,
5034         .pio_in_emulated     = emulator_pio_in_emulated,
5035         .pio_out_emulated    = emulator_pio_out_emulated,
5036         .get_segment         = emulator_get_segment,
5037         .set_segment         = emulator_set_segment,
5038         .get_cached_segment_base = emulator_get_cached_segment_base,
5039         .get_gdt             = emulator_get_gdt,
5040         .get_idt             = emulator_get_idt,
5041         .set_gdt             = emulator_set_gdt,
5042         .set_idt             = emulator_set_idt,
5043         .get_cr              = emulator_get_cr,
5044         .set_cr              = emulator_set_cr,
5045         .cpl                 = emulator_get_cpl,
5046         .get_dr              = emulator_get_dr,
5047         .set_dr              = emulator_set_dr,
5048         .get_smbase          = emulator_get_smbase,
5049         .set_smbase          = emulator_set_smbase,
5050         .set_msr             = emulator_set_msr,
5051         .get_msr             = emulator_get_msr,
5052         .check_pmc           = emulator_check_pmc,
5053         .read_pmc            = emulator_read_pmc,
5054         .halt                = emulator_halt,
5055         .wbinvd              = emulator_wbinvd,
5056         .fix_hypercall       = emulator_fix_hypercall,
5057         .get_fpu             = emulator_get_fpu,
5058         .put_fpu             = emulator_put_fpu,
5059         .intercept           = emulator_intercept,
5060         .get_cpuid           = emulator_get_cpuid,
5061         .set_nmi_mask        = emulator_set_nmi_mask,
5062 };
5063
5064 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5065 {
5066         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5067         /*
5068          * an sti; sti; sequence only disable interrupts for the first
5069          * instruction. So, if the last instruction, be it emulated or
5070          * not, left the system with the INT_STI flag enabled, it
5071          * means that the last instruction is an sti. We should not
5072          * leave the flag on in this case. The same goes for mov ss
5073          */
5074         if (int_shadow & mask)
5075                 mask = 0;
5076         if (unlikely(int_shadow || mask)) {
5077                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5078                 if (!mask)
5079                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5080         }
5081 }
5082
5083 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5084 {
5085         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5086         if (ctxt->exception.vector == PF_VECTOR)
5087                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5088
5089         if (ctxt->exception.error_code_valid)
5090                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5091                                       ctxt->exception.error_code);
5092         else
5093                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5094         return false;
5095 }
5096
5097 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5098 {
5099         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5100         int cs_db, cs_l;
5101
5102         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5103
5104         ctxt->eflags = kvm_get_rflags(vcpu);
5105         ctxt->eip = kvm_rip_read(vcpu);
5106         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5107                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5108                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5109                      cs_db                              ? X86EMUL_MODE_PROT32 :
5110                                                           X86EMUL_MODE_PROT16;
5111         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5112         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5113         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5114         ctxt->emul_flags = vcpu->arch.hflags;
5115
5116         init_decode_cache(ctxt);
5117         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5118 }
5119
5120 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5121 {
5122         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5123         int ret;
5124
5125         init_emulate_ctxt(vcpu);
5126
5127         ctxt->op_bytes = 2;
5128         ctxt->ad_bytes = 2;
5129         ctxt->_eip = ctxt->eip + inc_eip;
5130         ret = emulate_int_real(ctxt, irq);
5131
5132         if (ret != X86EMUL_CONTINUE)
5133                 return EMULATE_FAIL;
5134
5135         ctxt->eip = ctxt->_eip;
5136         kvm_rip_write(vcpu, ctxt->eip);
5137         kvm_set_rflags(vcpu, ctxt->eflags);
5138
5139         if (irq == NMI_VECTOR)
5140                 vcpu->arch.nmi_pending = 0;
5141         else
5142                 vcpu->arch.interrupt.pending = false;
5143
5144         return EMULATE_DONE;
5145 }
5146 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5147
5148 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5149 {
5150         int r = EMULATE_DONE;
5151
5152         ++vcpu->stat.insn_emulation_fail;
5153         trace_kvm_emulate_insn_failed(vcpu);
5154         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5155                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5156                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5157                 vcpu->run->internal.ndata = 0;
5158                 r = EMULATE_FAIL;
5159         }
5160         kvm_queue_exception(vcpu, UD_VECTOR);
5161
5162         return r;
5163 }
5164
5165 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5166                                   bool write_fault_to_shadow_pgtable,
5167                                   int emulation_type)
5168 {
5169         gpa_t gpa = cr2;
5170         kvm_pfn_t pfn;
5171
5172         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5173                 return false;
5174
5175         if (!vcpu->arch.mmu.direct_map) {
5176                 /*
5177                  * Write permission should be allowed since only
5178                  * write access need to be emulated.
5179                  */
5180                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5181
5182                 /*
5183                  * If the mapping is invalid in guest, let cpu retry
5184                  * it to generate fault.
5185                  */
5186                 if (gpa == UNMAPPED_GVA)
5187                         return true;
5188         }
5189
5190         /*
5191          * Do not retry the unhandleable instruction if it faults on the
5192          * readonly host memory, otherwise it will goto a infinite loop:
5193          * retry instruction -> write #PF -> emulation fail -> retry
5194          * instruction -> ...
5195          */
5196         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5197
5198         /*
5199          * If the instruction failed on the error pfn, it can not be fixed,
5200          * report the error to userspace.
5201          */
5202         if (is_error_noslot_pfn(pfn))
5203                 return false;
5204
5205         kvm_release_pfn_clean(pfn);
5206
5207         /* The instructions are well-emulated on direct mmu. */
5208         if (vcpu->arch.mmu.direct_map) {
5209                 unsigned int indirect_shadow_pages;
5210
5211                 spin_lock(&vcpu->kvm->mmu_lock);
5212                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5213                 spin_unlock(&vcpu->kvm->mmu_lock);
5214
5215                 if (indirect_shadow_pages)
5216                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5217
5218                 return true;
5219         }
5220
5221         /*
5222          * if emulation was due to access to shadowed page table
5223          * and it failed try to unshadow page and re-enter the
5224          * guest to let CPU execute the instruction.
5225          */
5226         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5227
5228         /*
5229          * If the access faults on its page table, it can not
5230          * be fixed by unprotecting shadow page and it should
5231          * be reported to userspace.
5232          */
5233         return !write_fault_to_shadow_pgtable;
5234 }
5235
5236 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5237                               unsigned long cr2,  int emulation_type)
5238 {
5239         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5240         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5241
5242         last_retry_eip = vcpu->arch.last_retry_eip;
5243         last_retry_addr = vcpu->arch.last_retry_addr;
5244
5245         /*
5246          * If the emulation is caused by #PF and it is non-page_table
5247          * writing instruction, it means the VM-EXIT is caused by shadow
5248          * page protected, we can zap the shadow page and retry this
5249          * instruction directly.
5250          *
5251          * Note: if the guest uses a non-page-table modifying instruction
5252          * on the PDE that points to the instruction, then we will unmap
5253          * the instruction and go to an infinite loop. So, we cache the
5254          * last retried eip and the last fault address, if we meet the eip
5255          * and the address again, we can break out of the potential infinite
5256          * loop.
5257          */
5258         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5259
5260         if (!(emulation_type & EMULTYPE_RETRY))
5261                 return false;
5262
5263         if (x86_page_table_writing_insn(ctxt))
5264                 return false;
5265
5266         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5267                 return false;
5268
5269         vcpu->arch.last_retry_eip = ctxt->eip;
5270         vcpu->arch.last_retry_addr = cr2;
5271
5272         if (!vcpu->arch.mmu.direct_map)
5273                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5274
5275         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5276
5277         return true;
5278 }
5279
5280 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5281 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5282
5283 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5284 {
5285         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5286                 /* This is a good place to trace that we are exiting SMM.  */
5287                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5288
5289                 if (unlikely(vcpu->arch.smi_pending)) {
5290                         kvm_make_request(KVM_REQ_SMI, vcpu);
5291                         vcpu->arch.smi_pending = 0;
5292                 } else {
5293                         /* Process a latched INIT, if any.  */
5294                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5295                 }
5296         }
5297
5298         kvm_mmu_reset_context(vcpu);
5299 }
5300
5301 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5302 {
5303         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5304
5305         vcpu->arch.hflags = emul_flags;
5306
5307         if (changed & HF_SMM_MASK)
5308                 kvm_smm_changed(vcpu);
5309 }
5310
5311 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5312                                 unsigned long *db)
5313 {
5314         u32 dr6 = 0;
5315         int i;
5316         u32 enable, rwlen;
5317
5318         enable = dr7;
5319         rwlen = dr7 >> 16;
5320         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5321                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5322                         dr6 |= (1 << i);
5323         return dr6;
5324 }
5325
5326 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5327 {
5328         struct kvm_run *kvm_run = vcpu->run;
5329
5330         /*
5331          * rflags is the old, "raw" value of the flags.  The new value has
5332          * not been saved yet.
5333          *
5334          * This is correct even for TF set by the guest, because "the
5335          * processor will not generate this exception after the instruction
5336          * that sets the TF flag".
5337          */
5338         if (unlikely(rflags & X86_EFLAGS_TF)) {
5339                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5340                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5341                                                   DR6_RTM;
5342                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5343                         kvm_run->debug.arch.exception = DB_VECTOR;
5344                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5345                         *r = EMULATE_USER_EXIT;
5346                 } else {
5347                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5348                         /*
5349                          * "Certain debug exceptions may clear bit 0-3.  The
5350                          * remaining contents of the DR6 register are never
5351                          * cleared by the processor".
5352                          */
5353                         vcpu->arch.dr6 &= ~15;
5354                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5355                         kvm_queue_exception(vcpu, DB_VECTOR);
5356                 }
5357         }
5358 }
5359
5360 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5361 {
5362         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5363             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5364                 struct kvm_run *kvm_run = vcpu->run;
5365                 unsigned long eip = kvm_get_linear_rip(vcpu);
5366                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5367                                            vcpu->arch.guest_debug_dr7,
5368                                            vcpu->arch.eff_db);
5369
5370                 if (dr6 != 0) {
5371                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5372                         kvm_run->debug.arch.pc = eip;
5373                         kvm_run->debug.arch.exception = DB_VECTOR;
5374                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5375                         *r = EMULATE_USER_EXIT;
5376                         return true;
5377                 }
5378         }
5379
5380         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5381             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5382                 unsigned long eip = kvm_get_linear_rip(vcpu);
5383                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5384                                            vcpu->arch.dr7,
5385                                            vcpu->arch.db);
5386
5387                 if (dr6 != 0) {
5388                         vcpu->arch.dr6 &= ~15;
5389                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5390                         kvm_queue_exception(vcpu, DB_VECTOR);
5391                         *r = EMULATE_DONE;
5392                         return true;
5393                 }
5394         }
5395
5396         return false;
5397 }
5398
5399 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5400                             unsigned long cr2,
5401                             int emulation_type,
5402                             void *insn,
5403                             int insn_len)
5404 {
5405         int r;
5406         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5407         bool writeback = true;
5408         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5409
5410         /*
5411          * Clear write_fault_to_shadow_pgtable here to ensure it is
5412          * never reused.
5413          */
5414         vcpu->arch.write_fault_to_shadow_pgtable = false;
5415         kvm_clear_exception_queue(vcpu);
5416
5417         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5418                 init_emulate_ctxt(vcpu);
5419
5420                 /*
5421                  * We will reenter on the same instruction since
5422                  * we do not set complete_userspace_io.  This does not
5423                  * handle watchpoints yet, those would be handled in
5424                  * the emulate_ops.
5425                  */
5426                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5427                         return r;
5428
5429                 ctxt->interruptibility = 0;
5430                 ctxt->have_exception = false;
5431                 ctxt->exception.vector = -1;
5432                 ctxt->perm_ok = false;
5433
5434                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5435
5436                 r = x86_decode_insn(ctxt, insn, insn_len);
5437
5438                 trace_kvm_emulate_insn_start(vcpu);
5439                 ++vcpu->stat.insn_emulation;
5440                 if (r != EMULATION_OK)  {
5441                         if (emulation_type & EMULTYPE_TRAP_UD)
5442                                 return EMULATE_FAIL;
5443                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5444                                                 emulation_type))
5445                                 return EMULATE_DONE;
5446                         if (emulation_type & EMULTYPE_SKIP)
5447                                 return EMULATE_FAIL;
5448                         return handle_emulation_failure(vcpu);
5449                 }
5450         }
5451
5452         if (emulation_type & EMULTYPE_SKIP) {
5453                 kvm_rip_write(vcpu, ctxt->_eip);
5454                 if (ctxt->eflags & X86_EFLAGS_RF)
5455                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5456                 return EMULATE_DONE;
5457         }
5458
5459         if (retry_instruction(ctxt, cr2, emulation_type))
5460                 return EMULATE_DONE;
5461
5462         /* this is needed for vmware backdoor interface to work since it
5463            changes registers values  during IO operation */
5464         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5465                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5466                 emulator_invalidate_register_cache(ctxt);
5467         }
5468
5469 restart:
5470         r = x86_emulate_insn(ctxt);
5471
5472         if (r == EMULATION_INTERCEPTED)
5473                 return EMULATE_DONE;
5474
5475         if (r == EMULATION_FAILED) {
5476                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5477                                         emulation_type))
5478                         return EMULATE_DONE;
5479
5480                 return handle_emulation_failure(vcpu);
5481         }
5482
5483         if (ctxt->have_exception) {
5484                 r = EMULATE_DONE;
5485                 if (inject_emulated_exception(vcpu))
5486                         return r;
5487         } else if (vcpu->arch.pio.count) {
5488                 if (!vcpu->arch.pio.in) {
5489                         /* FIXME: return into emulator if single-stepping.  */
5490                         vcpu->arch.pio.count = 0;
5491                 } else {
5492                         writeback = false;
5493                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5494                 }
5495                 r = EMULATE_USER_EXIT;
5496         } else if (vcpu->mmio_needed) {
5497                 if (!vcpu->mmio_is_write)
5498                         writeback = false;
5499                 r = EMULATE_USER_EXIT;
5500                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5501         } else if (r == EMULATION_RESTART)
5502                 goto restart;
5503         else
5504                 r = EMULATE_DONE;
5505
5506         if (writeback) {
5507                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5508                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5509                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5510                 if (vcpu->arch.hflags != ctxt->emul_flags)
5511                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5512                 kvm_rip_write(vcpu, ctxt->eip);
5513                 if (r == EMULATE_DONE)
5514                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5515                 if (!ctxt->have_exception ||
5516                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5517                         __kvm_set_rflags(vcpu, ctxt->eflags);
5518
5519                 /*
5520                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5521                  * do nothing, and it will be requested again as soon as
5522                  * the shadow expires.  But we still need to check here,
5523                  * because POPF has no interrupt shadow.
5524                  */
5525                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5526                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5527         } else
5528                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5529
5530         return r;
5531 }
5532 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5533
5534 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5535 {
5536         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5537         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5538                                             size, port, &val, 1);
5539         /* do not return to emulator after return from userspace */
5540         vcpu->arch.pio.count = 0;
5541         return ret;
5542 }
5543 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5544
5545 static void tsc_bad(void *info)
5546 {
5547         __this_cpu_write(cpu_tsc_khz, 0);
5548 }
5549
5550 static void tsc_khz_changed(void *data)
5551 {
5552         struct cpufreq_freqs *freq = data;
5553         unsigned long khz = 0;
5554
5555         if (data)
5556                 khz = freq->new;
5557         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5558                 khz = cpufreq_quick_get(raw_smp_processor_id());
5559         if (!khz)
5560                 khz = tsc_khz;
5561         __this_cpu_write(cpu_tsc_khz, khz);
5562 }
5563
5564 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5565                                      void *data)
5566 {
5567         struct cpufreq_freqs *freq = data;
5568         struct kvm *kvm;
5569         struct kvm_vcpu *vcpu;
5570         int i, send_ipi = 0;
5571
5572         /*
5573          * We allow guests to temporarily run on slowing clocks,
5574          * provided we notify them after, or to run on accelerating
5575          * clocks, provided we notify them before.  Thus time never
5576          * goes backwards.
5577          *
5578          * However, we have a problem.  We can't atomically update
5579          * the frequency of a given CPU from this function; it is
5580          * merely a notifier, which can be called from any CPU.
5581          * Changing the TSC frequency at arbitrary points in time
5582          * requires a recomputation of local variables related to
5583          * the TSC for each VCPU.  We must flag these local variables
5584          * to be updated and be sure the update takes place with the
5585          * new frequency before any guests proceed.
5586          *
5587          * Unfortunately, the combination of hotplug CPU and frequency
5588          * change creates an intractable locking scenario; the order
5589          * of when these callouts happen is undefined with respect to
5590          * CPU hotplug, and they can race with each other.  As such,
5591          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5592          * undefined; you can actually have a CPU frequency change take
5593          * place in between the computation of X and the setting of the
5594          * variable.  To protect against this problem, all updates of
5595          * the per_cpu tsc_khz variable are done in an interrupt
5596          * protected IPI, and all callers wishing to update the value
5597          * must wait for a synchronous IPI to complete (which is trivial
5598          * if the caller is on the CPU already).  This establishes the
5599          * necessary total order on variable updates.
5600          *
5601          * Note that because a guest time update may take place
5602          * anytime after the setting of the VCPU's request bit, the
5603          * correct TSC value must be set before the request.  However,
5604          * to ensure the update actually makes it to any guest which
5605          * starts running in hardware virtualization between the set
5606          * and the acquisition of the spinlock, we must also ping the
5607          * CPU after setting the request bit.
5608          *
5609          */
5610
5611         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5612                 return 0;
5613         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5614                 return 0;
5615
5616         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5617
5618         spin_lock(&kvm_lock);
5619         list_for_each_entry(kvm, &vm_list, vm_list) {
5620                 kvm_for_each_vcpu(i, vcpu, kvm) {
5621                         if (vcpu->cpu != freq->cpu)
5622                                 continue;
5623                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5624                         if (vcpu->cpu != smp_processor_id())
5625                                 send_ipi = 1;
5626                 }
5627         }
5628         spin_unlock(&kvm_lock);
5629
5630         if (freq->old < freq->new && send_ipi) {
5631                 /*
5632                  * We upscale the frequency.  Must make the guest
5633                  * doesn't see old kvmclock values while running with
5634                  * the new frequency, otherwise we risk the guest sees
5635                  * time go backwards.
5636                  *
5637                  * In case we update the frequency for another cpu
5638                  * (which might be in guest context) send an interrupt
5639                  * to kick the cpu out of guest context.  Next time
5640                  * guest context is entered kvmclock will be updated,
5641                  * so the guest will not see stale values.
5642                  */
5643                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5644         }
5645         return 0;
5646 }
5647
5648 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5649         .notifier_call  = kvmclock_cpufreq_notifier
5650 };
5651
5652 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5653                                         unsigned long action, void *hcpu)
5654 {
5655         unsigned int cpu = (unsigned long)hcpu;
5656
5657         switch (action) {
5658                 case CPU_ONLINE:
5659                 case CPU_DOWN_FAILED:
5660                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5661                         break;
5662                 case CPU_DOWN_PREPARE:
5663                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5664                         break;
5665         }
5666         return NOTIFY_OK;
5667 }
5668
5669 static struct notifier_block kvmclock_cpu_notifier_block = {
5670         .notifier_call  = kvmclock_cpu_notifier,
5671         .priority = -INT_MAX
5672 };
5673
5674 static void kvm_timer_init(void)
5675 {
5676         int cpu;
5677
5678         max_tsc_khz = tsc_khz;
5679
5680         cpu_notifier_register_begin();
5681         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5682 #ifdef CONFIG_CPU_FREQ
5683                 struct cpufreq_policy policy;
5684                 memset(&policy, 0, sizeof(policy));
5685                 cpu = get_cpu();
5686                 cpufreq_get_policy(&policy, cpu);
5687                 if (policy.cpuinfo.max_freq)
5688                         max_tsc_khz = policy.cpuinfo.max_freq;
5689                 put_cpu();
5690 #endif
5691                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5692                                           CPUFREQ_TRANSITION_NOTIFIER);
5693         }
5694         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5695         for_each_online_cpu(cpu)
5696                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5697
5698         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5699         cpu_notifier_register_done();
5700
5701 }
5702
5703 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5704
5705 int kvm_is_in_guest(void)
5706 {
5707         return __this_cpu_read(current_vcpu) != NULL;
5708 }
5709
5710 static int kvm_is_user_mode(void)
5711 {
5712         int user_mode = 3;
5713
5714         if (__this_cpu_read(current_vcpu))
5715                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5716
5717         return user_mode != 0;
5718 }
5719
5720 static unsigned long kvm_get_guest_ip(void)
5721 {
5722         unsigned long ip = 0;
5723
5724         if (__this_cpu_read(current_vcpu))
5725                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5726
5727         return ip;
5728 }
5729
5730 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5731         .is_in_guest            = kvm_is_in_guest,
5732         .is_user_mode           = kvm_is_user_mode,
5733         .get_guest_ip           = kvm_get_guest_ip,
5734 };
5735
5736 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5737 {
5738         __this_cpu_write(current_vcpu, vcpu);
5739 }
5740 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5741
5742 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5743 {
5744         __this_cpu_write(current_vcpu, NULL);
5745 }
5746 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5747
5748 static void kvm_set_mmio_spte_mask(void)
5749 {
5750         u64 mask;
5751         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5752
5753         /*
5754          * Set the reserved bits and the present bit of an paging-structure
5755          * entry to generate page fault with PFER.RSV = 1.
5756          */
5757          /* Mask the reserved physical address bits. */
5758         mask = rsvd_bits(maxphyaddr, 51);
5759
5760         /* Bit 62 is always reserved for 32bit host. */
5761         mask |= 0x3ull << 62;
5762
5763         /* Set the present bit. */
5764         mask |= 1ull;
5765
5766 #ifdef CONFIG_X86_64
5767         /*
5768          * If reserved bit is not supported, clear the present bit to disable
5769          * mmio page fault.
5770          */
5771         if (maxphyaddr == 52)
5772                 mask &= ~1ull;
5773 #endif
5774
5775         kvm_mmu_set_mmio_spte_mask(mask);
5776 }
5777
5778 #ifdef CONFIG_X86_64
5779 static void pvclock_gtod_update_fn(struct work_struct *work)
5780 {
5781         struct kvm *kvm;
5782
5783         struct kvm_vcpu *vcpu;
5784         int i;
5785
5786         spin_lock(&kvm_lock);
5787         list_for_each_entry(kvm, &vm_list, vm_list)
5788                 kvm_for_each_vcpu(i, vcpu, kvm)
5789                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5790         atomic_set(&kvm_guest_has_master_clock, 0);
5791         spin_unlock(&kvm_lock);
5792 }
5793
5794 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5795
5796 /*
5797  * Notification about pvclock gtod data update.
5798  */
5799 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5800                                void *priv)
5801 {
5802         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5803         struct timekeeper *tk = priv;
5804
5805         update_pvclock_gtod(tk);
5806
5807         /* disable master clock if host does not trust, or does not
5808          * use, TSC clocksource
5809          */
5810         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5811             atomic_read(&kvm_guest_has_master_clock) != 0)
5812                 queue_work(system_long_wq, &pvclock_gtod_work);
5813
5814         return 0;
5815 }
5816
5817 static struct notifier_block pvclock_gtod_notifier = {
5818         .notifier_call = pvclock_gtod_notify,
5819 };
5820 #endif
5821
5822 int kvm_arch_init(void *opaque)
5823 {
5824         int r;
5825         struct kvm_x86_ops *ops = opaque;
5826
5827         if (kvm_x86_ops) {
5828                 printk(KERN_ERR "kvm: already loaded the other module\n");
5829                 r = -EEXIST;
5830                 goto out;
5831         }
5832
5833         if (!ops->cpu_has_kvm_support()) {
5834                 printk(KERN_ERR "kvm: no hardware support\n");
5835                 r = -EOPNOTSUPP;
5836                 goto out;
5837         }
5838         if (ops->disabled_by_bios()) {
5839                 printk(KERN_ERR "kvm: disabled by bios\n");
5840                 r = -EOPNOTSUPP;
5841                 goto out;
5842         }
5843
5844         r = -ENOMEM;
5845         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5846         if (!shared_msrs) {
5847                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5848                 goto out;
5849         }
5850
5851         r = kvm_mmu_module_init();
5852         if (r)
5853                 goto out_free_percpu;
5854
5855         kvm_set_mmio_spte_mask();
5856
5857         kvm_x86_ops = ops;
5858
5859         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5860                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5861
5862         kvm_timer_init();
5863
5864         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5865
5866         if (cpu_has_xsave)
5867                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5868
5869         kvm_lapic_init();
5870 #ifdef CONFIG_X86_64
5871         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5872 #endif
5873
5874         return 0;
5875
5876 out_free_percpu:
5877         free_percpu(shared_msrs);
5878 out:
5879         return r;
5880 }
5881
5882 void kvm_arch_exit(void)
5883 {
5884         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5885
5886         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5887                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5888                                             CPUFREQ_TRANSITION_NOTIFIER);
5889         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5890 #ifdef CONFIG_X86_64
5891         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5892 #endif
5893         kvm_x86_ops = NULL;
5894         kvm_mmu_module_exit();
5895         free_percpu(shared_msrs);
5896 }
5897
5898 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5899 {
5900         ++vcpu->stat.halt_exits;
5901         if (lapic_in_kernel(vcpu)) {
5902                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5903                 return 1;
5904         } else {
5905                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5906                 return 0;
5907         }
5908 }
5909 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5910
5911 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5912 {
5913         kvm_x86_ops->skip_emulated_instruction(vcpu);
5914         return kvm_vcpu_halt(vcpu);
5915 }
5916 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5917
5918 /*
5919  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5920  *
5921  * @apicid - apicid of vcpu to be kicked.
5922  */
5923 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5924 {
5925         struct kvm_lapic_irq lapic_irq;
5926
5927         lapic_irq.shorthand = 0;
5928         lapic_irq.dest_mode = 0;
5929         lapic_irq.dest_id = apicid;
5930         lapic_irq.msi_redir_hint = false;
5931
5932         lapic_irq.delivery_mode = APIC_DM_REMRD;
5933         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5934 }
5935
5936 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5937 {
5938         vcpu->arch.apicv_active = false;
5939         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5940 }
5941
5942 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5943 {
5944         unsigned long nr, a0, a1, a2, a3, ret;
5945         int op_64_bit, r = 1;
5946
5947         kvm_x86_ops->skip_emulated_instruction(vcpu);
5948
5949         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5950                 return kvm_hv_hypercall(vcpu);
5951
5952         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5953         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5954         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5955         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5956         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5957
5958         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5959
5960         op_64_bit = is_64_bit_mode(vcpu);
5961         if (!op_64_bit) {
5962                 nr &= 0xFFFFFFFF;
5963                 a0 &= 0xFFFFFFFF;
5964                 a1 &= 0xFFFFFFFF;
5965                 a2 &= 0xFFFFFFFF;
5966                 a3 &= 0xFFFFFFFF;
5967         }
5968
5969         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5970                 ret = -KVM_EPERM;
5971                 goto out;
5972         }
5973
5974         switch (nr) {
5975         case KVM_HC_VAPIC_POLL_IRQ:
5976                 ret = 0;
5977                 break;
5978         case KVM_HC_KICK_CPU:
5979                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5980                 ret = 0;
5981                 break;
5982         default:
5983                 ret = -KVM_ENOSYS;
5984                 break;
5985         }
5986 out:
5987         if (!op_64_bit)
5988                 ret = (u32)ret;
5989         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5990         ++vcpu->stat.hypercalls;
5991         return r;
5992 }
5993 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5994
5995 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5996 {
5997         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5998         char instruction[3];
5999         unsigned long rip = kvm_rip_read(vcpu);
6000
6001         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6002
6003         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6004 }
6005
6006 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6007 {
6008         return vcpu->run->request_interrupt_window &&
6009                 likely(!pic_in_kernel(vcpu->kvm));
6010 }
6011
6012 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6013 {
6014         struct kvm_run *kvm_run = vcpu->run;
6015
6016         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6017         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6018         kvm_run->cr8 = kvm_get_cr8(vcpu);
6019         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6020         kvm_run->ready_for_interrupt_injection =
6021                 pic_in_kernel(vcpu->kvm) ||
6022                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6023 }
6024
6025 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6026 {
6027         int max_irr, tpr;
6028
6029         if (!kvm_x86_ops->update_cr8_intercept)
6030                 return;
6031
6032         if (!lapic_in_kernel(vcpu))
6033                 return;
6034
6035         if (vcpu->arch.apicv_active)
6036                 return;
6037
6038         if (!vcpu->arch.apic->vapic_addr)
6039                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6040         else
6041                 max_irr = -1;
6042
6043         if (max_irr != -1)
6044                 max_irr >>= 4;
6045
6046         tpr = kvm_lapic_get_cr8(vcpu);
6047
6048         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6049 }
6050
6051 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6052 {
6053         int r;
6054
6055         /* try to reinject previous events if any */
6056         if (vcpu->arch.exception.pending) {
6057                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6058                                         vcpu->arch.exception.has_error_code,
6059                                         vcpu->arch.exception.error_code);
6060
6061                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6062                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6063                                              X86_EFLAGS_RF);
6064
6065                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6066                     (vcpu->arch.dr7 & DR7_GD)) {
6067                         vcpu->arch.dr7 &= ~DR7_GD;
6068                         kvm_update_dr7(vcpu);
6069                 }
6070
6071                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6072                                           vcpu->arch.exception.has_error_code,
6073                                           vcpu->arch.exception.error_code,
6074                                           vcpu->arch.exception.reinject);
6075                 return 0;
6076         }
6077
6078         if (vcpu->arch.nmi_injected) {
6079                 kvm_x86_ops->set_nmi(vcpu);
6080                 return 0;
6081         }
6082
6083         if (vcpu->arch.interrupt.pending) {
6084                 kvm_x86_ops->set_irq(vcpu);
6085                 return 0;
6086         }
6087
6088         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6089                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6090                 if (r != 0)
6091                         return r;
6092         }
6093
6094         /* try to inject new event if pending */
6095         if (vcpu->arch.nmi_pending) {
6096                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6097                         --vcpu->arch.nmi_pending;
6098                         vcpu->arch.nmi_injected = true;
6099                         kvm_x86_ops->set_nmi(vcpu);
6100                 }
6101         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6102                 /*
6103                  * Because interrupts can be injected asynchronously, we are
6104                  * calling check_nested_events again here to avoid a race condition.
6105                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6106                  * proposal and current concerns.  Perhaps we should be setting
6107                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6108                  */
6109                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6110                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6111                         if (r != 0)
6112                                 return r;
6113                 }
6114                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6115                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6116                                             false);
6117                         kvm_x86_ops->set_irq(vcpu);
6118                 }
6119         }
6120         return 0;
6121 }
6122
6123 static void process_nmi(struct kvm_vcpu *vcpu)
6124 {
6125         unsigned limit = 2;
6126
6127         /*
6128          * x86 is limited to one NMI running, and one NMI pending after it.
6129          * If an NMI is already in progress, limit further NMIs to just one.
6130          * Otherwise, allow two (and we'll inject the first one immediately).
6131          */
6132         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6133                 limit = 1;
6134
6135         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6136         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6137         kvm_make_request(KVM_REQ_EVENT, vcpu);
6138 }
6139
6140 #define put_smstate(type, buf, offset, val)                       \
6141         *(type *)((buf) + (offset) - 0x7e00) = val
6142
6143 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6144 {
6145         u32 flags = 0;
6146         flags |= seg->g       << 23;
6147         flags |= seg->db      << 22;
6148         flags |= seg->l       << 21;
6149         flags |= seg->avl     << 20;
6150         flags |= seg->present << 15;
6151         flags |= seg->dpl     << 13;
6152         flags |= seg->s       << 12;
6153         flags |= seg->type    << 8;
6154         return flags;
6155 }
6156
6157 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6158 {
6159         struct kvm_segment seg;
6160         int offset;
6161
6162         kvm_get_segment(vcpu, &seg, n);
6163         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6164
6165         if (n < 3)
6166                 offset = 0x7f84 + n * 12;
6167         else
6168                 offset = 0x7f2c + (n - 3) * 12;
6169
6170         put_smstate(u32, buf, offset + 8, seg.base);
6171         put_smstate(u32, buf, offset + 4, seg.limit);
6172         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6173 }
6174
6175 #ifdef CONFIG_X86_64
6176 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6177 {
6178         struct kvm_segment seg;
6179         int offset;
6180         u16 flags;
6181
6182         kvm_get_segment(vcpu, &seg, n);
6183         offset = 0x7e00 + n * 16;
6184
6185         flags = process_smi_get_segment_flags(&seg) >> 8;
6186         put_smstate(u16, buf, offset, seg.selector);
6187         put_smstate(u16, buf, offset + 2, flags);
6188         put_smstate(u32, buf, offset + 4, seg.limit);
6189         put_smstate(u64, buf, offset + 8, seg.base);
6190 }
6191 #endif
6192
6193 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6194 {
6195         struct desc_ptr dt;
6196         struct kvm_segment seg;
6197         unsigned long val;
6198         int i;
6199
6200         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6201         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6202         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6203         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6204
6205         for (i = 0; i < 8; i++)
6206                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6207
6208         kvm_get_dr(vcpu, 6, &val);
6209         put_smstate(u32, buf, 0x7fcc, (u32)val);
6210         kvm_get_dr(vcpu, 7, &val);
6211         put_smstate(u32, buf, 0x7fc8, (u32)val);
6212
6213         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6214         put_smstate(u32, buf, 0x7fc4, seg.selector);
6215         put_smstate(u32, buf, 0x7f64, seg.base);
6216         put_smstate(u32, buf, 0x7f60, seg.limit);
6217         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6218
6219         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6220         put_smstate(u32, buf, 0x7fc0, seg.selector);
6221         put_smstate(u32, buf, 0x7f80, seg.base);
6222         put_smstate(u32, buf, 0x7f7c, seg.limit);
6223         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6224
6225         kvm_x86_ops->get_gdt(vcpu, &dt);
6226         put_smstate(u32, buf, 0x7f74, dt.address);
6227         put_smstate(u32, buf, 0x7f70, dt.size);
6228
6229         kvm_x86_ops->get_idt(vcpu, &dt);
6230         put_smstate(u32, buf, 0x7f58, dt.address);
6231         put_smstate(u32, buf, 0x7f54, dt.size);
6232
6233         for (i = 0; i < 6; i++)
6234                 process_smi_save_seg_32(vcpu, buf, i);
6235
6236         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6237
6238         /* revision id */
6239         put_smstate(u32, buf, 0x7efc, 0x00020000);
6240         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6241 }
6242
6243 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6244 {
6245 #ifdef CONFIG_X86_64
6246         struct desc_ptr dt;
6247         struct kvm_segment seg;
6248         unsigned long val;
6249         int i;
6250
6251         for (i = 0; i < 16; i++)
6252                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6253
6254         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6255         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6256
6257         kvm_get_dr(vcpu, 6, &val);
6258         put_smstate(u64, buf, 0x7f68, val);
6259         kvm_get_dr(vcpu, 7, &val);
6260         put_smstate(u64, buf, 0x7f60, val);
6261
6262         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6263         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6264         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6265
6266         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6267
6268         /* revision id */
6269         put_smstate(u32, buf, 0x7efc, 0x00020064);
6270
6271         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6272
6273         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6274         put_smstate(u16, buf, 0x7e90, seg.selector);
6275         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6276         put_smstate(u32, buf, 0x7e94, seg.limit);
6277         put_smstate(u64, buf, 0x7e98, seg.base);
6278
6279         kvm_x86_ops->get_idt(vcpu, &dt);
6280         put_smstate(u32, buf, 0x7e84, dt.size);
6281         put_smstate(u64, buf, 0x7e88, dt.address);
6282
6283         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6284         put_smstate(u16, buf, 0x7e70, seg.selector);
6285         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6286         put_smstate(u32, buf, 0x7e74, seg.limit);
6287         put_smstate(u64, buf, 0x7e78, seg.base);
6288
6289         kvm_x86_ops->get_gdt(vcpu, &dt);
6290         put_smstate(u32, buf, 0x7e64, dt.size);
6291         put_smstate(u64, buf, 0x7e68, dt.address);
6292
6293         for (i = 0; i < 6; i++)
6294                 process_smi_save_seg_64(vcpu, buf, i);
6295 #else
6296         WARN_ON_ONCE(1);
6297 #endif
6298 }
6299
6300 static void process_smi(struct kvm_vcpu *vcpu)
6301 {
6302         struct kvm_segment cs, ds;
6303         struct desc_ptr dt;
6304         char buf[512];
6305         u32 cr0;
6306
6307         if (is_smm(vcpu)) {
6308                 vcpu->arch.smi_pending = true;
6309                 return;
6310         }
6311
6312         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6313         vcpu->arch.hflags |= HF_SMM_MASK;
6314         memset(buf, 0, 512);
6315         if (guest_cpuid_has_longmode(vcpu))
6316                 process_smi_save_state_64(vcpu, buf);
6317         else
6318                 process_smi_save_state_32(vcpu, buf);
6319
6320         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6321
6322         if (kvm_x86_ops->get_nmi_mask(vcpu))
6323                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6324         else
6325                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6326
6327         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6328         kvm_rip_write(vcpu, 0x8000);
6329
6330         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6331         kvm_x86_ops->set_cr0(vcpu, cr0);
6332         vcpu->arch.cr0 = cr0;
6333
6334         kvm_x86_ops->set_cr4(vcpu, 0);
6335
6336         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6337         dt.address = dt.size = 0;
6338         kvm_x86_ops->set_idt(vcpu, &dt);
6339
6340         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6341
6342         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6343         cs.base = vcpu->arch.smbase;
6344
6345         ds.selector = 0;
6346         ds.base = 0;
6347
6348         cs.limit    = ds.limit = 0xffffffff;
6349         cs.type     = ds.type = 0x3;
6350         cs.dpl      = ds.dpl = 0;
6351         cs.db       = ds.db = 0;
6352         cs.s        = ds.s = 1;
6353         cs.l        = ds.l = 0;
6354         cs.g        = ds.g = 1;
6355         cs.avl      = ds.avl = 0;
6356         cs.present  = ds.present = 1;
6357         cs.unusable = ds.unusable = 0;
6358         cs.padding  = ds.padding = 0;
6359
6360         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6361         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6362         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6363         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6364         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6365         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6366
6367         if (guest_cpuid_has_longmode(vcpu))
6368                 kvm_x86_ops->set_efer(vcpu, 0);
6369
6370         kvm_update_cpuid(vcpu);
6371         kvm_mmu_reset_context(vcpu);
6372 }
6373
6374 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6375 {
6376         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6377 }
6378
6379 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6380 {
6381         u64 eoi_exit_bitmap[4];
6382
6383         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6384                 return;
6385
6386         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6387
6388         if (irqchip_split(vcpu->kvm))
6389                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6390         else {
6391                 if (vcpu->arch.apicv_active)
6392                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6393                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6394         }
6395         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6396                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6397         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6398 }
6399
6400 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6401 {
6402         ++vcpu->stat.tlb_flush;
6403         kvm_x86_ops->tlb_flush(vcpu);
6404 }
6405
6406 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6407 {
6408         struct page *page = NULL;
6409
6410         if (!lapic_in_kernel(vcpu))
6411                 return;
6412
6413         if (!kvm_x86_ops->set_apic_access_page_addr)
6414                 return;
6415
6416         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6417         if (is_error_page(page))
6418                 return;
6419         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6420
6421         /*
6422          * Do not pin apic access page in memory, the MMU notifier
6423          * will call us again if it is migrated or swapped out.
6424          */
6425         put_page(page);
6426 }
6427 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6428
6429 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6430                                            unsigned long address)
6431 {
6432         /*
6433          * The physical address of apic access page is stored in the VMCS.
6434          * Update it when it becomes invalid.
6435          */
6436         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6437                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6438 }
6439
6440 /*
6441  * Returns 1 to let vcpu_run() continue the guest execution loop without
6442  * exiting to the userspace.  Otherwise, the value will be returned to the
6443  * userspace.
6444  */
6445 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6446 {
6447         int r;
6448         bool req_int_win =
6449                 dm_request_for_irq_injection(vcpu) &&
6450                 kvm_cpu_accept_dm_intr(vcpu);
6451
6452         bool req_immediate_exit = false;
6453
6454         if (vcpu->requests) {
6455                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6456                         kvm_mmu_unload(vcpu);
6457                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6458                         __kvm_migrate_timers(vcpu);
6459                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6460                         kvm_gen_update_masterclock(vcpu->kvm);
6461                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6462                         kvm_gen_kvmclock_update(vcpu);
6463                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6464                         r = kvm_guest_time_update(vcpu);
6465                         if (unlikely(r))
6466                                 goto out;
6467                 }
6468                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6469                         kvm_mmu_sync_roots(vcpu);
6470                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6471                         kvm_vcpu_flush_tlb(vcpu);
6472                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6473                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6474                         r = 0;
6475                         goto out;
6476                 }
6477                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6478                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6479                         r = 0;
6480                         goto out;
6481                 }
6482                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6483                         vcpu->fpu_active = 0;
6484                         kvm_x86_ops->fpu_deactivate(vcpu);
6485                 }
6486                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6487                         /* Page is swapped out. Do synthetic halt */
6488                         vcpu->arch.apf.halted = true;
6489                         r = 1;
6490                         goto out;
6491                 }
6492                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6493                         record_steal_time(vcpu);
6494                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6495                         process_smi(vcpu);
6496                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6497                         process_nmi(vcpu);
6498                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6499                         kvm_pmu_handle_event(vcpu);
6500                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6501                         kvm_pmu_deliver_pmi(vcpu);
6502                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6503                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6504                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6505                                      vcpu->arch.ioapic_handled_vectors)) {
6506                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6507                                 vcpu->run->eoi.vector =
6508                                                 vcpu->arch.pending_ioapic_eoi;
6509                                 r = 0;
6510                                 goto out;
6511                         }
6512                 }
6513                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6514                         vcpu_scan_ioapic(vcpu);
6515                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6516                         kvm_vcpu_reload_apic_access_page(vcpu);
6517                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6518                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6519                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6520                         r = 0;
6521                         goto out;
6522                 }
6523                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6524                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6525                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6526                         r = 0;
6527                         goto out;
6528                 }
6529                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6530                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6531                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6532                         r = 0;
6533                         goto out;
6534                 }
6535
6536                 /*
6537                  * KVM_REQ_HV_STIMER has to be processed after
6538                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6539                  * depend on the guest clock being up-to-date
6540                  */
6541                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6542                         kvm_hv_process_stimers(vcpu);
6543         }
6544
6545         /*
6546          * KVM_REQ_EVENT is not set when posted interrupts are set by
6547          * VT-d hardware, so we have to update RVI unconditionally.
6548          */
6549         if (kvm_lapic_enabled(vcpu)) {
6550                 /*
6551                  * Update architecture specific hints for APIC
6552                  * virtual interrupt delivery.
6553                  */
6554                 if (vcpu->arch.apicv_active)
6555                         kvm_x86_ops->hwapic_irr_update(vcpu,
6556                                 kvm_lapic_find_highest_irr(vcpu));
6557         }
6558
6559         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6560                 kvm_apic_accept_events(vcpu);
6561                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6562                         r = 1;
6563                         goto out;
6564                 }
6565
6566                 if (inject_pending_event(vcpu, req_int_win) != 0)
6567                         req_immediate_exit = true;
6568                 /* enable NMI/IRQ window open exits if needed */
6569                 else if (vcpu->arch.nmi_pending)
6570                         kvm_x86_ops->enable_nmi_window(vcpu);
6571                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6572                         kvm_x86_ops->enable_irq_window(vcpu);
6573
6574                 if (kvm_lapic_enabled(vcpu)) {
6575                         update_cr8_intercept(vcpu);
6576                         kvm_lapic_sync_to_vapic(vcpu);
6577                 }
6578         }
6579
6580         r = kvm_mmu_reload(vcpu);
6581         if (unlikely(r)) {
6582                 goto cancel_injection;
6583         }
6584
6585         preempt_disable();
6586
6587         kvm_x86_ops->prepare_guest_switch(vcpu);
6588         if (vcpu->fpu_active)
6589                 kvm_load_guest_fpu(vcpu);
6590         kvm_load_guest_xcr0(vcpu);
6591
6592         vcpu->mode = IN_GUEST_MODE;
6593
6594         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6595
6596         /* We should set ->mode before check ->requests,
6597          * see the comment in make_all_cpus_request.
6598          */
6599         smp_mb__after_srcu_read_unlock();
6600
6601         local_irq_disable();
6602
6603         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6604             || need_resched() || signal_pending(current)) {
6605                 vcpu->mode = OUTSIDE_GUEST_MODE;
6606                 smp_wmb();
6607                 local_irq_enable();
6608                 preempt_enable();
6609                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6610                 r = 1;
6611                 goto cancel_injection;
6612         }
6613
6614         if (req_immediate_exit)
6615                 smp_send_reschedule(vcpu->cpu);
6616
6617         trace_kvm_entry(vcpu->vcpu_id);
6618         wait_lapic_expire(vcpu);
6619         __kvm_guest_enter();
6620
6621         if (unlikely(vcpu->arch.switch_db_regs)) {
6622                 set_debugreg(0, 7);
6623                 set_debugreg(vcpu->arch.eff_db[0], 0);
6624                 set_debugreg(vcpu->arch.eff_db[1], 1);
6625                 set_debugreg(vcpu->arch.eff_db[2], 2);
6626                 set_debugreg(vcpu->arch.eff_db[3], 3);
6627                 set_debugreg(vcpu->arch.dr6, 6);
6628                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6629         }
6630
6631         kvm_x86_ops->run(vcpu);
6632
6633         /*
6634          * Do this here before restoring debug registers on the host.  And
6635          * since we do this before handling the vmexit, a DR access vmexit
6636          * can (a) read the correct value of the debug registers, (b) set
6637          * KVM_DEBUGREG_WONT_EXIT again.
6638          */
6639         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6640                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6641                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6642                 kvm_update_dr0123(vcpu);
6643                 kvm_update_dr6(vcpu);
6644                 kvm_update_dr7(vcpu);
6645                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6646         }
6647
6648         /*
6649          * If the guest has used debug registers, at least dr7
6650          * will be disabled while returning to the host.
6651          * If we don't have active breakpoints in the host, we don't
6652          * care about the messed up debug address registers. But if
6653          * we have some of them active, restore the old state.
6654          */
6655         if (hw_breakpoint_active())
6656                 hw_breakpoint_restore();
6657
6658         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6659
6660         vcpu->mode = OUTSIDE_GUEST_MODE;
6661         smp_wmb();
6662
6663         /* Interrupt is enabled by handle_external_intr() */
6664         kvm_x86_ops->handle_external_intr(vcpu);
6665
6666         ++vcpu->stat.exits;
6667
6668         /*
6669          * We must have an instruction between local_irq_enable() and
6670          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6671          * the interrupt shadow.  The stat.exits increment will do nicely.
6672          * But we need to prevent reordering, hence this barrier():
6673          */
6674         barrier();
6675
6676         kvm_guest_exit();
6677
6678         preempt_enable();
6679
6680         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6681
6682         /*
6683          * Profile KVM exit RIPs:
6684          */
6685         if (unlikely(prof_on == KVM_PROFILING)) {
6686                 unsigned long rip = kvm_rip_read(vcpu);
6687                 profile_hit(KVM_PROFILING, (void *)rip);
6688         }
6689
6690         if (unlikely(vcpu->arch.tsc_always_catchup))
6691                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6692
6693         if (vcpu->arch.apic_attention)
6694                 kvm_lapic_sync_from_vapic(vcpu);
6695
6696         r = kvm_x86_ops->handle_exit(vcpu);
6697         return r;
6698
6699 cancel_injection:
6700         kvm_x86_ops->cancel_injection(vcpu);
6701         if (unlikely(vcpu->arch.apic_attention))
6702                 kvm_lapic_sync_from_vapic(vcpu);
6703 out:
6704         return r;
6705 }
6706
6707 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6708 {
6709         if (!kvm_arch_vcpu_runnable(vcpu) &&
6710             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6711                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6712                 kvm_vcpu_block(vcpu);
6713                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6714
6715                 if (kvm_x86_ops->post_block)
6716                         kvm_x86_ops->post_block(vcpu);
6717
6718                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6719                         return 1;
6720         }
6721
6722         kvm_apic_accept_events(vcpu);
6723         switch(vcpu->arch.mp_state) {
6724         case KVM_MP_STATE_HALTED:
6725                 vcpu->arch.pv.pv_unhalted = false;
6726                 vcpu->arch.mp_state =
6727                         KVM_MP_STATE_RUNNABLE;
6728         case KVM_MP_STATE_RUNNABLE:
6729                 vcpu->arch.apf.halted = false;
6730                 break;
6731         case KVM_MP_STATE_INIT_RECEIVED:
6732                 break;
6733         default:
6734                 return -EINTR;
6735                 break;
6736         }
6737         return 1;
6738 }
6739
6740 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6741 {
6742         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6743                 !vcpu->arch.apf.halted);
6744 }
6745
6746 static int vcpu_run(struct kvm_vcpu *vcpu)
6747 {
6748         int r;
6749         struct kvm *kvm = vcpu->kvm;
6750
6751         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6752
6753         for (;;) {
6754                 if (kvm_vcpu_running(vcpu)) {
6755                         r = vcpu_enter_guest(vcpu);
6756                 } else {
6757                         r = vcpu_block(kvm, vcpu);
6758                 }
6759
6760                 if (r <= 0)
6761                         break;
6762
6763                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6764                 if (kvm_cpu_has_pending_timer(vcpu))
6765                         kvm_inject_pending_timer_irqs(vcpu);
6766
6767                 if (dm_request_for_irq_injection(vcpu) &&
6768                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6769                         r = 0;
6770                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6771                         ++vcpu->stat.request_irq_exits;
6772                         break;
6773                 }
6774
6775                 kvm_check_async_pf_completion(vcpu);
6776
6777                 if (signal_pending(current)) {
6778                         r = -EINTR;
6779                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6780                         ++vcpu->stat.signal_exits;
6781                         break;
6782                 }
6783                 if (need_resched()) {
6784                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6785                         cond_resched();
6786                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6787                 }
6788         }
6789
6790         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6791
6792         return r;
6793 }
6794
6795 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6796 {
6797         int r;
6798         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6799         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6800         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6801         if (r != EMULATE_DONE)
6802                 return 0;
6803         return 1;
6804 }
6805
6806 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6807 {
6808         BUG_ON(!vcpu->arch.pio.count);
6809
6810         return complete_emulated_io(vcpu);
6811 }
6812
6813 /*
6814  * Implements the following, as a state machine:
6815  *
6816  * read:
6817  *   for each fragment
6818  *     for each mmio piece in the fragment
6819  *       write gpa, len
6820  *       exit
6821  *       copy data
6822  *   execute insn
6823  *
6824  * write:
6825  *   for each fragment
6826  *     for each mmio piece in the fragment
6827  *       write gpa, len
6828  *       copy data
6829  *       exit
6830  */
6831 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6832 {
6833         struct kvm_run *run = vcpu->run;
6834         struct kvm_mmio_fragment *frag;
6835         unsigned len;
6836
6837         BUG_ON(!vcpu->mmio_needed);
6838
6839         /* Complete previous fragment */
6840         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6841         len = min(8u, frag->len);
6842         if (!vcpu->mmio_is_write)
6843                 memcpy(frag->data, run->mmio.data, len);
6844
6845         if (frag->len <= 8) {
6846                 /* Switch to the next fragment. */
6847                 frag++;
6848                 vcpu->mmio_cur_fragment++;
6849         } else {
6850                 /* Go forward to the next mmio piece. */
6851                 frag->data += len;
6852                 frag->gpa += len;
6853                 frag->len -= len;
6854         }
6855
6856         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6857                 vcpu->mmio_needed = 0;
6858
6859                 /* FIXME: return into emulator if single-stepping.  */
6860                 if (vcpu->mmio_is_write)
6861                         return 1;
6862                 vcpu->mmio_read_completed = 1;
6863                 return complete_emulated_io(vcpu);
6864         }
6865
6866         run->exit_reason = KVM_EXIT_MMIO;
6867         run->mmio.phys_addr = frag->gpa;
6868         if (vcpu->mmio_is_write)
6869                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6870         run->mmio.len = min(8u, frag->len);
6871         run->mmio.is_write = vcpu->mmio_is_write;
6872         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6873         return 0;
6874 }
6875
6876
6877 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6878 {
6879         struct fpu *fpu = &current->thread.fpu;
6880         int r;
6881         sigset_t sigsaved;
6882
6883         fpu__activate_curr(fpu);
6884
6885         if (vcpu->sigset_active)
6886                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6887
6888         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6889                 kvm_vcpu_block(vcpu);
6890                 kvm_apic_accept_events(vcpu);
6891                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6892                 r = -EAGAIN;
6893                 goto out;
6894         }
6895
6896         /* re-sync apic's tpr */
6897         if (!lapic_in_kernel(vcpu)) {
6898                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6899                         r = -EINVAL;
6900                         goto out;
6901                 }
6902         }
6903
6904         if (unlikely(vcpu->arch.complete_userspace_io)) {
6905                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6906                 vcpu->arch.complete_userspace_io = NULL;
6907                 r = cui(vcpu);
6908                 if (r <= 0)
6909                         goto out;
6910         } else
6911                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6912
6913         r = vcpu_run(vcpu);
6914
6915 out:
6916         post_kvm_run_save(vcpu);
6917         if (vcpu->sigset_active)
6918                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6919
6920         return r;
6921 }
6922
6923 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6924 {
6925         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6926                 /*
6927                  * We are here if userspace calls get_regs() in the middle of
6928                  * instruction emulation. Registers state needs to be copied
6929                  * back from emulation context to vcpu. Userspace shouldn't do
6930                  * that usually, but some bad designed PV devices (vmware
6931                  * backdoor interface) need this to work
6932                  */
6933                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6934                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6935         }
6936         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6937         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6938         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6939         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6940         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6941         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6942         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6943         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6944 #ifdef CONFIG_X86_64
6945         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6946         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6947         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6948         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6949         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6950         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6951         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6952         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6953 #endif
6954
6955         regs->rip = kvm_rip_read(vcpu);
6956         regs->rflags = kvm_get_rflags(vcpu);
6957
6958         return 0;
6959 }
6960
6961 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6962 {
6963         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6964         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6965
6966         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6967         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6968         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6969         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6970         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6971         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6972         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6973         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6974 #ifdef CONFIG_X86_64
6975         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6976         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6977         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6978         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6979         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6980         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6981         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6982         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6983 #endif
6984
6985         kvm_rip_write(vcpu, regs->rip);
6986         kvm_set_rflags(vcpu, regs->rflags);
6987
6988         vcpu->arch.exception.pending = false;
6989
6990         kvm_make_request(KVM_REQ_EVENT, vcpu);
6991
6992         return 0;
6993 }
6994
6995 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6996 {
6997         struct kvm_segment cs;
6998
6999         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7000         *db = cs.db;
7001         *l = cs.l;
7002 }
7003 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7004
7005 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7006                                   struct kvm_sregs *sregs)
7007 {
7008         struct desc_ptr dt;
7009
7010         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7011         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7012         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7013         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7014         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7015         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7016
7017         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7018         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7019
7020         kvm_x86_ops->get_idt(vcpu, &dt);
7021         sregs->idt.limit = dt.size;
7022         sregs->idt.base = dt.address;
7023         kvm_x86_ops->get_gdt(vcpu, &dt);
7024         sregs->gdt.limit = dt.size;
7025         sregs->gdt.base = dt.address;
7026
7027         sregs->cr0 = kvm_read_cr0(vcpu);
7028         sregs->cr2 = vcpu->arch.cr2;
7029         sregs->cr3 = kvm_read_cr3(vcpu);
7030         sregs->cr4 = kvm_read_cr4(vcpu);
7031         sregs->cr8 = kvm_get_cr8(vcpu);
7032         sregs->efer = vcpu->arch.efer;
7033         sregs->apic_base = kvm_get_apic_base(vcpu);
7034
7035         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7036
7037         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7038                 set_bit(vcpu->arch.interrupt.nr,
7039                         (unsigned long *)sregs->interrupt_bitmap);
7040
7041         return 0;
7042 }
7043
7044 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7045                                     struct kvm_mp_state *mp_state)
7046 {
7047         kvm_apic_accept_events(vcpu);
7048         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7049                                         vcpu->arch.pv.pv_unhalted)
7050                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7051         else
7052                 mp_state->mp_state = vcpu->arch.mp_state;
7053
7054         return 0;
7055 }
7056
7057 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7058                                     struct kvm_mp_state *mp_state)
7059 {
7060         if (!lapic_in_kernel(vcpu) &&
7061             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7062                 return -EINVAL;
7063
7064         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7065                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7066                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7067         } else
7068                 vcpu->arch.mp_state = mp_state->mp_state;
7069         kvm_make_request(KVM_REQ_EVENT, vcpu);
7070         return 0;
7071 }
7072
7073 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7074                     int reason, bool has_error_code, u32 error_code)
7075 {
7076         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7077         int ret;
7078
7079         init_emulate_ctxt(vcpu);
7080
7081         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7082                                    has_error_code, error_code);
7083
7084         if (ret)
7085                 return EMULATE_FAIL;
7086
7087         kvm_rip_write(vcpu, ctxt->eip);
7088         kvm_set_rflags(vcpu, ctxt->eflags);
7089         kvm_make_request(KVM_REQ_EVENT, vcpu);
7090         return EMULATE_DONE;
7091 }
7092 EXPORT_SYMBOL_GPL(kvm_task_switch);
7093
7094 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7095                                   struct kvm_sregs *sregs)
7096 {
7097         struct msr_data apic_base_msr;
7098         int mmu_reset_needed = 0;
7099         int pending_vec, max_bits, idx;
7100         struct desc_ptr dt;
7101
7102         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7103                 return -EINVAL;
7104
7105         dt.size = sregs->idt.limit;
7106         dt.address = sregs->idt.base;
7107         kvm_x86_ops->set_idt(vcpu, &dt);
7108         dt.size = sregs->gdt.limit;
7109         dt.address = sregs->gdt.base;
7110         kvm_x86_ops->set_gdt(vcpu, &dt);
7111
7112         vcpu->arch.cr2 = sregs->cr2;
7113         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7114         vcpu->arch.cr3 = sregs->cr3;
7115         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7116
7117         kvm_set_cr8(vcpu, sregs->cr8);
7118
7119         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7120         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7121         apic_base_msr.data = sregs->apic_base;
7122         apic_base_msr.host_initiated = true;
7123         kvm_set_apic_base(vcpu, &apic_base_msr);
7124
7125         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7126         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7127         vcpu->arch.cr0 = sregs->cr0;
7128
7129         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7130         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7131         if (sregs->cr4 & X86_CR4_OSXSAVE)
7132                 kvm_update_cpuid(vcpu);
7133
7134         idx = srcu_read_lock(&vcpu->kvm->srcu);
7135         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7136                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7137                 mmu_reset_needed = 1;
7138         }
7139         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7140
7141         if (mmu_reset_needed)
7142                 kvm_mmu_reset_context(vcpu);
7143
7144         max_bits = KVM_NR_INTERRUPTS;
7145         pending_vec = find_first_bit(
7146                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7147         if (pending_vec < max_bits) {
7148                 kvm_queue_interrupt(vcpu, pending_vec, false);
7149                 pr_debug("Set back pending irq %d\n", pending_vec);
7150         }
7151
7152         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7153         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7154         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7155         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7156         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7157         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7158
7159         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7160         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7161
7162         update_cr8_intercept(vcpu);
7163
7164         /* Older userspace won't unhalt the vcpu on reset. */
7165         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7166             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7167             !is_protmode(vcpu))
7168                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7169
7170         kvm_make_request(KVM_REQ_EVENT, vcpu);
7171
7172         return 0;
7173 }
7174
7175 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7176                                         struct kvm_guest_debug *dbg)
7177 {
7178         unsigned long rflags;
7179         int i, r;
7180
7181         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7182                 r = -EBUSY;
7183                 if (vcpu->arch.exception.pending)
7184                         goto out;
7185                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7186                         kvm_queue_exception(vcpu, DB_VECTOR);
7187                 else
7188                         kvm_queue_exception(vcpu, BP_VECTOR);
7189         }
7190
7191         /*
7192          * Read rflags as long as potentially injected trace flags are still
7193          * filtered out.
7194          */
7195         rflags = kvm_get_rflags(vcpu);
7196
7197         vcpu->guest_debug = dbg->control;
7198         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7199                 vcpu->guest_debug = 0;
7200
7201         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7202                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7203                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7204                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7205         } else {
7206                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7207                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7208         }
7209         kvm_update_dr7(vcpu);
7210
7211         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7212                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7213                         get_segment_base(vcpu, VCPU_SREG_CS);
7214
7215         /*
7216          * Trigger an rflags update that will inject or remove the trace
7217          * flags.
7218          */
7219         kvm_set_rflags(vcpu, rflags);
7220
7221         kvm_x86_ops->update_bp_intercept(vcpu);
7222
7223         r = 0;
7224
7225 out:
7226
7227         return r;
7228 }
7229
7230 /*
7231  * Translate a guest virtual address to a guest physical address.
7232  */
7233 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7234                                     struct kvm_translation *tr)
7235 {
7236         unsigned long vaddr = tr->linear_address;
7237         gpa_t gpa;
7238         int idx;
7239
7240         idx = srcu_read_lock(&vcpu->kvm->srcu);
7241         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7242         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7243         tr->physical_address = gpa;
7244         tr->valid = gpa != UNMAPPED_GVA;
7245         tr->writeable = 1;
7246         tr->usermode = 0;
7247
7248         return 0;
7249 }
7250
7251 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7252 {
7253         struct fxregs_state *fxsave =
7254                         &vcpu->arch.guest_fpu.state.fxsave;
7255
7256         memcpy(fpu->fpr, fxsave->st_space, 128);
7257         fpu->fcw = fxsave->cwd;
7258         fpu->fsw = fxsave->swd;
7259         fpu->ftwx = fxsave->twd;
7260         fpu->last_opcode = fxsave->fop;
7261         fpu->last_ip = fxsave->rip;
7262         fpu->last_dp = fxsave->rdp;
7263         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7264
7265         return 0;
7266 }
7267
7268 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7269 {
7270         struct fxregs_state *fxsave =
7271                         &vcpu->arch.guest_fpu.state.fxsave;
7272
7273         memcpy(fxsave->st_space, fpu->fpr, 128);
7274         fxsave->cwd = fpu->fcw;
7275         fxsave->swd = fpu->fsw;
7276         fxsave->twd = fpu->ftwx;
7277         fxsave->fop = fpu->last_opcode;
7278         fxsave->rip = fpu->last_ip;
7279         fxsave->rdp = fpu->last_dp;
7280         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7281
7282         return 0;
7283 }
7284
7285 static void fx_init(struct kvm_vcpu *vcpu)
7286 {
7287         fpstate_init(&vcpu->arch.guest_fpu.state);
7288         if (cpu_has_xsaves)
7289                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7290                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7291
7292         /*
7293          * Ensure guest xcr0 is valid for loading
7294          */
7295         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7296
7297         vcpu->arch.cr0 |= X86_CR0_ET;
7298 }
7299
7300 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7301 {
7302         if (vcpu->guest_fpu_loaded)
7303                 return;
7304
7305         /*
7306          * Restore all possible states in the guest,
7307          * and assume host would use all available bits.
7308          * Guest xcr0 would be loaded later.
7309          */
7310         kvm_put_guest_xcr0(vcpu);
7311         vcpu->guest_fpu_loaded = 1;
7312         __kernel_fpu_begin();
7313         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7314         trace_kvm_fpu(1);
7315 }
7316
7317 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7318 {
7319         kvm_put_guest_xcr0(vcpu);
7320
7321         if (!vcpu->guest_fpu_loaded) {
7322                 vcpu->fpu_counter = 0;
7323                 return;
7324         }
7325
7326         vcpu->guest_fpu_loaded = 0;
7327         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7328         __kernel_fpu_end();
7329         ++vcpu->stat.fpu_reload;
7330         /*
7331          * If using eager FPU mode, or if the guest is a frequent user
7332          * of the FPU, just leave the FPU active for next time.
7333          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7334          * the FPU in bursts will revert to loading it on demand.
7335          */
7336         if (!use_eager_fpu()) {
7337                 if (++vcpu->fpu_counter < 5)
7338                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7339         }
7340         trace_kvm_fpu(0);
7341 }
7342
7343 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7344 {
7345         kvmclock_reset(vcpu);
7346
7347         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7348         kvm_x86_ops->vcpu_free(vcpu);
7349 }
7350
7351 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7352                                                 unsigned int id)
7353 {
7354         struct kvm_vcpu *vcpu;
7355
7356         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7357                 printk_once(KERN_WARNING
7358                 "kvm: SMP vm created on host with unstable TSC; "
7359                 "guest TSC will not be reliable\n");
7360
7361         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7362
7363         return vcpu;
7364 }
7365
7366 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7367 {
7368         int r;
7369
7370         kvm_vcpu_mtrr_init(vcpu);
7371         r = vcpu_load(vcpu);
7372         if (r)
7373                 return r;
7374         kvm_vcpu_reset(vcpu, false);
7375         kvm_mmu_setup(vcpu);
7376         vcpu_put(vcpu);
7377         return r;
7378 }
7379
7380 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7381 {
7382         struct msr_data msr;
7383         struct kvm *kvm = vcpu->kvm;
7384
7385         if (vcpu_load(vcpu))
7386                 return;
7387         msr.data = 0x0;
7388         msr.index = MSR_IA32_TSC;
7389         msr.host_initiated = true;
7390         kvm_write_tsc(vcpu, &msr);
7391         vcpu_put(vcpu);
7392
7393         if (!kvmclock_periodic_sync)
7394                 return;
7395
7396         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7397                                         KVMCLOCK_SYNC_PERIOD);
7398 }
7399
7400 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7401 {
7402         int r;
7403         vcpu->arch.apf.msr_val = 0;
7404
7405         r = vcpu_load(vcpu);
7406         BUG_ON(r);
7407         kvm_mmu_unload(vcpu);
7408         vcpu_put(vcpu);
7409
7410         kvm_x86_ops->vcpu_free(vcpu);
7411 }
7412
7413 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7414 {
7415         vcpu->arch.hflags = 0;
7416
7417         atomic_set(&vcpu->arch.nmi_queued, 0);
7418         vcpu->arch.nmi_pending = 0;
7419         vcpu->arch.nmi_injected = false;
7420         kvm_clear_interrupt_queue(vcpu);
7421         kvm_clear_exception_queue(vcpu);
7422
7423         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7424         kvm_update_dr0123(vcpu);
7425         vcpu->arch.dr6 = DR6_INIT;
7426         kvm_update_dr6(vcpu);
7427         vcpu->arch.dr7 = DR7_FIXED_1;
7428         kvm_update_dr7(vcpu);
7429
7430         vcpu->arch.cr2 = 0;
7431
7432         kvm_make_request(KVM_REQ_EVENT, vcpu);
7433         vcpu->arch.apf.msr_val = 0;
7434         vcpu->arch.st.msr_val = 0;
7435
7436         kvmclock_reset(vcpu);
7437
7438         kvm_clear_async_pf_completion_queue(vcpu);
7439         kvm_async_pf_hash_reset(vcpu);
7440         vcpu->arch.apf.halted = false;
7441
7442         if (!init_event) {
7443                 kvm_pmu_reset(vcpu);
7444                 vcpu->arch.smbase = 0x30000;
7445         }
7446
7447         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7448         vcpu->arch.regs_avail = ~0;
7449         vcpu->arch.regs_dirty = ~0;
7450
7451         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7452 }
7453
7454 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7455 {
7456         struct kvm_segment cs;
7457
7458         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7459         cs.selector = vector << 8;
7460         cs.base = vector << 12;
7461         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7462         kvm_rip_write(vcpu, 0);
7463 }
7464
7465 int kvm_arch_hardware_enable(void)
7466 {
7467         struct kvm *kvm;
7468         struct kvm_vcpu *vcpu;
7469         int i;
7470         int ret;
7471         u64 local_tsc;
7472         u64 max_tsc = 0;
7473         bool stable, backwards_tsc = false;
7474
7475         kvm_shared_msr_cpu_online();
7476         ret = kvm_x86_ops->hardware_enable();
7477         if (ret != 0)
7478                 return ret;
7479
7480         local_tsc = rdtsc();
7481         stable = !check_tsc_unstable();
7482         list_for_each_entry(kvm, &vm_list, vm_list) {
7483                 kvm_for_each_vcpu(i, vcpu, kvm) {
7484                         if (!stable && vcpu->cpu == smp_processor_id())
7485                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7486                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7487                                 backwards_tsc = true;
7488                                 if (vcpu->arch.last_host_tsc > max_tsc)
7489                                         max_tsc = vcpu->arch.last_host_tsc;
7490                         }
7491                 }
7492         }
7493
7494         /*
7495          * Sometimes, even reliable TSCs go backwards.  This happens on
7496          * platforms that reset TSC during suspend or hibernate actions, but
7497          * maintain synchronization.  We must compensate.  Fortunately, we can
7498          * detect that condition here, which happens early in CPU bringup,
7499          * before any KVM threads can be running.  Unfortunately, we can't
7500          * bring the TSCs fully up to date with real time, as we aren't yet far
7501          * enough into CPU bringup that we know how much real time has actually
7502          * elapsed; our helper function, get_kernel_ns() will be using boot
7503          * variables that haven't been updated yet.
7504          *
7505          * So we simply find the maximum observed TSC above, then record the
7506          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7507          * the adjustment will be applied.  Note that we accumulate
7508          * adjustments, in case multiple suspend cycles happen before some VCPU
7509          * gets a chance to run again.  In the event that no KVM threads get a
7510          * chance to run, we will miss the entire elapsed period, as we'll have
7511          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7512          * loose cycle time.  This isn't too big a deal, since the loss will be
7513          * uniform across all VCPUs (not to mention the scenario is extremely
7514          * unlikely). It is possible that a second hibernate recovery happens
7515          * much faster than a first, causing the observed TSC here to be
7516          * smaller; this would require additional padding adjustment, which is
7517          * why we set last_host_tsc to the local tsc observed here.
7518          *
7519          * N.B. - this code below runs only on platforms with reliable TSC,
7520          * as that is the only way backwards_tsc is set above.  Also note
7521          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7522          * have the same delta_cyc adjustment applied if backwards_tsc
7523          * is detected.  Note further, this adjustment is only done once,
7524          * as we reset last_host_tsc on all VCPUs to stop this from being
7525          * called multiple times (one for each physical CPU bringup).
7526          *
7527          * Platforms with unreliable TSCs don't have to deal with this, they
7528          * will be compensated by the logic in vcpu_load, which sets the TSC to
7529          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7530          * guarantee that they stay in perfect synchronization.
7531          */
7532         if (backwards_tsc) {
7533                 u64 delta_cyc = max_tsc - local_tsc;
7534                 backwards_tsc_observed = true;
7535                 list_for_each_entry(kvm, &vm_list, vm_list) {
7536                         kvm_for_each_vcpu(i, vcpu, kvm) {
7537                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7538                                 vcpu->arch.last_host_tsc = local_tsc;
7539                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7540                         }
7541
7542                         /*
7543                          * We have to disable TSC offset matching.. if you were
7544                          * booting a VM while issuing an S4 host suspend....
7545                          * you may have some problem.  Solving this issue is
7546                          * left as an exercise to the reader.
7547                          */
7548                         kvm->arch.last_tsc_nsec = 0;
7549                         kvm->arch.last_tsc_write = 0;
7550                 }
7551
7552         }
7553         return 0;
7554 }
7555
7556 void kvm_arch_hardware_disable(void)
7557 {
7558         kvm_x86_ops->hardware_disable();
7559         drop_user_return_notifiers();
7560 }
7561
7562 int kvm_arch_hardware_setup(void)
7563 {
7564         int r;
7565
7566         r = kvm_x86_ops->hardware_setup();
7567         if (r != 0)
7568                 return r;
7569
7570         if (kvm_has_tsc_control) {
7571                 /*
7572                  * Make sure the user can only configure tsc_khz values that
7573                  * fit into a signed integer.
7574                  * A min value is not calculated needed because it will always
7575                  * be 1 on all machines.
7576                  */
7577                 u64 max = min(0x7fffffffULL,
7578                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7579                 kvm_max_guest_tsc_khz = max;
7580
7581                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7582         }
7583
7584         kvm_init_msr_list();
7585         return 0;
7586 }
7587
7588 void kvm_arch_hardware_unsetup(void)
7589 {
7590         kvm_x86_ops->hardware_unsetup();
7591 }
7592
7593 void kvm_arch_check_processor_compat(void *rtn)
7594 {
7595         kvm_x86_ops->check_processor_compatibility(rtn);
7596 }
7597
7598 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7599 {
7600         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7601 }
7602 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7603
7604 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7605 {
7606         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7607 }
7608
7609 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7610 {
7611         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7612 }
7613
7614 struct static_key kvm_no_apic_vcpu __read_mostly;
7615 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7616
7617 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7618 {
7619         struct page *page;
7620         struct kvm *kvm;
7621         int r;
7622
7623         BUG_ON(vcpu->kvm == NULL);
7624         kvm = vcpu->kvm;
7625
7626         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7627         vcpu->arch.pv.pv_unhalted = false;
7628         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7629         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7630                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7631         else
7632                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7633
7634         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7635         if (!page) {
7636                 r = -ENOMEM;
7637                 goto fail;
7638         }
7639         vcpu->arch.pio_data = page_address(page);
7640
7641         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7642
7643         r = kvm_mmu_create(vcpu);
7644         if (r < 0)
7645                 goto fail_free_pio_data;
7646
7647         if (irqchip_in_kernel(kvm)) {
7648                 r = kvm_create_lapic(vcpu);
7649                 if (r < 0)
7650                         goto fail_mmu_destroy;
7651         } else
7652                 static_key_slow_inc(&kvm_no_apic_vcpu);
7653
7654         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7655                                        GFP_KERNEL);
7656         if (!vcpu->arch.mce_banks) {
7657                 r = -ENOMEM;
7658                 goto fail_free_lapic;
7659         }
7660         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7661
7662         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7663                 r = -ENOMEM;
7664                 goto fail_free_mce_banks;
7665         }
7666
7667         fx_init(vcpu);
7668
7669         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7670         vcpu->arch.pv_time_enabled = false;
7671
7672         vcpu->arch.guest_supported_xcr0 = 0;
7673         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7674
7675         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7676
7677         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7678
7679         kvm_async_pf_hash_reset(vcpu);
7680         kvm_pmu_init(vcpu);
7681
7682         vcpu->arch.pending_external_vector = -1;
7683
7684         kvm_hv_vcpu_init(vcpu);
7685
7686         return 0;
7687
7688 fail_free_mce_banks:
7689         kfree(vcpu->arch.mce_banks);
7690 fail_free_lapic:
7691         kvm_free_lapic(vcpu);
7692 fail_mmu_destroy:
7693         kvm_mmu_destroy(vcpu);
7694 fail_free_pio_data:
7695         free_page((unsigned long)vcpu->arch.pio_data);
7696 fail:
7697         return r;
7698 }
7699
7700 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7701 {
7702         int idx;
7703
7704         kvm_hv_vcpu_uninit(vcpu);
7705         kvm_pmu_destroy(vcpu);
7706         kfree(vcpu->arch.mce_banks);
7707         kvm_free_lapic(vcpu);
7708         idx = srcu_read_lock(&vcpu->kvm->srcu);
7709         kvm_mmu_destroy(vcpu);
7710         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7711         free_page((unsigned long)vcpu->arch.pio_data);
7712         if (!lapic_in_kernel(vcpu))
7713                 static_key_slow_dec(&kvm_no_apic_vcpu);
7714 }
7715
7716 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7717 {
7718         kvm_x86_ops->sched_in(vcpu, cpu);
7719 }
7720
7721 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7722 {
7723         if (type)
7724                 return -EINVAL;
7725
7726         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7727         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7728         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7729         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7730         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7731
7732         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7733         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7734         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7735         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7736                 &kvm->arch.irq_sources_bitmap);
7737
7738         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7739         mutex_init(&kvm->arch.apic_map_lock);
7740         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7741
7742         pvclock_update_vm_gtod_copy(kvm);
7743
7744         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7745         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7746
7747         kvm_page_track_init(kvm);
7748         kvm_mmu_init_vm(kvm);
7749
7750         return 0;
7751 }
7752
7753 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7754 {
7755         int r;
7756         r = vcpu_load(vcpu);
7757         BUG_ON(r);
7758         kvm_mmu_unload(vcpu);
7759         vcpu_put(vcpu);
7760 }
7761
7762 static void kvm_free_vcpus(struct kvm *kvm)
7763 {
7764         unsigned int i;
7765         struct kvm_vcpu *vcpu;
7766
7767         /*
7768          * Unpin any mmu pages first.
7769          */
7770         kvm_for_each_vcpu(i, vcpu, kvm) {
7771                 kvm_clear_async_pf_completion_queue(vcpu);
7772                 kvm_unload_vcpu_mmu(vcpu);
7773         }
7774         kvm_for_each_vcpu(i, vcpu, kvm)
7775                 kvm_arch_vcpu_free(vcpu);
7776
7777         mutex_lock(&kvm->lock);
7778         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7779                 kvm->vcpus[i] = NULL;
7780
7781         atomic_set(&kvm->online_vcpus, 0);
7782         mutex_unlock(&kvm->lock);
7783 }
7784
7785 void kvm_arch_sync_events(struct kvm *kvm)
7786 {
7787         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7788         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7789         kvm_free_all_assigned_devices(kvm);
7790         kvm_free_pit(kvm);
7791 }
7792
7793 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7794 {
7795         int i, r;
7796         unsigned long hva;
7797         struct kvm_memslots *slots = kvm_memslots(kvm);
7798         struct kvm_memory_slot *slot, old;
7799
7800         /* Called with kvm->slots_lock held.  */
7801         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7802                 return -EINVAL;
7803
7804         slot = id_to_memslot(slots, id);
7805         if (size) {
7806                 if (WARN_ON(slot->npages))
7807                         return -EEXIST;
7808
7809                 /*
7810                  * MAP_SHARED to prevent internal slot pages from being moved
7811                  * by fork()/COW.
7812                  */
7813                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7814                               MAP_SHARED | MAP_ANONYMOUS, 0);
7815                 if (IS_ERR((void *)hva))
7816                         return PTR_ERR((void *)hva);
7817         } else {
7818                 if (!slot->npages)
7819                         return 0;
7820
7821                 hva = 0;
7822         }
7823
7824         old = *slot;
7825         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7826                 struct kvm_userspace_memory_region m;
7827
7828                 m.slot = id | (i << 16);
7829                 m.flags = 0;
7830                 m.guest_phys_addr = gpa;
7831                 m.userspace_addr = hva;
7832                 m.memory_size = size;
7833                 r = __kvm_set_memory_region(kvm, &m);
7834                 if (r < 0)
7835                         return r;
7836         }
7837
7838         if (!size) {
7839                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7840                 WARN_ON(r < 0);
7841         }
7842
7843         return 0;
7844 }
7845 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7846
7847 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7848 {
7849         int r;
7850
7851         mutex_lock(&kvm->slots_lock);
7852         r = __x86_set_memory_region(kvm, id, gpa, size);
7853         mutex_unlock(&kvm->slots_lock);
7854
7855         return r;
7856 }
7857 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7858
7859 void kvm_arch_destroy_vm(struct kvm *kvm)
7860 {
7861         if (current->mm == kvm->mm) {
7862                 /*
7863                  * Free memory regions allocated on behalf of userspace,
7864                  * unless the the memory map has changed due to process exit
7865                  * or fd copying.
7866                  */
7867                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7868                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7869                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7870         }
7871         kvm_iommu_unmap_guest(kvm);
7872         kfree(kvm->arch.vpic);
7873         kfree(kvm->arch.vioapic);
7874         kvm_free_vcpus(kvm);
7875         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7876         kvm_mmu_uninit_vm(kvm);
7877 }
7878
7879 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7880                            struct kvm_memory_slot *dont)
7881 {
7882         int i;
7883
7884         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7885                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7886                         kvfree(free->arch.rmap[i]);
7887                         free->arch.rmap[i] = NULL;
7888                 }
7889                 if (i == 0)
7890                         continue;
7891
7892                 if (!dont || free->arch.lpage_info[i - 1] !=
7893                              dont->arch.lpage_info[i - 1]) {
7894                         kvfree(free->arch.lpage_info[i - 1]);
7895                         free->arch.lpage_info[i - 1] = NULL;
7896                 }
7897         }
7898
7899         kvm_page_track_free_memslot(free, dont);
7900 }
7901
7902 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7903                             unsigned long npages)
7904 {
7905         int i;
7906
7907         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7908                 struct kvm_lpage_info *linfo;
7909                 unsigned long ugfn;
7910                 int lpages;
7911                 int level = i + 1;
7912
7913                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7914                                       slot->base_gfn, level) + 1;
7915
7916                 slot->arch.rmap[i] =
7917                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7918                 if (!slot->arch.rmap[i])
7919                         goto out_free;
7920                 if (i == 0)
7921                         continue;
7922
7923                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7924                 if (!linfo)
7925                         goto out_free;
7926
7927                 slot->arch.lpage_info[i - 1] = linfo;
7928
7929                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7930                         linfo[0].disallow_lpage = 1;
7931                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7932                         linfo[lpages - 1].disallow_lpage = 1;
7933                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7934                 /*
7935                  * If the gfn and userspace address are not aligned wrt each
7936                  * other, or if explicitly asked to, disable large page
7937                  * support for this slot
7938                  */
7939                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7940                     !kvm_largepages_enabled()) {
7941                         unsigned long j;
7942
7943                         for (j = 0; j < lpages; ++j)
7944                                 linfo[j].disallow_lpage = 1;
7945                 }
7946         }
7947
7948         if (kvm_page_track_create_memslot(slot, npages))
7949                 goto out_free;
7950
7951         return 0;
7952
7953 out_free:
7954         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7955                 kvfree(slot->arch.rmap[i]);
7956                 slot->arch.rmap[i] = NULL;
7957                 if (i == 0)
7958                         continue;
7959
7960                 kvfree(slot->arch.lpage_info[i - 1]);
7961                 slot->arch.lpage_info[i - 1] = NULL;
7962         }
7963         return -ENOMEM;
7964 }
7965
7966 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7967 {
7968         /*
7969          * memslots->generation has been incremented.
7970          * mmio generation may have reached its maximum value.
7971          */
7972         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7973 }
7974
7975 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7976                                 struct kvm_memory_slot *memslot,
7977                                 const struct kvm_userspace_memory_region *mem,
7978                                 enum kvm_mr_change change)
7979 {
7980         return 0;
7981 }
7982
7983 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7984                                      struct kvm_memory_slot *new)
7985 {
7986         /* Still write protect RO slot */
7987         if (new->flags & KVM_MEM_READONLY) {
7988                 kvm_mmu_slot_remove_write_access(kvm, new);
7989                 return;
7990         }
7991
7992         /*
7993          * Call kvm_x86_ops dirty logging hooks when they are valid.
7994          *
7995          * kvm_x86_ops->slot_disable_log_dirty is called when:
7996          *
7997          *  - KVM_MR_CREATE with dirty logging is disabled
7998          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7999          *
8000          * The reason is, in case of PML, we need to set D-bit for any slots
8001          * with dirty logging disabled in order to eliminate unnecessary GPA
8002          * logging in PML buffer (and potential PML buffer full VMEXT). This
8003          * guarantees leaving PML enabled during guest's lifetime won't have
8004          * any additonal overhead from PML when guest is running with dirty
8005          * logging disabled for memory slots.
8006          *
8007          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8008          * to dirty logging mode.
8009          *
8010          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8011          *
8012          * In case of write protect:
8013          *
8014          * Write protect all pages for dirty logging.
8015          *
8016          * All the sptes including the large sptes which point to this
8017          * slot are set to readonly. We can not create any new large
8018          * spte on this slot until the end of the logging.
8019          *
8020          * See the comments in fast_page_fault().
8021          */
8022         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8023                 if (kvm_x86_ops->slot_enable_log_dirty)
8024                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8025                 else
8026                         kvm_mmu_slot_remove_write_access(kvm, new);
8027         } else {
8028                 if (kvm_x86_ops->slot_disable_log_dirty)
8029                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8030         }
8031 }
8032
8033 void kvm_arch_commit_memory_region(struct kvm *kvm,
8034                                 const struct kvm_userspace_memory_region *mem,
8035                                 const struct kvm_memory_slot *old,
8036                                 const struct kvm_memory_slot *new,
8037                                 enum kvm_mr_change change)
8038 {
8039         int nr_mmu_pages = 0;
8040
8041         if (!kvm->arch.n_requested_mmu_pages)
8042                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8043
8044         if (nr_mmu_pages)
8045                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8046
8047         /*
8048          * Dirty logging tracks sptes in 4k granularity, meaning that large
8049          * sptes have to be split.  If live migration is successful, the guest
8050          * in the source machine will be destroyed and large sptes will be
8051          * created in the destination. However, if the guest continues to run
8052          * in the source machine (for example if live migration fails), small
8053          * sptes will remain around and cause bad performance.
8054          *
8055          * Scan sptes if dirty logging has been stopped, dropping those
8056          * which can be collapsed into a single large-page spte.  Later
8057          * page faults will create the large-page sptes.
8058          */
8059         if ((change != KVM_MR_DELETE) &&
8060                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8061                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8062                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8063
8064         /*
8065          * Set up write protection and/or dirty logging for the new slot.
8066          *
8067          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8068          * been zapped so no dirty logging staff is needed for old slot. For
8069          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8070          * new and it's also covered when dealing with the new slot.
8071          *
8072          * FIXME: const-ify all uses of struct kvm_memory_slot.
8073          */
8074         if (change != KVM_MR_DELETE)
8075                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8076 }
8077
8078 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8079 {
8080         kvm_mmu_invalidate_zap_all_pages(kvm);
8081 }
8082
8083 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8084                                    struct kvm_memory_slot *slot)
8085 {
8086         kvm_mmu_invalidate_zap_all_pages(kvm);
8087 }
8088
8089 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8090 {
8091         if (!list_empty_careful(&vcpu->async_pf.done))
8092                 return true;
8093
8094         if (kvm_apic_has_events(vcpu))
8095                 return true;
8096
8097         if (vcpu->arch.pv.pv_unhalted)
8098                 return true;
8099
8100         if (atomic_read(&vcpu->arch.nmi_queued))
8101                 return true;
8102
8103         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8104                 return true;
8105
8106         if (kvm_arch_interrupt_allowed(vcpu) &&
8107             kvm_cpu_has_interrupt(vcpu))
8108                 return true;
8109
8110         if (kvm_hv_has_stimer_pending(vcpu))
8111                 return true;
8112
8113         return false;
8114 }
8115
8116 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8117 {
8118         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8119                 kvm_x86_ops->check_nested_events(vcpu, false);
8120
8121         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8122 }
8123
8124 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8125 {
8126         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8127 }
8128
8129 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8130 {
8131         return kvm_x86_ops->interrupt_allowed(vcpu);
8132 }
8133
8134 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8135 {
8136         if (is_64_bit_mode(vcpu))
8137                 return kvm_rip_read(vcpu);
8138         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8139                      kvm_rip_read(vcpu));
8140 }
8141 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8142
8143 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8144 {
8145         return kvm_get_linear_rip(vcpu) == linear_rip;
8146 }
8147 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8148
8149 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8150 {
8151         unsigned long rflags;
8152
8153         rflags = kvm_x86_ops->get_rflags(vcpu);
8154         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8155                 rflags &= ~X86_EFLAGS_TF;
8156         return rflags;
8157 }
8158 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8159
8160 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8161 {
8162         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8163             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8164                 rflags |= X86_EFLAGS_TF;
8165         kvm_x86_ops->set_rflags(vcpu, rflags);
8166 }
8167
8168 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8169 {
8170         __kvm_set_rflags(vcpu, rflags);
8171         kvm_make_request(KVM_REQ_EVENT, vcpu);
8172 }
8173 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8174
8175 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8176 {
8177         int r;
8178
8179         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8180               work->wakeup_all)
8181                 return;
8182
8183         r = kvm_mmu_reload(vcpu);
8184         if (unlikely(r))
8185                 return;
8186
8187         if (!vcpu->arch.mmu.direct_map &&
8188               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8189                 return;
8190
8191         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8192 }
8193
8194 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8195 {
8196         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8197 }
8198
8199 static inline u32 kvm_async_pf_next_probe(u32 key)
8200 {
8201         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8202 }
8203
8204 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8205 {
8206         u32 key = kvm_async_pf_hash_fn(gfn);
8207
8208         while (vcpu->arch.apf.gfns[key] != ~0)
8209                 key = kvm_async_pf_next_probe(key);
8210
8211         vcpu->arch.apf.gfns[key] = gfn;
8212 }
8213
8214 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8215 {
8216         int i;
8217         u32 key = kvm_async_pf_hash_fn(gfn);
8218
8219         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8220                      (vcpu->arch.apf.gfns[key] != gfn &&
8221                       vcpu->arch.apf.gfns[key] != ~0); i++)
8222                 key = kvm_async_pf_next_probe(key);
8223
8224         return key;
8225 }
8226
8227 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8228 {
8229         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8230 }
8231
8232 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8233 {
8234         u32 i, j, k;
8235
8236         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8237         while (true) {
8238                 vcpu->arch.apf.gfns[i] = ~0;
8239                 do {
8240                         j = kvm_async_pf_next_probe(j);
8241                         if (vcpu->arch.apf.gfns[j] == ~0)
8242                                 return;
8243                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8244                         /*
8245                          * k lies cyclically in ]i,j]
8246                          * |    i.k.j |
8247                          * |....j i.k.| or  |.k..j i...|
8248                          */
8249                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8250                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8251                 i = j;
8252         }
8253 }
8254
8255 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8256 {
8257
8258         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8259                                       sizeof(val));
8260 }
8261
8262 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8263                                      struct kvm_async_pf *work)
8264 {
8265         struct x86_exception fault;
8266
8267         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8268         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8269
8270         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8271             (vcpu->arch.apf.send_user_only &&
8272              kvm_x86_ops->get_cpl(vcpu) == 0))
8273                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8274         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8275                 fault.vector = PF_VECTOR;
8276                 fault.error_code_valid = true;
8277                 fault.error_code = 0;
8278                 fault.nested_page_fault = false;
8279                 fault.address = work->arch.token;
8280                 kvm_inject_page_fault(vcpu, &fault);
8281         }
8282 }
8283
8284 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8285                                  struct kvm_async_pf *work)
8286 {
8287         struct x86_exception fault;
8288
8289         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8290         if (work->wakeup_all)
8291                 work->arch.token = ~0; /* broadcast wakeup */
8292         else
8293                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8294
8295         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8296             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8297                 fault.vector = PF_VECTOR;
8298                 fault.error_code_valid = true;
8299                 fault.error_code = 0;
8300                 fault.nested_page_fault = false;
8301                 fault.address = work->arch.token;
8302                 kvm_inject_page_fault(vcpu, &fault);
8303         }
8304         vcpu->arch.apf.halted = false;
8305         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8306 }
8307
8308 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8309 {
8310         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8311                 return true;
8312         else
8313                 return !kvm_event_needs_reinjection(vcpu) &&
8314                         kvm_x86_ops->interrupt_allowed(vcpu);
8315 }
8316
8317 void kvm_arch_start_assignment(struct kvm *kvm)
8318 {
8319         atomic_inc(&kvm->arch.assigned_device_count);
8320 }
8321 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8322
8323 void kvm_arch_end_assignment(struct kvm *kvm)
8324 {
8325         atomic_dec(&kvm->arch.assigned_device_count);
8326 }
8327 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8328
8329 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8330 {
8331         return atomic_read(&kvm->arch.assigned_device_count);
8332 }
8333 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8334
8335 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8336 {
8337         atomic_inc(&kvm->arch.noncoherent_dma_count);
8338 }
8339 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8340
8341 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8342 {
8343         atomic_dec(&kvm->arch.noncoherent_dma_count);
8344 }
8345 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8346
8347 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8348 {
8349         return atomic_read(&kvm->arch.noncoherent_dma_count);
8350 }
8351 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8352
8353 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8354                                       struct irq_bypass_producer *prod)
8355 {
8356         struct kvm_kernel_irqfd *irqfd =
8357                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8358
8359         if (kvm_x86_ops->update_pi_irte) {
8360                 irqfd->producer = prod;
8361                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8362                                 prod->irq, irqfd->gsi, 1);
8363         }
8364
8365         return -EINVAL;
8366 }
8367
8368 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8369                                       struct irq_bypass_producer *prod)
8370 {
8371         int ret;
8372         struct kvm_kernel_irqfd *irqfd =
8373                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8374
8375         if (!kvm_x86_ops->update_pi_irte) {
8376                 WARN_ON(irqfd->producer != NULL);
8377                 return;
8378         }
8379
8380         WARN_ON(irqfd->producer != prod);
8381         irqfd->producer = NULL;
8382
8383         /*
8384          * When producer of consumer is unregistered, we change back to
8385          * remapped mode, so we can re-use the current implementation
8386          * when the irq is masked/disabed or the consumer side (KVM
8387          * int this case doesn't want to receive the interrupts.
8388         */
8389         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8390         if (ret)
8391                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8392                        " fails: %d\n", irqfd->consumer.token, ret);
8393 }
8394
8395 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8396                                    uint32_t guest_irq, bool set)
8397 {
8398         if (!kvm_x86_ops->update_pi_irte)
8399                 return -EINVAL;
8400
8401         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8402 }
8403
8404 bool kvm_vector_hashing_enabled(void)
8405 {
8406         return vector_hashing;
8407 }
8408 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8409
8410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);