arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 #define KVM_NR_SHARED_MSRS 16
 110
 111 struct kvm_shared_msrs_global {
 112         int nr;
 113         u32 msrs[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 struct kvm_shared_msrs {
 117         struct user_return_notifier urn;
 118         bool registered;
 119         struct kvm_shared_msr_values {
 120                 u64 host;
 121                 u64 curr;
 122         } values[KVM_NR_SHARED_MSRS];
 123 };
 124
 125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 126 static struct kvm_shared_msrs __percpu *shared_msrs;
 127
 128 struct kvm_stats_debugfs_item debugfs_entries[] = {
 129         { "pf_fixed", VCPU_STAT(pf_fixed) },
 130         { "pf_guest", VCPU_STAT(pf_guest) },
 131         { "tlb_flush", VCPU_STAT(tlb_flush) },
 132         { "invlpg", VCPU_STAT(invlpg) },
 133         { "exits", VCPU_STAT(exits) },
 134         { "io_exits", VCPU_STAT(io_exits) },
 135         { "mmio_exits", VCPU_STAT(mmio_exits) },
 136         { "signal_exits", VCPU_STAT(signal_exits) },
 137         { "irq_window", VCPU_STAT(irq_window_exits) },
 138         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 139         { "halt_exits", VCPU_STAT(halt_exits) },
 140         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 141         { "hypercalls", VCPU_STAT(hypercalls) },
 142         { "request_irq", VCPU_STAT(request_irq_exits) },
 143         { "irq_exits", VCPU_STAT(irq_exits) },
 144         { "host_state_reload", VCPU_STAT(host_state_reload) },
 145         { "efer_reload", VCPU_STAT(efer_reload) },
 146         { "fpu_reload", VCPU_STAT(fpu_reload) },
 147         { "insn_emulation", VCPU_STAT(insn_emulation) },
 148         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 149         { "irq_injections", VCPU_STAT(irq_injections) },
 150         { "nmi_injections", VCPU_STAT(nmi_injections) },
 151         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 152         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 153         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 154         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 155         { "mmu_flooded", VM_STAT(mmu_flooded) },
 156         { "mmu_recycled", VM_STAT(mmu_recycled) },
 157         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 158         { "mmu_unsync", VM_STAT(mmu_unsync) },
 159         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 160         { "largepages", VM_STAT(lpages) },
 161         { NULL }
 162 };
 163
 164 u64 __read_mostly host_xcr0;
 165
 166 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 167
 168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 169 {
 170         int i;
 171         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 172                 vcpu->arch.apf.gfns[i] = ~0;
 173 }
 174
 175 static void kvm_on_user_return(struct user_return_notifier *urn)
 176 {
 177         unsigned slot;
 178         struct kvm_shared_msrs *locals
 179                 = container_of(urn, struct kvm_shared_msrs, urn);
 180         struct kvm_shared_msr_values *values;
 181
 182         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 183                 values = &locals->values[slot];
 184                 if (values->host != values->curr) {
 185                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 186                         values->curr = values->host;
 187                 }
 188         }
 189         locals->registered = false;
 190         user_return_notifier_unregister(urn);
 191 }
 192
 193 static void shared_msr_update(unsigned slot, u32 msr)
 194 {
 195         u64 value;
 196         unsigned int cpu = smp_processor_id();
 197         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 198
 199         /* only read, and nobody should modify it at this time,
 200          * so don't need lock */
 201         if (slot >= shared_msrs_global.nr) {
 202                 printk(KERN_ERR "kvm: invalid MSR slot!");
 203                 return;
 204         }
 205         rdmsrl_safe(msr, &value);
 206         smsr->values[slot].host = value;
 207         smsr->values[slot].curr = value;
 208 }
 209
 210 void kvm_define_shared_msr(unsigned slot, u32 msr)
 211 {
 212         if (slot >= shared_msrs_global.nr)
 213                 shared_msrs_global.nr = slot + 1;
 214         shared_msrs_global.msrs[slot] = msr;
 215         /* we need ensured the shared_msr_global have been updated */
 216         smp_wmb();
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 219
 220 static void kvm_shared_msr_cpu_online(void)
 221 {
 222         unsigned i;
 223
 224         for (i = 0; i < shared_msrs_global.nr; ++i)
 225                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 226 }
 227
 228 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 229 {
 230         unsigned int cpu = smp_processor_id();
 231         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 232
 233         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 234                 return;
 235         smsr->values[slot].curr = value;
 236         wrmsrl(shared_msrs_global.msrs[slot], value);
 237         if (!smsr->registered) {
 238                 smsr->urn.on_user_return = kvm_on_user_return;
 239                 user_return_notifier_register(&smsr->urn);
 240                 smsr->registered = true;
 241         }
 242 }
 243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 244
 245 static void drop_user_return_notifiers(void *ignore)
 246 {
 247         unsigned int cpu = smp_processor_id();
 248         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 249
 250         if (smsr->registered)
 251                 kvm_on_user_return(&smsr->urn);
 252 }
 253
 254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 255 {
 256         return vcpu->arch.apic_base;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 259
 260 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 261 {
 262         u64 old_state = vcpu->arch.apic_base &
 263                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 264         u64 new_state = msr_info->data &
 265                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 266         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 267                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 268
 269         if (!msr_info->host_initiated &&
 270             ((msr_info->data & reserved_bits) != 0 ||
 271              new_state == X2APIC_ENABLE ||
 272              (new_state == MSR_IA32_APICBASE_ENABLE &&
 273               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 274              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 275               old_state == 0)))
 276                 return 1;
 277
 278         kvm_lapic_set_base(vcpu, msr_info->data);
 279         return 0;
 280 }
 281 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 282
 283 asmlinkage void kvm_spurious_fault(void)
 284 {
 285         /* Fault while not rebooting.  We want the trace. */
 286         BUG();
 287 }
 288 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 289
 290 #define EXCPT_BENIGN            0
 291 #define EXCPT_CONTRIBUTORY      1
 292 #define EXCPT_PF                2
 293
 294 static int exception_class(int vector)
 295 {
 296         switch (vector) {
 297         case PF_VECTOR:
 298                 return EXCPT_PF;
 299         case DE_VECTOR:
 300         case TS_VECTOR:
 301         case NP_VECTOR:
 302         case SS_VECTOR:
 303         case GP_VECTOR:
 304                 return EXCPT_CONTRIBUTORY;
 305         default:
 306                 break;
 307         }
 308         return EXCPT_BENIGN;
 309 }
 310
 311 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 312                 unsigned nr, bool has_error, u32 error_code,
 313                 bool reinject)
 314 {
 315         u32 prev_nr;
 316         int class1, class2;
 317
 318         kvm_make_request(KVM_REQ_EVENT, vcpu);
 319
 320         if (!vcpu->arch.exception.pending) {
 321         queue:
 322                 vcpu->arch.exception.pending = true;
 323                 vcpu->arch.exception.has_error_code = has_error;
 324                 vcpu->arch.exception.nr = nr;
 325                 vcpu->arch.exception.error_code = error_code;
 326                 vcpu->arch.exception.reinject = reinject;
 327                 return;
 328         }
 329
 330         /* to check exception */
 331         prev_nr = vcpu->arch.exception.nr;
 332         if (prev_nr == DF_VECTOR) {
 333                 /* triple fault -> shutdown */
 334                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 335                 return;
 336         }
 337         class1 = exception_class(prev_nr);
 338         class2 = exception_class(nr);
 339         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 340                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 341                 /* generate double fault per SDM Table 5-5 */
 342                 vcpu->arch.exception.pending = true;
 343                 vcpu->arch.exception.has_error_code = true;
 344                 vcpu->arch.exception.nr = DF_VECTOR;
 345                 vcpu->arch.exception.error_code = 0;
 346         } else
 347                 /* replace previous exception with a new one in a hope
 348                    that instruction re-execution will regenerate lost
 349                    exception */
 350                 goto queue;
 351 }
 352
 353 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 354 {
 355         kvm_multiple_exception(vcpu, nr, false, 0, false);
 356 }
 357 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 358
 359 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 360 {
 361         kvm_multiple_exception(vcpu, nr, false, 0, true);
 362 }
 363 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 364
 365 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 366 {
 367         if (err)
 368                 kvm_inject_gp(vcpu, 0);
 369         else
 370                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 373
 374 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 375 {
 376         ++vcpu->stat.pf_guest;
 377         vcpu->arch.cr2 = fault->address;
 378         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 379 }
 380 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 381
 382 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 383 {
 384         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 385                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 386         else
 387                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 388 }
 389
 390 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 391 {
 392         atomic_inc(&vcpu->arch.nmi_queued);
 393         kvm_make_request(KVM_REQ_NMI, vcpu);
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 396
 397 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 398 {
 399         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 402
 403 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 404 {
 405         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 408
 409 /*
 410  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 411  * a #GP and return false.
 412  */
 413 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 414 {
 415         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 416                 return true;
 417         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 418         return false;
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 421
 422 /*
 423  * This function will be used to read from the physical memory of the currently
 424  * running guest. The difference to kvm_read_guest_page is that this function
 425  * can read from guest physical or from the guest's guest physical memory.
 426  */
 427 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 428                             gfn_t ngfn, void *data, int offset, int len,
 429                             u32 access)
 430 {
 431         gfn_t real_gfn;
 432         gpa_t ngpa;
 433
 434         ngpa     = gfn_to_gpa(ngfn);
 435         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 436         if (real_gfn == UNMAPPED_GVA)
 437                 return -EFAULT;
 438
 439         real_gfn = gpa_to_gfn(real_gfn);
 440
 441         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 442 }
 443 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 444
 445 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 446                                void *data, int offset, int len, u32 access)
 447 {
 448         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 449                                        data, offset, len, access);
 450 }
 451
 452 /*
 453  * Load the pae pdptrs.  Return true is they are all valid.
 454  */
 455 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 456 {
 457         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 458         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 459         int i;
 460         int ret;
 461         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 462
 463         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 464                                       offset * sizeof(u64), sizeof(pdpte),
 465                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 466         if (ret < 0) {
 467                 ret = 0;
 468                 goto out;
 469         }
 470         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 471                 if (is_present_gpte(pdpte[i]) &&
 472                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 473                         ret = 0;
 474                         goto out;
 475                 }
 476         }
 477         ret = 1;
 478
 479         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 480         __set_bit(VCPU_EXREG_PDPTR,
 481                   (unsigned long *)&vcpu->arch.regs_avail);
 482         __set_bit(VCPU_EXREG_PDPTR,
 483                   (unsigned long *)&vcpu->arch.regs_dirty);
 484 out:
 485
 486         return ret;
 487 }
 488 EXPORT_SYMBOL_GPL(load_pdptrs);
 489
 490 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 491 {
 492         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 493         bool changed = true;
 494         int offset;
 495         gfn_t gfn;
 496         int r;
 497
 498         if (is_long_mode(vcpu) || !is_pae(vcpu))
 499                 return false;
 500
 501         if (!test_bit(VCPU_EXREG_PDPTR,
 502                       (unsigned long *)&vcpu->arch.regs_avail))
 503                 return true;
 504
 505         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 506         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 507         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 508                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 509         if (r < 0)
 510                 goto out;
 511         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 512 out:
 513
 514         return changed;
 515 }
 516
 517 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 518 {
 519         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 520         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 521                                     X86_CR0_CD | X86_CR0_NW;
 522
 523         cr0 |= X86_CR0_ET;
 524
 525 #ifdef CONFIG_X86_64
 526         if (cr0 & 0xffffffff00000000UL)
 527                 return 1;
 528 #endif
 529
 530         cr0 &= ~CR0_RESERVED_BITS;
 531
 532         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 533                 return 1;
 534
 535         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 536                 return 1;
 537
 538         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 539 #ifdef CONFIG_X86_64
 540                 if ((vcpu->arch.efer & EFER_LME)) {
 541                         int cs_db, cs_l;
 542
 543                         if (!is_pae(vcpu))
 544                                 return 1;
 545                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 546                         if (cs_l)
 547                                 return 1;
 548                 } else
 549 #endif
 550                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 551                                                  kvm_read_cr3(vcpu)))
 552                         return 1;
 553         }
 554
 555         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 556                 return 1;
 557
 558         kvm_x86_ops->set_cr0(vcpu, cr0);
 559
 560         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 561                 kvm_clear_async_pf_completion_queue(vcpu);
 562                 kvm_async_pf_hash_reset(vcpu);
 563         }
 564
 565         if ((cr0 ^ old_cr0) & update_bits)
 566                 kvm_mmu_reset_context(vcpu);
 567         return 0;
 568 }
 569 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 570
 571 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 572 {
 573         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_lmsw);
 576
 577 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 578 {
 579         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 580                         !vcpu->guest_xcr0_loaded) {
 581                 /* kvm_set_xcr() also depends on this */
 582                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 583                 vcpu->guest_xcr0_loaded = 1;
 584         }
 585 }
 586
 587 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 588 {
 589         if (vcpu->guest_xcr0_loaded) {
 590                 if (vcpu->arch.xcr0 != host_xcr0)
 591                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 592                 vcpu->guest_xcr0_loaded = 0;
 593         }
 594 }
 595
 596 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 597 {
 598         u64 xcr0 = xcr;
 599         u64 old_xcr0 = vcpu->arch.xcr0;
 600         u64 valid_bits;
 601
 602         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 603         if (index != XCR_XFEATURE_ENABLED_MASK)
 604                 return 1;
 605         if (!(xcr0 & XSTATE_FP))
 606                 return 1;
 607         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 608                 return 1;
 609
 610         /*
 611          * Do not allow the guest to set bits that we do not support
 612          * saving.  However, xcr0 bit 0 is always set, even if the
 613          * emulated CPU does not support XSAVE (see fx_init).
 614          */
 615         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 616         if (xcr0 & ~valid_bits)
 617                 return 1;
 618
 619         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 620                 return 1;
 621
 622         kvm_put_guest_xcr0(vcpu);
 623         vcpu->arch.xcr0 = xcr0;
 624
 625         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 626                 kvm_update_cpuid(vcpu);
 627         return 0;
 628 }
 629
 630 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 631 {
 632         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 633             __kvm_set_xcr(vcpu, index, xcr)) {
 634                 kvm_inject_gp(vcpu, 0);
 635                 return 1;
 636         }
 637         return 0;
 638 }
 639 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 640
 641 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 642 {
 643         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 644         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 645                                    X86_CR4_PAE | X86_CR4_SMEP;
 646         if (cr4 & CR4_RESERVED_BITS)
 647                 return 1;
 648
 649         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 650                 return 1;
 651
 652         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 653                 return 1;
 654
 655         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 656                 return 1;
 657
 658         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 659                 return 1;
 660
 661         if (is_long_mode(vcpu)) {
 662                 if (!(cr4 & X86_CR4_PAE))
 663                         return 1;
 664         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 665                    && ((cr4 ^ old_cr4) & pdptr_bits)
 666                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 667                                    kvm_read_cr3(vcpu)))
 668                 return 1;
 669
 670         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 671                 if (!guest_cpuid_has_pcid(vcpu))
 672                         return 1;
 673
 674                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 675                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 676                         return 1;
 677         }
 678
 679         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 680                 return 1;
 681
 682         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 683             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 684                 kvm_mmu_reset_context(vcpu);
 685
 686         if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
 687                 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
 688
 689         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 690                 kvm_update_cpuid(vcpu);
 691
 692         return 0;
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 695
 696 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 697 {
 698         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 699                 kvm_mmu_sync_roots(vcpu);
 700                 kvm_mmu_flush_tlb(vcpu);
 701                 return 0;
 702         }
 703
 704         if (is_long_mode(vcpu)) {
 705                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 706                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 707                                 return 1;
 708                 } else
 709                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 710                                 return 1;
 711         } else {
 712                 if (is_pae(vcpu)) {
 713                         if (cr3 & CR3_PAE_RESERVED_BITS)
 714                                 return 1;
 715                         if (is_paging(vcpu) &&
 716                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 717                                 return 1;
 718                 }
 719                 /*
 720                  * We don't check reserved bits in nonpae mode, because
 721                  * this isn't enforced, and VMware depends on this.
 722                  */
 723         }
 724
 725         vcpu->arch.cr3 = cr3;
 726         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 727         kvm_mmu_new_cr3(vcpu);
 728         return 0;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 731
 732 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 733 {
 734         if (cr8 & CR8_RESERVED_BITS)
 735                 return 1;
 736         if (irqchip_in_kernel(vcpu->kvm))
 737                 kvm_lapic_set_tpr(vcpu, cr8);
 738         else
 739                 vcpu->arch.cr8 = cr8;
 740         return 0;
 741 }
 742 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 743
 744 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 745 {
 746         if (irqchip_in_kernel(vcpu->kvm))
 747                 return kvm_lapic_get_cr8(vcpu);
 748         else
 749                 return vcpu->arch.cr8;
 750 }
 751 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 752
 753 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 754 {
 755         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 756                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 757 }
 758
 759 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 760 {
 761         unsigned long dr7;
 762
 763         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 764                 dr7 = vcpu->arch.guest_debug_dr7;
 765         else
 766                 dr7 = vcpu->arch.dr7;
 767         kvm_x86_ops->set_dr7(vcpu, dr7);
 768         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 769         if (dr7 & DR7_BP_EN_MASK)
 770                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 771 }
 772
 773 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 774 {
 775         switch (dr) {
 776         case 0 ... 3:
 777                 vcpu->arch.db[dr] = val;
 778                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 779                         vcpu->arch.eff_db[dr] = val;
 780                 break;
 781         case 4:
 782                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 783                         return 1; /* #UD */
 784                 /* fall through */
 785         case 6:
 786                 if (val & 0xffffffff00000000ULL)
 787                         return -1; /* #GP */
 788                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 789                 kvm_update_dr6(vcpu);
 790                 break;
 791         case 5:
 792                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 793                         return 1; /* #UD */
 794                 /* fall through */
 795         default: /* 7 */
 796                 if (val & 0xffffffff00000000ULL)
 797                         return -1; /* #GP */
 798                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 799                 kvm_update_dr7(vcpu);
 800                 break;
 801         }
 802
 803         return 0;
 804 }
 805
 806 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 807 {
 808         int res;
 809
 810         res = __kvm_set_dr(vcpu, dr, val);
 811         if (res > 0)
 812                 kvm_queue_exception(vcpu, UD_VECTOR);
 813         else if (res < 0)
 814                 kvm_inject_gp(vcpu, 0);
 815
 816         return res;
 817 }
 818 EXPORT_SYMBOL_GPL(kvm_set_dr);
 819
 820 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 821 {
 822         switch (dr) {
 823         case 0 ... 3:
 824                 *val = vcpu->arch.db[dr];
 825                 break;
 826         case 4:
 827                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 828                         return 1;
 829                 /* fall through */
 830         case 6:
 831                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 832                         *val = vcpu->arch.dr6;
 833                 else
 834                         *val = kvm_x86_ops->get_dr6(vcpu);
 835                 break;
 836         case 5:
 837                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 838                         return 1;
 839                 /* fall through */
 840         default: /* 7 */
 841                 *val = vcpu->arch.dr7;
 842                 break;
 843         }
 844
 845         return 0;
 846 }
 847
 848 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 849 {
 850         if (_kvm_get_dr(vcpu, dr, val)) {
 851                 kvm_queue_exception(vcpu, UD_VECTOR);
 852                 return 1;
 853         }
 854         return 0;
 855 }
 856 EXPORT_SYMBOL_GPL(kvm_get_dr);
 857
 858 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 859 {
 860         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 861         u64 data;
 862         int err;
 863
 864         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 865         if (err)
 866                 return err;
 867         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 868         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 869         return err;
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 872
 873 /*
 874  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 875  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 876  *
 877  * This list is modified at module load time to reflect the
 878  * capabilities of the host cpu. This capabilities test skips MSRs that are
 879  * kvm-specific. Those are put in the beginning of the list.
 880  */
 881
 882 #define KVM_SAVE_MSRS_BEGIN     12
 883 static u32 msrs_to_save[] = {
 884         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 885         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 886         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 887         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 888         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 889         MSR_KVM_PV_EOI_EN,
 890         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 891         MSR_STAR,
 892 #ifdef CONFIG_X86_64
 893         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 894 #endif
 895         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 896         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 897 };
 898
 899 static unsigned num_msrs_to_save;
 900
 901 static const u32 emulated_msrs[] = {
 902         MSR_IA32_TSC_ADJUST,
 903         MSR_IA32_TSCDEADLINE,
 904         MSR_IA32_MISC_ENABLE,
 905         MSR_IA32_MCG_STATUS,
 906         MSR_IA32_MCG_CTL,
 907 };
 908
 909 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 910 {
 911         if (efer & efer_reserved_bits)
 912                 return false;
 913
 914         if (efer & EFER_FFXSR) {
 915                 struct kvm_cpuid_entry2 *feat;
 916
 917                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 918                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 919                         return false;
 920         }
 921
 922         if (efer & EFER_SVME) {
 923                 struct kvm_cpuid_entry2 *feat;
 924
 925                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 926                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 927                         return false;
 928         }
 929
 930         return true;
 931 }
 932 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 933
 934 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 935 {
 936         u64 old_efer = vcpu->arch.efer;
 937
 938         if (!kvm_valid_efer(vcpu, efer))
 939                 return 1;
 940
 941         if (is_paging(vcpu)
 942             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 943                 return 1;
 944
 945         efer &= ~EFER_LMA;
 946         efer |= vcpu->arch.efer & EFER_LMA;
 947
 948         kvm_x86_ops->set_efer(vcpu, efer);
 949
 950         /* Update reserved bits */
 951         if ((efer ^ old_efer) & EFER_NX)
 952                 kvm_mmu_reset_context(vcpu);
 953
 954         return 0;
 955 }
 956
 957 void kvm_enable_efer_bits(u64 mask)
 958 {
 959        efer_reserved_bits &= ~mask;
 960 }
 961 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 962
 963
 964 /*
 965  * Writes msr value into into the appropriate "register".
 966  * Returns 0 on success, non-0 otherwise.
 967  * Assumes vcpu_load() was already called.
 968  */
 969 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 970 {
 971         return kvm_x86_ops->set_msr(vcpu, msr);
 972 }
 973
 974 /*
 975  * Adapt set_msr() to msr_io()'s calling convention
 976  */
 977 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 978 {
 979         struct msr_data msr;
 980
 981         msr.data = *data;
 982         msr.index = index;
 983         msr.host_initiated = true;
 984         return kvm_set_msr(vcpu, &msr);
 985 }
 986
 987 #ifdef CONFIG_X86_64
 988 struct pvclock_gtod_data {
 989         seqcount_t      seq;
 990
 991         struct { /* extract of a clocksource struct */
 992                 int vclock_mode;
 993                 cycle_t cycle_last;
 994                 cycle_t mask;
 995                 u32     mult;
 996                 u32     shift;
 997         } clock;
 998
 999         /* open coded 'struct timespec' */
1000         u64             monotonic_time_snsec;
1001         time_t          monotonic_time_sec;
1002 };
1003
1004 static struct pvclock_gtod_data pvclock_gtod_data;
1005
1006 static void update_pvclock_gtod(struct timekeeper *tk)
1007 {
1008         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1009
1010         write_seqcount_begin(&vdata->seq);
1011
1012         /* copy pvclock gtod data */
1013         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
1014         vdata->clock.cycle_last         = tk->clock->cycle_last;
1015         vdata->clock.mask               = tk->clock->mask;
1016         vdata->clock.mult               = tk->mult;
1017         vdata->clock.shift              = tk->shift;
1018
1019         vdata->monotonic_time_sec       = tk->xtime_sec
1020                                         + tk->wall_to_monotonic.tv_sec;
1021         vdata->monotonic_time_snsec     = tk->xtime_nsec
1022                                         + (tk->wall_to_monotonic.tv_nsec
1023                                                 << tk->shift);
1024         while (vdata->monotonic_time_snsec >=
1025                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
1026                 vdata->monotonic_time_snsec -=
1027                                         ((u64)NSEC_PER_SEC) << tk->shift;
1028                 vdata->monotonic_time_sec++;
1029         }
1030
1031         write_seqcount_end(&vdata->seq);
1032 }
1033 #endif
1034
1035
1036 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1037 {
1038         int version;
1039         int r;
1040         struct pvclock_wall_clock wc;
1041         struct timespec boot;
1042
1043         if (!wall_clock)
1044                 return;
1045
1046         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1047         if (r)
1048                 return;
1049
1050         if (version & 1)
1051                 ++version;  /* first time write, random junk */
1052
1053         ++version;
1054
1055         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1056
1057         /*
1058          * The guest calculates current wall clock time by adding
1059          * system time (updated by kvm_guest_time_update below) to the
1060          * wall clock specified here.  guest system time equals host
1061          * system time for us, thus we must fill in host boot time here.
1062          */
1063         getboottime(&boot);
1064
1065         if (kvm->arch.kvmclock_offset) {
1066                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1067                 boot = timespec_sub(boot, ts);
1068         }
1069         wc.sec = boot.tv_sec;
1070         wc.nsec = boot.tv_nsec;
1071         wc.version = version;
1072
1073         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1074
1075         version++;
1076         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1077 }
1078
1079 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1080 {
1081         uint32_t quotient, remainder;
1082
1083         /* Don't try to replace with do_div(), this one calculates
1084          * "(dividend << 32) / divisor" */
1085         __asm__ ( "divl %4"
1086                   : "=a" (quotient), "=d" (remainder)
1087                   : "0" (0), "1" (dividend), "r" (divisor) );
1088         return quotient;
1089 }
1090
1091 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1092                                s8 *pshift, u32 *pmultiplier)
1093 {
1094         uint64_t scaled64;
1095         int32_t  shift = 0;
1096         uint64_t tps64;
1097         uint32_t tps32;
1098
1099         tps64 = base_khz * 1000LL;
1100         scaled64 = scaled_khz * 1000LL;
1101         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1102                 tps64 >>= 1;
1103                 shift--;
1104         }
1105
1106         tps32 = (uint32_t)tps64;
1107         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1108                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1109                         scaled64 >>= 1;
1110                 else
1111                         tps32 <<= 1;
1112                 shift++;
1113         }
1114
1115         *pshift = shift;
1116         *pmultiplier = div_frac(scaled64, tps32);
1117
1118         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1119                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1120 }
1121
1122 static inline u64 get_kernel_ns(void)
1123 {
1124         struct timespec ts;
1125
1126         ktime_get_ts(&ts);
1127         monotonic_to_bootbased(&ts);
1128         return timespec_to_ns(&ts);
1129 }
1130
1131 #ifdef CONFIG_X86_64
1132 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1133 #endif
1134
1135 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1136 unsigned long max_tsc_khz;
1137
1138 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1139 {
1140         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1141                                    vcpu->arch.virtual_tsc_shift);
1142 }
1143
1144 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1145 {
1146         u64 v = (u64)khz * (1000000 + ppm);
1147         do_div(v, 1000000);
1148         return v;
1149 }
1150
1151 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1152 {
1153         u32 thresh_lo, thresh_hi;
1154         int use_scaling = 0;
1155
1156         /* tsc_khz can be zero if TSC calibration fails */
1157         if (this_tsc_khz == 0)
1158                 return;
1159
1160         /* Compute a scale to convert nanoseconds in TSC cycles */
1161         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1162                            &vcpu->arch.virtual_tsc_shift,
1163                            &vcpu->arch.virtual_tsc_mult);
1164         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1165
1166         /*
1167          * Compute the variation in TSC rate which is acceptable
1168          * within the range of tolerance and decide if the
1169          * rate being applied is within that bounds of the hardware
1170          * rate.  If so, no scaling or compensation need be done.
1171          */
1172         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1173         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1174         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1175                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1176                 use_scaling = 1;
1177         }
1178         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1179 }
1180
1181 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1182 {
1183         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1184                                       vcpu->arch.virtual_tsc_mult,
1185                                       vcpu->arch.virtual_tsc_shift);
1186         tsc += vcpu->arch.this_tsc_write;
1187         return tsc;
1188 }
1189
1190 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1191 {
1192 #ifdef CONFIG_X86_64
1193         bool vcpus_matched;
1194         bool do_request = false;
1195         struct kvm_arch *ka = &vcpu->kvm->arch;
1196         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1197
1198         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1199                          atomic_read(&vcpu->kvm->online_vcpus));
1200
1201         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1202                 if (!ka->use_master_clock)
1203                         do_request = 1;
1204
1205         if (!vcpus_matched && ka->use_master_clock)
1206                         do_request = 1;
1207
1208         if (do_request)
1209                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1210
1211         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1212                             atomic_read(&vcpu->kvm->online_vcpus),
1213                             ka->use_master_clock, gtod->clock.vclock_mode);
1214 #endif
1215 }
1216
1217 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1218 {
1219         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1220         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1221 }
1222
1223 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1224 {
1225         struct kvm *kvm = vcpu->kvm;
1226         u64 offset, ns, elapsed;
1227         unsigned long flags;
1228         s64 usdiff;
1229         bool matched;
1230         u64 data = msr->data;
1231
1232         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1233         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1234         ns = get_kernel_ns();
1235         elapsed = ns - kvm->arch.last_tsc_nsec;
1236
1237         if (vcpu->arch.virtual_tsc_khz) {
1238                 int faulted = 0;
1239
1240                 /* n.b - signed multiplication and division required */
1241                 usdiff = data - kvm->arch.last_tsc_write;
1242 #ifdef CONFIG_X86_64
1243                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1244 #else
1245                 /* do_div() only does unsigned */
1246                 asm("1: idivl %[divisor]\n"
1247                     "2: xor %%edx, %%edx\n"
1248                     "   movl $0, %[faulted]\n"
1249                     "3:\n"
1250                     ".section .fixup,\"ax\"\n"
1251                     "4: movl $1, %[faulted]\n"
1252                     "   jmp  3b\n"
1253                     ".previous\n"
1254
1255                 _ASM_EXTABLE(1b, 4b)
1256
1257                 : "=A"(usdiff), [faulted] "=r" (faulted)
1258                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1259
1260 #endif
1261                 do_div(elapsed, 1000);
1262                 usdiff -= elapsed;
1263                 if (usdiff < 0)
1264                         usdiff = -usdiff;
1265
1266                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1267                 if (faulted)
1268                         usdiff = USEC_PER_SEC;
1269         } else
1270                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1271
1272         /*
1273          * Special case: TSC write with a small delta (1 second) of virtual
1274          * cycle time against real time is interpreted as an attempt to
1275          * synchronize the CPU.
1276          *
1277          * For a reliable TSC, we can match TSC offsets, and for an unstable
1278          * TSC, we add elapsed time in this computation.  We could let the
1279          * compensation code attempt to catch up if we fall behind, but
1280          * it's better to try to match offsets from the beginning.
1281          */
1282         if (usdiff < USEC_PER_SEC &&
1283             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1284                 if (!check_tsc_unstable()) {
1285                         offset = kvm->arch.cur_tsc_offset;
1286                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1287                 } else {
1288                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1289                         data += delta;
1290                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1291                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1292                 }
1293                 matched = true;
1294         } else {
1295                 /*
1296                  * We split periods of matched TSC writes into generations.
1297                  * For each generation, we track the original measured
1298                  * nanosecond time, offset, and write, so if TSCs are in
1299                  * sync, we can match exact offset, and if not, we can match
1300                  * exact software computation in compute_guest_tsc()
1301                  *
1302                  * These values are tracked in kvm->arch.cur_xxx variables.
1303                  */
1304                 kvm->arch.cur_tsc_generation++;
1305                 kvm->arch.cur_tsc_nsec = ns;
1306                 kvm->arch.cur_tsc_write = data;
1307                 kvm->arch.cur_tsc_offset = offset;
1308                 matched = false;
1309                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1310                          kvm->arch.cur_tsc_generation, data);
1311         }
1312
1313         /*
1314          * We also track th most recent recorded KHZ, write and time to
1315          * allow the matching interval to be extended at each write.
1316          */
1317         kvm->arch.last_tsc_nsec = ns;
1318         kvm->arch.last_tsc_write = data;
1319         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1320
1321         vcpu->arch.last_guest_tsc = data;
1322
1323         /* Keep track of which generation this VCPU has synchronized to */
1324         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1325         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1326         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1327
1328         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1329                 update_ia32_tsc_adjust_msr(vcpu, offset);
1330         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1331         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1332
1333         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1334         if (matched)
1335                 kvm->arch.nr_vcpus_matched_tsc++;
1336         else
1337                 kvm->arch.nr_vcpus_matched_tsc = 0;
1338
1339         kvm_track_tsc_matching(vcpu);
1340         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1341 }
1342
1343 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1344
1345 #ifdef CONFIG_X86_64
1346
1347 static cycle_t read_tsc(void)
1348 {
1349         cycle_t ret;
1350         u64 last;
1351
1352         /*
1353          * Empirically, a fence (of type that depends on the CPU)
1354          * before rdtsc is enough to ensure that rdtsc is ordered
1355          * with respect to loads.  The various CPU manuals are unclear
1356          * as to whether rdtsc can be reordered with later loads,
1357          * but no one has ever seen it happen.
1358          */
1359         rdtsc_barrier();
1360         ret = (cycle_t)vget_cycles();
1361
1362         last = pvclock_gtod_data.clock.cycle_last;
1363
1364         if (likely(ret >= last))
1365                 return ret;
1366
1367         /*
1368          * GCC likes to generate cmov here, but this branch is extremely
1369          * predictable (it's just a funciton of time and the likely is
1370          * very likely) and there's a data dependence, so force GCC
1371          * to generate a branch instead.  I don't barrier() because
1372          * we don't actually need a barrier, and if this function
1373          * ever gets inlined it will generate worse code.
1374          */
1375         asm volatile ("");
1376         return last;
1377 }
1378
1379 static inline u64 vgettsc(cycle_t *cycle_now)
1380 {
1381         long v;
1382         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1383
1384         *cycle_now = read_tsc();
1385
1386         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1387         return v * gtod->clock.mult;
1388 }
1389
1390 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1391 {
1392         unsigned long seq;
1393         u64 ns;
1394         int mode;
1395         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1396
1397         ts->tv_nsec = 0;
1398         do {
1399                 seq = read_seqcount_begin(&gtod->seq);
1400                 mode = gtod->clock.vclock_mode;
1401                 ts->tv_sec = gtod->monotonic_time_sec;
1402                 ns = gtod->monotonic_time_snsec;
1403                 ns += vgettsc(cycle_now);
1404                 ns >>= gtod->clock.shift;
1405         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1406         timespec_add_ns(ts, ns);
1407
1408         return mode;
1409 }
1410
1411 /* returns true if host is using tsc clocksource */
1412 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1413 {
1414         struct timespec ts;
1415
1416         /* checked again under seqlock below */
1417         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1418                 return false;
1419
1420         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1421                 return false;
1422
1423         monotonic_to_bootbased(&ts);
1424         *kernel_ns = timespec_to_ns(&ts);
1425
1426         return true;
1427 }
1428 #endif
1429
1430 /*
1431  *
1432  * Assuming a stable TSC across physical CPUS, and a stable TSC
1433  * across virtual CPUs, the following condition is possible.
1434  * Each numbered line represents an event visible to both
1435  * CPUs at the next numbered event.
1436  *
1437  * "timespecX" represents host monotonic time. "tscX" represents
1438  * RDTSC value.
1439  *
1440  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1441  *
1442  * 1.  read timespec0,tsc0
1443  * 2.                                   | timespec1 = timespec0 + N
1444  *                                      | tsc1 = tsc0 + M
1445  * 3. transition to guest               | transition to guest
1446  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1447  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1448  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1449  *
1450  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1451  *
1452  *      - ret0 < ret1
1453  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1454  *              ...
1455  *      - 0 < N - M => M < N
1456  *
1457  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1458  * always the case (the difference between two distinct xtime instances
1459  * might be smaller then the difference between corresponding TSC reads,
1460  * when updating guest vcpus pvclock areas).
1461  *
1462  * To avoid that problem, do not allow visibility of distinct
1463  * system_timestamp/tsc_timestamp values simultaneously: use a master
1464  * copy of host monotonic time values. Update that master copy
1465  * in lockstep.
1466  *
1467  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1468  *
1469  */
1470
1471 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1472 {
1473 #ifdef CONFIG_X86_64
1474         struct kvm_arch *ka = &kvm->arch;
1475         int vclock_mode;
1476         bool host_tsc_clocksource, vcpus_matched;
1477
1478         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1479                         atomic_read(&kvm->online_vcpus));
1480
1481         /*
1482          * If the host uses TSC clock, then passthrough TSC as stable
1483          * to the guest.
1484          */
1485         host_tsc_clocksource = kvm_get_time_and_clockread(
1486                                         &ka->master_kernel_ns,
1487                                         &ka->master_cycle_now);
1488
1489         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1490
1491         if (ka->use_master_clock)
1492                 atomic_set(&kvm_guest_has_master_clock, 1);
1493
1494         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1495         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1496                                         vcpus_matched);
1497 #endif
1498 }
1499
1500 static void kvm_gen_update_masterclock(struct kvm *kvm)
1501 {
1502 #ifdef CONFIG_X86_64
1503         int i;
1504         struct kvm_vcpu *vcpu;
1505         struct kvm_arch *ka = &kvm->arch;
1506
1507         spin_lock(&ka->pvclock_gtod_sync_lock);
1508         kvm_make_mclock_inprogress_request(kvm);
1509         /* no guest entries from this point */
1510         pvclock_update_vm_gtod_copy(kvm);
1511
1512         kvm_for_each_vcpu(i, vcpu, kvm)
1513                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1514
1515         /* guest entries allowed */
1516         kvm_for_each_vcpu(i, vcpu, kvm)
1517                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1518
1519         spin_unlock(&ka->pvclock_gtod_sync_lock);
1520 #endif
1521 }
1522
1523 static int kvm_guest_time_update(struct kvm_vcpu *v)
1524 {
1525         unsigned long flags, this_tsc_khz;
1526         struct kvm_vcpu_arch *vcpu = &v->arch;
1527         struct kvm_arch *ka = &v->kvm->arch;
1528         s64 kernel_ns;
1529         u64 tsc_timestamp, host_tsc;
1530         struct pvclock_vcpu_time_info guest_hv_clock;
1531         u8 pvclock_flags;
1532         bool use_master_clock;
1533
1534         kernel_ns = 0;
1535         host_tsc = 0;
1536
1537         /*
1538          * If the host uses TSC clock, then passthrough TSC as stable
1539          * to the guest.
1540          */
1541         spin_lock(&ka->pvclock_gtod_sync_lock);
1542         use_master_clock = ka->use_master_clock;
1543         if (use_master_clock) {
1544                 host_tsc = ka->master_cycle_now;
1545                 kernel_ns = ka->master_kernel_ns;
1546         }
1547         spin_unlock(&ka->pvclock_gtod_sync_lock);
1548
1549         /* Keep irq disabled to prevent changes to the clock */
1550         local_irq_save(flags);
1551         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1552         if (unlikely(this_tsc_khz == 0)) {
1553                 local_irq_restore(flags);
1554                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1555                 return 1;
1556         }
1557         if (!use_master_clock) {
1558                 host_tsc = native_read_tsc();
1559                 kernel_ns = get_kernel_ns();
1560         }
1561
1562         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1563
1564         /*
1565          * We may have to catch up the TSC to match elapsed wall clock
1566          * time for two reasons, even if kvmclock is used.
1567          *   1) CPU could have been running below the maximum TSC rate
1568          *   2) Broken TSC compensation resets the base at each VCPU
1569          *      entry to avoid unknown leaps of TSC even when running
1570          *      again on the same CPU.  This may cause apparent elapsed
1571          *      time to disappear, and the guest to stand still or run
1572          *      very slowly.
1573          */
1574         if (vcpu->tsc_catchup) {
1575                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1576                 if (tsc > tsc_timestamp) {
1577                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1578                         tsc_timestamp = tsc;
1579                 }
1580         }
1581
1582         local_irq_restore(flags);
1583
1584         if (!vcpu->pv_time_enabled)
1585                 return 0;
1586
1587         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1588                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1589                                    &vcpu->hv_clock.tsc_shift,
1590                                    &vcpu->hv_clock.tsc_to_system_mul);
1591                 vcpu->hw_tsc_khz = this_tsc_khz;
1592         }
1593
1594         /* With all the info we got, fill in the values */
1595         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1596         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1597         vcpu->last_guest_tsc = tsc_timestamp;
1598
1599         /*
1600          * The interface expects us to write an even number signaling that the
1601          * update is finished. Since the guest won't see the intermediate
1602          * state, we just increase by 2 at the end.
1603          */
1604         vcpu->hv_clock.version += 2;
1605
1606         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1607                 &guest_hv_clock, sizeof(guest_hv_clock))))
1608                 return 0;
1609
1610         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1611         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1612
1613         if (vcpu->pvclock_set_guest_stopped_request) {
1614                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1615                 vcpu->pvclock_set_guest_stopped_request = false;
1616         }
1617
1618         /* If the host uses TSC clocksource, then it is stable */
1619         if (use_master_clock)
1620                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1621
1622         vcpu->hv_clock.flags = pvclock_flags;
1623
1624         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1625                                 &vcpu->hv_clock,
1626                                 sizeof(vcpu->hv_clock));
1627         return 0;
1628 }
1629
1630 /*
1631  * kvmclock updates which are isolated to a given vcpu, such as
1632  * vcpu->cpu migration, should not allow system_timestamp from
1633  * the rest of the vcpus to remain static. Otherwise ntp frequency
1634  * correction applies to one vcpu's system_timestamp but not
1635  * the others.
1636  *
1637  * So in those cases, request a kvmclock update for all vcpus.
1638  * We need to rate-limit these requests though, as they can
1639  * considerably slow guests that have a large number of vcpus.
1640  * The time for a remote vcpu to update its kvmclock is bound
1641  * by the delay we use to rate-limit the updates.
1642  */
1643
1644 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1645
1646 static void kvmclock_update_fn(struct work_struct *work)
1647 {
1648         int i;
1649         struct delayed_work *dwork = to_delayed_work(work);
1650         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1651                                            kvmclock_update_work);
1652         struct kvm *kvm = container_of(ka, struct kvm, arch);
1653         struct kvm_vcpu *vcpu;
1654
1655         kvm_for_each_vcpu(i, vcpu, kvm) {
1656                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1657                 kvm_vcpu_kick(vcpu);
1658         }
1659 }
1660
1661 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1662 {
1663         struct kvm *kvm = v->kvm;
1664
1665         set_bit(KVM_REQ_CLOCK_UPDATE, &v->requests);
1666         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1667                                         KVMCLOCK_UPDATE_DELAY);
1668 }
1669
1670 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1671
1672 static void kvmclock_sync_fn(struct work_struct *work)
1673 {
1674         struct delayed_work *dwork = to_delayed_work(work);
1675         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1676                                            kvmclock_sync_work);
1677         struct kvm *kvm = container_of(ka, struct kvm, arch);
1678
1679         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1680         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1681                                         KVMCLOCK_SYNC_PERIOD);
1682 }
1683
1684 static bool msr_mtrr_valid(unsigned msr)
1685 {
1686         switch (msr) {
1687         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1688         case MSR_MTRRfix64K_00000:
1689         case MSR_MTRRfix16K_80000:
1690         case MSR_MTRRfix16K_A0000:
1691         case MSR_MTRRfix4K_C0000:
1692         case MSR_MTRRfix4K_C8000:
1693         case MSR_MTRRfix4K_D0000:
1694         case MSR_MTRRfix4K_D8000:
1695         case MSR_MTRRfix4K_E0000:
1696         case MSR_MTRRfix4K_E8000:
1697         case MSR_MTRRfix4K_F0000:
1698         case MSR_MTRRfix4K_F8000:
1699         case MSR_MTRRdefType:
1700         case MSR_IA32_CR_PAT:
1701                 return true;
1702         case 0x2f8:
1703                 return true;
1704         }
1705         return false;
1706 }
1707
1708 static bool valid_pat_type(unsigned t)
1709 {
1710         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1711 }
1712
1713 static bool valid_mtrr_type(unsigned t)
1714 {
1715         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1716 }
1717
1718 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1719 {
1720         int i;
1721
1722         if (!msr_mtrr_valid(msr))
1723                 return false;
1724
1725         if (msr == MSR_IA32_CR_PAT) {
1726                 for (i = 0; i < 8; i++)
1727                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1728                                 return false;
1729                 return true;
1730         } else if (msr == MSR_MTRRdefType) {
1731                 if (data & ~0xcff)
1732                         return false;
1733                 return valid_mtrr_type(data & 0xff);
1734         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1735                 for (i = 0; i < 8 ; i++)
1736                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1737                                 return false;
1738                 return true;
1739         }
1740
1741         /* variable MTRRs */
1742         return valid_mtrr_type(data & 0xff);
1743 }
1744
1745 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1746 {
1747         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1748
1749         if (!mtrr_valid(vcpu, msr, data))
1750                 return 1;
1751
1752         if (msr == MSR_MTRRdefType) {
1753                 vcpu->arch.mtrr_state.def_type = data;
1754                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1755         } else if (msr == MSR_MTRRfix64K_00000)
1756                 p[0] = data;
1757         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1758                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1759         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1760                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1761         else if (msr == MSR_IA32_CR_PAT)
1762                 vcpu->arch.pat = data;
1763         else {  /* Variable MTRRs */
1764                 int idx, is_mtrr_mask;
1765                 u64 *pt;
1766
1767                 idx = (msr - 0x200) / 2;
1768                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1769                 if (!is_mtrr_mask)
1770                         pt =
1771                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1772                 else
1773                         pt =
1774                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1775                 *pt = data;
1776         }
1777
1778         kvm_mmu_reset_context(vcpu);
1779         return 0;
1780 }
1781
1782 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1783 {
1784         u64 mcg_cap = vcpu->arch.mcg_cap;
1785         unsigned bank_num = mcg_cap & 0xff;
1786
1787         switch (msr) {
1788         case MSR_IA32_MCG_STATUS:
1789                 vcpu->arch.mcg_status = data;
1790                 break;
1791         case MSR_IA32_MCG_CTL:
1792                 if (!(mcg_cap & MCG_CTL_P))
1793                         return 1;
1794                 if (data != 0 && data != ~(u64)0)
1795                         return -1;
1796                 vcpu->arch.mcg_ctl = data;
1797                 break;
1798         default:
1799                 if (msr >= MSR_IA32_MC0_CTL &&
1800                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1801                         u32 offset = msr - MSR_IA32_MC0_CTL;
1802                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1803                          * some Linux kernels though clear bit 10 in bank 4 to
1804                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1805                          * this to avoid an uncatched #GP in the guest
1806                          */
1807                         if ((offset & 0x3) == 0 &&
1808                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1809                                 return -1;
1810                         vcpu->arch.mce_banks[offset] = data;
1811                         break;
1812                 }
1813                 return 1;
1814         }
1815         return 0;
1816 }
1817
1818 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1819 {
1820         struct kvm *kvm = vcpu->kvm;
1821         int lm = is_long_mode(vcpu);
1822         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1823                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1824         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1825                 : kvm->arch.xen_hvm_config.blob_size_32;
1826         u32 page_num = data & ~PAGE_MASK;
1827         u64 page_addr = data & PAGE_MASK;
1828         u8 *page;
1829         int r;
1830
1831         r = -E2BIG;
1832         if (page_num >= blob_size)
1833                 goto out;
1834         r = -ENOMEM;
1835         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1836         if (IS_ERR(page)) {
1837                 r = PTR_ERR(page);
1838                 goto out;
1839         }
1840         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1841                 goto out_free;
1842         r = 0;
1843 out_free:
1844         kfree(page);
1845 out:
1846         return r;
1847 }
1848
1849 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1850 {
1851         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1852 }
1853
1854 static bool kvm_hv_msr_partition_wide(u32 msr)
1855 {
1856         bool r = false;
1857         switch (msr) {
1858         case HV_X64_MSR_GUEST_OS_ID:
1859         case HV_X64_MSR_HYPERCALL:
1860         case HV_X64_MSR_REFERENCE_TSC:
1861         case HV_X64_MSR_TIME_REF_COUNT:
1862                 r = true;
1863                 break;
1864         }
1865
1866         return r;
1867 }
1868
1869 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1870 {
1871         struct kvm *kvm = vcpu->kvm;
1872
1873         switch (msr) {
1874         case HV_X64_MSR_GUEST_OS_ID:
1875                 kvm->arch.hv_guest_os_id = data;
1876                 /* setting guest os id to zero disables hypercall page */
1877                 if (!kvm->arch.hv_guest_os_id)
1878                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1879                 break;
1880         case HV_X64_MSR_HYPERCALL: {
1881                 u64 gfn;
1882                 unsigned long addr;
1883                 u8 instructions[4];
1884
1885                 /* if guest os id is not set hypercall should remain disabled */
1886                 if (!kvm->arch.hv_guest_os_id)
1887                         break;
1888                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1889                         kvm->arch.hv_hypercall = data;
1890                         break;
1891                 }
1892                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1893                 addr = gfn_to_hva(kvm, gfn);
1894                 if (kvm_is_error_hva(addr))
1895                         return 1;
1896                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1897                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1898                 if (__copy_to_user((void __user *)addr, instructions, 4))
1899                         return 1;
1900                 kvm->arch.hv_hypercall = data;
1901                 mark_page_dirty(kvm, gfn);
1902                 break;
1903         }
1904         case HV_X64_MSR_REFERENCE_TSC: {
1905                 u64 gfn;
1906                 HV_REFERENCE_TSC_PAGE tsc_ref;
1907                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1908                 kvm->arch.hv_tsc_page = data;
1909                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1910                         break;
1911                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1912                 if (kvm_write_guest(kvm, data,
1913                         &tsc_ref, sizeof(tsc_ref)))
1914                         return 1;
1915                 mark_page_dirty(kvm, gfn);
1916                 break;
1917         }
1918         default:
1919                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1920                             "data 0x%llx\n", msr, data);
1921                 return 1;
1922         }
1923         return 0;
1924 }
1925
1926 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1927 {
1928         switch (msr) {
1929         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1930                 u64 gfn;
1931                 unsigned long addr;
1932
1933                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1934                         vcpu->arch.hv_vapic = data;
1935                         break;
1936                 }
1937                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
1938                 addr = gfn_to_hva(vcpu->kvm, gfn);
1939                 if (kvm_is_error_hva(addr))
1940                         return 1;
1941                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1942                         return 1;
1943                 vcpu->arch.hv_vapic = data;
1944                 mark_page_dirty(vcpu->kvm, gfn);
1945                 break;
1946         }
1947         case HV_X64_MSR_EOI:
1948                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1949         case HV_X64_MSR_ICR:
1950                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1951         case HV_X64_MSR_TPR:
1952                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1953         default:
1954                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1955                             "data 0x%llx\n", msr, data);
1956                 return 1;
1957         }
1958
1959         return 0;
1960 }
1961
1962 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1963 {
1964         gpa_t gpa = data & ~0x3f;
1965
1966         /* Bits 2:5 are reserved, Should be zero */
1967         if (data & 0x3c)
1968                 return 1;
1969
1970         vcpu->arch.apf.msr_val = data;
1971
1972         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1973                 kvm_clear_async_pf_completion_queue(vcpu);
1974                 kvm_async_pf_hash_reset(vcpu);
1975                 return 0;
1976         }
1977
1978         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1979                                         sizeof(u32)))
1980                 return 1;
1981
1982         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1983         kvm_async_pf_wakeup_all(vcpu);
1984         return 0;
1985 }
1986
1987 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1988 {
1989         vcpu->arch.pv_time_enabled = false;
1990 }
1991
1992 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1993 {
1994         u64 delta;
1995
1996         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1997                 return;
1998
1999         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2000         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2001         vcpu->arch.st.accum_steal = delta;
2002 }
2003
2004 static void record_steal_time(struct kvm_vcpu *vcpu)
2005 {
2006         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2007                 return;
2008
2009         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2010                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2011                 return;
2012
2013         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2014         vcpu->arch.st.steal.version += 2;
2015         vcpu->arch.st.accum_steal = 0;
2016
2017         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2018                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2019 }
2020
2021 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2022 {
2023         bool pr = false;
2024         u32 msr = msr_info->index;
2025         u64 data = msr_info->data;
2026
2027         switch (msr) {
2028         case MSR_AMD64_NB_CFG:
2029         case MSR_IA32_UCODE_REV:
2030         case MSR_IA32_UCODE_WRITE:
2031         case MSR_VM_HSAVE_PA:
2032         case MSR_AMD64_PATCH_LOADER:
2033         case MSR_AMD64_BU_CFG2:
2034                 break;
2035
2036         case MSR_EFER:
2037                 return set_efer(vcpu, data);
2038         case MSR_K7_HWCR:
2039                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2040                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2041                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2042                 if (data != 0) {
2043                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2044                                     data);
2045                         return 1;
2046                 }
2047                 break;
2048         case MSR_FAM10H_MMIO_CONF_BASE:
2049                 if (data != 0) {
2050                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2051                                     "0x%llx\n", data);
2052                         return 1;
2053                 }
2054                 break;
2055         case MSR_IA32_DEBUGCTLMSR:
2056                 if (!data) {
2057                         /* We support the non-activated case already */
2058                         break;
2059                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2060                         /* Values other than LBR and BTF are vendor-specific,
2061                            thus reserved and should throw a #GP */
2062                         return 1;
2063                 }
2064                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2065                             __func__, data);
2066                 break;
2067         case 0x200 ... 0x2ff:
2068                 return set_msr_mtrr(vcpu, msr, data);
2069         case MSR_IA32_APICBASE:
2070                 return kvm_set_apic_base(vcpu, msr_info);
2071         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2072                 return kvm_x2apic_msr_write(vcpu, msr, data);
2073         case MSR_IA32_TSCDEADLINE:
2074                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2075                 break;
2076         case MSR_IA32_TSC_ADJUST:
2077                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2078                         if (!msr_info->host_initiated) {
2079                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2080                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2081                         }
2082                         vcpu->arch.ia32_tsc_adjust_msr = data;
2083                 }
2084                 break;
2085         case MSR_IA32_MISC_ENABLE:
2086                 vcpu->arch.ia32_misc_enable_msr = data;
2087                 break;
2088         case MSR_KVM_WALL_CLOCK_NEW:
2089         case MSR_KVM_WALL_CLOCK:
2090                 vcpu->kvm->arch.wall_clock = data;
2091                 kvm_write_wall_clock(vcpu->kvm, data);
2092                 break;
2093         case MSR_KVM_SYSTEM_TIME_NEW:
2094         case MSR_KVM_SYSTEM_TIME: {
2095                 u64 gpa_offset;
2096                 kvmclock_reset(vcpu);
2097
2098                 vcpu->arch.time = data;
2099                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2100
2101                 /* we verify if the enable bit is set... */
2102                 if (!(data & 1))
2103                         break;
2104
2105                 gpa_offset = data & ~(PAGE_MASK | 1);
2106
2107                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2108                      &vcpu->arch.pv_time, data & ~1ULL,
2109                      sizeof(struct pvclock_vcpu_time_info)))
2110                         vcpu->arch.pv_time_enabled = false;
2111                 else
2112                         vcpu->arch.pv_time_enabled = true;
2113
2114                 break;
2115         }
2116         case MSR_KVM_ASYNC_PF_EN:
2117                 if (kvm_pv_enable_async_pf(vcpu, data))
2118                         return 1;
2119                 break;
2120         case MSR_KVM_STEAL_TIME:
2121
2122                 if (unlikely(!sched_info_on()))
2123                         return 1;
2124
2125                 if (data & KVM_STEAL_RESERVED_MASK)
2126                         return 1;
2127
2128                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2129                                                 data & KVM_STEAL_VALID_BITS,
2130                                                 sizeof(struct kvm_steal_time)))
2131                         return 1;
2132
2133                 vcpu->arch.st.msr_val = data;
2134
2135                 if (!(data & KVM_MSR_ENABLED))
2136                         break;
2137
2138                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2139
2140                 preempt_disable();
2141                 accumulate_steal_time(vcpu);
2142                 preempt_enable();
2143
2144                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2145
2146                 break;
2147         case MSR_KVM_PV_EOI_EN:
2148                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2149                         return 1;
2150                 break;
2151
2152         case MSR_IA32_MCG_CTL:
2153         case MSR_IA32_MCG_STATUS:
2154         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2155                 return set_msr_mce(vcpu, msr, data);
2156
2157         /* Performance counters are not protected by a CPUID bit,
2158          * so we should check all of them in the generic path for the sake of
2159          * cross vendor migration.
2160          * Writing a zero into the event select MSRs disables them,
2161          * which we perfectly emulate ;-). Any other value should be at least
2162          * reported, some guests depend on them.
2163          */
2164         case MSR_K7_EVNTSEL0:
2165         case MSR_K7_EVNTSEL1:
2166         case MSR_K7_EVNTSEL2:
2167         case MSR_K7_EVNTSEL3:
2168                 if (data != 0)
2169                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2170                                     "0x%x data 0x%llx\n", msr, data);
2171                 break;
2172         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2173          * so we ignore writes to make it happy.
2174          */
2175         case MSR_K7_PERFCTR0:
2176         case MSR_K7_PERFCTR1:
2177         case MSR_K7_PERFCTR2:
2178         case MSR_K7_PERFCTR3:
2179                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2180                             "0x%x data 0x%llx\n", msr, data);
2181                 break;
2182         case MSR_P6_PERFCTR0:
2183         case MSR_P6_PERFCTR1:
2184                 pr = true;
2185         case MSR_P6_EVNTSEL0:
2186         case MSR_P6_EVNTSEL1:
2187                 if (kvm_pmu_msr(vcpu, msr))
2188                         return kvm_pmu_set_msr(vcpu, msr_info);
2189
2190                 if (pr || data != 0)
2191                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2192                                     "0x%x data 0x%llx\n", msr, data);
2193                 break;
2194         case MSR_K7_CLK_CTL:
2195                 /*
2196                  * Ignore all writes to this no longer documented MSR.
2197                  * Writes are only relevant for old K7 processors,
2198                  * all pre-dating SVM, but a recommended workaround from
2199                  * AMD for these chips. It is possible to specify the
2200                  * affected processor models on the command line, hence
2201                  * the need to ignore the workaround.
2202                  */
2203                 break;
2204         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2205                 if (kvm_hv_msr_partition_wide(msr)) {
2206                         int r;
2207                         mutex_lock(&vcpu->kvm->lock);
2208                         r = set_msr_hyperv_pw(vcpu, msr, data);
2209                         mutex_unlock(&vcpu->kvm->lock);
2210                         return r;
2211                 } else
2212                         return set_msr_hyperv(vcpu, msr, data);
2213                 break;
2214         case MSR_IA32_BBL_CR_CTL3:
2215                 /* Drop writes to this legacy MSR -- see rdmsr
2216                  * counterpart for further detail.
2217                  */
2218                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2219                 break;
2220         case MSR_AMD64_OSVW_ID_LENGTH:
2221                 if (!guest_cpuid_has_osvw(vcpu))
2222                         return 1;
2223                 vcpu->arch.osvw.length = data;
2224                 break;
2225         case MSR_AMD64_OSVW_STATUS:
2226                 if (!guest_cpuid_has_osvw(vcpu))
2227                         return 1;
2228                 vcpu->arch.osvw.status = data;
2229                 break;
2230         default:
2231                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2232                         return xen_hvm_config(vcpu, data);
2233                 if (kvm_pmu_msr(vcpu, msr))
2234                         return kvm_pmu_set_msr(vcpu, msr_info);
2235                 if (!ignore_msrs) {
2236                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2237                                     msr, data);
2238                         return 1;
2239                 } else {
2240                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2241                                     msr, data);
2242                         break;
2243                 }
2244         }
2245         return 0;
2246 }
2247 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2248
2249
2250 /*
2251  * Reads an msr value (of 'msr_index') into 'pdata'.
2252  * Returns 0 on success, non-0 otherwise.
2253  * Assumes vcpu_load() was already called.
2254  */
2255 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2256 {
2257         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2258 }
2259
2260 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2261 {
2262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2263
2264         if (!msr_mtrr_valid(msr))
2265                 return 1;
2266
2267         if (msr == MSR_MTRRdefType)
2268                 *pdata = vcpu->arch.mtrr_state.def_type +
2269                          (vcpu->arch.mtrr_state.enabled << 10);
2270         else if (msr == MSR_MTRRfix64K_00000)
2271                 *pdata = p[0];
2272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2273                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2275                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2276         else if (msr == MSR_IA32_CR_PAT)
2277                 *pdata = vcpu->arch.pat;
2278         else {  /* Variable MTRRs */
2279                 int idx, is_mtrr_mask;
2280                 u64 *pt;
2281
2282                 idx = (msr - 0x200) / 2;
2283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2284                 if (!is_mtrr_mask)
2285                         pt =
2286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2287                 else
2288                         pt =
2289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2290                 *pdata = *pt;
2291         }
2292
2293         return 0;
2294 }
2295
2296 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2297 {
2298         u64 data;
2299         u64 mcg_cap = vcpu->arch.mcg_cap;
2300         unsigned bank_num = mcg_cap & 0xff;
2301
2302         switch (msr) {
2303         case MSR_IA32_P5_MC_ADDR:
2304         case MSR_IA32_P5_MC_TYPE:
2305                 data = 0;
2306                 break;
2307         case MSR_IA32_MCG_CAP:
2308                 data = vcpu->arch.mcg_cap;
2309                 break;
2310         case MSR_IA32_MCG_CTL:
2311                 if (!(mcg_cap & MCG_CTL_P))
2312                         return 1;
2313                 data = vcpu->arch.mcg_ctl;
2314                 break;
2315         case MSR_IA32_MCG_STATUS:
2316                 data = vcpu->arch.mcg_status;
2317                 break;
2318         default:
2319                 if (msr >= MSR_IA32_MC0_CTL &&
2320                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2321                         u32 offset = msr - MSR_IA32_MC0_CTL;
2322                         data = vcpu->arch.mce_banks[offset];
2323                         break;
2324                 }
2325                 return 1;
2326         }
2327         *pdata = data;
2328         return 0;
2329 }
2330
2331 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2332 {
2333         u64 data = 0;
2334         struct kvm *kvm = vcpu->kvm;
2335
2336         switch (msr) {
2337         case HV_X64_MSR_GUEST_OS_ID:
2338                 data = kvm->arch.hv_guest_os_id;
2339                 break;
2340         case HV_X64_MSR_HYPERCALL:
2341                 data = kvm->arch.hv_hypercall;
2342                 break;
2343         case HV_X64_MSR_TIME_REF_COUNT: {
2344                 data =
2345                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2346                 break;
2347         }
2348         case HV_X64_MSR_REFERENCE_TSC:
2349                 data = kvm->arch.hv_tsc_page;
2350                 break;
2351         default:
2352                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2353                 return 1;
2354         }
2355
2356         *pdata = data;
2357         return 0;
2358 }
2359
2360 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2361 {
2362         u64 data = 0;
2363
2364         switch (msr) {
2365         case HV_X64_MSR_VP_INDEX: {
2366                 int r;
2367                 struct kvm_vcpu *v;
2368                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2369                         if (v == vcpu) {
2370                                 data = r;
2371                                 break;
2372                         }
2373                 }
2374                 break;
2375         }
2376         case HV_X64_MSR_EOI:
2377                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2378         case HV_X64_MSR_ICR:
2379                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2380         case HV_X64_MSR_TPR:
2381                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2382         case HV_X64_MSR_APIC_ASSIST_PAGE:
2383                 data = vcpu->arch.hv_vapic;
2384                 break;
2385         default:
2386                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2387                 return 1;
2388         }
2389         *pdata = data;
2390         return 0;
2391 }
2392
2393 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2394 {
2395         u64 data;
2396
2397         switch (msr) {
2398         case MSR_IA32_PLATFORM_ID:
2399         case MSR_IA32_EBL_CR_POWERON:
2400         case MSR_IA32_DEBUGCTLMSR:
2401         case MSR_IA32_LASTBRANCHFROMIP:
2402         case MSR_IA32_LASTBRANCHTOIP:
2403         case MSR_IA32_LASTINTFROMIP:
2404         case MSR_IA32_LASTINTTOIP:
2405         case MSR_K8_SYSCFG:
2406         case MSR_K7_HWCR:
2407         case MSR_VM_HSAVE_PA:
2408         case MSR_K7_EVNTSEL0:
2409         case MSR_K7_PERFCTR0:
2410         case MSR_K8_INT_PENDING_MSG:
2411         case MSR_AMD64_NB_CFG:
2412         case MSR_FAM10H_MMIO_CONF_BASE:
2413         case MSR_AMD64_BU_CFG2:
2414                 data = 0;
2415                 break;
2416         case MSR_P6_PERFCTR0:
2417         case MSR_P6_PERFCTR1:
2418         case MSR_P6_EVNTSEL0:
2419         case MSR_P6_EVNTSEL1:
2420                 if (kvm_pmu_msr(vcpu, msr))
2421                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2422                 data = 0;
2423                 break;
2424         case MSR_IA32_UCODE_REV:
2425                 data = 0x100000000ULL;
2426                 break;
2427         case MSR_MTRRcap:
2428                 data = 0x500 | KVM_NR_VAR_MTRR;
2429                 break;
2430         case 0x200 ... 0x2ff:
2431                 return get_msr_mtrr(vcpu, msr, pdata);
2432         case 0xcd: /* fsb frequency */
2433                 data = 3;
2434                 break;
2435                 /*
2436                  * MSR_EBC_FREQUENCY_ID
2437                  * Conservative value valid for even the basic CPU models.
2438                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2439                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2440                  * and 266MHz for model 3, or 4. Set Core Clock
2441                  * Frequency to System Bus Frequency Ratio to 1 (bits
2442                  * 31:24) even though these are only valid for CPU
2443                  * models > 2, however guests may end up dividing or
2444                  * multiplying by zero otherwise.
2445                  */
2446         case MSR_EBC_FREQUENCY_ID:
2447                 data = 1 << 24;
2448                 break;
2449         case MSR_IA32_APICBASE:
2450                 data = kvm_get_apic_base(vcpu);
2451                 break;
2452         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2453                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2454                 break;
2455         case MSR_IA32_TSCDEADLINE:
2456                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2457                 break;
2458         case MSR_IA32_TSC_ADJUST:
2459                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2460                 break;
2461         case MSR_IA32_MISC_ENABLE:
2462                 data = vcpu->arch.ia32_misc_enable_msr;
2463                 break;
2464         case MSR_IA32_PERF_STATUS:
2465                 /* TSC increment by tick */
2466                 data = 1000ULL;
2467                 /* CPU multiplier */
2468                 data |= (((uint64_t)4ULL) << 40);
2469                 break;
2470         case MSR_EFER:
2471                 data = vcpu->arch.efer;
2472                 break;
2473         case MSR_KVM_WALL_CLOCK:
2474         case MSR_KVM_WALL_CLOCK_NEW:
2475                 data = vcpu->kvm->arch.wall_clock;
2476                 break;
2477         case MSR_KVM_SYSTEM_TIME:
2478         case MSR_KVM_SYSTEM_TIME_NEW:
2479                 data = vcpu->arch.time;
2480                 break;
2481         case MSR_KVM_ASYNC_PF_EN:
2482                 data = vcpu->arch.apf.msr_val;
2483                 break;
2484         case MSR_KVM_STEAL_TIME:
2485                 data = vcpu->arch.st.msr_val;
2486                 break;
2487         case MSR_KVM_PV_EOI_EN:
2488                 data = vcpu->arch.pv_eoi.msr_val;
2489                 break;
2490         case MSR_IA32_P5_MC_ADDR:
2491         case MSR_IA32_P5_MC_TYPE:
2492         case MSR_IA32_MCG_CAP:
2493         case MSR_IA32_MCG_CTL:
2494         case MSR_IA32_MCG_STATUS:
2495         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2496                 return get_msr_mce(vcpu, msr, pdata);
2497         case MSR_K7_CLK_CTL:
2498                 /*
2499                  * Provide expected ramp-up count for K7. All other
2500                  * are set to zero, indicating minimum divisors for
2501                  * every field.
2502                  *
2503                  * This prevents guest kernels on AMD host with CPU
2504                  * type 6, model 8 and higher from exploding due to
2505                  * the rdmsr failing.
2506                  */
2507                 data = 0x20000000;
2508                 break;
2509         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2510                 if (kvm_hv_msr_partition_wide(msr)) {
2511                         int r;
2512                         mutex_lock(&vcpu->kvm->lock);
2513                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2514                         mutex_unlock(&vcpu->kvm->lock);
2515                         return r;
2516                 } else
2517                         return get_msr_hyperv(vcpu, msr, pdata);
2518                 break;
2519         case MSR_IA32_BBL_CR_CTL3:
2520                 /* This legacy MSR exists but isn't fully documented in current
2521                  * silicon.  It is however accessed by winxp in very narrow
2522                  * scenarios where it sets bit #19, itself documented as
2523                  * a "reserved" bit.  Best effort attempt to source coherent
2524                  * read data here should the balance of the register be
2525                  * interpreted by the guest:
2526                  *
2527                  * L2 cache control register 3: 64GB range, 256KB size,
2528                  * enabled, latency 0x1, configured
2529                  */
2530                 data = 0xbe702111;
2531                 break;
2532         case MSR_AMD64_OSVW_ID_LENGTH:
2533                 if (!guest_cpuid_has_osvw(vcpu))
2534                         return 1;
2535                 data = vcpu->arch.osvw.length;
2536                 break;
2537         case MSR_AMD64_OSVW_STATUS:
2538                 if (!guest_cpuid_has_osvw(vcpu))
2539                         return 1;
2540                 data = vcpu->arch.osvw.status;
2541                 break;
2542         default:
2543                 if (kvm_pmu_msr(vcpu, msr))
2544                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2545                 if (!ignore_msrs) {
2546                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2547                         return 1;
2548                 } else {
2549                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2550                         data = 0;
2551                 }
2552                 break;
2553         }
2554         *pdata = data;
2555         return 0;
2556 }
2557 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2558
2559 /*
2560  * Read or write a bunch of msrs. All parameters are kernel addresses.
2561  *
2562  * @return number of msrs set successfully.
2563  */
2564 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2565                     struct kvm_msr_entry *entries,
2566                     int (*do_msr)(struct kvm_vcpu *vcpu,
2567                                   unsigned index, u64 *data))
2568 {
2569         int i, idx;
2570
2571         idx = srcu_read_lock(&vcpu->kvm->srcu);
2572         for (i = 0; i < msrs->nmsrs; ++i)
2573                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2574                         break;
2575         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2576
2577         return i;
2578 }
2579
2580 /*
2581  * Read or write a bunch of msrs. Parameters are user addresses.
2582  *
2583  * @return number of msrs set successfully.
2584  */
2585 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2586                   int (*do_msr)(struct kvm_vcpu *vcpu,
2587                                 unsigned index, u64 *data),
2588                   int writeback)
2589 {
2590         struct kvm_msrs msrs;
2591         struct kvm_msr_entry *entries;
2592         int r, n;
2593         unsigned size;
2594
2595         r = -EFAULT;
2596         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2597                 goto out;
2598
2599         r = -E2BIG;
2600         if (msrs.nmsrs >= MAX_IO_MSRS)
2601                 goto out;
2602
2603         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2604         entries = memdup_user(user_msrs->entries, size);
2605         if (IS_ERR(entries)) {
2606                 r = PTR_ERR(entries);
2607                 goto out;
2608         }
2609
2610         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2611         if (r < 0)
2612                 goto out_free;
2613
2614         r = -EFAULT;
2615         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2616                 goto out_free;
2617
2618         r = n;
2619
2620 out_free:
2621         kfree(entries);
2622 out:
2623         return r;
2624 }
2625
2626 int kvm_dev_ioctl_check_extension(long ext)
2627 {
2628         int r;
2629
2630         switch (ext) {
2631         case KVM_CAP_IRQCHIP:
2632         case KVM_CAP_HLT:
2633         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2634         case KVM_CAP_SET_TSS_ADDR:
2635         case KVM_CAP_EXT_CPUID:
2636         case KVM_CAP_EXT_EMUL_CPUID:
2637         case KVM_CAP_CLOCKSOURCE:
2638         case KVM_CAP_PIT:
2639         case KVM_CAP_NOP_IO_DELAY:
2640         case KVM_CAP_MP_STATE:
2641         case KVM_CAP_SYNC_MMU:
2642         case KVM_CAP_USER_NMI:
2643         case KVM_CAP_REINJECT_CONTROL:
2644         case KVM_CAP_IRQ_INJECT_STATUS:
2645         case KVM_CAP_IRQFD:
2646         case KVM_CAP_IOEVENTFD:
2647         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2648         case KVM_CAP_PIT2:
2649         case KVM_CAP_PIT_STATE2:
2650         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2651         case KVM_CAP_XEN_HVM:
2652         case KVM_CAP_ADJUST_CLOCK:
2653         case KVM_CAP_VCPU_EVENTS:
2654         case KVM_CAP_HYPERV:
2655         case KVM_CAP_HYPERV_VAPIC:
2656         case KVM_CAP_HYPERV_SPIN:
2657         case KVM_CAP_PCI_SEGMENT:
2658         case KVM_CAP_DEBUGREGS:
2659         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2660         case KVM_CAP_XSAVE:
2661         case KVM_CAP_ASYNC_PF:
2662         case KVM_CAP_GET_TSC_KHZ:
2663         case KVM_CAP_KVMCLOCK_CTRL:
2664         case KVM_CAP_READONLY_MEM:
2665         case KVM_CAP_HYPERV_TIME:
2666         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2667 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2668         case KVM_CAP_ASSIGN_DEV_IRQ:
2669         case KVM_CAP_PCI_2_3:
2670 #endif
2671                 r = 1;
2672                 break;
2673         case KVM_CAP_COALESCED_MMIO:
2674                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2675                 break;
2676         case KVM_CAP_VAPIC:
2677                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2678                 break;
2679         case KVM_CAP_NR_VCPUS:
2680                 r = KVM_SOFT_MAX_VCPUS;
2681                 break;
2682         case KVM_CAP_MAX_VCPUS:
2683                 r = KVM_MAX_VCPUS;
2684                 break;
2685         case KVM_CAP_NR_MEMSLOTS:
2686                 r = KVM_USER_MEM_SLOTS;
2687                 break;
2688         case KVM_CAP_PV_MMU:    /* obsolete */
2689                 r = 0;
2690                 break;
2691 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2692         case KVM_CAP_IOMMU:
2693                 r = iommu_present(&pci_bus_type);
2694                 break;
2695 #endif
2696         case KVM_CAP_MCE:
2697                 r = KVM_MAX_MCE_BANKS;
2698                 break;
2699         case KVM_CAP_XCRS:
2700                 r = cpu_has_xsave;
2701                 break;
2702         case KVM_CAP_TSC_CONTROL:
2703                 r = kvm_has_tsc_control;
2704                 break;
2705         case KVM_CAP_TSC_DEADLINE_TIMER:
2706                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2707                 break;
2708         default:
2709                 r = 0;
2710                 break;
2711         }
2712         return r;
2713
2714 }
2715
2716 long kvm_arch_dev_ioctl(struct file *filp,
2717                         unsigned int ioctl, unsigned long arg)
2718 {
2719         void __user *argp = (void __user *)arg;
2720         long r;
2721
2722         switch (ioctl) {
2723         case KVM_GET_MSR_INDEX_LIST: {
2724                 struct kvm_msr_list __user *user_msr_list = argp;
2725                 struct kvm_msr_list msr_list;
2726                 unsigned n;
2727
2728                 r = -EFAULT;
2729                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2730                         goto out;
2731                 n = msr_list.nmsrs;
2732                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2733                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2734                         goto out;
2735                 r = -E2BIG;
2736                 if (n < msr_list.nmsrs)
2737                         goto out;
2738                 r = -EFAULT;
2739                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2740                                  num_msrs_to_save * sizeof(u32)))
2741                         goto out;
2742                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2743                                  &emulated_msrs,
2744                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2745                         goto out;
2746                 r = 0;
2747                 break;
2748         }
2749         case KVM_GET_SUPPORTED_CPUID:
2750         case KVM_GET_EMULATED_CPUID: {
2751                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2752                 struct kvm_cpuid2 cpuid;
2753
2754                 r = -EFAULT;
2755                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2756                         goto out;
2757
2758                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2759                                             ioctl);
2760                 if (r)
2761                         goto out;
2762
2763                 r = -EFAULT;
2764                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2765                         goto out;
2766                 r = 0;
2767                 break;
2768         }
2769         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2770                 u64 mce_cap;
2771
2772                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2773                 r = -EFAULT;
2774                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2775                         goto out;
2776                 r = 0;
2777                 break;
2778         }
2779         default:
2780                 r = -EINVAL;
2781         }
2782 out:
2783         return r;
2784 }
2785
2786 static void wbinvd_ipi(void *garbage)
2787 {
2788         wbinvd();
2789 }
2790
2791 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2792 {
2793         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2794 }
2795
2796 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2797 {
2798         /* Address WBINVD may be executed by guest */
2799         if (need_emulate_wbinvd(vcpu)) {
2800                 if (kvm_x86_ops->has_wbinvd_exit())
2801                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2802                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2803                         smp_call_function_single(vcpu->cpu,
2804                                         wbinvd_ipi, NULL, 1);
2805         }
2806
2807         kvm_x86_ops->vcpu_load(vcpu, cpu);
2808
2809         /* Apply any externally detected TSC adjustments (due to suspend) */
2810         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2811                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2812                 vcpu->arch.tsc_offset_adjustment = 0;
2813                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2814         }
2815
2816         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2817                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2818                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2819                 if (tsc_delta < 0)
2820                         mark_tsc_unstable("KVM discovered backwards TSC");
2821                 if (check_tsc_unstable()) {
2822                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2823                                                 vcpu->arch.last_guest_tsc);
2824                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2825                         vcpu->arch.tsc_catchup = 1;
2826                 }
2827                 /*
2828                  * On a host with synchronized TSC, there is no need to update
2829                  * kvmclock on vcpu->cpu migration
2830                  */
2831                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2832                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2833                 if (vcpu->cpu != cpu)
2834                         kvm_migrate_timers(vcpu);
2835                 vcpu->cpu = cpu;
2836         }
2837
2838         accumulate_steal_time(vcpu);
2839         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2840 }
2841
2842 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2843 {
2844         kvm_x86_ops->vcpu_put(vcpu);
2845         kvm_put_guest_fpu(vcpu);
2846         vcpu->arch.last_host_tsc = native_read_tsc();
2847 }
2848
2849 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2850                                     struct kvm_lapic_state *s)
2851 {
2852         kvm_x86_ops->sync_pir_to_irr(vcpu);
2853         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2854
2855         return 0;
2856 }
2857
2858 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2859                                     struct kvm_lapic_state *s)
2860 {
2861         kvm_apic_post_state_restore(vcpu, s);
2862         update_cr8_intercept(vcpu);
2863
2864         return 0;
2865 }
2866
2867 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2868                                     struct kvm_interrupt *irq)
2869 {
2870         if (irq->irq >= KVM_NR_INTERRUPTS)
2871                 return -EINVAL;
2872         if (irqchip_in_kernel(vcpu->kvm))
2873                 return -ENXIO;
2874
2875         kvm_queue_interrupt(vcpu, irq->irq, false);
2876         kvm_make_request(KVM_REQ_EVENT, vcpu);
2877
2878         return 0;
2879 }
2880
2881 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2882 {
2883         kvm_inject_nmi(vcpu);
2884
2885         return 0;
2886 }
2887
2888 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2889                                            struct kvm_tpr_access_ctl *tac)
2890 {
2891         if (tac->flags)
2892                 return -EINVAL;
2893         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2894         return 0;
2895 }
2896
2897 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2898                                         u64 mcg_cap)
2899 {
2900         int r;
2901         unsigned bank_num = mcg_cap & 0xff, bank;
2902
2903         r = -EINVAL;
2904         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2905                 goto out;
2906         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2907                 goto out;
2908         r = 0;
2909         vcpu->arch.mcg_cap = mcg_cap;
2910         /* Init IA32_MCG_CTL to all 1s */
2911         if (mcg_cap & MCG_CTL_P)
2912                 vcpu->arch.mcg_ctl = ~(u64)0;
2913         /* Init IA32_MCi_CTL to all 1s */
2914         for (bank = 0; bank < bank_num; bank++)
2915                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2916 out:
2917         return r;
2918 }
2919
2920 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2921                                       struct kvm_x86_mce *mce)
2922 {
2923         u64 mcg_cap = vcpu->arch.mcg_cap;
2924         unsigned bank_num = mcg_cap & 0xff;
2925         u64 *banks = vcpu->arch.mce_banks;
2926
2927         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2928                 return -EINVAL;
2929         /*
2930          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2931          * reporting is disabled
2932          */
2933         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2934             vcpu->arch.mcg_ctl != ~(u64)0)
2935                 return 0;
2936         banks += 4 * mce->bank;
2937         /*
2938          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2939          * reporting is disabled for the bank
2940          */
2941         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2942                 return 0;
2943         if (mce->status & MCI_STATUS_UC) {
2944                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2945                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2946                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2947                         return 0;
2948                 }
2949                 if (banks[1] & MCI_STATUS_VAL)
2950                         mce->status |= MCI_STATUS_OVER;
2951                 banks[2] = mce->addr;
2952                 banks[3] = mce->misc;
2953                 vcpu->arch.mcg_status = mce->mcg_status;
2954                 banks[1] = mce->status;
2955                 kvm_queue_exception(vcpu, MC_VECTOR);
2956         } else if (!(banks[1] & MCI_STATUS_VAL)
2957                    || !(banks[1] & MCI_STATUS_UC)) {
2958                 if (banks[1] & MCI_STATUS_VAL)
2959                         mce->status |= MCI_STATUS_OVER;
2960                 banks[2] = mce->addr;
2961                 banks[3] = mce->misc;
2962                 banks[1] = mce->status;
2963         } else
2964                 banks[1] |= MCI_STATUS_OVER;
2965         return 0;
2966 }
2967
2968 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2969                                                struct kvm_vcpu_events *events)
2970 {
2971         process_nmi(vcpu);
2972         events->exception.injected =
2973                 vcpu->arch.exception.pending &&
2974                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2975         events->exception.nr = vcpu->arch.exception.nr;
2976         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2977         events->exception.pad = 0;
2978         events->exception.error_code = vcpu->arch.exception.error_code;
2979
2980         events->interrupt.injected =
2981                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2982         events->interrupt.nr = vcpu->arch.interrupt.nr;
2983         events->interrupt.soft = 0;
2984         events->interrupt.shadow =
2985                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2986                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2987
2988         events->nmi.injected = vcpu->arch.nmi_injected;
2989         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2990         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2991         events->nmi.pad = 0;
2992
2993         events->sipi_vector = 0; /* never valid when reporting to user space */
2994
2995         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2996                          | KVM_VCPUEVENT_VALID_SHADOW);
2997         memset(&events->reserved, 0, sizeof(events->reserved));
2998 }
2999
3000 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3001                                               struct kvm_vcpu_events *events)
3002 {
3003         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3004                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3005                               | KVM_VCPUEVENT_VALID_SHADOW))
3006                 return -EINVAL;
3007
3008         process_nmi(vcpu);
3009         vcpu->arch.exception.pending = events->exception.injected;
3010         vcpu->arch.exception.nr = events->exception.nr;
3011         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3012         vcpu->arch.exception.error_code = events->exception.error_code;
3013
3014         vcpu->arch.interrupt.pending = events->interrupt.injected;
3015         vcpu->arch.interrupt.nr = events->interrupt.nr;
3016         vcpu->arch.interrupt.soft = events->interrupt.soft;
3017         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3018                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3019                                                   events->interrupt.shadow);
3020
3021         vcpu->arch.nmi_injected = events->nmi.injected;
3022         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3023                 vcpu->arch.nmi_pending = events->nmi.pending;
3024         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3025
3026         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3027             kvm_vcpu_has_lapic(vcpu))
3028                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3029
3030         kvm_make_request(KVM_REQ_EVENT, vcpu);
3031
3032         return 0;
3033 }
3034
3035 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3036                                              struct kvm_debugregs *dbgregs)
3037 {
3038         unsigned long val;
3039
3040         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3041         _kvm_get_dr(vcpu, 6, &val);
3042         dbgregs->dr6 = val;
3043         dbgregs->dr7 = vcpu->arch.dr7;
3044         dbgregs->flags = 0;
3045         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3046 }
3047
3048 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3049                                             struct kvm_debugregs *dbgregs)
3050 {
3051         if (dbgregs->flags)
3052                 return -EINVAL;
3053
3054         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3055         vcpu->arch.dr6 = dbgregs->dr6;
3056         kvm_update_dr6(vcpu);
3057         vcpu->arch.dr7 = dbgregs->dr7;
3058         kvm_update_dr7(vcpu);
3059
3060         return 0;
3061 }
3062
3063 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3064                                          struct kvm_xsave *guest_xsave)
3065 {
3066         if (cpu_has_xsave) {
3067                 memcpy(guest_xsave->region,
3068                         &vcpu->arch.guest_fpu.state->xsave,
3069                         vcpu->arch.guest_xstate_size);
3070                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
3071                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
3072         } else {
3073                 memcpy(guest_xsave->region,
3074                         &vcpu->arch.guest_fpu.state->fxsave,
3075                         sizeof(struct i387_fxsave_struct));
3076                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3077                         XSTATE_FPSSE;
3078         }
3079 }
3080
3081 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3082                                         struct kvm_xsave *guest_xsave)
3083 {
3084         u64 xstate_bv =
3085                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3086
3087         if (cpu_has_xsave) {
3088                 /*
3089                  * Here we allow setting states that are not present in
3090                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3091                  * with old userspace.
3092                  */
3093                 if (xstate_bv & ~kvm_supported_xcr0())
3094                         return -EINVAL;
3095                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3096                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3097         } else {
3098                 if (xstate_bv & ~XSTATE_FPSSE)
3099                         return -EINVAL;
3100                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3101                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3102         }
3103         return 0;
3104 }
3105
3106 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3107                                         struct kvm_xcrs *guest_xcrs)
3108 {
3109         if (!cpu_has_xsave) {
3110                 guest_xcrs->nr_xcrs = 0;
3111                 return;
3112         }
3113
3114         guest_xcrs->nr_xcrs = 1;
3115         guest_xcrs->flags = 0;
3116         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3117         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3118 }
3119
3120 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3121                                        struct kvm_xcrs *guest_xcrs)
3122 {
3123         int i, r = 0;
3124
3125         if (!cpu_has_xsave)
3126                 return -EINVAL;
3127
3128         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3129                 return -EINVAL;
3130
3131         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3132                 /* Only support XCR0 currently */
3133                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3134                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3135                                 guest_xcrs->xcrs[i].value);
3136                         break;
3137                 }
3138         if (r)
3139                 r = -EINVAL;
3140         return r;
3141 }
3142
3143 /*
3144  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3145  * stopped by the hypervisor.  This function will be called from the host only.
3146  * EINVAL is returned when the host attempts to set the flag for a guest that
3147  * does not support pv clocks.
3148  */
3149 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3150 {
3151         if (!vcpu->arch.pv_time_enabled)
3152                 return -EINVAL;
3153         vcpu->arch.pvclock_set_guest_stopped_request = true;
3154         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3155         return 0;
3156 }
3157
3158 long kvm_arch_vcpu_ioctl(struct file *filp,
3159                          unsigned int ioctl, unsigned long arg)
3160 {
3161         struct kvm_vcpu *vcpu = filp->private_data;
3162         void __user *argp = (void __user *)arg;
3163         int r;
3164         union {
3165                 struct kvm_lapic_state *lapic;
3166                 struct kvm_xsave *xsave;
3167                 struct kvm_xcrs *xcrs;
3168                 void *buffer;
3169         } u;
3170
3171         u.buffer = NULL;
3172         switch (ioctl) {
3173         case KVM_GET_LAPIC: {
3174                 r = -EINVAL;
3175                 if (!vcpu->arch.apic)
3176                         goto out;
3177                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3178
3179                 r = -ENOMEM;
3180                 if (!u.lapic)
3181                         goto out;
3182                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3183                 if (r)
3184                         goto out;
3185                 r = -EFAULT;
3186                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3187                         goto out;
3188                 r = 0;
3189                 break;
3190         }
3191         case KVM_SET_LAPIC: {
3192                 r = -EINVAL;
3193                 if (!vcpu->arch.apic)
3194                         goto out;
3195                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3196                 if (IS_ERR(u.lapic))
3197                         return PTR_ERR(u.lapic);
3198
3199                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3200                 break;
3201         }
3202         case KVM_INTERRUPT: {
3203                 struct kvm_interrupt irq;
3204
3205                 r = -EFAULT;
3206                 if (copy_from_user(&irq, argp, sizeof irq))
3207                         goto out;
3208                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3209                 break;
3210         }
3211         case KVM_NMI: {
3212                 r = kvm_vcpu_ioctl_nmi(vcpu);
3213                 break;
3214         }
3215         case KVM_SET_CPUID: {
3216                 struct kvm_cpuid __user *cpuid_arg = argp;
3217                 struct kvm_cpuid cpuid;
3218
3219                 r = -EFAULT;
3220                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3221                         goto out;
3222                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3223                 break;
3224         }
3225         case KVM_SET_CPUID2: {
3226                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3227                 struct kvm_cpuid2 cpuid;
3228
3229                 r = -EFAULT;
3230                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3231                         goto out;
3232                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3233                                               cpuid_arg->entries);
3234                 break;
3235         }
3236         case KVM_GET_CPUID2: {
3237                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3238                 struct kvm_cpuid2 cpuid;
3239
3240                 r = -EFAULT;
3241                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3242                         goto out;
3243                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3244                                               cpuid_arg->entries);
3245                 if (r)
3246                         goto out;
3247                 r = -EFAULT;
3248                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3249                         goto out;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_GET_MSRS:
3254                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3255                 break;
3256         case KVM_SET_MSRS:
3257                 r = msr_io(vcpu, argp, do_set_msr, 0);
3258                 break;
3259         case KVM_TPR_ACCESS_REPORTING: {
3260                 struct kvm_tpr_access_ctl tac;
3261
3262                 r = -EFAULT;
3263                 if (copy_from_user(&tac, argp, sizeof tac))
3264                         goto out;
3265                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3266                 if (r)
3267                         goto out;
3268                 r = -EFAULT;
3269                 if (copy_to_user(argp, &tac, sizeof tac))
3270                         goto out;
3271                 r = 0;
3272                 break;
3273         };
3274         case KVM_SET_VAPIC_ADDR: {
3275                 struct kvm_vapic_addr va;
3276
3277                 r = -EINVAL;
3278                 if (!irqchip_in_kernel(vcpu->kvm))
3279                         goto out;
3280                 r = -EFAULT;
3281                 if (copy_from_user(&va, argp, sizeof va))
3282                         goto out;
3283                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3284                 break;
3285         }
3286         case KVM_X86_SETUP_MCE: {
3287                 u64 mcg_cap;
3288
3289                 r = -EFAULT;
3290                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3291                         goto out;
3292                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3293                 break;
3294         }
3295         case KVM_X86_SET_MCE: {
3296                 struct kvm_x86_mce mce;
3297
3298                 r = -EFAULT;
3299                 if (copy_from_user(&mce, argp, sizeof mce))
3300                         goto out;
3301                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3302                 break;
3303         }
3304         case KVM_GET_VCPU_EVENTS: {
3305                 struct kvm_vcpu_events events;
3306
3307                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3308
3309                 r = -EFAULT;
3310                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3311                         break;
3312                 r = 0;
3313                 break;
3314         }
3315         case KVM_SET_VCPU_EVENTS: {
3316                 struct kvm_vcpu_events events;
3317
3318                 r = -EFAULT;
3319                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3320                         break;
3321
3322                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3323                 break;
3324         }
3325         case KVM_GET_DEBUGREGS: {
3326                 struct kvm_debugregs dbgregs;
3327
3328                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3329
3330                 r = -EFAULT;
3331                 if (copy_to_user(argp, &dbgregs,
3332                                  sizeof(struct kvm_debugregs)))
3333                         break;
3334                 r = 0;
3335                 break;
3336         }
3337         case KVM_SET_DEBUGREGS: {
3338                 struct kvm_debugregs dbgregs;
3339
3340                 r = -EFAULT;
3341                 if (copy_from_user(&dbgregs, argp,
3342                                    sizeof(struct kvm_debugregs)))
3343                         break;
3344
3345                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3346                 break;
3347         }
3348         case KVM_GET_XSAVE: {
3349                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3350                 r = -ENOMEM;
3351                 if (!u.xsave)
3352                         break;
3353
3354                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3355
3356                 r = -EFAULT;
3357                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3358                         break;
3359                 r = 0;
3360                 break;
3361         }
3362         case KVM_SET_XSAVE: {
3363                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3364                 if (IS_ERR(u.xsave))
3365                         return PTR_ERR(u.xsave);
3366
3367                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3368                 break;
3369         }
3370         case KVM_GET_XCRS: {
3371                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3372                 r = -ENOMEM;
3373                 if (!u.xcrs)
3374                         break;
3375
3376                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3377
3378                 r = -EFAULT;
3379                 if (copy_to_user(argp, u.xcrs,
3380                                  sizeof(struct kvm_xcrs)))
3381                         break;
3382                 r = 0;
3383                 break;
3384         }
3385         case KVM_SET_XCRS: {
3386                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3387                 if (IS_ERR(u.xcrs))
3388                         return PTR_ERR(u.xcrs);
3389
3390                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3391                 break;
3392         }
3393         case KVM_SET_TSC_KHZ: {
3394                 u32 user_tsc_khz;
3395
3396                 r = -EINVAL;
3397                 user_tsc_khz = (u32)arg;
3398
3399                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3400                         goto out;
3401
3402                 if (user_tsc_khz == 0)
3403                         user_tsc_khz = tsc_khz;
3404
3405                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3406
3407                 r = 0;
3408                 goto out;
3409         }
3410         case KVM_GET_TSC_KHZ: {
3411                 r = vcpu->arch.virtual_tsc_khz;
3412                 goto out;
3413         }
3414         case KVM_KVMCLOCK_CTRL: {
3415                 r = kvm_set_guest_paused(vcpu);
3416                 goto out;
3417         }
3418         default:
3419                 r = -EINVAL;
3420         }
3421 out:
3422         kfree(u.buffer);
3423         return r;
3424 }
3425
3426 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3427 {
3428         return VM_FAULT_SIGBUS;
3429 }
3430
3431 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3432 {
3433         int ret;
3434
3435         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3436                 return -EINVAL;
3437         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3438         return ret;
3439 }
3440
3441 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3442                                               u64 ident_addr)
3443 {
3444         kvm->arch.ept_identity_map_addr = ident_addr;
3445         return 0;
3446 }
3447
3448 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3449                                           u32 kvm_nr_mmu_pages)
3450 {
3451         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3452                 return -EINVAL;
3453
3454         mutex_lock(&kvm->slots_lock);
3455
3456         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3457         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3458
3459         mutex_unlock(&kvm->slots_lock);
3460         return 0;
3461 }
3462
3463 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3464 {
3465         return kvm->arch.n_max_mmu_pages;
3466 }
3467
3468 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3469 {
3470         int r;
3471
3472         r = 0;
3473         switch (chip->chip_id) {
3474         case KVM_IRQCHIP_PIC_MASTER:
3475                 memcpy(&chip->chip.pic,
3476                         &pic_irqchip(kvm)->pics[0],
3477                         sizeof(struct kvm_pic_state));
3478                 break;
3479         case KVM_IRQCHIP_PIC_SLAVE:
3480                 memcpy(&chip->chip.pic,
3481                         &pic_irqchip(kvm)->pics[1],
3482                         sizeof(struct kvm_pic_state));
3483                 break;
3484         case KVM_IRQCHIP_IOAPIC:
3485                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3486                 break;
3487         default:
3488                 r = -EINVAL;
3489                 break;
3490         }
3491         return r;
3492 }
3493
3494 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3495 {
3496         int r;
3497
3498         r = 0;
3499         switch (chip->chip_id) {
3500         case KVM_IRQCHIP_PIC_MASTER:
3501                 spin_lock(&pic_irqchip(kvm)->lock);
3502                 memcpy(&pic_irqchip(kvm)->pics[0],
3503                         &chip->chip.pic,
3504                         sizeof(struct kvm_pic_state));
3505                 spin_unlock(&pic_irqchip(kvm)->lock);
3506                 break;
3507         case KVM_IRQCHIP_PIC_SLAVE:
3508                 spin_lock(&pic_irqchip(kvm)->lock);
3509                 memcpy(&pic_irqchip(kvm)->pics[1],
3510                         &chip->chip.pic,
3511                         sizeof(struct kvm_pic_state));
3512                 spin_unlock(&pic_irqchip(kvm)->lock);
3513                 break;
3514         case KVM_IRQCHIP_IOAPIC:
3515                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3516                 break;
3517         default:
3518                 r = -EINVAL;
3519                 break;
3520         }
3521         kvm_pic_update_irq(pic_irqchip(kvm));
3522         return r;
3523 }
3524
3525 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3526 {
3527         int r = 0;
3528
3529         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3530         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3531         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3532         return r;
3533 }
3534
3535 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3536 {
3537         int r = 0;
3538
3539         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3540         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3541         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3542         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3543         return r;
3544 }
3545
3546 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3547 {
3548         int r = 0;
3549
3550         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3551         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3552                 sizeof(ps->channels));
3553         ps->flags = kvm->arch.vpit->pit_state.flags;
3554         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3555         memset(&ps->reserved, 0, sizeof(ps->reserved));
3556         return r;
3557 }
3558
3559 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3560 {
3561         int r = 0, start = 0;
3562         u32 prev_legacy, cur_legacy;
3563         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3564         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3565         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3566         if (!prev_legacy && cur_legacy)
3567                 start = 1;
3568         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3569                sizeof(kvm->arch.vpit->pit_state.channels));
3570         kvm->arch.vpit->pit_state.flags = ps->flags;
3571         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3572         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3573         return r;
3574 }
3575
3576 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3577                                  struct kvm_reinject_control *control)
3578 {
3579         if (!kvm->arch.vpit)
3580                 return -ENXIO;
3581         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3582         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3583         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3584         return 0;
3585 }
3586
3587 /**
3588  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3589  * @kvm: kvm instance
3590  * @log: slot id and address to which we copy the log
3591  *
3592  * We need to keep it in mind that VCPU threads can write to the bitmap
3593  * concurrently.  So, to avoid losing data, we keep the following order for
3594  * each bit:
3595  *
3596  *   1. Take a snapshot of the bit and clear it if needed.
3597  *   2. Write protect the corresponding page.
3598  *   3. Flush TLB's if needed.
3599  *   4. Copy the snapshot to the userspace.
3600  *
3601  * Between 2 and 3, the guest may write to the page using the remaining TLB
3602  * entry.  This is not a problem because the page will be reported dirty at
3603  * step 4 using the snapshot taken before and step 3 ensures that successive
3604  * writes will be logged for the next call.
3605  */
3606 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3607 {
3608         int r;
3609         struct kvm_memory_slot *memslot;
3610         unsigned long n, i;
3611         unsigned long *dirty_bitmap;
3612         unsigned long *dirty_bitmap_buffer;
3613         bool is_dirty = false;
3614
3615         mutex_lock(&kvm->slots_lock);
3616
3617         r = -EINVAL;
3618         if (log->slot >= KVM_USER_MEM_SLOTS)
3619                 goto out;
3620
3621         memslot = id_to_memslot(kvm->memslots, log->slot);
3622
3623         dirty_bitmap = memslot->dirty_bitmap;
3624         r = -ENOENT;
3625         if (!dirty_bitmap)
3626                 goto out;
3627
3628         n = kvm_dirty_bitmap_bytes(memslot);
3629
3630         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3631         memset(dirty_bitmap_buffer, 0, n);
3632
3633         spin_lock(&kvm->mmu_lock);
3634
3635         for (i = 0; i < n / sizeof(long); i++) {
3636                 unsigned long mask;
3637                 gfn_t offset;
3638
3639                 if (!dirty_bitmap[i])
3640                         continue;
3641
3642                 is_dirty = true;
3643
3644                 mask = xchg(&dirty_bitmap[i], 0);
3645                 dirty_bitmap_buffer[i] = mask;
3646
3647                 offset = i * BITS_PER_LONG;
3648                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3649         }
3650         if (is_dirty)
3651                 kvm_flush_remote_tlbs(kvm);
3652
3653         spin_unlock(&kvm->mmu_lock);
3654
3655         r = -EFAULT;
3656         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3657                 goto out;
3658
3659         r = 0;
3660 out:
3661         mutex_unlock(&kvm->slots_lock);
3662         return r;
3663 }
3664
3665 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3666                         bool line_status)
3667 {
3668         if (!irqchip_in_kernel(kvm))
3669                 return -ENXIO;
3670
3671         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3672                                         irq_event->irq, irq_event->level,
3673                                         line_status);
3674         return 0;
3675 }
3676
3677 long kvm_arch_vm_ioctl(struct file *filp,
3678                        unsigned int ioctl, unsigned long arg)
3679 {
3680         struct kvm *kvm = filp->private_data;
3681         void __user *argp = (void __user *)arg;
3682         int r = -ENOTTY;
3683         /*
3684          * This union makes it completely explicit to gcc-3.x
3685          * that these two variables' stack usage should be
3686          * combined, not added together.
3687          */
3688         union {
3689                 struct kvm_pit_state ps;
3690                 struct kvm_pit_state2 ps2;
3691                 struct kvm_pit_config pit_config;
3692         } u;
3693
3694         switch (ioctl) {
3695         case KVM_SET_TSS_ADDR:
3696                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3697                 break;
3698         case KVM_SET_IDENTITY_MAP_ADDR: {
3699                 u64 ident_addr;
3700
3701                 r = -EFAULT;
3702                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3703                         goto out;
3704                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3705                 break;
3706         }
3707         case KVM_SET_NR_MMU_PAGES:
3708                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3709                 break;
3710         case KVM_GET_NR_MMU_PAGES:
3711                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3712                 break;
3713         case KVM_CREATE_IRQCHIP: {
3714                 struct kvm_pic *vpic;
3715
3716                 mutex_lock(&kvm->lock);
3717                 r = -EEXIST;
3718                 if (kvm->arch.vpic)
3719                         goto create_irqchip_unlock;
3720                 r = -EINVAL;
3721                 if (atomic_read(&kvm->online_vcpus))
3722                         goto create_irqchip_unlock;
3723                 r = -ENOMEM;
3724                 vpic = kvm_create_pic(kvm);
3725                 if (vpic) {
3726                         r = kvm_ioapic_init(kvm);
3727                         if (r) {
3728                                 mutex_lock(&kvm->slots_lock);
3729                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3730                                                           &vpic->dev_master);
3731                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3732                                                           &vpic->dev_slave);
3733                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3734                                                           &vpic->dev_eclr);
3735                                 mutex_unlock(&kvm->slots_lock);
3736                                 kfree(vpic);
3737                                 goto create_irqchip_unlock;
3738                         }
3739                 } else
3740                         goto create_irqchip_unlock;
3741                 smp_wmb();
3742                 kvm->arch.vpic = vpic;
3743                 smp_wmb();
3744                 r = kvm_setup_default_irq_routing(kvm);
3745                 if (r) {
3746                         mutex_lock(&kvm->slots_lock);
3747                         mutex_lock(&kvm->irq_lock);
3748                         kvm_ioapic_destroy(kvm);
3749                         kvm_destroy_pic(kvm);
3750                         mutex_unlock(&kvm->irq_lock);
3751                         mutex_unlock(&kvm->slots_lock);
3752                 }
3753         create_irqchip_unlock:
3754                 mutex_unlock(&kvm->lock);
3755                 break;
3756         }
3757         case KVM_CREATE_PIT:
3758                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3759                 goto create_pit;
3760         case KVM_CREATE_PIT2:
3761                 r = -EFAULT;
3762                 if (copy_from_user(&u.pit_config, argp,
3763                                    sizeof(struct kvm_pit_config)))
3764                         goto out;
3765         create_pit:
3766                 mutex_lock(&kvm->slots_lock);
3767                 r = -EEXIST;
3768                 if (kvm->arch.vpit)
3769                         goto create_pit_unlock;
3770                 r = -ENOMEM;
3771                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3772                 if (kvm->arch.vpit)
3773                         r = 0;
3774         create_pit_unlock:
3775                 mutex_unlock(&kvm->slots_lock);
3776                 break;
3777         case KVM_GET_IRQCHIP: {
3778                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3779                 struct kvm_irqchip *chip;
3780
3781                 chip = memdup_user(argp, sizeof(*chip));
3782                 if (IS_ERR(chip)) {
3783                         r = PTR_ERR(chip);
3784                         goto out;
3785                 }
3786
3787                 r = -ENXIO;
3788                 if (!irqchip_in_kernel(kvm))
3789                         goto get_irqchip_out;
3790                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3791                 if (r)
3792                         goto get_irqchip_out;
3793                 r = -EFAULT;
3794                 if (copy_to_user(argp, chip, sizeof *chip))
3795                         goto get_irqchip_out;
3796                 r = 0;
3797         get_irqchip_out:
3798                 kfree(chip);
3799                 break;
3800         }
3801         case KVM_SET_IRQCHIP: {
3802                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3803                 struct kvm_irqchip *chip;
3804
3805                 chip = memdup_user(argp, sizeof(*chip));
3806                 if (IS_ERR(chip)) {
3807                         r = PTR_ERR(chip);
3808                         goto out;
3809                 }
3810
3811                 r = -ENXIO;
3812                 if (!irqchip_in_kernel(kvm))
3813                         goto set_irqchip_out;
3814                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3815                 if (r)
3816                         goto set_irqchip_out;
3817                 r = 0;
3818         set_irqchip_out:
3819                 kfree(chip);
3820                 break;
3821         }
3822         case KVM_GET_PIT: {
3823                 r = -EFAULT;
3824                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3825                         goto out;
3826                 r = -ENXIO;
3827                 if (!kvm->arch.vpit)
3828                         goto out;
3829                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3830                 if (r)
3831                         goto out;
3832                 r = -EFAULT;
3833                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3834                         goto out;
3835                 r = 0;
3836                 break;
3837         }
3838         case KVM_SET_PIT: {
3839                 r = -EFAULT;
3840                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3841                         goto out;
3842                 r = -ENXIO;
3843                 if (!kvm->arch.vpit)
3844                         goto out;
3845                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3846                 break;
3847         }
3848         case KVM_GET_PIT2: {
3849                 r = -ENXIO;
3850                 if (!kvm->arch.vpit)
3851                         goto out;
3852                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3853                 if (r)
3854                         goto out;
3855                 r = -EFAULT;
3856                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3857                         goto out;
3858                 r = 0;
3859                 break;
3860         }
3861         case KVM_SET_PIT2: {
3862                 r = -EFAULT;
3863                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3864                         goto out;
3865                 r = -ENXIO;
3866                 if (!kvm->arch.vpit)
3867                         goto out;
3868                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3869                 break;
3870         }
3871         case KVM_REINJECT_CONTROL: {
3872                 struct kvm_reinject_control control;
3873                 r =  -EFAULT;
3874                 if (copy_from_user(&control, argp, sizeof(control)))
3875                         goto out;
3876                 r = kvm_vm_ioctl_reinject(kvm, &control);
3877                 break;
3878         }
3879         case KVM_XEN_HVM_CONFIG: {
3880                 r = -EFAULT;
3881                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3882                                    sizeof(struct kvm_xen_hvm_config)))
3883                         goto out;
3884                 r = -EINVAL;
3885                 if (kvm->arch.xen_hvm_config.flags)
3886                         goto out;
3887                 r = 0;
3888                 break;
3889         }
3890         case KVM_SET_CLOCK: {
3891                 struct kvm_clock_data user_ns;
3892                 u64 now_ns;
3893                 s64 delta;
3894
3895                 r = -EFAULT;
3896                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3897                         goto out;
3898
3899                 r = -EINVAL;
3900                 if (user_ns.flags)
3901                         goto out;
3902
3903                 r = 0;
3904                 local_irq_disable();
3905                 now_ns = get_kernel_ns();
3906                 delta = user_ns.clock - now_ns;
3907                 local_irq_enable();
3908                 kvm->arch.kvmclock_offset = delta;
3909                 kvm_gen_update_masterclock(kvm);
3910                 break;
3911         }
3912         case KVM_GET_CLOCK: {
3913                 struct kvm_clock_data user_ns;
3914                 u64 now_ns;
3915
3916                 local_irq_disable();
3917                 now_ns = get_kernel_ns();
3918                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3919                 local_irq_enable();
3920                 user_ns.flags = 0;
3921                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3922
3923                 r = -EFAULT;
3924                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3925                         goto out;
3926                 r = 0;
3927                 break;
3928         }
3929
3930         default:
3931                 ;
3932         }
3933 out:
3934         return r;
3935 }
3936
3937 static void kvm_init_msr_list(void)
3938 {
3939         u32 dummy[2];
3940         unsigned i, j;
3941
3942         /* skip the first msrs in the list. KVM-specific */
3943         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3944                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3945                         continue;
3946
3947                 /*
3948                  * Even MSRs that are valid in the host may not be exposed
3949                  * to the guests in some cases.  We could work around this
3950                  * in VMX with the generic MSR save/load machinery, but it
3951                  * is not really worthwhile since it will really only
3952                  * happen with nested virtualization.
3953                  */
3954                 switch (msrs_to_save[i]) {
3955                 case MSR_IA32_BNDCFGS:
3956                         if (!kvm_x86_ops->mpx_supported())
3957                                 continue;
3958                         break;
3959                 default:
3960                         break;
3961                 }
3962
3963                 if (j < i)
3964                         msrs_to_save[j] = msrs_to_save[i];
3965                 j++;
3966         }
3967         num_msrs_to_save = j;
3968 }
3969
3970 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3971                            const void *v)
3972 {
3973         int handled = 0;
3974         int n;
3975
3976         do {
3977                 n = min(len, 8);
3978                 if (!(vcpu->arch.apic &&
3979                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3980                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3981                         break;
3982                 handled += n;
3983                 addr += n;
3984                 len -= n;
3985                 v += n;
3986         } while (len);
3987
3988         return handled;
3989 }
3990
3991 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3992 {
3993         int handled = 0;
3994         int n;
3995
3996         do {
3997                 n = min(len, 8);
3998                 if (!(vcpu->arch.apic &&
3999                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
4000                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4001                         break;
4002                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4003                 handled += n;
4004                 addr += n;
4005                 len -= n;
4006                 v += n;
4007         } while (len);
4008
4009         return handled;
4010 }
4011
4012 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4013                         struct kvm_segment *var, int seg)
4014 {
4015         kvm_x86_ops->set_segment(vcpu, var, seg);
4016 }
4017
4018 void kvm_get_segment(struct kvm_vcpu *vcpu,
4019                      struct kvm_segment *var, int seg)
4020 {
4021         kvm_x86_ops->get_segment(vcpu, var, seg);
4022 }
4023
4024 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
4025 {
4026         gpa_t t_gpa;
4027         struct x86_exception exception;
4028
4029         BUG_ON(!mmu_is_nested(vcpu));
4030
4031         /* NPT walks are always user-walks */
4032         access |= PFERR_USER_MASK;
4033         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
4034
4035         return t_gpa;
4036 }
4037
4038 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4039                               struct x86_exception *exception)
4040 {
4041         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4042         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4043 }
4044
4045  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4046                                 struct x86_exception *exception)
4047 {
4048         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4049         access |= PFERR_FETCH_MASK;
4050         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4051 }
4052
4053 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4054                                struct x86_exception *exception)
4055 {
4056         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4057         access |= PFERR_WRITE_MASK;
4058         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4059 }
4060
4061 /* uses this to access any guest's mapped memory without checking CPL */
4062 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4063                                 struct x86_exception *exception)
4064 {
4065         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4066 }
4067
4068 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4069                                       struct kvm_vcpu *vcpu, u32 access,
4070                                       struct x86_exception *exception)
4071 {
4072         void *data = val;
4073         int r = X86EMUL_CONTINUE;
4074
4075         while (bytes) {
4076                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4077                                                             exception);
4078                 unsigned offset = addr & (PAGE_SIZE-1);
4079                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4080                 int ret;
4081
4082                 if (gpa == UNMAPPED_GVA)
4083                         return X86EMUL_PROPAGATE_FAULT;
4084                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
4085                 if (ret < 0) {
4086                         r = X86EMUL_IO_NEEDED;
4087                         goto out;
4088                 }
4089
4090                 bytes -= toread;
4091                 data += toread;
4092                 addr += toread;
4093         }
4094 out:
4095         return r;
4096 }
4097
4098 /* used for instruction fetching */
4099 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4100                                 gva_t addr, void *val, unsigned int bytes,
4101                                 struct x86_exception *exception)
4102 {
4103         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4104         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4105
4106         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4107                                           access | PFERR_FETCH_MASK,
4108                                           exception);
4109 }
4110
4111 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4112                                gva_t addr, void *val, unsigned int bytes,
4113                                struct x86_exception *exception)
4114 {
4115         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4116         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4117
4118         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4119                                           exception);
4120 }
4121 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4122
4123 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4124                                       gva_t addr, void *val, unsigned int bytes,
4125                                       struct x86_exception *exception)
4126 {
4127         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4128         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4129 }
4130
4131 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4132                                        gva_t addr, void *val,
4133                                        unsigned int bytes,
4134                                        struct x86_exception *exception)
4135 {
4136         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4137         void *data = val;
4138         int r = X86EMUL_CONTINUE;
4139
4140         while (bytes) {
4141                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4142                                                              PFERR_WRITE_MASK,
4143                                                              exception);
4144                 unsigned offset = addr & (PAGE_SIZE-1);
4145                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4146                 int ret;
4147
4148                 if (gpa == UNMAPPED_GVA)
4149                         return X86EMUL_PROPAGATE_FAULT;
4150                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4151                 if (ret < 0) {
4152                         r = X86EMUL_IO_NEEDED;
4153                         goto out;
4154                 }
4155
4156                 bytes -= towrite;
4157                 data += towrite;
4158                 addr += towrite;
4159         }
4160 out:
4161         return r;
4162 }
4163 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4164
4165 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4166                                 gpa_t *gpa, struct x86_exception *exception,
4167                                 bool write)
4168 {
4169         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4170                 | (write ? PFERR_WRITE_MASK : 0);
4171
4172         if (vcpu_match_mmio_gva(vcpu, gva)
4173             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4174                                  vcpu->arch.access, access)) {
4175                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4176                                         (gva & (PAGE_SIZE - 1));
4177                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4178                 return 1;
4179         }
4180
4181         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4182
4183         if (*gpa == UNMAPPED_GVA)
4184                 return -1;
4185
4186         /* For APIC access vmexit */
4187         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4188                 return 1;
4189
4190         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4191                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4192                 return 1;
4193         }
4194
4195         return 0;
4196 }
4197
4198 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4199                         const void *val, int bytes)
4200 {
4201         int ret;
4202
4203         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4204         if (ret < 0)
4205                 return 0;
4206         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4207         return 1;
4208 }
4209
4210 struct read_write_emulator_ops {
4211         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4212                                   int bytes);
4213         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4214                                   void *val, int bytes);
4215         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4216                                int bytes, void *val);
4217         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4218                                     void *val, int bytes);
4219         bool write;
4220 };
4221
4222 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4223 {
4224         if (vcpu->mmio_read_completed) {
4225                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4226                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4227                 vcpu->mmio_read_completed = 0;
4228                 return 1;
4229         }
4230
4231         return 0;
4232 }
4233
4234 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4235                         void *val, int bytes)
4236 {
4237         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4238 }
4239
4240 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4241                          void *val, int bytes)
4242 {
4243         return emulator_write_phys(vcpu, gpa, val, bytes);
4244 }
4245
4246 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4247 {
4248         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4249         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4250 }
4251
4252 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4253                           void *val, int bytes)
4254 {
4255         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4256         return X86EMUL_IO_NEEDED;
4257 }
4258
4259 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4260                            void *val, int bytes)
4261 {
4262         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4263
4264         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4265         return X86EMUL_CONTINUE;
4266 }
4267
4268 static const struct read_write_emulator_ops read_emultor = {
4269         .read_write_prepare = read_prepare,
4270         .read_write_emulate = read_emulate,
4271         .read_write_mmio = vcpu_mmio_read,
4272         .read_write_exit_mmio = read_exit_mmio,
4273 };
4274
4275 static const struct read_write_emulator_ops write_emultor = {
4276         .read_write_emulate = write_emulate,
4277         .read_write_mmio = write_mmio,
4278         .read_write_exit_mmio = write_exit_mmio,
4279         .write = true,
4280 };
4281
4282 static int emulator_read_write_onepage(unsigned long addr, void *val,
4283                                        unsigned int bytes,
4284                                        struct x86_exception *exception,
4285                                        struct kvm_vcpu *vcpu,
4286                                        const struct read_write_emulator_ops *ops)
4287 {
4288         gpa_t gpa;
4289         int handled, ret;
4290         bool write = ops->write;
4291         struct kvm_mmio_fragment *frag;
4292
4293         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4294
4295         if (ret < 0)
4296                 return X86EMUL_PROPAGATE_FAULT;
4297
4298         /* For APIC access vmexit */
4299         if (ret)
4300                 goto mmio;
4301
4302         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4303                 return X86EMUL_CONTINUE;
4304
4305 mmio:
4306         /*
4307          * Is this MMIO handled locally?
4308          */
4309         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4310         if (handled == bytes)
4311                 return X86EMUL_CONTINUE;
4312
4313         gpa += handled;
4314         bytes -= handled;
4315         val += handled;
4316
4317         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4318         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4319         frag->gpa = gpa;
4320         frag->data = val;
4321         frag->len = bytes;
4322         return X86EMUL_CONTINUE;
4323 }
4324
4325 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4326                         void *val, unsigned int bytes,
4327                         struct x86_exception *exception,
4328                         const struct read_write_emulator_ops *ops)
4329 {
4330         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4331         gpa_t gpa;
4332         int rc;
4333
4334         if (ops->read_write_prepare &&
4335                   ops->read_write_prepare(vcpu, val, bytes))
4336                 return X86EMUL_CONTINUE;
4337
4338         vcpu->mmio_nr_fragments = 0;
4339
4340         /* Crossing a page boundary? */
4341         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4342                 int now;
4343
4344                 now = -addr & ~PAGE_MASK;
4345                 rc = emulator_read_write_onepage(addr, val, now, exception,
4346                                                  vcpu, ops);
4347
4348                 if (rc != X86EMUL_CONTINUE)
4349                         return rc;
4350                 addr += now;
4351                 val += now;
4352                 bytes -= now;
4353         }
4354
4355         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4356                                          vcpu, ops);
4357         if (rc != X86EMUL_CONTINUE)
4358                 return rc;
4359
4360         if (!vcpu->mmio_nr_fragments)
4361                 return rc;
4362
4363         gpa = vcpu->mmio_fragments[0].gpa;
4364
4365         vcpu->mmio_needed = 1;
4366         vcpu->mmio_cur_fragment = 0;
4367
4368         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4369         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4370         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4371         vcpu->run->mmio.phys_addr = gpa;
4372
4373         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4374 }
4375
4376 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4377                                   unsigned long addr,
4378                                   void *val,
4379                                   unsigned int bytes,
4380                                   struct x86_exception *exception)
4381 {
4382         return emulator_read_write(ctxt, addr, val, bytes,
4383                                    exception, &read_emultor);
4384 }
4385
4386 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4387                             unsigned long addr,
4388                             const void *val,
4389                             unsigned int bytes,
4390                             struct x86_exception *exception)
4391 {
4392         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4393                                    exception, &write_emultor);
4394 }
4395
4396 #define CMPXCHG_TYPE(t, ptr, old, new) \
4397         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4398
4399 #ifdef CONFIG_X86_64
4400 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4401 #else
4402 #  define CMPXCHG64(ptr, old, new) \
4403         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4404 #endif
4405
4406 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4407                                      unsigned long addr,
4408                                      const void *old,
4409                                      const void *new,
4410                                      unsigned int bytes,
4411                                      struct x86_exception *exception)
4412 {
4413         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4414         gpa_t gpa;
4415         struct page *page;
4416         char *kaddr;
4417         bool exchanged;
4418
4419         /* guests cmpxchg8b have to be emulated atomically */
4420         if (bytes > 8 || (bytes & (bytes - 1)))
4421                 goto emul_write;
4422
4423         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4424
4425         if (gpa == UNMAPPED_GVA ||
4426             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4427                 goto emul_write;
4428
4429         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4430                 goto emul_write;
4431
4432         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4433         if (is_error_page(page))
4434                 goto emul_write;
4435
4436         kaddr = kmap_atomic(page);
4437         kaddr += offset_in_page(gpa);
4438         switch (bytes) {
4439         case 1:
4440                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4441                 break;
4442         case 2:
4443                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4444                 break;
4445         case 4:
4446                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4447                 break;
4448         case 8:
4449                 exchanged = CMPXCHG64(kaddr, old, new);
4450                 break;
4451         default:
4452                 BUG();
4453         }
4454         kunmap_atomic(kaddr);
4455         kvm_release_page_dirty(page);
4456
4457         if (!exchanged)
4458                 return X86EMUL_CMPXCHG_FAILED;
4459
4460         mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4461         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4462
4463         return X86EMUL_CONTINUE;
4464
4465 emul_write:
4466         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4467
4468         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4469 }
4470
4471 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4472 {
4473         /* TODO: String I/O for in kernel device */
4474         int r;
4475
4476         if (vcpu->arch.pio.in)
4477                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4478                                     vcpu->arch.pio.size, pd);
4479         else
4480                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4481                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4482                                      pd);
4483         return r;
4484 }
4485
4486 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4487                                unsigned short port, void *val,
4488                                unsigned int count, bool in)
4489 {
4490         trace_kvm_pio(!in, port, size, count);
4491
4492         vcpu->arch.pio.port = port;
4493         vcpu->arch.pio.in = in;
4494         vcpu->arch.pio.count  = count;
4495         vcpu->arch.pio.size = size;
4496
4497         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4498                 vcpu->arch.pio.count = 0;
4499                 return 1;
4500         }
4501
4502         vcpu->run->exit_reason = KVM_EXIT_IO;
4503         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4504         vcpu->run->io.size = size;
4505         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4506         vcpu->run->io.count = count;
4507         vcpu->run->io.port = port;
4508
4509         return 0;
4510 }
4511
4512 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4513                                     int size, unsigned short port, void *val,
4514                                     unsigned int count)
4515 {
4516         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4517         int ret;
4518
4519         if (vcpu->arch.pio.count)
4520                 goto data_avail;
4521
4522         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4523         if (ret) {
4524 data_avail:
4525                 memcpy(val, vcpu->arch.pio_data, size * count);
4526                 vcpu->arch.pio.count = 0;
4527                 return 1;
4528         }
4529
4530         return 0;
4531 }
4532
4533 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4534                                      int size, unsigned short port,
4535                                      const void *val, unsigned int count)
4536 {
4537         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4538
4539         memcpy(vcpu->arch.pio_data, val, size * count);
4540         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4541 }
4542
4543 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4544 {
4545         return kvm_x86_ops->get_segment_base(vcpu, seg);
4546 }
4547
4548 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4549 {
4550         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4551 }
4552
4553 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4554 {
4555         if (!need_emulate_wbinvd(vcpu))
4556                 return X86EMUL_CONTINUE;
4557
4558         if (kvm_x86_ops->has_wbinvd_exit()) {
4559                 int cpu = get_cpu();
4560
4561                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4562                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4563                                 wbinvd_ipi, NULL, 1);
4564                 put_cpu();
4565                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4566         } else
4567                 wbinvd();
4568         return X86EMUL_CONTINUE;
4569 }
4570 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4571
4572 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4573 {
4574         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4575 }
4576
4577 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4578 {
4579         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4580 }
4581
4582 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4583 {
4584
4585         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4586 }
4587
4588 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4589 {
4590         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4591 }
4592
4593 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4594 {
4595         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4596         unsigned long value;
4597
4598         switch (cr) {
4599         case 0:
4600                 value = kvm_read_cr0(vcpu);
4601                 break;
4602         case 2:
4603                 value = vcpu->arch.cr2;
4604                 break;
4605         case 3:
4606                 value = kvm_read_cr3(vcpu);
4607                 break;
4608         case 4:
4609                 value = kvm_read_cr4(vcpu);
4610                 break;
4611         case 8:
4612                 value = kvm_get_cr8(vcpu);
4613                 break;
4614         default:
4615                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4616                 return 0;
4617         }
4618
4619         return value;
4620 }
4621
4622 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4623 {
4624         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4625         int res = 0;
4626
4627         switch (cr) {
4628         case 0:
4629                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4630                 break;
4631         case 2:
4632                 vcpu->arch.cr2 = val;
4633                 break;
4634         case 3:
4635                 res = kvm_set_cr3(vcpu, val);
4636                 break;
4637         case 4:
4638                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4639                 break;
4640         case 8:
4641                 res = kvm_set_cr8(vcpu, val);
4642                 break;
4643         default:
4644                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4645                 res = -1;
4646         }
4647
4648         return res;
4649 }
4650
4651 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4652 {
4653         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4654 }
4655
4656 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4657 {
4658         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4659 }
4660
4661 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4662 {
4663         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4664 }
4665
4666 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4667 {
4668         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4669 }
4670
4671 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4672 {
4673         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4674 }
4675
4676 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4677 {
4678         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4679 }
4680
4681 static unsigned long emulator_get_cached_segment_base(
4682         struct x86_emulate_ctxt *ctxt, int seg)
4683 {
4684         return get_segment_base(emul_to_vcpu(ctxt), seg);
4685 }
4686
4687 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4688                                  struct desc_struct *desc, u32 *base3,
4689                                  int seg)
4690 {
4691         struct kvm_segment var;
4692
4693         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4694         *selector = var.selector;
4695
4696         if (var.unusable) {
4697                 memset(desc, 0, sizeof(*desc));
4698                 return false;
4699         }
4700
4701         if (var.g)
4702                 var.limit >>= 12;
4703         set_desc_limit(desc, var.limit);
4704         set_desc_base(desc, (unsigned long)var.base);
4705 #ifdef CONFIG_X86_64
4706         if (base3)
4707                 *base3 = var.base >> 32;
4708 #endif
4709         desc->type = var.type;
4710         desc->s = var.s;
4711         desc->dpl = var.dpl;
4712         desc->p = var.present;
4713         desc->avl = var.avl;
4714         desc->l = var.l;
4715         desc->d = var.db;
4716         desc->g = var.g;
4717
4718         return true;
4719 }
4720
4721 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4722                                  struct desc_struct *desc, u32 base3,
4723                                  int seg)
4724 {
4725         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4726         struct kvm_segment var;
4727
4728         var.selector = selector;
4729         var.base = get_desc_base(desc);
4730 #ifdef CONFIG_X86_64
4731         var.base |= ((u64)base3) << 32;
4732 #endif
4733         var.limit = get_desc_limit(desc);
4734         if (desc->g)
4735                 var.limit = (var.limit << 12) | 0xfff;
4736         var.type = desc->type;
4737         var.present = desc->p;
4738         var.dpl = desc->dpl;
4739         var.db = desc->d;
4740         var.s = desc->s;
4741         var.l = desc->l;
4742         var.g = desc->g;
4743         var.avl = desc->avl;
4744         var.present = desc->p;
4745         var.unusable = !var.present;
4746         var.padding = 0;
4747
4748         kvm_set_segment(vcpu, &var, seg);
4749         return;
4750 }
4751
4752 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4753                             u32 msr_index, u64 *pdata)
4754 {
4755         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4756 }
4757
4758 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4759                             u32 msr_index, u64 data)
4760 {
4761         struct msr_data msr;
4762
4763         msr.data = data;
4764         msr.index = msr_index;
4765         msr.host_initiated = false;
4766         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4767 }
4768
4769 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4770                              u32 pmc, u64 *pdata)
4771 {
4772         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4773 }
4774
4775 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4776 {
4777         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4778 }
4779
4780 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4781 {
4782         preempt_disable();
4783         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4784         /*
4785          * CR0.TS may reference the host fpu state, not the guest fpu state,
4786          * so it may be clear at this point.
4787          */
4788         clts();
4789 }
4790
4791 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4792 {
4793         preempt_enable();
4794 }
4795
4796 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4797                               struct x86_instruction_info *info,
4798                               enum x86_intercept_stage stage)
4799 {
4800         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4801 }
4802
4803 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4804                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4805 {
4806         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4807 }
4808
4809 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4810 {
4811         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4812 }
4813
4814 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4815 {
4816         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4817 }
4818
4819 static const struct x86_emulate_ops emulate_ops = {
4820         .read_gpr            = emulator_read_gpr,
4821         .write_gpr           = emulator_write_gpr,
4822         .read_std            = kvm_read_guest_virt_system,
4823         .write_std           = kvm_write_guest_virt_system,
4824         .fetch               = kvm_fetch_guest_virt,
4825         .read_emulated       = emulator_read_emulated,
4826         .write_emulated      = emulator_write_emulated,
4827         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4828         .invlpg              = emulator_invlpg,
4829         .pio_in_emulated     = emulator_pio_in_emulated,
4830         .pio_out_emulated    = emulator_pio_out_emulated,
4831         .get_segment         = emulator_get_segment,
4832         .set_segment         = emulator_set_segment,
4833         .get_cached_segment_base = emulator_get_cached_segment_base,
4834         .get_gdt             = emulator_get_gdt,
4835         .get_idt             = emulator_get_idt,
4836         .set_gdt             = emulator_set_gdt,
4837         .set_idt             = emulator_set_idt,
4838         .get_cr              = emulator_get_cr,
4839         .set_cr              = emulator_set_cr,
4840         .set_rflags          = emulator_set_rflags,
4841         .cpl                 = emulator_get_cpl,
4842         .get_dr              = emulator_get_dr,
4843         .set_dr              = emulator_set_dr,
4844         .set_msr             = emulator_set_msr,
4845         .get_msr             = emulator_get_msr,
4846         .read_pmc            = emulator_read_pmc,
4847         .halt                = emulator_halt,
4848         .wbinvd              = emulator_wbinvd,
4849         .fix_hypercall       = emulator_fix_hypercall,
4850         .get_fpu             = emulator_get_fpu,
4851         .put_fpu             = emulator_put_fpu,
4852         .intercept           = emulator_intercept,
4853         .get_cpuid           = emulator_get_cpuid,
4854 };
4855
4856 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4857 {
4858         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4859         /*
4860          * an sti; sti; sequence only disable interrupts for the first
4861          * instruction. So, if the last instruction, be it emulated or
4862          * not, left the system with the INT_STI flag enabled, it
4863          * means that the last instruction is an sti. We should not
4864          * leave the flag on in this case. The same goes for mov ss
4865          */
4866         if (!(int_shadow & mask))
4867                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4868 }
4869
4870 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4871 {
4872         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4873         if (ctxt->exception.vector == PF_VECTOR)
4874                 kvm_propagate_fault(vcpu, &ctxt->exception);
4875         else if (ctxt->exception.error_code_valid)
4876                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4877                                       ctxt->exception.error_code);
4878         else
4879                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4880 }
4881
4882 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4883 {
4884         memset(&ctxt->opcode_len, 0,
4885                (void *)&ctxt->_regs - (void *)&ctxt->opcode_len);
4886
4887         ctxt->fetch.start = 0;
4888         ctxt->fetch.end = 0;
4889         ctxt->io_read.pos = 0;
4890         ctxt->io_read.end = 0;
4891         ctxt->mem_read.pos = 0;
4892         ctxt->mem_read.end = 0;
4893 }
4894
4895 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4896 {
4897         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4898         int cs_db, cs_l;
4899
4900         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4901
4902         ctxt->eflags = kvm_get_rflags(vcpu);
4903         ctxt->eip = kvm_rip_read(vcpu);
4904         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4905                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4906                      cs_l                               ? X86EMUL_MODE_PROT64 :
4907                      cs_db                              ? X86EMUL_MODE_PROT32 :
4908                                                           X86EMUL_MODE_PROT16;
4909         ctxt->guest_mode = is_guest_mode(vcpu);
4910
4911         init_decode_cache(ctxt);
4912         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4913 }
4914
4915 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4916 {
4917         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4918         int ret;
4919
4920         init_emulate_ctxt(vcpu);
4921
4922         ctxt->op_bytes = 2;
4923         ctxt->ad_bytes = 2;
4924         ctxt->_eip = ctxt->eip + inc_eip;
4925         ret = emulate_int_real(ctxt, irq);
4926
4927         if (ret != X86EMUL_CONTINUE)
4928                 return EMULATE_FAIL;
4929
4930         ctxt->eip = ctxt->_eip;
4931         kvm_rip_write(vcpu, ctxt->eip);
4932         kvm_set_rflags(vcpu, ctxt->eflags);
4933
4934         if (irq == NMI_VECTOR)
4935                 vcpu->arch.nmi_pending = 0;
4936         else
4937                 vcpu->arch.interrupt.pending = false;
4938
4939         return EMULATE_DONE;
4940 }
4941 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4942
4943 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4944 {
4945         int r = EMULATE_DONE;
4946
4947         ++vcpu->stat.insn_emulation_fail;
4948         trace_kvm_emulate_insn_failed(vcpu);
4949         if (!is_guest_mode(vcpu)) {
4950                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4951                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4952                 vcpu->run->internal.ndata = 0;
4953                 r = EMULATE_FAIL;
4954         }
4955         kvm_queue_exception(vcpu, UD_VECTOR);
4956
4957         return r;
4958 }
4959
4960 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4961                                   bool write_fault_to_shadow_pgtable,
4962                                   int emulation_type)
4963 {
4964         gpa_t gpa = cr2;
4965         pfn_t pfn;
4966
4967         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4968                 return false;
4969
4970         if (!vcpu->arch.mmu.direct_map) {
4971                 /*
4972                  * Write permission should be allowed since only
4973                  * write access need to be emulated.
4974                  */
4975                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4976
4977                 /*
4978                  * If the mapping is invalid in guest, let cpu retry
4979                  * it to generate fault.
4980                  */
4981                 if (gpa == UNMAPPED_GVA)
4982                         return true;
4983         }
4984
4985         /*
4986          * Do not retry the unhandleable instruction if it faults on the
4987          * readonly host memory, otherwise it will goto a infinite loop:
4988          * retry instruction -> write #PF -> emulation fail -> retry
4989          * instruction -> ...
4990          */
4991         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4992
4993         /*
4994          * If the instruction failed on the error pfn, it can not be fixed,
4995          * report the error to userspace.
4996          */
4997         if (is_error_noslot_pfn(pfn))
4998                 return false;
4999
5000         kvm_release_pfn_clean(pfn);
5001
5002         /* The instructions are well-emulated on direct mmu. */
5003         if (vcpu->arch.mmu.direct_map) {
5004                 unsigned int indirect_shadow_pages;
5005
5006                 spin_lock(&vcpu->kvm->mmu_lock);
5007                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5008                 spin_unlock(&vcpu->kvm->mmu_lock);
5009
5010                 if (indirect_shadow_pages)
5011                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5012
5013                 return true;
5014         }
5015
5016         /*
5017          * if emulation was due to access to shadowed page table
5018          * and it failed try to unshadow page and re-enter the
5019          * guest to let CPU execute the instruction.
5020          */
5021         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5022
5023         /*
5024          * If the access faults on its page table, it can not
5025          * be fixed by unprotecting shadow page and it should
5026          * be reported to userspace.
5027          */
5028         return !write_fault_to_shadow_pgtable;
5029 }
5030
5031 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5032                               unsigned long cr2,  int emulation_type)
5033 {
5034         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5035         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5036
5037         last_retry_eip = vcpu->arch.last_retry_eip;
5038         last_retry_addr = vcpu->arch.last_retry_addr;
5039
5040         /*
5041          * If the emulation is caused by #PF and it is non-page_table
5042          * writing instruction, it means the VM-EXIT is caused by shadow
5043          * page protected, we can zap the shadow page and retry this
5044          * instruction directly.
5045          *
5046          * Note: if the guest uses a non-page-table modifying instruction
5047          * on the PDE that points to the instruction, then we will unmap
5048          * the instruction and go to an infinite loop. So, we cache the
5049          * last retried eip and the last fault address, if we meet the eip
5050          * and the address again, we can break out of the potential infinite
5051          * loop.
5052          */
5053         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5054
5055         if (!(emulation_type & EMULTYPE_RETRY))
5056                 return false;
5057
5058         if (x86_page_table_writing_insn(ctxt))
5059                 return false;
5060
5061         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5062                 return false;
5063
5064         vcpu->arch.last_retry_eip = ctxt->eip;
5065         vcpu->arch.last_retry_addr = cr2;
5066
5067         if (!vcpu->arch.mmu.direct_map)
5068                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5069
5070         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5071
5072         return true;
5073 }
5074
5075 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5076 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5077
5078 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5079                                 unsigned long *db)
5080 {
5081         u32 dr6 = 0;
5082         int i;
5083         u32 enable, rwlen;
5084
5085         enable = dr7;
5086         rwlen = dr7 >> 16;
5087         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5088                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5089                         dr6 |= (1 << i);
5090         return dr6;
5091 }
5092
5093 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
5094 {
5095         struct kvm_run *kvm_run = vcpu->run;
5096
5097         /*
5098          * Use the "raw" value to see if TF was passed to the processor.
5099          * Note that the new value of the flags has not been saved yet.
5100          *
5101          * This is correct even for TF set by the guest, because "the
5102          * processor will not generate this exception after the instruction
5103          * that sets the TF flag".
5104          */
5105         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5106
5107         if (unlikely(rflags & X86_EFLAGS_TF)) {
5108                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5109                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
5110                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5111                         kvm_run->debug.arch.exception = DB_VECTOR;
5112                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5113                         *r = EMULATE_USER_EXIT;
5114                 } else {
5115                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5116                         /*
5117                          * "Certain debug exceptions may clear bit 0-3.  The
5118                          * remaining contents of the DR6 register are never
5119                          * cleared by the processor".
5120                          */
5121                         vcpu->arch.dr6 &= ~15;
5122                         vcpu->arch.dr6 |= DR6_BS;
5123                         kvm_queue_exception(vcpu, DB_VECTOR);
5124                 }
5125         }
5126 }
5127
5128 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5129 {
5130         struct kvm_run *kvm_run = vcpu->run;
5131         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5132         u32 dr6 = 0;
5133
5134         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5135             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5136                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5137                                            vcpu->arch.guest_debug_dr7,
5138                                            vcpu->arch.eff_db);
5139
5140                 if (dr6 != 0) {
5141                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5142                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5143                                 get_segment_base(vcpu, VCPU_SREG_CS);
5144
5145                         kvm_run->debug.arch.exception = DB_VECTOR;
5146                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5147                         *r = EMULATE_USER_EXIT;
5148                         return true;
5149                 }
5150         }
5151
5152         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5153                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5154                                            vcpu->arch.dr7,
5155                                            vcpu->arch.db);
5156
5157                 if (dr6 != 0) {
5158                         vcpu->arch.dr6 &= ~15;
5159                         vcpu->arch.dr6 |= dr6;
5160                         kvm_queue_exception(vcpu, DB_VECTOR);
5161                         *r = EMULATE_DONE;
5162                         return true;
5163                 }
5164         }
5165
5166         return false;
5167 }
5168
5169 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5170                             unsigned long cr2,
5171                             int emulation_type,
5172                             void *insn,
5173                             int insn_len)
5174 {
5175         int r;
5176         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5177         bool writeback = true;
5178         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5179
5180         /*
5181          * Clear write_fault_to_shadow_pgtable here to ensure it is
5182          * never reused.
5183          */
5184         vcpu->arch.write_fault_to_shadow_pgtable = false;
5185         kvm_clear_exception_queue(vcpu);
5186
5187         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5188                 init_emulate_ctxt(vcpu);
5189
5190                 /*
5191                  * We will reenter on the same instruction since
5192                  * we do not set complete_userspace_io.  This does not
5193                  * handle watchpoints yet, those would be handled in
5194                  * the emulate_ops.
5195                  */
5196                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5197                         return r;
5198
5199                 ctxt->interruptibility = 0;
5200                 ctxt->have_exception = false;
5201                 ctxt->perm_ok = false;
5202
5203                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5204
5205                 r = x86_decode_insn(ctxt, insn, insn_len);
5206
5207                 trace_kvm_emulate_insn_start(vcpu);
5208                 ++vcpu->stat.insn_emulation;
5209                 if (r != EMULATION_OK)  {
5210                         if (emulation_type & EMULTYPE_TRAP_UD)
5211                                 return EMULATE_FAIL;
5212                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5213                                                 emulation_type))
5214                                 return EMULATE_DONE;
5215                         if (emulation_type & EMULTYPE_SKIP)
5216                                 return EMULATE_FAIL;
5217                         return handle_emulation_failure(vcpu);
5218                 }
5219         }
5220
5221         if (emulation_type & EMULTYPE_SKIP) {
5222                 kvm_rip_write(vcpu, ctxt->_eip);
5223                 return EMULATE_DONE;
5224         }
5225
5226         if (retry_instruction(ctxt, cr2, emulation_type))
5227                 return EMULATE_DONE;
5228
5229         /* this is needed for vmware backdoor interface to work since it
5230            changes registers values  during IO operation */
5231         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5232                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5233                 emulator_invalidate_register_cache(ctxt);
5234         }
5235
5236 restart:
5237         r = x86_emulate_insn(ctxt);
5238
5239         if (r == EMULATION_INTERCEPTED)
5240                 return EMULATE_DONE;
5241
5242         if (r == EMULATION_FAILED) {
5243                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5244                                         emulation_type))
5245                         return EMULATE_DONE;
5246
5247                 return handle_emulation_failure(vcpu);
5248         }
5249
5250         if (ctxt->have_exception) {
5251                 inject_emulated_exception(vcpu);
5252                 r = EMULATE_DONE;
5253         } else if (vcpu->arch.pio.count) {
5254                 if (!vcpu->arch.pio.in) {
5255                         /* FIXME: return into emulator if single-stepping.  */
5256                         vcpu->arch.pio.count = 0;
5257                 } else {
5258                         writeback = false;
5259                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5260                 }
5261                 r = EMULATE_USER_EXIT;
5262         } else if (vcpu->mmio_needed) {
5263                 if (!vcpu->mmio_is_write)
5264                         writeback = false;
5265                 r = EMULATE_USER_EXIT;
5266                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5267         } else if (r == EMULATION_RESTART)
5268                 goto restart;
5269         else
5270                 r = EMULATE_DONE;
5271
5272         if (writeback) {
5273                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5274                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5275                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5276                 kvm_rip_write(vcpu, ctxt->eip);
5277                 if (r == EMULATE_DONE)
5278                         kvm_vcpu_check_singlestep(vcpu, &r);
5279                 kvm_set_rflags(vcpu, ctxt->eflags);
5280         } else
5281                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5282
5283         return r;
5284 }
5285 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5286
5287 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5288 {
5289         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5290         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5291                                             size, port, &val, 1);
5292         /* do not return to emulator after return from userspace */
5293         vcpu->arch.pio.count = 0;
5294         return ret;
5295 }
5296 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5297
5298 static void tsc_bad(void *info)
5299 {
5300         __this_cpu_write(cpu_tsc_khz, 0);
5301 }
5302
5303 static void tsc_khz_changed(void *data)
5304 {
5305         struct cpufreq_freqs *freq = data;
5306         unsigned long khz = 0;
5307
5308         if (data)
5309                 khz = freq->new;
5310         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5311                 khz = cpufreq_quick_get(raw_smp_processor_id());
5312         if (!khz)
5313                 khz = tsc_khz;
5314         __this_cpu_write(cpu_tsc_khz, khz);
5315 }
5316
5317 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5318                                      void *data)
5319 {
5320         struct cpufreq_freqs *freq = data;
5321         struct kvm *kvm;
5322         struct kvm_vcpu *vcpu;
5323         int i, send_ipi = 0;
5324
5325         /*
5326          * We allow guests to temporarily run on slowing clocks,
5327          * provided we notify them after, or to run on accelerating
5328          * clocks, provided we notify them before.  Thus time never
5329          * goes backwards.
5330          *
5331          * However, we have a problem.  We can't atomically update
5332          * the frequency of a given CPU from this function; it is
5333          * merely a notifier, which can be called from any CPU.
5334          * Changing the TSC frequency at arbitrary points in time
5335          * requires a recomputation of local variables related to
5336          * the TSC for each VCPU.  We must flag these local variables
5337          * to be updated and be sure the update takes place with the
5338          * new frequency before any guests proceed.
5339          *
5340          * Unfortunately, the combination of hotplug CPU and frequency
5341          * change creates an intractable locking scenario; the order
5342          * of when these callouts happen is undefined with respect to
5343          * CPU hotplug, and they can race with each other.  As such,
5344          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5345          * undefined; you can actually have a CPU frequency change take
5346          * place in between the computation of X and the setting of the
5347          * variable.  To protect against this problem, all updates of
5348          * the per_cpu tsc_khz variable are done in an interrupt
5349          * protected IPI, and all callers wishing to update the value
5350          * must wait for a synchronous IPI to complete (which is trivial
5351          * if the caller is on the CPU already).  This establishes the
5352          * necessary total order on variable updates.
5353          *
5354          * Note that because a guest time update may take place
5355          * anytime after the setting of the VCPU's request bit, the
5356          * correct TSC value must be set before the request.  However,
5357          * to ensure the update actually makes it to any guest which
5358          * starts running in hardware virtualization between the set
5359          * and the acquisition of the spinlock, we must also ping the
5360          * CPU after setting the request bit.
5361          *
5362          */
5363
5364         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5365                 return 0;
5366         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5367                 return 0;
5368
5369         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5370
5371         spin_lock(&kvm_lock);
5372         list_for_each_entry(kvm, &vm_list, vm_list) {
5373                 kvm_for_each_vcpu(i, vcpu, kvm) {
5374                         if (vcpu->cpu != freq->cpu)
5375                                 continue;
5376                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5377                         if (vcpu->cpu != smp_processor_id())
5378                                 send_ipi = 1;
5379                 }
5380         }
5381         spin_unlock(&kvm_lock);
5382
5383         if (freq->old < freq->new && send_ipi) {
5384                 /*
5385                  * We upscale the frequency.  Must make the guest
5386                  * doesn't see old kvmclock values while running with
5387                  * the new frequency, otherwise we risk the guest sees
5388                  * time go backwards.
5389                  *
5390                  * In case we update the frequency for another cpu
5391                  * (which might be in guest context) send an interrupt
5392                  * to kick the cpu out of guest context.  Next time
5393                  * guest context is entered kvmclock will be updated,
5394                  * so the guest will not see stale values.
5395                  */
5396                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5397         }
5398         return 0;
5399 }
5400
5401 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5402         .notifier_call  = kvmclock_cpufreq_notifier
5403 };
5404
5405 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5406                                         unsigned long action, void *hcpu)
5407 {
5408         unsigned int cpu = (unsigned long)hcpu;
5409
5410         switch (action) {
5411                 case CPU_ONLINE:
5412                 case CPU_DOWN_FAILED:
5413                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5414                         break;
5415                 case CPU_DOWN_PREPARE:
5416                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5417                         break;
5418         }
5419         return NOTIFY_OK;
5420 }
5421
5422 static struct notifier_block kvmclock_cpu_notifier_block = {
5423         .notifier_call  = kvmclock_cpu_notifier,
5424         .priority = -INT_MAX
5425 };
5426
5427 static void kvm_timer_init(void)
5428 {
5429         int cpu;
5430
5431         max_tsc_khz = tsc_khz;
5432
5433         cpu_notifier_register_begin();
5434         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5435 #ifdef CONFIG_CPU_FREQ
5436                 struct cpufreq_policy policy;
5437                 memset(&policy, 0, sizeof(policy));
5438                 cpu = get_cpu();
5439                 cpufreq_get_policy(&policy, cpu);
5440                 if (policy.cpuinfo.max_freq)
5441                         max_tsc_khz = policy.cpuinfo.max_freq;
5442                 put_cpu();
5443 #endif
5444                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5445                                           CPUFREQ_TRANSITION_NOTIFIER);
5446         }
5447         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5448         for_each_online_cpu(cpu)
5449                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5450
5451         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5452         cpu_notifier_register_done();
5453
5454 }
5455
5456 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5457
5458 int kvm_is_in_guest(void)
5459 {
5460         return __this_cpu_read(current_vcpu) != NULL;
5461 }
5462
5463 static int kvm_is_user_mode(void)
5464 {
5465         int user_mode = 3;
5466
5467         if (__this_cpu_read(current_vcpu))
5468                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5469
5470         return user_mode != 0;
5471 }
5472
5473 static unsigned long kvm_get_guest_ip(void)
5474 {
5475         unsigned long ip = 0;
5476
5477         if (__this_cpu_read(current_vcpu))
5478                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5479
5480         return ip;
5481 }
5482
5483 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5484         .is_in_guest            = kvm_is_in_guest,
5485         .is_user_mode           = kvm_is_user_mode,
5486         .get_guest_ip           = kvm_get_guest_ip,
5487 };
5488
5489 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5490 {
5491         __this_cpu_write(current_vcpu, vcpu);
5492 }
5493 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5494
5495 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5496 {
5497         __this_cpu_write(current_vcpu, NULL);
5498 }
5499 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5500
5501 static void kvm_set_mmio_spte_mask(void)
5502 {
5503         u64 mask;
5504         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5505
5506         /*
5507          * Set the reserved bits and the present bit of an paging-structure
5508          * entry to generate page fault with PFER.RSV = 1.
5509          */
5510          /* Mask the reserved physical address bits. */
5511         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5512
5513         /* Bit 62 is always reserved for 32bit host. */
5514         mask |= 0x3ull << 62;
5515
5516         /* Set the present bit. */
5517         mask |= 1ull;
5518
5519 #ifdef CONFIG_X86_64
5520         /*
5521          * If reserved bit is not supported, clear the present bit to disable
5522          * mmio page fault.
5523          */
5524         if (maxphyaddr == 52)
5525                 mask &= ~1ull;
5526 #endif
5527
5528         kvm_mmu_set_mmio_spte_mask(mask);
5529 }
5530
5531 #ifdef CONFIG_X86_64
5532 static void pvclock_gtod_update_fn(struct work_struct *work)
5533 {
5534         struct kvm *kvm;
5535
5536         struct kvm_vcpu *vcpu;
5537         int i;
5538
5539         spin_lock(&kvm_lock);
5540         list_for_each_entry(kvm, &vm_list, vm_list)
5541                 kvm_for_each_vcpu(i, vcpu, kvm)
5542                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5543         atomic_set(&kvm_guest_has_master_clock, 0);
5544         spin_unlock(&kvm_lock);
5545 }
5546
5547 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5548
5549 /*
5550  * Notification about pvclock gtod data update.
5551  */
5552 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5553                                void *priv)
5554 {
5555         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5556         struct timekeeper *tk = priv;
5557
5558         update_pvclock_gtod(tk);
5559
5560         /* disable master clock if host does not trust, or does not
5561          * use, TSC clocksource
5562          */
5563         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5564             atomic_read(&kvm_guest_has_master_clock) != 0)
5565                 queue_work(system_long_wq, &pvclock_gtod_work);
5566
5567         return 0;
5568 }
5569
5570 static struct notifier_block pvclock_gtod_notifier = {
5571         .notifier_call = pvclock_gtod_notify,
5572 };
5573 #endif
5574
5575 int kvm_arch_init(void *opaque)
5576 {
5577         int r;
5578         struct kvm_x86_ops *ops = opaque;
5579
5580         if (kvm_x86_ops) {
5581                 printk(KERN_ERR "kvm: already loaded the other module\n");
5582                 r = -EEXIST;
5583                 goto out;
5584         }
5585
5586         if (!ops->cpu_has_kvm_support()) {
5587                 printk(KERN_ERR "kvm: no hardware support\n");
5588                 r = -EOPNOTSUPP;
5589                 goto out;
5590         }
5591         if (ops->disabled_by_bios()) {
5592                 printk(KERN_ERR "kvm: disabled by bios\n");
5593                 r = -EOPNOTSUPP;
5594                 goto out;
5595         }
5596
5597         r = -ENOMEM;
5598         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5599         if (!shared_msrs) {
5600                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5601                 goto out;
5602         }
5603
5604         r = kvm_mmu_module_init();
5605         if (r)
5606                 goto out_free_percpu;
5607
5608         kvm_set_mmio_spte_mask();
5609
5610         kvm_x86_ops = ops;
5611         kvm_init_msr_list();
5612
5613         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5614                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5615
5616         kvm_timer_init();
5617
5618         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5619
5620         if (cpu_has_xsave)
5621                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5622
5623         kvm_lapic_init();
5624 #ifdef CONFIG_X86_64
5625         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5626 #endif
5627
5628         return 0;
5629
5630 out_free_percpu:
5631         free_percpu(shared_msrs);
5632 out:
5633         return r;
5634 }
5635
5636 void kvm_arch_exit(void)
5637 {
5638         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5639
5640         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5641                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5642                                             CPUFREQ_TRANSITION_NOTIFIER);
5643         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5644 #ifdef CONFIG_X86_64
5645         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5646 #endif
5647         kvm_x86_ops = NULL;
5648         kvm_mmu_module_exit();
5649         free_percpu(shared_msrs);
5650 }
5651
5652 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5653 {
5654         ++vcpu->stat.halt_exits;
5655         if (irqchip_in_kernel(vcpu->kvm)) {
5656                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5657                 return 1;
5658         } else {
5659                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5660                 return 0;
5661         }
5662 }
5663 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5664
5665 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5666 {
5667         u64 param, ingpa, outgpa, ret;
5668         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5669         bool fast, longmode;
5670         int cs_db, cs_l;
5671
5672         /*
5673          * hypercall generates UD from non zero cpl and real mode
5674          * per HYPER-V spec
5675          */
5676         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5677                 kvm_queue_exception(vcpu, UD_VECTOR);
5678                 return 0;
5679         }
5680
5681         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5682         longmode = is_long_mode(vcpu) && cs_l == 1;
5683
5684         if (!longmode) {
5685                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5686                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5687                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5688                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5689                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5690                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5691         }
5692 #ifdef CONFIG_X86_64
5693         else {
5694                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5695                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5696                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5697         }
5698 #endif
5699
5700         code = param & 0xffff;
5701         fast = (param >> 16) & 0x1;
5702         rep_cnt = (param >> 32) & 0xfff;
5703         rep_idx = (param >> 48) & 0xfff;
5704
5705         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5706
5707         switch (code) {
5708         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5709                 kvm_vcpu_on_spin(vcpu);
5710                 break;
5711         default:
5712                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5713                 break;
5714         }
5715
5716         ret = res | (((u64)rep_done & 0xfff) << 32);
5717         if (longmode) {
5718                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5719         } else {
5720                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5721                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5722         }
5723
5724         return 1;
5725 }
5726
5727 /*
5728  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5729  *
5730  * @apicid - apicid of vcpu to be kicked.
5731  */
5732 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5733 {
5734         struct kvm_lapic_irq lapic_irq;
5735
5736         lapic_irq.shorthand = 0;
5737         lapic_irq.dest_mode = 0;
5738         lapic_irq.dest_id = apicid;
5739
5740         lapic_irq.delivery_mode = APIC_DM_REMRD;
5741         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5742 }
5743
5744 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5745 {
5746         unsigned long nr, a0, a1, a2, a3, ret;
5747         int r = 1;
5748
5749         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5750                 return kvm_hv_hypercall(vcpu);
5751
5752         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5753         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5754         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5755         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5756         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5757
5758         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5759
5760         if (!is_long_mode(vcpu)) {
5761                 nr &= 0xFFFFFFFF;
5762                 a0 &= 0xFFFFFFFF;
5763                 a1 &= 0xFFFFFFFF;
5764                 a2 &= 0xFFFFFFFF;
5765                 a3 &= 0xFFFFFFFF;
5766         }
5767
5768         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5769                 ret = -KVM_EPERM;
5770                 goto out;
5771         }
5772
5773         switch (nr) {
5774         case KVM_HC_VAPIC_POLL_IRQ:
5775                 ret = 0;
5776                 break;
5777         case KVM_HC_KICK_CPU:
5778                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5779                 ret = 0;
5780                 break;
5781         default:
5782                 ret = -KVM_ENOSYS;
5783                 break;
5784         }
5785 out:
5786         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5787         ++vcpu->stat.hypercalls;
5788         return r;
5789 }
5790 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5791
5792 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5793 {
5794         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5795         char instruction[3];
5796         unsigned long rip = kvm_rip_read(vcpu);
5797
5798         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5799
5800         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5801 }
5802
5803 /*
5804  * Check if userspace requested an interrupt window, and that the
5805  * interrupt window is open.
5806  *
5807  * No need to exit to userspace if we already have an interrupt queued.
5808  */
5809 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5810 {
5811         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5812                 vcpu->run->request_interrupt_window &&
5813                 kvm_arch_interrupt_allowed(vcpu));
5814 }
5815
5816 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5817 {
5818         struct kvm_run *kvm_run = vcpu->run;
5819
5820         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5821         kvm_run->cr8 = kvm_get_cr8(vcpu);
5822         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5823         if (irqchip_in_kernel(vcpu->kvm))
5824                 kvm_run->ready_for_interrupt_injection = 1;
5825         else
5826                 kvm_run->ready_for_interrupt_injection =
5827                         kvm_arch_interrupt_allowed(vcpu) &&
5828                         !kvm_cpu_has_interrupt(vcpu) &&
5829                         !kvm_event_needs_reinjection(vcpu);
5830 }
5831
5832 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5833 {
5834         int max_irr, tpr;
5835
5836         if (!kvm_x86_ops->update_cr8_intercept)
5837                 return;
5838
5839         if (!vcpu->arch.apic)
5840                 return;
5841
5842         if (!vcpu->arch.apic->vapic_addr)
5843                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5844         else
5845                 max_irr = -1;
5846
5847         if (max_irr != -1)
5848                 max_irr >>= 4;
5849
5850         tpr = kvm_lapic_get_cr8(vcpu);
5851
5852         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5853 }
5854
5855 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5856 {
5857         int r;
5858
5859         /* try to reinject previous events if any */
5860         if (vcpu->arch.exception.pending) {
5861                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5862                                         vcpu->arch.exception.has_error_code,
5863                                         vcpu->arch.exception.error_code);
5864                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5865                                           vcpu->arch.exception.has_error_code,
5866                                           vcpu->arch.exception.error_code,
5867                                           vcpu->arch.exception.reinject);
5868                 return 0;
5869         }
5870
5871         if (vcpu->arch.nmi_injected) {
5872                 kvm_x86_ops->set_nmi(vcpu);
5873                 return 0;
5874         }
5875
5876         if (vcpu->arch.interrupt.pending) {
5877                 kvm_x86_ops->set_irq(vcpu);
5878                 return 0;
5879         }
5880
5881         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5882                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5883                 if (r != 0)
5884                         return r;
5885         }
5886
5887         /* try to inject new event if pending */
5888         if (vcpu->arch.nmi_pending) {
5889                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5890                         --vcpu->arch.nmi_pending;
5891                         vcpu->arch.nmi_injected = true;
5892                         kvm_x86_ops->set_nmi(vcpu);
5893                 }
5894         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5895                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5896                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5897                                             false);
5898                         kvm_x86_ops->set_irq(vcpu);
5899                 }
5900         }
5901         return 0;
5902 }
5903
5904 static void process_nmi(struct kvm_vcpu *vcpu)
5905 {
5906         unsigned limit = 2;
5907
5908         /*
5909          * x86 is limited to one NMI running, and one NMI pending after it.
5910          * If an NMI is already in progress, limit further NMIs to just one.
5911          * Otherwise, allow two (and we'll inject the first one immediately).
5912          */
5913         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5914                 limit = 1;
5915
5916         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5917         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5918         kvm_make_request(KVM_REQ_EVENT, vcpu);
5919 }
5920
5921 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5922 {
5923         u64 eoi_exit_bitmap[4];
5924         u32 tmr[8];
5925
5926         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5927                 return;
5928
5929         memset(eoi_exit_bitmap, 0, 32);
5930         memset(tmr, 0, 32);
5931
5932         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5933         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5934         kvm_apic_update_tmr(vcpu, tmr);
5935 }
5936
5937 /*
5938  * Returns 1 to let __vcpu_run() continue the guest execution loop without
5939  * exiting to the userspace.  Otherwise, the value will be returned to the
5940  * userspace.
5941  */
5942 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5943 {
5944         int r;
5945         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5946                 vcpu->run->request_interrupt_window;
5947         bool req_immediate_exit = false;
5948
5949         if (vcpu->requests) {
5950                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5951                         kvm_mmu_unload(vcpu);
5952                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5953                         __kvm_migrate_timers(vcpu);
5954                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5955                         kvm_gen_update_masterclock(vcpu->kvm);
5956                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5957                         kvm_gen_kvmclock_update(vcpu);
5958                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5959                         r = kvm_guest_time_update(vcpu);
5960                         if (unlikely(r))
5961                                 goto out;
5962                 }
5963                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5964                         kvm_mmu_sync_roots(vcpu);
5965                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5966                         kvm_x86_ops->tlb_flush(vcpu);
5967                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5968                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5969                         r = 0;
5970                         goto out;
5971                 }
5972                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5973                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5974                         r = 0;
5975                         goto out;
5976                 }
5977                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5978                         vcpu->fpu_active = 0;
5979                         kvm_x86_ops->fpu_deactivate(vcpu);
5980                 }
5981                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5982                         /* Page is swapped out. Do synthetic halt */
5983                         vcpu->arch.apf.halted = true;
5984                         r = 1;
5985                         goto out;
5986                 }
5987                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5988                         record_steal_time(vcpu);
5989                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5990                         process_nmi(vcpu);
5991                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5992                         kvm_handle_pmu_event(vcpu);
5993                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5994                         kvm_deliver_pmi(vcpu);
5995                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5996                         vcpu_scan_ioapic(vcpu);
5997         }
5998
5999         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6000                 kvm_apic_accept_events(vcpu);
6001                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6002                         r = 1;
6003                         goto out;
6004                 }
6005
6006                 if (inject_pending_event(vcpu, req_int_win) != 0)
6007                         req_immediate_exit = true;
6008                 /* enable NMI/IRQ window open exits if needed */
6009                 else if (vcpu->arch.nmi_pending)
6010                         kvm_x86_ops->enable_nmi_window(vcpu);
6011                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6012                         kvm_x86_ops->enable_irq_window(vcpu);
6013
6014                 if (kvm_lapic_enabled(vcpu)) {
6015                         /*
6016                          * Update architecture specific hints for APIC
6017                          * virtual interrupt delivery.
6018                          */
6019                         if (kvm_x86_ops->hwapic_irr_update)
6020                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6021                                         kvm_lapic_find_highest_irr(vcpu));
6022                         update_cr8_intercept(vcpu);
6023                         kvm_lapic_sync_to_vapic(vcpu);
6024                 }
6025         }
6026
6027         r = kvm_mmu_reload(vcpu);
6028         if (unlikely(r)) {
6029                 goto cancel_injection;
6030         }
6031
6032         preempt_disable();
6033
6034         kvm_x86_ops->prepare_guest_switch(vcpu);
6035         if (vcpu->fpu_active)
6036                 kvm_load_guest_fpu(vcpu);
6037         kvm_load_guest_xcr0(vcpu);
6038
6039         vcpu->mode = IN_GUEST_MODE;
6040
6041         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6042
6043         /* We should set ->mode before check ->requests,
6044          * see the comment in make_all_cpus_request.
6045          */
6046         smp_mb__after_srcu_read_unlock();
6047
6048         local_irq_disable();
6049
6050         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6051             || need_resched() || signal_pending(current)) {
6052                 vcpu->mode = OUTSIDE_GUEST_MODE;
6053                 smp_wmb();
6054                 local_irq_enable();
6055                 preempt_enable();
6056                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6057                 r = 1;
6058                 goto cancel_injection;
6059         }
6060
6061         if (req_immediate_exit)
6062                 smp_send_reschedule(vcpu->cpu);
6063
6064         kvm_guest_enter();
6065
6066         if (unlikely(vcpu->arch.switch_db_regs)) {
6067                 set_debugreg(0, 7);
6068                 set_debugreg(vcpu->arch.eff_db[0], 0);
6069                 set_debugreg(vcpu->arch.eff_db[1], 1);
6070                 set_debugreg(vcpu->arch.eff_db[2], 2);
6071                 set_debugreg(vcpu->arch.eff_db[3], 3);
6072                 set_debugreg(vcpu->arch.dr6, 6);
6073         }
6074
6075         trace_kvm_entry(vcpu->vcpu_id);
6076         kvm_x86_ops->run(vcpu);
6077
6078         /*
6079          * Do this here before restoring debug registers on the host.  And
6080          * since we do this before handling the vmexit, a DR access vmexit
6081          * can (a) read the correct value of the debug registers, (b) set
6082          * KVM_DEBUGREG_WONT_EXIT again.
6083          */
6084         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6085                 int i;
6086
6087                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6088                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6089                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6090                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6091         }
6092
6093         /*
6094          * If the guest has used debug registers, at least dr7
6095          * will be disabled while returning to the host.
6096          * If we don't have active breakpoints in the host, we don't
6097          * care about the messed up debug address registers. But if
6098          * we have some of them active, restore the old state.
6099          */
6100         if (hw_breakpoint_active())
6101                 hw_breakpoint_restore();
6102
6103         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6104                                                            native_read_tsc());
6105
6106         vcpu->mode = OUTSIDE_GUEST_MODE;
6107         smp_wmb();
6108
6109         /* Interrupt is enabled by handle_external_intr() */
6110         kvm_x86_ops->handle_external_intr(vcpu);
6111
6112         ++vcpu->stat.exits;
6113
6114         /*
6115          * We must have an instruction between local_irq_enable() and
6116          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6117          * the interrupt shadow.  The stat.exits increment will do nicely.
6118          * But we need to prevent reordering, hence this barrier():
6119          */
6120         barrier();
6121
6122         kvm_guest_exit();
6123
6124         preempt_enable();
6125
6126         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6127
6128         /*
6129          * Profile KVM exit RIPs:
6130          */
6131         if (unlikely(prof_on == KVM_PROFILING)) {
6132                 unsigned long rip = kvm_rip_read(vcpu);
6133                 profile_hit(KVM_PROFILING, (void *)rip);
6134         }
6135
6136         if (unlikely(vcpu->arch.tsc_always_catchup))
6137                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6138
6139         if (vcpu->arch.apic_attention)
6140                 kvm_lapic_sync_from_vapic(vcpu);
6141
6142         r = kvm_x86_ops->handle_exit(vcpu);
6143         return r;
6144
6145 cancel_injection:
6146         kvm_x86_ops->cancel_injection(vcpu);
6147         if (unlikely(vcpu->arch.apic_attention))
6148                 kvm_lapic_sync_from_vapic(vcpu);
6149 out:
6150         return r;
6151 }
6152
6153
6154 static int __vcpu_run(struct kvm_vcpu *vcpu)
6155 {
6156         int r;
6157         struct kvm *kvm = vcpu->kvm;
6158
6159         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6160
6161         r = 1;
6162         while (r > 0) {
6163                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6164                     !vcpu->arch.apf.halted)
6165                         r = vcpu_enter_guest(vcpu);
6166                 else {
6167                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6168                         kvm_vcpu_block(vcpu);
6169                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6170                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6171                                 kvm_apic_accept_events(vcpu);
6172                                 switch(vcpu->arch.mp_state) {
6173                                 case KVM_MP_STATE_HALTED:
6174                                         vcpu->arch.pv.pv_unhalted = false;
6175                                         vcpu->arch.mp_state =
6176                                                 KVM_MP_STATE_RUNNABLE;
6177                                 case KVM_MP_STATE_RUNNABLE:
6178                                         vcpu->arch.apf.halted = false;
6179                                         break;
6180                                 case KVM_MP_STATE_INIT_RECEIVED:
6181                                         break;
6182                                 default:
6183                                         r = -EINTR;
6184                                         break;
6185                                 }
6186                         }
6187                 }
6188
6189                 if (r <= 0)
6190                         break;
6191
6192                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6193                 if (kvm_cpu_has_pending_timer(vcpu))
6194                         kvm_inject_pending_timer_irqs(vcpu);
6195
6196                 if (dm_request_for_irq_injection(vcpu)) {
6197                         r = -EINTR;
6198                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6199                         ++vcpu->stat.request_irq_exits;
6200                 }
6201
6202                 kvm_check_async_pf_completion(vcpu);
6203
6204                 if (signal_pending(current)) {
6205                         r = -EINTR;
6206                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6207                         ++vcpu->stat.signal_exits;
6208                 }
6209                 if (need_resched()) {
6210                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6211                         cond_resched();
6212                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6213                 }
6214         }
6215
6216         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6217
6218         return r;
6219 }
6220
6221 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6222 {
6223         int r;
6224         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6225         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6226         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6227         if (r != EMULATE_DONE)
6228                 return 0;
6229         return 1;
6230 }
6231
6232 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6233 {
6234         BUG_ON(!vcpu->arch.pio.count);
6235
6236         return complete_emulated_io(vcpu);
6237 }
6238
6239 /*
6240  * Implements the following, as a state machine:
6241  *
6242  * read:
6243  *   for each fragment
6244  *     for each mmio piece in the fragment
6245  *       write gpa, len
6246  *       exit
6247  *       copy data
6248  *   execute insn
6249  *
6250  * write:
6251  *   for each fragment
6252  *     for each mmio piece in the fragment
6253  *       write gpa, len
6254  *       copy data
6255  *       exit
6256  */
6257 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6258 {
6259         struct kvm_run *run = vcpu->run;
6260         struct kvm_mmio_fragment *frag;
6261         unsigned len;
6262
6263         BUG_ON(!vcpu->mmio_needed);
6264
6265         /* Complete previous fragment */
6266         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6267         len = min(8u, frag->len);
6268         if (!vcpu->mmio_is_write)
6269                 memcpy(frag->data, run->mmio.data, len);
6270
6271         if (frag->len <= 8) {
6272                 /* Switch to the next fragment. */
6273                 frag++;
6274                 vcpu->mmio_cur_fragment++;
6275         } else {
6276                 /* Go forward to the next mmio piece. */
6277                 frag->data += len;
6278                 frag->gpa += len;
6279                 frag->len -= len;
6280         }
6281
6282         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6283                 vcpu->mmio_needed = 0;
6284
6285                 /* FIXME: return into emulator if single-stepping.  */
6286                 if (vcpu->mmio_is_write)
6287                         return 1;
6288                 vcpu->mmio_read_completed = 1;
6289                 return complete_emulated_io(vcpu);
6290         }
6291
6292         run->exit_reason = KVM_EXIT_MMIO;
6293         run->mmio.phys_addr = frag->gpa;
6294         if (vcpu->mmio_is_write)
6295                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6296         run->mmio.len = min(8u, frag->len);
6297         run->mmio.is_write = vcpu->mmio_is_write;
6298         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6299         return 0;
6300 }
6301
6302
6303 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6304 {
6305         int r;
6306         sigset_t sigsaved;
6307
6308         if (!tsk_used_math(current) && init_fpu(current))
6309                 return -ENOMEM;
6310
6311         if (vcpu->sigset_active)
6312                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6313
6314         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6315                 kvm_vcpu_block(vcpu);
6316                 kvm_apic_accept_events(vcpu);
6317                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6318                 r = -EAGAIN;
6319                 goto out;
6320         }
6321
6322         /* re-sync apic's tpr */
6323         if (!irqchip_in_kernel(vcpu->kvm)) {
6324                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6325                         r = -EINVAL;
6326                         goto out;
6327                 }
6328         }
6329
6330         if (unlikely(vcpu->arch.complete_userspace_io)) {
6331                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6332                 vcpu->arch.complete_userspace_io = NULL;
6333                 r = cui(vcpu);
6334                 if (r <= 0)
6335                         goto out;
6336         } else
6337                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6338
6339         r = __vcpu_run(vcpu);
6340
6341 out:
6342         post_kvm_run_save(vcpu);
6343         if (vcpu->sigset_active)
6344                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6345
6346         return r;
6347 }
6348
6349 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6350 {
6351         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6352                 /*
6353                  * We are here if userspace calls get_regs() in the middle of
6354                  * instruction emulation. Registers state needs to be copied
6355                  * back from emulation context to vcpu. Userspace shouldn't do
6356                  * that usually, but some bad designed PV devices (vmware
6357                  * backdoor interface) need this to work
6358                  */
6359                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6360                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6361         }
6362         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6363         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6364         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6365         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6366         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6367         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6368         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6369         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6370 #ifdef CONFIG_X86_64
6371         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6372         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6373         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6374         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6375         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6376         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6377         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6378         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6379 #endif
6380
6381         regs->rip = kvm_rip_read(vcpu);
6382         regs->rflags = kvm_get_rflags(vcpu);
6383
6384         return 0;
6385 }
6386
6387 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6388 {
6389         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6390         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6391
6392         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6393         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6394         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6395         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6396         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6397         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6398         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6399         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6400 #ifdef CONFIG_X86_64
6401         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6402         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6403         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6404         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6405         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6406         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6407         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6408         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6409 #endif
6410
6411         kvm_rip_write(vcpu, regs->rip);
6412         kvm_set_rflags(vcpu, regs->rflags);
6413
6414         vcpu->arch.exception.pending = false;
6415
6416         kvm_make_request(KVM_REQ_EVENT, vcpu);
6417
6418         return 0;
6419 }
6420
6421 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6422 {
6423         struct kvm_segment cs;
6424
6425         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6426         *db = cs.db;
6427         *l = cs.l;
6428 }
6429 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6430
6431 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6432                                   struct kvm_sregs *sregs)
6433 {
6434         struct desc_ptr dt;
6435
6436         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6437         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6438         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6439         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6440         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6441         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6442
6443         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6444         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6445
6446         kvm_x86_ops->get_idt(vcpu, &dt);
6447         sregs->idt.limit = dt.size;
6448         sregs->idt.base = dt.address;
6449         kvm_x86_ops->get_gdt(vcpu, &dt);
6450         sregs->gdt.limit = dt.size;
6451         sregs->gdt.base = dt.address;
6452
6453         sregs->cr0 = kvm_read_cr0(vcpu);
6454         sregs->cr2 = vcpu->arch.cr2;
6455         sregs->cr3 = kvm_read_cr3(vcpu);
6456         sregs->cr4 = kvm_read_cr4(vcpu);
6457         sregs->cr8 = kvm_get_cr8(vcpu);
6458         sregs->efer = vcpu->arch.efer;
6459         sregs->apic_base = kvm_get_apic_base(vcpu);
6460
6461         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6462
6463         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6464                 set_bit(vcpu->arch.interrupt.nr,
6465                         (unsigned long *)sregs->interrupt_bitmap);
6466
6467         return 0;
6468 }
6469
6470 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6471                                     struct kvm_mp_state *mp_state)
6472 {
6473         kvm_apic_accept_events(vcpu);
6474         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6475                                         vcpu->arch.pv.pv_unhalted)
6476                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6477         else
6478                 mp_state->mp_state = vcpu->arch.mp_state;
6479
6480         return 0;
6481 }
6482
6483 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6484                                     struct kvm_mp_state *mp_state)
6485 {
6486         if (!kvm_vcpu_has_lapic(vcpu) &&
6487             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6488                 return -EINVAL;
6489
6490         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6491                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6492                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6493         } else
6494                 vcpu->arch.mp_state = mp_state->mp_state;
6495         kvm_make_request(KVM_REQ_EVENT, vcpu);
6496         return 0;
6497 }
6498
6499 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6500                     int reason, bool has_error_code, u32 error_code)
6501 {
6502         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6503         int ret;
6504
6505         init_emulate_ctxt(vcpu);
6506
6507         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6508                                    has_error_code, error_code);
6509
6510         if (ret)
6511                 return EMULATE_FAIL;
6512
6513         kvm_rip_write(vcpu, ctxt->eip);
6514         kvm_set_rflags(vcpu, ctxt->eflags);
6515         kvm_make_request(KVM_REQ_EVENT, vcpu);
6516         return EMULATE_DONE;
6517 }
6518 EXPORT_SYMBOL_GPL(kvm_task_switch);
6519
6520 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6521                                   struct kvm_sregs *sregs)
6522 {
6523         struct msr_data apic_base_msr;
6524         int mmu_reset_needed = 0;
6525         int pending_vec, max_bits, idx;
6526         struct desc_ptr dt;
6527
6528         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6529                 return -EINVAL;
6530
6531         dt.size = sregs->idt.limit;
6532         dt.address = sregs->idt.base;
6533         kvm_x86_ops->set_idt(vcpu, &dt);
6534         dt.size = sregs->gdt.limit;
6535         dt.address = sregs->gdt.base;
6536         kvm_x86_ops->set_gdt(vcpu, &dt);
6537
6538         vcpu->arch.cr2 = sregs->cr2;
6539         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6540         vcpu->arch.cr3 = sregs->cr3;
6541         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6542
6543         kvm_set_cr8(vcpu, sregs->cr8);
6544
6545         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6546         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6547         apic_base_msr.data = sregs->apic_base;
6548         apic_base_msr.host_initiated = true;
6549         kvm_set_apic_base(vcpu, &apic_base_msr);
6550
6551         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6552         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6553         vcpu->arch.cr0 = sregs->cr0;
6554
6555         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6556         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6557         if (sregs->cr4 & X86_CR4_OSXSAVE)
6558                 kvm_update_cpuid(vcpu);
6559
6560         idx = srcu_read_lock(&vcpu->kvm->srcu);
6561         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6562                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6563                 mmu_reset_needed = 1;
6564         }
6565         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6566
6567         if (mmu_reset_needed)
6568                 kvm_mmu_reset_context(vcpu);
6569
6570         max_bits = KVM_NR_INTERRUPTS;
6571         pending_vec = find_first_bit(
6572                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6573         if (pending_vec < max_bits) {
6574                 kvm_queue_interrupt(vcpu, pending_vec, false);
6575                 pr_debug("Set back pending irq %d\n", pending_vec);
6576         }
6577
6578         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6579         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6580         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6581         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6582         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6583         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6584
6585         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6586         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6587
6588         update_cr8_intercept(vcpu);
6589
6590         /* Older userspace won't unhalt the vcpu on reset. */
6591         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6592             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6593             !is_protmode(vcpu))
6594                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6595
6596         kvm_make_request(KVM_REQ_EVENT, vcpu);
6597
6598         return 0;
6599 }
6600
6601 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6602                                         struct kvm_guest_debug *dbg)
6603 {
6604         unsigned long rflags;
6605         int i, r;
6606
6607         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6608                 r = -EBUSY;
6609                 if (vcpu->arch.exception.pending)
6610                         goto out;
6611                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6612                         kvm_queue_exception(vcpu, DB_VECTOR);
6613                 else
6614                         kvm_queue_exception(vcpu, BP_VECTOR);
6615         }
6616
6617         /*
6618          * Read rflags as long as potentially injected trace flags are still
6619          * filtered out.
6620          */
6621         rflags = kvm_get_rflags(vcpu);
6622
6623         vcpu->guest_debug = dbg->control;
6624         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6625                 vcpu->guest_debug = 0;
6626
6627         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6628                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6629                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6630                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6631         } else {
6632                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6633                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6634         }
6635         kvm_update_dr7(vcpu);
6636
6637         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6638                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6639                         get_segment_base(vcpu, VCPU_SREG_CS);
6640
6641         /*
6642          * Trigger an rflags update that will inject or remove the trace
6643          * flags.
6644          */
6645         kvm_set_rflags(vcpu, rflags);
6646
6647         kvm_x86_ops->update_db_bp_intercept(vcpu);
6648
6649         r = 0;
6650
6651 out:
6652
6653         return r;
6654 }
6655
6656 /*
6657  * Translate a guest virtual address to a guest physical address.
6658  */
6659 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6660                                     struct kvm_translation *tr)
6661 {
6662         unsigned long vaddr = tr->linear_address;
6663         gpa_t gpa;
6664         int idx;
6665
6666         idx = srcu_read_lock(&vcpu->kvm->srcu);
6667         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6668         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6669         tr->physical_address = gpa;
6670         tr->valid = gpa != UNMAPPED_GVA;
6671         tr->writeable = 1;
6672         tr->usermode = 0;
6673
6674         return 0;
6675 }
6676
6677 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6678 {
6679         struct i387_fxsave_struct *fxsave =
6680                         &vcpu->arch.guest_fpu.state->fxsave;
6681
6682         memcpy(fpu->fpr, fxsave->st_space, 128);
6683         fpu->fcw = fxsave->cwd;
6684         fpu->fsw = fxsave->swd;
6685         fpu->ftwx = fxsave->twd;
6686         fpu->last_opcode = fxsave->fop;
6687         fpu->last_ip = fxsave->rip;
6688         fpu->last_dp = fxsave->rdp;
6689         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6690
6691         return 0;
6692 }
6693
6694 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6695 {
6696         struct i387_fxsave_struct *fxsave =
6697                         &vcpu->arch.guest_fpu.state->fxsave;
6698
6699         memcpy(fxsave->st_space, fpu->fpr, 128);
6700         fxsave->cwd = fpu->fcw;
6701         fxsave->swd = fpu->fsw;
6702         fxsave->twd = fpu->ftwx;
6703         fxsave->fop = fpu->last_opcode;
6704         fxsave->rip = fpu->last_ip;
6705         fxsave->rdp = fpu->last_dp;
6706         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6707
6708         return 0;
6709 }
6710
6711 int fx_init(struct kvm_vcpu *vcpu)
6712 {
6713         int err;
6714
6715         err = fpu_alloc(&vcpu->arch.guest_fpu);
6716         if (err)
6717                 return err;
6718
6719         fpu_finit(&vcpu->arch.guest_fpu);
6720
6721         /*
6722          * Ensure guest xcr0 is valid for loading
6723          */
6724         vcpu->arch.xcr0 = XSTATE_FP;
6725
6726         vcpu->arch.cr0 |= X86_CR0_ET;
6727
6728         return 0;
6729 }
6730 EXPORT_SYMBOL_GPL(fx_init);
6731
6732 static void fx_free(struct kvm_vcpu *vcpu)
6733 {
6734         fpu_free(&vcpu->arch.guest_fpu);
6735 }
6736
6737 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6738 {
6739         if (vcpu->guest_fpu_loaded)
6740                 return;
6741
6742         /*
6743          * Restore all possible states in the guest,
6744          * and assume host would use all available bits.
6745          * Guest xcr0 would be loaded later.
6746          */
6747         kvm_put_guest_xcr0(vcpu);
6748         vcpu->guest_fpu_loaded = 1;
6749         __kernel_fpu_begin();
6750         fpu_restore_checking(&vcpu->arch.guest_fpu);
6751         trace_kvm_fpu(1);
6752 }
6753
6754 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6755 {
6756         kvm_put_guest_xcr0(vcpu);
6757
6758         if (!vcpu->guest_fpu_loaded)
6759                 return;
6760
6761         vcpu->guest_fpu_loaded = 0;
6762         fpu_save_init(&vcpu->arch.guest_fpu);
6763         __kernel_fpu_end();
6764         ++vcpu->stat.fpu_reload;
6765         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6766         trace_kvm_fpu(0);
6767 }
6768
6769 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6770 {
6771         kvmclock_reset(vcpu);
6772
6773         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6774         fx_free(vcpu);
6775         kvm_x86_ops->vcpu_free(vcpu);
6776 }
6777
6778 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6779                                                 unsigned int id)
6780 {
6781         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6782                 printk_once(KERN_WARNING
6783                 "kvm: SMP vm created on host with unstable TSC; "
6784                 "guest TSC will not be reliable\n");
6785         return kvm_x86_ops->vcpu_create(kvm, id);
6786 }
6787
6788 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6789 {
6790         int r;
6791
6792         vcpu->arch.mtrr_state.have_fixed = 1;
6793         r = vcpu_load(vcpu);
6794         if (r)
6795                 return r;
6796         kvm_vcpu_reset(vcpu);
6797         kvm_mmu_setup(vcpu);
6798         vcpu_put(vcpu);
6799
6800         return r;
6801 }
6802
6803 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6804 {
6805         int r;
6806         struct msr_data msr;
6807         struct kvm *kvm = vcpu->kvm;
6808
6809         r = vcpu_load(vcpu);
6810         if (r)
6811                 return r;
6812         msr.data = 0x0;
6813         msr.index = MSR_IA32_TSC;
6814         msr.host_initiated = true;
6815         kvm_write_tsc(vcpu, &msr);
6816         vcpu_put(vcpu);
6817
6818         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
6819                                         KVMCLOCK_SYNC_PERIOD);
6820
6821         return r;
6822 }
6823
6824 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6825 {
6826         int r;
6827         vcpu->arch.apf.msr_val = 0;
6828
6829         r = vcpu_load(vcpu);
6830         BUG_ON(r);
6831         kvm_mmu_unload(vcpu);
6832         vcpu_put(vcpu);
6833
6834         fx_free(vcpu);
6835         kvm_x86_ops->vcpu_free(vcpu);
6836 }
6837
6838 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6839 {
6840         atomic_set(&vcpu->arch.nmi_queued, 0);
6841         vcpu->arch.nmi_pending = 0;
6842         vcpu->arch.nmi_injected = false;
6843
6844         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6845         vcpu->arch.dr6 = DR6_FIXED_1;
6846         kvm_update_dr6(vcpu);
6847         vcpu->arch.dr7 = DR7_FIXED_1;
6848         kvm_update_dr7(vcpu);
6849
6850         kvm_make_request(KVM_REQ_EVENT, vcpu);
6851         vcpu->arch.apf.msr_val = 0;
6852         vcpu->arch.st.msr_val = 0;
6853
6854         kvmclock_reset(vcpu);
6855
6856         kvm_clear_async_pf_completion_queue(vcpu);
6857         kvm_async_pf_hash_reset(vcpu);
6858         vcpu->arch.apf.halted = false;
6859
6860         kvm_pmu_reset(vcpu);
6861
6862         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6863         vcpu->arch.regs_avail = ~0;
6864         vcpu->arch.regs_dirty = ~0;
6865
6866         kvm_x86_ops->vcpu_reset(vcpu);
6867 }
6868
6869 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6870 {
6871         struct kvm_segment cs;
6872
6873         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6874         cs.selector = vector << 8;
6875         cs.base = vector << 12;
6876         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6877         kvm_rip_write(vcpu, 0);
6878 }
6879
6880 int kvm_arch_hardware_enable(void *garbage)
6881 {
6882         struct kvm *kvm;
6883         struct kvm_vcpu *vcpu;
6884         int i;
6885         int ret;
6886         u64 local_tsc;
6887         u64 max_tsc = 0;
6888         bool stable, backwards_tsc = false;
6889
6890         kvm_shared_msr_cpu_online();
6891         ret = kvm_x86_ops->hardware_enable(garbage);
6892         if (ret != 0)
6893                 return ret;
6894
6895         local_tsc = native_read_tsc();
6896         stable = !check_tsc_unstable();
6897         list_for_each_entry(kvm, &vm_list, vm_list) {
6898                 kvm_for_each_vcpu(i, vcpu, kvm) {
6899                         if (!stable && vcpu->cpu == smp_processor_id())
6900                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6901                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6902                                 backwards_tsc = true;
6903                                 if (vcpu->arch.last_host_tsc > max_tsc)
6904                                         max_tsc = vcpu->arch.last_host_tsc;
6905                         }
6906                 }
6907         }
6908
6909         /*
6910          * Sometimes, even reliable TSCs go backwards.  This happens on
6911          * platforms that reset TSC during suspend or hibernate actions, but
6912          * maintain synchronization.  We must compensate.  Fortunately, we can
6913          * detect that condition here, which happens early in CPU bringup,
6914          * before any KVM threads can be running.  Unfortunately, we can't
6915          * bring the TSCs fully up to date with real time, as we aren't yet far
6916          * enough into CPU bringup that we know how much real time has actually
6917          * elapsed; our helper function, get_kernel_ns() will be using boot
6918          * variables that haven't been updated yet.
6919          *
6920          * So we simply find the maximum observed TSC above, then record the
6921          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6922          * the adjustment will be applied.  Note that we accumulate
6923          * adjustments, in case multiple suspend cycles happen before some VCPU
6924          * gets a chance to run again.  In the event that no KVM threads get a
6925          * chance to run, we will miss the entire elapsed period, as we'll have
6926          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6927          * loose cycle time.  This isn't too big a deal, since the loss will be
6928          * uniform across all VCPUs (not to mention the scenario is extremely
6929          * unlikely). It is possible that a second hibernate recovery happens
6930          * much faster than a first, causing the observed TSC here to be
6931          * smaller; this would require additional padding adjustment, which is
6932          * why we set last_host_tsc to the local tsc observed here.
6933          *
6934          * N.B. - this code below runs only on platforms with reliable TSC,
6935          * as that is the only way backwards_tsc is set above.  Also note
6936          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6937          * have the same delta_cyc adjustment applied if backwards_tsc
6938          * is detected.  Note further, this adjustment is only done once,
6939          * as we reset last_host_tsc on all VCPUs to stop this from being
6940          * called multiple times (one for each physical CPU bringup).
6941          *
6942          * Platforms with unreliable TSCs don't have to deal with this, they
6943          * will be compensated by the logic in vcpu_load, which sets the TSC to
6944          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6945          * guarantee that they stay in perfect synchronization.
6946          */
6947         if (backwards_tsc) {
6948                 u64 delta_cyc = max_tsc - local_tsc;
6949                 list_for_each_entry(kvm, &vm_list, vm_list) {
6950                         kvm_for_each_vcpu(i, vcpu, kvm) {
6951                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6952                                 vcpu->arch.last_host_tsc = local_tsc;
6953                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6954                                         &vcpu->requests);
6955                         }
6956
6957                         /*
6958                          * We have to disable TSC offset matching.. if you were
6959                          * booting a VM while issuing an S4 host suspend....
6960                          * you may have some problem.  Solving this issue is
6961                          * left as an exercise to the reader.
6962                          */
6963                         kvm->arch.last_tsc_nsec = 0;
6964                         kvm->arch.last_tsc_write = 0;
6965                 }
6966
6967         }
6968         return 0;
6969 }
6970
6971 void kvm_arch_hardware_disable(void *garbage)
6972 {
6973         kvm_x86_ops->hardware_disable(garbage);
6974         drop_user_return_notifiers(garbage);
6975 }
6976
6977 int kvm_arch_hardware_setup(void)
6978 {
6979         return kvm_x86_ops->hardware_setup();
6980 }
6981
6982 void kvm_arch_hardware_unsetup(void)
6983 {
6984         kvm_x86_ops->hardware_unsetup();
6985 }
6986
6987 void kvm_arch_check_processor_compat(void *rtn)
6988 {
6989         kvm_x86_ops->check_processor_compatibility(rtn);
6990 }
6991
6992 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6993 {
6994         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6995 }
6996
6997 struct static_key kvm_no_apic_vcpu __read_mostly;
6998
6999 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7000 {
7001         struct page *page;
7002         struct kvm *kvm;
7003         int r;
7004
7005         BUG_ON(vcpu->kvm == NULL);
7006         kvm = vcpu->kvm;
7007
7008         vcpu->arch.pv.pv_unhalted = false;
7009         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7010         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
7011                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7012         else
7013                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7014
7015         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7016         if (!page) {
7017                 r = -ENOMEM;
7018                 goto fail;
7019         }
7020         vcpu->arch.pio_data = page_address(page);
7021
7022         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7023
7024         r = kvm_mmu_create(vcpu);
7025         if (r < 0)
7026                 goto fail_free_pio_data;
7027
7028         if (irqchip_in_kernel(kvm)) {
7029                 r = kvm_create_lapic(vcpu);
7030                 if (r < 0)
7031                         goto fail_mmu_destroy;
7032         } else
7033                 static_key_slow_inc(&kvm_no_apic_vcpu);
7034
7035         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7036                                        GFP_KERNEL);
7037         if (!vcpu->arch.mce_banks) {
7038                 r = -ENOMEM;
7039                 goto fail_free_lapic;
7040         }
7041         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7042
7043         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7044                 r = -ENOMEM;
7045                 goto fail_free_mce_banks;
7046         }
7047
7048         r = fx_init(vcpu);
7049         if (r)
7050                 goto fail_free_wbinvd_dirty_mask;
7051
7052         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7053         vcpu->arch.pv_time_enabled = false;
7054
7055         vcpu->arch.guest_supported_xcr0 = 0;
7056         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7057
7058         kvm_async_pf_hash_reset(vcpu);
7059         kvm_pmu_init(vcpu);
7060
7061         return 0;
7062 fail_free_wbinvd_dirty_mask:
7063         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7064 fail_free_mce_banks:
7065         kfree(vcpu->arch.mce_banks);
7066 fail_free_lapic:
7067         kvm_free_lapic(vcpu);
7068 fail_mmu_destroy:
7069         kvm_mmu_destroy(vcpu);
7070 fail_free_pio_data:
7071         free_page((unsigned long)vcpu->arch.pio_data);
7072 fail:
7073         return r;
7074 }
7075
7076 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7077 {
7078         int idx;
7079
7080         kvm_pmu_destroy(vcpu);
7081         kfree(vcpu->arch.mce_banks);
7082         kvm_free_lapic(vcpu);
7083         idx = srcu_read_lock(&vcpu->kvm->srcu);
7084         kvm_mmu_destroy(vcpu);
7085         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7086         free_page((unsigned long)vcpu->arch.pio_data);
7087         if (!irqchip_in_kernel(vcpu->kvm))
7088                 static_key_slow_dec(&kvm_no_apic_vcpu);
7089 }
7090
7091 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7092 {
7093         if (type)
7094                 return -EINVAL;
7095
7096         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7097         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7098         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7099         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7100
7101         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7102         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7103         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7104         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7105                 &kvm->arch.irq_sources_bitmap);
7106
7107         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7108         mutex_init(&kvm->arch.apic_map_lock);
7109         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7110
7111         pvclock_update_vm_gtod_copy(kvm);
7112
7113         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7114         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7115
7116         return 0;
7117 }
7118
7119 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7120 {
7121         int r;
7122         r = vcpu_load(vcpu);
7123         BUG_ON(r);
7124         kvm_mmu_unload(vcpu);
7125         vcpu_put(vcpu);
7126 }
7127
7128 static void kvm_free_vcpus(struct kvm *kvm)
7129 {
7130         unsigned int i;
7131         struct kvm_vcpu *vcpu;
7132
7133         /*
7134          * Unpin any mmu pages first.
7135          */
7136         kvm_for_each_vcpu(i, vcpu, kvm) {
7137                 kvm_clear_async_pf_completion_queue(vcpu);
7138                 kvm_unload_vcpu_mmu(vcpu);
7139         }
7140         kvm_for_each_vcpu(i, vcpu, kvm)
7141                 kvm_arch_vcpu_free(vcpu);
7142
7143         mutex_lock(&kvm->lock);
7144         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7145                 kvm->vcpus[i] = NULL;
7146
7147         atomic_set(&kvm->online_vcpus, 0);
7148         mutex_unlock(&kvm->lock);
7149 }
7150
7151 void kvm_arch_sync_events(struct kvm *kvm)
7152 {
7153         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7154         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7155         kvm_free_all_assigned_devices(kvm);
7156         kvm_free_pit(kvm);
7157 }
7158
7159 void kvm_arch_destroy_vm(struct kvm *kvm)
7160 {
7161         if (current->mm == kvm->mm) {
7162                 /*
7163                  * Free memory regions allocated on behalf of userspace,
7164                  * unless the the memory map has changed due to process exit
7165                  * or fd copying.
7166                  */
7167                 struct kvm_userspace_memory_region mem;
7168                 memset(&mem, 0, sizeof(mem));
7169                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7170                 kvm_set_memory_region(kvm, &mem);
7171
7172                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7173                 kvm_set_memory_region(kvm, &mem);
7174
7175                 mem.slot = TSS_PRIVATE_MEMSLOT;
7176                 kvm_set_memory_region(kvm, &mem);
7177         }
7178         kvm_iommu_unmap_guest(kvm);
7179         kfree(kvm->arch.vpic);
7180         kfree(kvm->arch.vioapic);
7181         kvm_free_vcpus(kvm);
7182         if (kvm->arch.apic_access_page)
7183                 put_page(kvm->arch.apic_access_page);
7184         if (kvm->arch.ept_identity_pagetable)
7185                 put_page(kvm->arch.ept_identity_pagetable);
7186         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7187 }
7188
7189 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7190                            struct kvm_memory_slot *dont)
7191 {
7192         int i;
7193
7194         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7195                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7196                         kvm_kvfree(free->arch.rmap[i]);
7197                         free->arch.rmap[i] = NULL;
7198                 }
7199                 if (i == 0)
7200                         continue;
7201
7202                 if (!dont || free->arch.lpage_info[i - 1] !=
7203                              dont->arch.lpage_info[i - 1]) {
7204                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7205                         free->arch.lpage_info[i - 1] = NULL;
7206                 }
7207         }
7208 }
7209
7210 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7211                             unsigned long npages)
7212 {
7213         int i;
7214
7215         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7216                 unsigned long ugfn;
7217                 int lpages;
7218                 int level = i + 1;
7219
7220                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7221                                       slot->base_gfn, level) + 1;
7222
7223                 slot->arch.rmap[i] =
7224                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7225                 if (!slot->arch.rmap[i])
7226                         goto out_free;
7227                 if (i == 0)
7228                         continue;
7229
7230                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7231                                         sizeof(*slot->arch.lpage_info[i - 1]));
7232                 if (!slot->arch.lpage_info[i - 1])
7233                         goto out_free;
7234
7235                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7236                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7237                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7238                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7239                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7240                 /*
7241                  * If the gfn and userspace address are not aligned wrt each
7242                  * other, or if explicitly asked to, disable large page
7243                  * support for this slot
7244                  */
7245                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7246                     !kvm_largepages_enabled()) {
7247                         unsigned long j;
7248
7249                         for (j = 0; j < lpages; ++j)
7250                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7251                 }
7252         }
7253
7254         return 0;
7255
7256 out_free:
7257         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7258                 kvm_kvfree(slot->arch.rmap[i]);
7259                 slot->arch.rmap[i] = NULL;
7260                 if (i == 0)
7261                         continue;
7262
7263                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7264                 slot->arch.lpage_info[i - 1] = NULL;
7265         }
7266         return -ENOMEM;
7267 }
7268
7269 void kvm_arch_memslots_updated(struct kvm *kvm)
7270 {
7271         /*
7272          * memslots->generation has been incremented.
7273          * mmio generation may have reached its maximum value.
7274          */
7275         kvm_mmu_invalidate_mmio_sptes(kvm);
7276 }
7277
7278 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7279                                 struct kvm_memory_slot *memslot,
7280                                 struct kvm_userspace_memory_region *mem,
7281                                 enum kvm_mr_change change)
7282 {
7283         /*
7284          * Only private memory slots need to be mapped here since
7285          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7286          */
7287         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7288                 unsigned long userspace_addr;
7289
7290                 /*
7291                  * MAP_SHARED to prevent internal slot pages from being moved
7292                  * by fork()/COW.
7293                  */
7294                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7295                                          PROT_READ | PROT_WRITE,
7296                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7297
7298                 if (IS_ERR((void *)userspace_addr))
7299                         return PTR_ERR((void *)userspace_addr);
7300
7301                 memslot->userspace_addr = userspace_addr;
7302         }
7303
7304         return 0;
7305 }
7306
7307 void kvm_arch_commit_memory_region(struct kvm *kvm,
7308                                 struct kvm_userspace_memory_region *mem,
7309                                 const struct kvm_memory_slot *old,
7310                                 enum kvm_mr_change change)
7311 {
7312
7313         int nr_mmu_pages = 0;
7314
7315         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7316                 int ret;
7317
7318                 ret = vm_munmap(old->userspace_addr,
7319                                 old->npages * PAGE_SIZE);
7320                 if (ret < 0)
7321                         printk(KERN_WARNING
7322                                "kvm_vm_ioctl_set_memory_region: "
7323                                "failed to munmap memory\n");
7324         }
7325
7326         if (!kvm->arch.n_requested_mmu_pages)
7327                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7328
7329         if (nr_mmu_pages)
7330                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7331         /*
7332          * Write protect all pages for dirty logging.
7333          * Existing largepage mappings are destroyed here and new ones will
7334          * not be created until the end of the logging.
7335          */
7336         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7337                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7338 }
7339
7340 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7341 {
7342         kvm_mmu_invalidate_zap_all_pages(kvm);
7343 }
7344
7345 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7346                                    struct kvm_memory_slot *slot)
7347 {
7348         kvm_mmu_invalidate_zap_all_pages(kvm);
7349 }
7350
7351 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7352 {
7353         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7354                 kvm_x86_ops->check_nested_events(vcpu, false);
7355
7356         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7357                 !vcpu->arch.apf.halted)
7358                 || !list_empty_careful(&vcpu->async_pf.done)
7359                 || kvm_apic_has_events(vcpu)
7360                 || vcpu->arch.pv.pv_unhalted
7361                 || atomic_read(&vcpu->arch.nmi_queued) ||
7362                 (kvm_arch_interrupt_allowed(vcpu) &&
7363                  kvm_cpu_has_interrupt(vcpu));
7364 }
7365
7366 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7367 {
7368         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7369 }
7370
7371 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7372 {
7373         return kvm_x86_ops->interrupt_allowed(vcpu);
7374 }
7375
7376 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7377 {
7378         unsigned long current_rip = kvm_rip_read(vcpu) +
7379                 get_segment_base(vcpu, VCPU_SREG_CS);
7380
7381         return current_rip == linear_rip;
7382 }
7383 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7384
7385 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7386 {
7387         unsigned long rflags;
7388
7389         rflags = kvm_x86_ops->get_rflags(vcpu);
7390         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7391                 rflags &= ~X86_EFLAGS_TF;
7392         return rflags;
7393 }
7394 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7395
7396 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7397 {
7398         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7399             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7400                 rflags |= X86_EFLAGS_TF;
7401         kvm_x86_ops->set_rflags(vcpu, rflags);
7402         kvm_make_request(KVM_REQ_EVENT, vcpu);
7403 }
7404 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7405
7406 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7407 {
7408         int r;
7409
7410         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7411               work->wakeup_all)
7412                 return;
7413
7414         r = kvm_mmu_reload(vcpu);
7415         if (unlikely(r))
7416                 return;
7417
7418         if (!vcpu->arch.mmu.direct_map &&
7419               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7420                 return;
7421
7422         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7423 }
7424
7425 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7426 {
7427         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7428 }
7429
7430 static inline u32 kvm_async_pf_next_probe(u32 key)
7431 {
7432         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7433 }
7434
7435 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7436 {
7437         u32 key = kvm_async_pf_hash_fn(gfn);
7438
7439         while (vcpu->arch.apf.gfns[key] != ~0)
7440                 key = kvm_async_pf_next_probe(key);
7441
7442         vcpu->arch.apf.gfns[key] = gfn;
7443 }
7444
7445 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7446 {
7447         int i;
7448         u32 key = kvm_async_pf_hash_fn(gfn);
7449
7450         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7451                      (vcpu->arch.apf.gfns[key] != gfn &&
7452                       vcpu->arch.apf.gfns[key] != ~0); i++)
7453                 key = kvm_async_pf_next_probe(key);
7454
7455         return key;
7456 }
7457
7458 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7459 {
7460         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7461 }
7462
7463 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7464 {
7465         u32 i, j, k;
7466
7467         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7468         while (true) {
7469                 vcpu->arch.apf.gfns[i] = ~0;
7470                 do {
7471                         j = kvm_async_pf_next_probe(j);
7472                         if (vcpu->arch.apf.gfns[j] == ~0)
7473                                 return;
7474                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7475                         /*
7476                          * k lies cyclically in ]i,j]
7477                          * |    i.k.j |
7478                          * |....j i.k.| or  |.k..j i...|
7479                          */
7480                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7481                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7482                 i = j;
7483         }
7484 }
7485
7486 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7487 {
7488
7489         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7490                                       sizeof(val));
7491 }
7492
7493 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7494                                      struct kvm_async_pf *work)
7495 {
7496         struct x86_exception fault;
7497
7498         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7499         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7500
7501         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7502             (vcpu->arch.apf.send_user_only &&
7503              kvm_x86_ops->get_cpl(vcpu) == 0))
7504                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7505         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7506                 fault.vector = PF_VECTOR;
7507                 fault.error_code_valid = true;
7508                 fault.error_code = 0;
7509                 fault.nested_page_fault = false;
7510                 fault.address = work->arch.token;
7511                 kvm_inject_page_fault(vcpu, &fault);
7512         }
7513 }
7514
7515 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7516                                  struct kvm_async_pf *work)
7517 {
7518         struct x86_exception fault;
7519
7520         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7521         if (work->wakeup_all)
7522                 work->arch.token = ~0; /* broadcast wakeup */
7523         else
7524                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7525
7526         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7527             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7528                 fault.vector = PF_VECTOR;
7529                 fault.error_code_valid = true;
7530                 fault.error_code = 0;
7531                 fault.nested_page_fault = false;
7532                 fault.address = work->arch.token;
7533                 kvm_inject_page_fault(vcpu, &fault);
7534         }
7535         vcpu->arch.apf.halted = false;
7536         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7537 }
7538
7539 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7540 {
7541         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7542                 return true;
7543         else
7544                 return !kvm_event_needs_reinjection(vcpu) &&
7545                         kvm_x86_ops->interrupt_allowed(vcpu);
7546 }
7547
7548 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7549 {
7550         atomic_inc(&kvm->arch.noncoherent_dma_count);
7551 }
7552 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7553
7554 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7555 {
7556         atomic_dec(&kvm->arch.noncoherent_dma_count);
7557 }
7558 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7559
7560 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7561 {
7562         return atomic_read(&kvm->arch.noncoherent_dma_count);
7563 }
7564 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7565
7566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7567 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7568 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7569 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7570 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7571 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7572 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);