2 * x86 instruction analysis
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * Copyright (C) IBM Corporation, 2002, 2004, 2009
21 #include <linux/string.h>
25 /* Verify next sizeof(t) bytes can be on the same instruction */
26 #define validate_next(t, insn, n) \
27 ((insn)->next_byte + sizeof(t) + n - (insn)->kaddr <= MAX_INSN_SIZE)
29 #define __get_next(t, insn) \
30 ({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; })
32 #define __peek_nbyte_next(t, insn, n) \
33 ({ t r = *(t*)((insn)->next_byte + n); r; })
35 #define get_next(t, insn) \
36 ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
38 #define peek_nbyte_next(t, insn, n) \
39 ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
41 #define peek_next(t, insn) peek_nbyte_next(t, insn, 0)
44 * insn_init() - initialize struct insn
45 * @insn: &struct insn to be initialized
46 * @kaddr: address (in kernel memory) of instruction (or copy thereof)
47 * @x86_64: !0 for 64-bit kernel or 64-bit app
49 void insn_init(struct insn *insn, const void *kaddr, int x86_64)
51 memset(insn, 0, sizeof(*insn));
53 insn->next_byte = kaddr;
54 insn->x86_64 = x86_64 ? 1 : 0;
63 * insn_get_prefixes - scan x86 instruction prefix bytes
64 * @insn: &struct insn containing instruction
66 * Populates the @insn->prefixes bitmap, and updates @insn->next_byte
67 * to point to the (first) opcode. No effect if @insn->prefixes.got
70 void insn_get_prefixes(struct insn *insn)
72 struct insn_field *prefixes = &insn->prefixes;
82 b = peek_next(insn_byte_t, insn);
83 attr = inat_get_opcode_attribute(b);
84 while (inat_is_legacy_prefix(attr)) {
85 /* Skip if same prefix */
86 for (i = 0; i < nb; i++)
87 if (prefixes->bytes[i] == b)
90 /* Invalid instruction */
92 prefixes->bytes[nb++] = b;
93 if (inat_is_address_size_prefix(attr)) {
94 /* address size switches 2/4 or 4/8 */
96 insn->addr_bytes ^= 12;
98 insn->addr_bytes ^= 6;
99 } else if (inat_is_operand_size_prefix(attr)) {
100 /* oprand size switches 2/4 */
101 insn->opnd_bytes ^= 6;
107 b = peek_next(insn_byte_t, insn);
108 attr = inat_get_opcode_attribute(b);
110 /* Set the last prefix */
111 if (lb && lb != insn->prefixes.bytes[3]) {
112 if (unlikely(insn->prefixes.bytes[3])) {
113 /* Swap the last prefix */
114 b = insn->prefixes.bytes[3];
115 for (i = 0; i < nb; i++)
116 if (prefixes->bytes[i] == lb)
117 prefixes->bytes[i] = b;
119 insn->prefixes.bytes[3] = lb;
122 /* Decode REX prefix */
124 b = peek_next(insn_byte_t, insn);
125 attr = inat_get_opcode_attribute(b);
126 if (inat_is_rex_prefix(attr)) {
127 insn->rex_prefix.value = b;
128 insn->rex_prefix.nbytes = 1;
131 /* REX.W overrides opnd_size */
132 insn->opnd_bytes = 8;
135 insn->rex_prefix.got = 1;
137 /* Decode VEX prefix */
138 b = peek_next(insn_byte_t, insn);
139 attr = inat_get_opcode_attribute(b);
140 if (inat_is_vex_prefix(attr)) {
141 insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1);
144 * In 32-bits mode, if the [7:6] bits (mod bits of
145 * ModRM) on the second byte are not 11b, it is
148 if (X86_MODRM_MOD(b2) != 3)
151 insn->vex_prefix.bytes[0] = b;
152 insn->vex_prefix.bytes[1] = b2;
153 if (inat_is_vex3_prefix(attr)) {
154 b2 = peek_nbyte_next(insn_byte_t, insn, 2);
155 insn->vex_prefix.bytes[2] = b2;
156 insn->vex_prefix.nbytes = 3;
157 insn->next_byte += 3;
158 if (insn->x86_64 && X86_VEX_W(b2))
159 /* VEX.W overrides opnd_size */
160 insn->opnd_bytes = 8;
162 insn->vex_prefix.nbytes = 2;
163 insn->next_byte += 2;
167 insn->vex_prefix.got = 1;
176 * insn_get_opcode - collect opcode(s)
177 * @insn: &struct insn containing instruction
179 * Populates @insn->opcode, updates @insn->next_byte to point past the
180 * opcode byte(s), and set @insn->attr (except for groups).
181 * If necessary, first collects any preceding (prefix) bytes.
182 * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
185 void insn_get_opcode(struct insn *insn)
187 struct insn_field *opcode = &insn->opcode;
192 if (!insn->prefixes.got)
193 insn_get_prefixes(insn);
195 /* Get first opcode */
196 op = get_next(insn_byte_t, insn);
197 opcode->bytes[0] = op;
200 /* Check if there is VEX prefix or not */
201 if (insn_is_avx(insn)) {
203 m = insn_vex_m_bits(insn);
204 p = insn_vex_p_bits(insn);
205 insn->attr = inat_get_avx_attribute(op, m, p);
206 if (!inat_accept_vex(insn->attr) && !inat_is_group(insn->attr))
207 insn->attr = 0; /* This instruction is bad */
208 goto end; /* VEX has only 1 byte for opcode */
211 insn->attr = inat_get_opcode_attribute(op);
212 while (inat_is_escape(insn->attr)) {
213 /* Get escaped opcode */
214 op = get_next(insn_byte_t, insn);
215 opcode->bytes[opcode->nbytes++] = op;
216 pfx_id = insn_last_prefix_id(insn);
217 insn->attr = inat_get_escape_attribute(op, pfx_id, insn->attr);
219 if (inat_must_vex(insn->attr))
220 insn->attr = 0; /* This instruction is bad */
229 * insn_get_modrm - collect ModRM byte, if any
230 * @insn: &struct insn containing instruction
232 * Populates @insn->modrm and updates @insn->next_byte to point past the
233 * ModRM byte, if any. If necessary, first collects the preceding bytes
234 * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
236 void insn_get_modrm(struct insn *insn)
238 struct insn_field *modrm = &insn->modrm;
239 insn_byte_t pfx_id, mod;
242 if (!insn->opcode.got)
243 insn_get_opcode(insn);
245 if (inat_has_modrm(insn->attr)) {
246 mod = get_next(insn_byte_t, insn);
249 if (inat_is_group(insn->attr)) {
250 pfx_id = insn_last_prefix_id(insn);
251 insn->attr = inat_get_group_attribute(mod, pfx_id,
253 if (insn_is_avx(insn) && !inat_accept_vex(insn->attr))
254 insn->attr = 0; /* This is bad */
258 if (insn->x86_64 && inat_is_force64(insn->attr))
259 insn->opnd_bytes = 8;
268 * insn_rip_relative() - Does instruction use RIP-relative addressing mode?
269 * @insn: &struct insn containing instruction
271 * If necessary, first collects the instruction up to and including the
272 * ModRM byte. No effect if @insn->x86_64 is 0.
274 int insn_rip_relative(struct insn *insn)
276 struct insn_field *modrm = &insn->modrm;
281 insn_get_modrm(insn);
283 * For rip-relative instructions, the mod field (top 2 bits)
284 * is zero and the r/m field (bottom 3 bits) is 0x5.
286 return (modrm->nbytes && (modrm->value & 0xc7) == 0x5);
290 * insn_get_sib() - Get the SIB byte of instruction
291 * @insn: &struct insn containing instruction
293 * If necessary, first collects the instruction up to and including the
296 void insn_get_sib(struct insn *insn)
302 if (!insn->modrm.got)
303 insn_get_modrm(insn);
304 if (insn->modrm.nbytes) {
305 modrm = (insn_byte_t)insn->modrm.value;
306 if (insn->addr_bytes != 2 &&
307 X86_MODRM_MOD(modrm) != 3 && X86_MODRM_RM(modrm) == 4) {
308 insn->sib.value = get_next(insn_byte_t, insn);
309 insn->sib.nbytes = 1;
320 * insn_get_displacement() - Get the displacement of instruction
321 * @insn: &struct insn containing instruction
323 * If necessary, first collects the instruction up to and including the
325 * Displacement value is sign-expanded.
327 void insn_get_displacement(struct insn *insn)
329 insn_byte_t mod, rm, base;
331 if (insn->displacement.got)
335 if (insn->modrm.nbytes) {
337 * Interpreting the modrm byte:
338 * mod = 00 - no displacement fields (exceptions below)
339 * mod = 01 - 1-byte displacement field
340 * mod = 10 - displacement field is 4 bytes, or 2 bytes if
341 * address size = 2 (0x67 prefix in 32-bit mode)
342 * mod = 11 - no memory operand
344 * If address size = 2...
345 * mod = 00, r/m = 110 - displacement field is 2 bytes
347 * If address size != 2...
348 * mod != 11, r/m = 100 - SIB byte exists
349 * mod = 00, SIB base = 101 - displacement field is 4 bytes
350 * mod = 00, r/m = 101 - rip-relative addressing, displacement
353 mod = X86_MODRM_MOD(insn->modrm.value);
354 rm = X86_MODRM_RM(insn->modrm.value);
355 base = X86_SIB_BASE(insn->sib.value);
359 insn->displacement.value = get_next(char, insn);
360 insn->displacement.nbytes = 1;
361 } else if (insn->addr_bytes == 2) {
362 if ((mod == 0 && rm == 6) || mod == 2) {
363 insn->displacement.value =
364 get_next(short, insn);
365 insn->displacement.nbytes = 2;
368 if ((mod == 0 && rm == 5) || mod == 2 ||
369 (mod == 0 && base == 5)) {
370 insn->displacement.value = get_next(int, insn);
371 insn->displacement.nbytes = 4;
376 insn->displacement.got = 1;
382 /* Decode moffset16/32/64. Return 0 if failed */
383 static int __get_moffset(struct insn *insn)
385 switch (insn->addr_bytes) {
387 insn->moffset1.value = get_next(short, insn);
388 insn->moffset1.nbytes = 2;
391 insn->moffset1.value = get_next(int, insn);
392 insn->moffset1.nbytes = 4;
395 insn->moffset1.value = get_next(int, insn);
396 insn->moffset1.nbytes = 4;
397 insn->moffset2.value = get_next(int, insn);
398 insn->moffset2.nbytes = 4;
400 default: /* opnd_bytes must be modified manually */
403 insn->moffset1.got = insn->moffset2.got = 1;
411 /* Decode imm v32(Iz). Return 0 if failed */
412 static int __get_immv32(struct insn *insn)
414 switch (insn->opnd_bytes) {
416 insn->immediate.value = get_next(short, insn);
417 insn->immediate.nbytes = 2;
421 insn->immediate.value = get_next(int, insn);
422 insn->immediate.nbytes = 4;
424 default: /* opnd_bytes must be modified manually */
434 /* Decode imm v64(Iv/Ov), Return 0 if failed */
435 static int __get_immv(struct insn *insn)
437 switch (insn->opnd_bytes) {
439 insn->immediate1.value = get_next(short, insn);
440 insn->immediate1.nbytes = 2;
443 insn->immediate1.value = get_next(int, insn);
444 insn->immediate1.nbytes = 4;
447 insn->immediate1.value = get_next(int, insn);
448 insn->immediate1.nbytes = 4;
449 insn->immediate2.value = get_next(int, insn);
450 insn->immediate2.nbytes = 4;
452 default: /* opnd_bytes must be modified manually */
455 insn->immediate1.got = insn->immediate2.got = 1;
462 /* Decode ptr16:16/32(Ap) */
463 static int __get_immptr(struct insn *insn)
465 switch (insn->opnd_bytes) {
467 insn->immediate1.value = get_next(short, insn);
468 insn->immediate1.nbytes = 2;
471 insn->immediate1.value = get_next(int, insn);
472 insn->immediate1.nbytes = 4;
475 /* ptr16:64 is not exist (no segment) */
477 default: /* opnd_bytes must be modified manually */
480 insn->immediate2.value = get_next(unsigned short, insn);
481 insn->immediate2.nbytes = 2;
482 insn->immediate1.got = insn->immediate2.got = 1;
490 * insn_get_immediate() - Get the immediates of instruction
491 * @insn: &struct insn containing instruction
493 * If necessary, first collects the instruction up to and including the
494 * displacement bytes.
495 * Basically, most of immediates are sign-expanded. Unsigned-value can be
496 * get by bit masking with ((1 << (nbytes * 8)) - 1)
498 void insn_get_immediate(struct insn *insn)
500 if (insn->immediate.got)
502 if (!insn->displacement.got)
503 insn_get_displacement(insn);
505 if (inat_has_moffset(insn->attr)) {
506 if (!__get_moffset(insn))
511 if (!inat_has_immediate(insn->attr))
515 switch (inat_immediate_size(insn->attr)) {
517 insn->immediate.value = get_next(char, insn);
518 insn->immediate.nbytes = 1;
521 insn->immediate.value = get_next(short, insn);
522 insn->immediate.nbytes = 2;
525 insn->immediate.value = get_next(int, insn);
526 insn->immediate.nbytes = 4;
529 insn->immediate1.value = get_next(int, insn);
530 insn->immediate1.nbytes = 4;
531 insn->immediate2.value = get_next(int, insn);
532 insn->immediate2.nbytes = 4;
535 if (!__get_immptr(insn))
538 case INAT_IMM_VWORD32:
539 if (!__get_immv32(insn))
543 if (!__get_immv(insn))
547 /* Here, insn must have an immediate, but failed */
550 if (inat_has_second_immediate(insn->attr)) {
551 insn->immediate2.value = get_next(char, insn);
552 insn->immediate2.nbytes = 1;
555 insn->immediate.got = 1;
562 * insn_get_length() - Get the length of instruction
563 * @insn: &struct insn containing instruction
565 * If necessary, first collects the instruction up to and including the
568 void insn_get_length(struct insn *insn)
572 if (!insn->immediate.got)
573 insn_get_immediate(insn);
574 insn->length = (unsigned char)((unsigned long)insn->next_byte
575 - (unsigned long)insn->kaddr);