2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/bootmem.h> /* for max_low_pfn */
8 #include <asm/set_memory.h>
9 #include <asm/e820/api.h>
12 #include <asm/page_types.h>
13 #include <asm/sections.h>
14 #include <asm/setup.h>
15 #include <asm/tlbflush.h>
17 #include <asm/proto.h>
18 #include <asm/dma.h> /* for MAX_DMA_PFN */
19 #include <asm/microcode.h>
20 #include <asm/kaslr.h>
21 #include <asm/hypervisor.h>
24 * We need to define the tracepoints somewhere, and tlb.c
25 * is only compied when SMP=y.
27 #define CREATE_TRACE_POINTS
28 #include <trace/events/tlb.h>
30 #include "mm_internal.h"
33 * Tables translating between page_cache_type_t and pte encoding.
35 * The default values are defined statically as minimal supported mode;
36 * WC and WT fall back to UC-. pat_init() updates these values to support
37 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
38 * for the details. Note, __early_ioremap() used during early boot-time
39 * takes pgprot_t (pte encoding) and does not use these tables.
41 * Index into __cachemode2pte_tbl[] is the cachemode.
43 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
44 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
46 uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
47 [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
48 [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
49 [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
50 [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
51 [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
52 [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
54 EXPORT_SYMBOL(__cachemode2pte_tbl);
56 uint8_t __pte2cachemode_tbl[8] = {
57 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
58 [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
59 [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
60 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
61 [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
62 [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
63 [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
64 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
66 EXPORT_SYMBOL(__pte2cachemode_tbl);
68 static unsigned long __initdata pgt_buf_start;
69 static unsigned long __initdata pgt_buf_end;
70 static unsigned long __initdata pgt_buf_top;
72 static unsigned long min_pfn_mapped;
74 static bool __initdata can_use_brk_pgt = true;
77 * Pages returned are already directly mapped.
79 * Changing that is likely to break Xen, see commit:
81 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
83 * for detailed information.
85 __ref void *alloc_low_pages(unsigned int num)
93 order = get_order((unsigned long)num << PAGE_SHIFT);
94 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_NOTRACK |
98 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
100 if (min_pfn_mapped >= max_pfn_mapped)
101 panic("alloc_low_pages: ran out of memory");
102 ret = memblock_find_in_range(min_pfn_mapped << PAGE_SHIFT,
103 max_pfn_mapped << PAGE_SHIFT,
104 PAGE_SIZE * num , PAGE_SIZE);
106 panic("alloc_low_pages: can not alloc memory");
107 memblock_reserve(ret, PAGE_SIZE * num);
108 pfn = ret >> PAGE_SHIFT;
112 printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n",
113 pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1);
116 for (i = 0; i < num; i++) {
119 adr = __va((pfn + i) << PAGE_SHIFT);
123 return __va(pfn << PAGE_SHIFT);
127 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
128 * With KASLR memory randomization, depending on the machine e820 memory
129 * and the PUD alignment. We may need twice more pages when KASLR memory
130 * randomization is enabled.
132 #ifndef CONFIG_RANDOMIZE_MEMORY
133 #define INIT_PGD_PAGE_COUNT 6
135 #define INIT_PGD_PAGE_COUNT 12
137 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
138 RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
139 void __init early_alloc_pgt_buf(void)
141 unsigned long tables = INIT_PGT_BUF_SIZE;
144 base = __pa(extend_brk(tables, PAGE_SIZE));
146 pgt_buf_start = base >> PAGE_SHIFT;
147 pgt_buf_end = pgt_buf_start;
148 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
153 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
158 unsigned page_size_mask;
161 static int page_size_mask;
163 static void __init probe_page_size_mask(void)
166 * For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will
168 * This will simplify cpa(), which otherwise needs to support splitting
169 * large pages into small in interrupt context, etc.
171 if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled() && !IS_ENABLED(CONFIG_KMEMCHECK))
172 page_size_mask |= 1 << PG_LEVEL_2M;
176 /* Enable PSE if available */
177 if (boot_cpu_has(X86_FEATURE_PSE))
178 cr4_set_bits_and_update_boot(X86_CR4_PSE);
180 /* Enable PGE if available */
181 if (boot_cpu_has(X86_FEATURE_PGE)) {
182 cr4_set_bits_and_update_boot(X86_CR4_PGE);
183 __supported_pte_mask |= _PAGE_GLOBAL;
185 __supported_pte_mask &= ~_PAGE_GLOBAL;
187 /* Enable 1 GB linear kernel mappings if available: */
188 if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
189 printk(KERN_INFO "Using GB pages for direct mapping\n");
190 page_size_mask |= 1 << PG_LEVEL_1G;
197 #define NR_RANGE_MR 3
198 #else /* CONFIG_X86_64 */
199 #define NR_RANGE_MR 5
202 static int __meminit save_mr(struct map_range *mr, int nr_range,
203 unsigned long start_pfn, unsigned long end_pfn,
204 unsigned long page_size_mask)
206 if (start_pfn < end_pfn) {
207 if (nr_range >= NR_RANGE_MR)
208 panic("run out of range for init_memory_mapping\n");
209 mr[nr_range].start = start_pfn<<PAGE_SHIFT;
210 mr[nr_range].end = end_pfn<<PAGE_SHIFT;
211 mr[nr_range].page_size_mask = page_size_mask;
219 * adjust the page_size_mask for small range to go with
220 * big page size instead small one if nearby are ram too.
222 static void __ref adjust_range_page_size_mask(struct map_range *mr,
227 for (i = 0; i < nr_range; i++) {
228 if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
229 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
230 unsigned long start = round_down(mr[i].start, PMD_SIZE);
231 unsigned long end = round_up(mr[i].end, PMD_SIZE);
234 if ((end >> PAGE_SHIFT) > max_low_pfn)
238 if (memblock_is_region_memory(start, end - start))
239 mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
241 if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
242 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
243 unsigned long start = round_down(mr[i].start, PUD_SIZE);
244 unsigned long end = round_up(mr[i].end, PUD_SIZE);
246 if (memblock_is_region_memory(start, end - start))
247 mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
252 static const char *page_size_string(struct map_range *mr)
254 static const char str_1g[] = "1G";
255 static const char str_2m[] = "2M";
256 static const char str_4m[] = "4M";
257 static const char str_4k[] = "4k";
259 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
262 * 32-bit without PAE has a 4M large page size.
263 * PG_LEVEL_2M is misnamed, but we can at least
264 * print out the right size in the string.
266 if (IS_ENABLED(CONFIG_X86_32) &&
267 !IS_ENABLED(CONFIG_X86_PAE) &&
268 mr->page_size_mask & (1<<PG_LEVEL_2M))
271 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
277 static int __meminit split_mem_range(struct map_range *mr, int nr_range,
281 unsigned long start_pfn, end_pfn, limit_pfn;
285 limit_pfn = PFN_DOWN(end);
287 /* head if not big page alignment ? */
288 pfn = start_pfn = PFN_DOWN(start);
291 * Don't use a large page for the first 2/4MB of memory
292 * because there are often fixed size MTRRs in there
293 * and overlapping MTRRs into large pages can cause
297 end_pfn = PFN_DOWN(PMD_SIZE);
299 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
300 #else /* CONFIG_X86_64 */
301 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
303 if (end_pfn > limit_pfn)
305 if (start_pfn < end_pfn) {
306 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
310 /* big page (2M) range */
311 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
313 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
314 #else /* CONFIG_X86_64 */
315 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
316 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
317 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
320 if (start_pfn < end_pfn) {
321 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
322 page_size_mask & (1<<PG_LEVEL_2M));
327 /* big page (1G) range */
328 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
329 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
330 if (start_pfn < end_pfn) {
331 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
333 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
337 /* tail is not big page (1G) alignment */
338 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
339 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
340 if (start_pfn < end_pfn) {
341 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
342 page_size_mask & (1<<PG_LEVEL_2M));
347 /* tail is not big page (2M) alignment */
350 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
353 adjust_range_page_size_mask(mr, nr_range);
355 /* try to merge same page size and continuous */
356 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
357 unsigned long old_start;
358 if (mr[i].end != mr[i+1].start ||
359 mr[i].page_size_mask != mr[i+1].page_size_mask)
362 old_start = mr[i].start;
363 memmove(&mr[i], &mr[i+1],
364 (nr_range - 1 - i) * sizeof(struct map_range));
365 mr[i--].start = old_start;
369 for (i = 0; i < nr_range; i++)
370 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
371 mr[i].start, mr[i].end - 1,
372 page_size_string(&mr[i]));
377 struct range pfn_mapped[E820_MAX_ENTRIES];
380 static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
382 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES,
383 nr_pfn_mapped, start_pfn, end_pfn);
384 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES);
386 max_pfn_mapped = max(max_pfn_mapped, end_pfn);
388 if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
389 max_low_pfn_mapped = max(max_low_pfn_mapped,
390 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
393 bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
397 for (i = 0; i < nr_pfn_mapped; i++)
398 if ((start_pfn >= pfn_mapped[i].start) &&
399 (end_pfn <= pfn_mapped[i].end))
406 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
407 * This runs before bootmem is initialized and gets pages directly from
408 * the physical memory. To access them they are temporarily mapped.
410 unsigned long __ref init_memory_mapping(unsigned long start,
413 struct map_range mr[NR_RANGE_MR];
414 unsigned long ret = 0;
417 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
420 memset(mr, 0, sizeof(mr));
421 nr_range = split_mem_range(mr, 0, start, end);
423 for (i = 0; i < nr_range; i++)
424 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
425 mr[i].page_size_mask);
427 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
429 return ret >> PAGE_SHIFT;
433 * We need to iterate through the E820 memory map and create direct mappings
434 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
435 * create direct mappings for all pfns from [0 to max_low_pfn) and
436 * [4GB to max_pfn) because of possible memory holes in high addresses
437 * that cannot be marked as UC by fixed/variable range MTRRs.
438 * Depending on the alignment of E820 ranges, this may possibly result
439 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
441 * init_mem_mapping() calls init_range_memory_mapping() with big range.
442 * That range would have hole in the middle or ends, and only ram parts
443 * will be mapped in init_range_memory_mapping().
445 static unsigned long __init init_range_memory_mapping(
446 unsigned long r_start,
449 unsigned long start_pfn, end_pfn;
450 unsigned long mapped_ram_size = 0;
453 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
454 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
455 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
460 * if it is overlapping with brk pgt, we need to
461 * alloc pgt buf from memblock instead.
463 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
464 min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
465 init_memory_mapping(start, end);
466 mapped_ram_size += end - start;
467 can_use_brk_pgt = true;
470 return mapped_ram_size;
473 static unsigned long __init get_new_step_size(unsigned long step_size)
476 * Initial mapped size is PMD_SIZE (2M).
477 * We can not set step_size to be PUD_SIZE (1G) yet.
478 * In worse case, when we cross the 1G boundary, and
479 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
480 * to map 1G range with PTE. Hence we use one less than the
481 * difference of page table level shifts.
483 * Don't need to worry about overflow in the top-down case, on 32bit,
484 * when step_size is 0, round_down() returns 0 for start, and that
485 * turns it into 0x100000000ULL.
486 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
487 * needs to be taken into consideration by the code below.
489 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
493 * memory_map_top_down - Map [map_start, map_end) top down
494 * @map_start: start address of the target memory range
495 * @map_end: end address of the target memory range
497 * This function will setup direct mapping for memory range
498 * [map_start, map_end) in top-down. That said, the page tables
499 * will be allocated at the end of the memory, and we map the
500 * memory in top-down.
502 static void __init memory_map_top_down(unsigned long map_start,
503 unsigned long map_end)
505 unsigned long real_end, start, last_start;
506 unsigned long step_size;
508 unsigned long mapped_ram_size = 0;
510 /* xen has big range in reserved near end of ram, skip it at first.*/
511 addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
512 real_end = addr + PMD_SIZE;
514 /* step_size need to be small so pgt_buf from BRK could cover it */
515 step_size = PMD_SIZE;
516 max_pfn_mapped = 0; /* will get exact value next */
517 min_pfn_mapped = real_end >> PAGE_SHIFT;
518 last_start = start = real_end;
521 * We start from the top (end of memory) and go to the bottom.
522 * The memblock_find_in_range() gets us a block of RAM from the
523 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
526 while (last_start > map_start) {
527 if (last_start > step_size) {
528 start = round_down(last_start - 1, step_size);
529 if (start < map_start)
533 mapped_ram_size += init_range_memory_mapping(start,
536 min_pfn_mapped = last_start >> PAGE_SHIFT;
537 if (mapped_ram_size >= step_size)
538 step_size = get_new_step_size(step_size);
541 if (real_end < map_end)
542 init_range_memory_mapping(real_end, map_end);
546 * memory_map_bottom_up - Map [map_start, map_end) bottom up
547 * @map_start: start address of the target memory range
548 * @map_end: end address of the target memory range
550 * This function will setup direct mapping for memory range
551 * [map_start, map_end) in bottom-up. Since we have limited the
552 * bottom-up allocation above the kernel, the page tables will
553 * be allocated just above the kernel and we map the memory
554 * in [map_start, map_end) in bottom-up.
556 static void __init memory_map_bottom_up(unsigned long map_start,
557 unsigned long map_end)
559 unsigned long next, start;
560 unsigned long mapped_ram_size = 0;
561 /* step_size need to be small so pgt_buf from BRK could cover it */
562 unsigned long step_size = PMD_SIZE;
565 min_pfn_mapped = start >> PAGE_SHIFT;
568 * We start from the bottom (@map_start) and go to the top (@map_end).
569 * The memblock_find_in_range() gets us a block of RAM from the
570 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
573 while (start < map_end) {
574 if (step_size && map_end - start > step_size) {
575 next = round_up(start + 1, step_size);
582 mapped_ram_size += init_range_memory_mapping(start, next);
585 if (mapped_ram_size >= step_size)
586 step_size = get_new_step_size(step_size);
590 void __init init_mem_mapping(void)
594 probe_page_size_mask();
597 end = max_pfn << PAGE_SHIFT;
599 end = max_low_pfn << PAGE_SHIFT;
602 /* the ISA range is always mapped regardless of memory holes */
603 init_memory_mapping(0, ISA_END_ADDRESS);
605 /* Init the trampoline, possibly with KASLR memory offset */
609 * If the allocation is in bottom-up direction, we setup direct mapping
610 * in bottom-up, otherwise we setup direct mapping in top-down.
612 if (memblock_bottom_up()) {
613 unsigned long kernel_end = __pa_symbol(_end);
616 * we need two separate calls here. This is because we want to
617 * allocate page tables above the kernel. So we first map
618 * [kernel_end, end) to make memory above the kernel be mapped
619 * as soon as possible. And then use page tables allocated above
620 * the kernel to map [ISA_END_ADDRESS, kernel_end).
622 memory_map_bottom_up(kernel_end, end);
623 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
625 memory_map_top_down(ISA_END_ADDRESS, end);
629 if (max_pfn > max_low_pfn) {
630 /* can we preseve max_low_pfn ?*/
631 max_low_pfn = max_pfn;
634 early_ioremap_page_table_range_init();
637 load_cr3(swapper_pg_dir);
640 hypervisor_init_mem_mapping();
642 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
646 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
647 * is valid. The argument is a physical page number.
649 * On x86, access has to be given to the first megabyte of RAM because that
650 * area traditionally contains BIOS code and data regions used by X, dosemu,
651 * and similar apps. Since they map the entire memory range, the whole range
652 * must be allowed (for mapping), but any areas that would otherwise be
653 * disallowed are flagged as being "zero filled" instead of rejected.
654 * Access has to be given to non-kernel-ram areas as well, these contain the
655 * PCI mmio resources as well as potential bios/acpi data regions.
657 int devmem_is_allowed(unsigned long pagenr)
659 if (page_is_ram(pagenr)) {
661 * For disallowed memory regions in the low 1MB range,
662 * request that the page be shown as all zeros.
671 * This must follow RAM test, since System RAM is considered a
672 * restricted resource under CONFIG_STRICT_IOMEM.
674 if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
675 /* Low 1MB bypasses iomem restrictions. */
685 void free_init_pages(char *what, unsigned long begin, unsigned long end)
687 unsigned long begin_aligned, end_aligned;
689 /* Make sure boundaries are page aligned */
690 begin_aligned = PAGE_ALIGN(begin);
691 end_aligned = end & PAGE_MASK;
693 if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
694 begin = begin_aligned;
702 * If debugging page accesses then do not free this memory but
703 * mark them not present - any buggy init-section access will
704 * create a kernel page fault:
706 if (debug_pagealloc_enabled()) {
707 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
709 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
712 * We just marked the kernel text read only above, now that
713 * we are going to free part of that, we need to make that
714 * writeable and non-executable first.
716 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
717 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
719 free_reserved_area((void *)begin, (void *)end,
720 POISON_FREE_INITMEM, what);
724 void __ref free_initmem(void)
726 e820__reallocate_tables();
728 free_init_pages("unused kernel",
729 (unsigned long)(&__init_begin),
730 (unsigned long)(&__init_end));
733 #ifdef CONFIG_BLK_DEV_INITRD
734 void __init free_initrd_mem(unsigned long start, unsigned long end)
737 * end could be not aligned, and We can not align that,
738 * decompresser could be confused by aligned initrd_end
739 * We already reserve the end partial page before in
740 * - i386_start_kernel()
741 * - x86_64_start_kernel()
742 * - relocate_initrd()
743 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
745 free_init_pages("initrd", start, PAGE_ALIGN(end));
750 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
751 * and pass it to the MM layer - to help it set zone watermarks more
754 * Done on 64-bit systems only for the time being, although 32-bit systems
755 * might benefit from this as well.
757 void __init memblock_find_dma_reserve(void)
760 u64 nr_pages = 0, nr_free_pages = 0;
761 unsigned long start_pfn, end_pfn;
762 phys_addr_t start_addr, end_addr;
767 * Iterate over all memory ranges (free and reserved ones alike),
768 * to calculate the total number of pages in the first 16 MB of RAM:
771 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
772 start_pfn = min(start_pfn, MAX_DMA_PFN);
773 end_pfn = min(end_pfn, MAX_DMA_PFN);
775 nr_pages += end_pfn - start_pfn;
779 * Iterate over free memory ranges to calculate the number of free
780 * pages in the DMA zone, while not counting potential partial
781 * pages at the beginning or the end of the range:
784 for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) {
785 start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN);
786 end_pfn = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN);
788 if (start_pfn < end_pfn)
789 nr_free_pages += end_pfn - start_pfn;
792 set_dma_reserve(nr_pages - nr_free_pages);
796 void __init zone_sizes_init(void)
798 unsigned long max_zone_pfns[MAX_NR_ZONES];
800 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
802 #ifdef CONFIG_ZONE_DMA
803 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
805 #ifdef CONFIG_ZONE_DMA32
806 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
808 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
809 #ifdef CONFIG_HIGHMEM
810 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
813 free_area_init_nodes(max_zone_pfns);
816 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
817 .loaded_mm = &init_mm,
819 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
821 EXPORT_SYMBOL_GPL(cpu_tlbstate);
823 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
825 /* entry 0 MUST be WB (hardwired to speed up translations) */
826 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
828 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
829 __pte2cachemode_tbl[entry] = cache;