2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
73 void arch_report_meminfo(struct seq_file *m)
75 seq_printf(m, "DirectMap4k: %8lu kB\n",
76 direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m, "DirectMap2M: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_2M] << 11);
81 seq_printf(m, "DirectMap4M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 12);
85 seq_printf(m, "DirectMap1G: %8lu kB\n",
86 direct_pages_count[PG_LEVEL_1G] << 20);
89 static inline void split_page_count(int level) { }
94 static inline unsigned long highmap_start_pfn(void)
96 return __pa_symbol(_text) >> PAGE_SHIFT;
99 static inline unsigned long highmap_end_pfn(void)
101 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
106 #ifdef CONFIG_DEBUG_PAGEALLOC
107 # define debug_pagealloc 1
109 # define debug_pagealloc 0
113 within(unsigned long addr, unsigned long start, unsigned long end)
115 return addr >= start && addr < end;
123 * clflush_cache_range - flush a cache range with clflush
124 * @vaddr: virtual start address
125 * @size: number of bytes to flush
127 * clflushopt is an unordered instruction which needs fencing with mfence or
128 * sfence to avoid ordering issues.
130 void clflush_cache_range(void *vaddr, unsigned int size)
132 unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
133 void *vend = vaddr + size;
138 for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
139 p < vend; p += boot_cpu_data.x86_clflush_size)
144 EXPORT_SYMBOL_GPL(clflush_cache_range);
146 static void __cpa_flush_all(void *arg)
148 unsigned long cache = (unsigned long)arg;
151 * Flush all to work around Errata in early athlons regarding
152 * large page flushing.
156 if (cache && boot_cpu_data.x86 >= 4)
160 static void cpa_flush_all(unsigned long cache)
162 BUG_ON(irqs_disabled());
164 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
167 static void __cpa_flush_range(void *arg)
170 * We could optimize that further and do individual per page
171 * tlb invalidates for a low number of pages. Caveat: we must
172 * flush the high aliases on 64bit as well.
177 static void cpa_flush_range(unsigned long start, int numpages, int cache)
179 unsigned int i, level;
182 BUG_ON(irqs_disabled());
183 WARN_ON(PAGE_ALIGN(start) != start);
185 on_each_cpu(__cpa_flush_range, NULL, 1);
191 * We only need to flush on one CPU,
192 * clflush is a MESI-coherent instruction that
193 * will cause all other CPUs to flush the same
196 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
197 pte_t *pte = lookup_address(addr, &level);
200 * Only flush present addresses:
202 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
203 clflush_cache_range((void *) addr, PAGE_SIZE);
207 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
208 int in_flags, struct page **pages)
210 unsigned int i, level;
211 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
213 BUG_ON(irqs_disabled());
215 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
217 if (!cache || do_wbinvd)
221 * We only need to flush on one CPU,
222 * clflush is a MESI-coherent instruction that
223 * will cause all other CPUs to flush the same
226 for (i = 0; i < numpages; i++) {
230 if (in_flags & CPA_PAGES_ARRAY)
231 addr = (unsigned long)page_address(pages[i]);
235 pte = lookup_address(addr, &level);
238 * Only flush present addresses:
240 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
241 clflush_cache_range((void *)addr, PAGE_SIZE);
246 * Certain areas of memory on x86 require very specific protection flags,
247 * for example the BIOS area or kernel text. Callers don't always get this
248 * right (again, ioremap() on BIOS memory is not uncommon) so this function
249 * checks and fixes these known static required protection bits.
251 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
254 pgprot_t forbidden = __pgprot(0);
257 * The BIOS area between 640k and 1Mb needs to be executable for
258 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
260 #ifdef CONFIG_PCI_BIOS
261 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
262 pgprot_val(forbidden) |= _PAGE_NX;
266 * The kernel text needs to be executable for obvious reasons
267 * Does not cover __inittext since that is gone later on. On
268 * 64bit we do not enforce !NX on the low mapping
270 if (within(address, (unsigned long)_text, (unsigned long)_etext))
271 pgprot_val(forbidden) |= _PAGE_NX;
274 * The .rodata section needs to be read-only. Using the pfn
275 * catches all aliases.
277 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
278 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
279 pgprot_val(forbidden) |= _PAGE_RW;
281 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
283 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
284 * kernel text mappings for the large page aligned text, rodata sections
285 * will be always read-only. For the kernel identity mappings covering
286 * the holes caused by this alignment can be anything that user asks.
288 * This will preserve the large page mappings for kernel text/data
291 if (kernel_set_to_readonly &&
292 within(address, (unsigned long)_text,
293 (unsigned long)__end_rodata_hpage_align)) {
297 * Don't enforce the !RW mapping for the kernel text mapping,
298 * if the current mapping is already using small page mapping.
299 * No need to work hard to preserve large page mappings in this
302 * This also fixes the Linux Xen paravirt guest boot failure
303 * (because of unexpected read-only mappings for kernel identity
304 * mappings). In this paravirt guest case, the kernel text
305 * mapping and the kernel identity mapping share the same
306 * page-table pages. Thus we can't really use different
307 * protections for the kernel text and identity mappings. Also,
308 * these shared mappings are made of small page mappings.
309 * Thus this don't enforce !RW mapping for small page kernel
310 * text mapping logic will help Linux Xen parvirt guest boot
313 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
314 pgprot_val(forbidden) |= _PAGE_RW;
318 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
324 * Lookup the page table entry for a virtual address in a specific pgd.
325 * Return a pointer to the entry and the level of the mapping.
327 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
333 *level = PG_LEVEL_NONE;
338 pud = pud_offset(pgd, address);
342 *level = PG_LEVEL_1G;
343 if (pud_large(*pud) || !pud_present(*pud))
346 pmd = pmd_offset(pud, address);
350 *level = PG_LEVEL_2M;
351 if (pmd_large(*pmd) || !pmd_present(*pmd))
354 *level = PG_LEVEL_4K;
356 return pte_offset_kernel(pmd, address);
360 * Lookup the page table entry for a virtual address. Return a pointer
361 * to the entry and the level of the mapping.
363 * Note: We return pud and pmd either when the entry is marked large
364 * or when the present bit is not set. Otherwise we would return a
365 * pointer to a nonexisting mapping.
367 pte_t *lookup_address(unsigned long address, unsigned int *level)
369 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
371 EXPORT_SYMBOL_GPL(lookup_address);
373 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
377 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
380 return lookup_address(address, level);
384 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
385 * or NULL if not present.
387 pmd_t *lookup_pmd_address(unsigned long address)
392 pgd = pgd_offset_k(address);
396 pud = pud_offset(pgd, address);
397 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
400 return pmd_offset(pud, address);
404 * This is necessary because __pa() does not work on some
405 * kinds of memory, like vmalloc() or the alloc_remap()
406 * areas on 32-bit NUMA systems. The percpu areas can
407 * end up in this kind of memory, for instance.
409 * This could be optimized, but it is only intended to be
410 * used at inititalization time, and keeping it
411 * unoptimized should increase the testing coverage for
412 * the more obscure platforms.
414 phys_addr_t slow_virt_to_phys(void *__virt_addr)
416 unsigned long virt_addr = (unsigned long)__virt_addr;
417 phys_addr_t phys_addr;
418 unsigned long offset;
423 pte = lookup_address(virt_addr, &level);
425 pmask = page_level_mask(level);
426 offset = virt_addr & ~pmask;
427 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
428 return (phys_addr | offset);
430 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
433 * Set the new pmd in all the pgds we know about:
435 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
438 set_pte_atomic(kpte, pte);
440 if (!SHARED_KERNEL_PMD) {
443 list_for_each_entry(page, &pgd_list, lru) {
448 pgd = (pgd_t *)page_address(page) + pgd_index(address);
449 pud = pud_offset(pgd, address);
450 pmd = pmd_offset(pud, address);
451 set_pte_atomic((pte_t *)pmd, pte);
458 try_preserve_large_page(pte_t *kpte, unsigned long address,
459 struct cpa_data *cpa)
461 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
462 pte_t new_pte, old_pte, *tmp;
463 pgprot_t old_prot, new_prot, req_prot;
467 if (cpa->force_split)
470 spin_lock(&pgd_lock);
472 * Check for races, another CPU might have split this page
475 tmp = _lookup_address_cpa(cpa, address, &level);
484 psize = page_level_size(level);
485 pmask = page_level_mask(level);
493 * Calculate the number of pages, which fit into this large
494 * page starting at address:
496 nextpage_addr = (address + psize) & pmask;
497 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
498 if (numpages < cpa->numpages)
499 cpa->numpages = numpages;
502 * We are safe now. Check whether the new pgprot is the same:
503 * Convert protection attributes to 4k-format, as cpa->mask* are set
507 old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte));
509 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
510 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
513 * req_prot is in format of 4k pages. It must be converted to large
514 * page format: the caching mode includes the PAT bit located at
515 * different bit positions in the two formats.
517 req_prot = pgprot_4k_2_large(req_prot);
520 * Set the PSE and GLOBAL flags only if the PRESENT flag is
521 * set otherwise pmd_present/pmd_huge will return true even on
522 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
523 * for the ancient hardware that doesn't support it.
525 if (pgprot_val(req_prot) & _PAGE_PRESENT)
526 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
528 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
530 req_prot = canon_pgprot(req_prot);
533 * old_pte points to the large page base address. So we need
534 * to add the offset of the virtual address:
536 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
539 new_prot = static_protections(req_prot, address, pfn);
542 * We need to check the full range, whether
543 * static_protection() requires a different pgprot for one of
544 * the pages in the range we try to preserve:
546 addr = address & pmask;
547 pfn = pte_pfn(old_pte);
548 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
549 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
551 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
556 * If there are no changes, return. maxpages has been updated
559 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
565 * We need to change the attributes. Check, whether we can
566 * change the large page in one go. We request a split, when
567 * the address is not aligned and the number of pages is
568 * smaller than the number of pages in the large page. Note
569 * that we limited the number of possible pages already to
570 * the number of pages in the large page.
572 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
574 * The address is aligned and the number of pages
575 * covers the full page.
577 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
578 __set_pmd_pte(kpte, address, new_pte);
579 cpa->flags |= CPA_FLUSHTLB;
584 spin_unlock(&pgd_lock);
590 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
593 pte_t *pbase = (pte_t *)page_address(base);
594 unsigned long pfn, pfninc = 1;
595 unsigned int i, level;
599 spin_lock(&pgd_lock);
601 * Check for races, another CPU might have split this page
604 tmp = _lookup_address_cpa(cpa, address, &level);
606 spin_unlock(&pgd_lock);
610 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
611 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
613 /* promote PAT bit to correct position */
614 if (level == PG_LEVEL_2M)
615 ref_prot = pgprot_large_2_4k(ref_prot);
618 if (level == PG_LEVEL_1G) {
619 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
621 * Set the PSE flags only if the PRESENT flag is set
622 * otherwise pmd_present/pmd_huge will return true
623 * even on a non present pmd.
625 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
626 pgprot_val(ref_prot) |= _PAGE_PSE;
628 pgprot_val(ref_prot) &= ~_PAGE_PSE;
633 * Set the GLOBAL flags only if the PRESENT flag is set
634 * otherwise pmd/pte_present will return true even on a non
635 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
636 * for the ancient hardware that doesn't support it.
638 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
639 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
641 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
644 * Get the target pfn from the original entry:
646 pfn = pte_pfn(*kpte);
647 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
648 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
650 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
651 PFN_DOWN(__pa(address)) + 1))
652 split_page_count(level);
655 * Install the new, split up pagetable.
657 * We use the standard kernel pagetable protections for the new
658 * pagetable protections, the actual ptes set above control the
659 * primary protection behavior:
661 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
664 * Intel Atom errata AAH41 workaround.
666 * The real fix should be in hw or in a microcode update, but
667 * we also probabilistically try to reduce the window of having
668 * a large TLB mixed with 4K TLBs while instruction fetches are
672 spin_unlock(&pgd_lock);
677 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
678 unsigned long address)
682 if (!debug_pagealloc)
683 spin_unlock(&cpa_lock);
684 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
685 if (!debug_pagealloc)
686 spin_lock(&cpa_lock);
690 if (__split_large_page(cpa, kpte, address, base))
696 static bool try_to_free_pte_page(pte_t *pte)
700 for (i = 0; i < PTRS_PER_PTE; i++)
701 if (!pte_none(pte[i]))
704 free_page((unsigned long)pte);
708 static bool try_to_free_pmd_page(pmd_t *pmd)
712 for (i = 0; i < PTRS_PER_PMD; i++)
713 if (!pmd_none(pmd[i]))
716 free_page((unsigned long)pmd);
720 static bool try_to_free_pud_page(pud_t *pud)
724 for (i = 0; i < PTRS_PER_PUD; i++)
725 if (!pud_none(pud[i]))
728 free_page((unsigned long)pud);
732 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
734 pte_t *pte = pte_offset_kernel(pmd, start);
736 while (start < end) {
737 set_pte(pte, __pte(0));
743 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
750 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
751 unsigned long start, unsigned long end)
753 if (unmap_pte_range(pmd, start, end))
754 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
758 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
760 pmd_t *pmd = pmd_offset(pud, start);
763 * Not on a 2MB page boundary?
765 if (start & (PMD_SIZE - 1)) {
766 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
767 unsigned long pre_end = min_t(unsigned long, end, next_page);
769 __unmap_pmd_range(pud, pmd, start, pre_end);
776 * Try to unmap in 2M chunks.
778 while (end - start >= PMD_SIZE) {
782 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
792 return __unmap_pmd_range(pud, pmd, start, end);
795 * Try again to free the PMD page if haven't succeeded above.
798 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
802 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
804 pud_t *pud = pud_offset(pgd, start);
807 * Not on a GB page boundary?
809 if (start & (PUD_SIZE - 1)) {
810 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
811 unsigned long pre_end = min_t(unsigned long, end, next_page);
813 unmap_pmd_range(pud, start, pre_end);
820 * Try to unmap in 1G chunks?
822 while (end - start >= PUD_SIZE) {
827 unmap_pmd_range(pud, start, start + PUD_SIZE);
837 unmap_pmd_range(pud, start, end);
840 * No need to try to free the PUD page because we'll free it in
841 * populate_pgd's error path
845 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
847 pgd_t *pgd_entry = root + pgd_index(addr);
849 unmap_pud_range(pgd_entry, addr, end);
851 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
852 pgd_clear(pgd_entry);
855 static int alloc_pte_page(pmd_t *pmd)
857 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
861 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
865 static int alloc_pmd_page(pud_t *pud)
867 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
871 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
875 static void populate_pte(struct cpa_data *cpa,
876 unsigned long start, unsigned long end,
877 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
881 pte = pte_offset_kernel(pmd, start);
883 while (num_pages-- && start < end) {
885 /* deal with the NX bit */
886 if (!(pgprot_val(pgprot) & _PAGE_NX))
887 cpa->pfn &= ~_PAGE_NX;
889 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
892 cpa->pfn += PAGE_SIZE;
897 static int populate_pmd(struct cpa_data *cpa,
898 unsigned long start, unsigned long end,
899 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
901 unsigned int cur_pages = 0;
906 * Not on a 2M boundary?
908 if (start & (PMD_SIZE - 1)) {
909 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
910 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
912 pre_end = min_t(unsigned long, pre_end, next_page);
913 cur_pages = (pre_end - start) >> PAGE_SHIFT;
914 cur_pages = min_t(unsigned int, num_pages, cur_pages);
919 pmd = pmd_offset(pud, start);
921 if (alloc_pte_page(pmd))
924 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
930 * We mapped them all?
932 if (num_pages == cur_pages)
935 pmd_pgprot = pgprot_4k_2_large(pgprot);
937 while (end - start >= PMD_SIZE) {
940 * We cannot use a 1G page so allocate a PMD page if needed.
943 if (alloc_pmd_page(pud))
946 pmd = pmd_offset(pud, start);
948 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
949 massage_pgprot(pmd_pgprot)));
952 cpa->pfn += PMD_SIZE;
953 cur_pages += PMD_SIZE >> PAGE_SHIFT;
957 * Map trailing 4K pages.
960 pmd = pmd_offset(pud, start);
962 if (alloc_pte_page(pmd))
965 populate_pte(cpa, start, end, num_pages - cur_pages,
971 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
979 end = start + (cpa->numpages << PAGE_SHIFT);
982 * Not on a Gb page boundary? => map everything up to it with
985 if (start & (PUD_SIZE - 1)) {
986 unsigned long pre_end;
987 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
989 pre_end = min_t(unsigned long, end, next_page);
990 cur_pages = (pre_end - start) >> PAGE_SHIFT;
991 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
993 pud = pud_offset(pgd, start);
999 if (alloc_pmd_page(pud))
1002 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1010 /* We mapped them all? */
1011 if (cpa->numpages == cur_pages)
1014 pud = pud_offset(pgd, start);
1015 pud_pgprot = pgprot_4k_2_large(pgprot);
1018 * Map everything starting from the Gb boundary, possibly with 1G pages
1020 while (end - start >= PUD_SIZE) {
1021 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1022 massage_pgprot(pud_pgprot)));
1025 cpa->pfn += PUD_SIZE;
1026 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1030 /* Map trailing leftover */
1034 pud = pud_offset(pgd, start);
1036 if (alloc_pmd_page(pud))
1039 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1050 * Restrictions for kernel page table do not necessarily apply when mapping in
1053 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1055 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1056 pud_t *pud = NULL; /* shut up gcc */
1060 pgd_entry = cpa->pgd + pgd_index(addr);
1063 * Allocate a PUD page and hand it down for mapping.
1065 if (pgd_none(*pgd_entry)) {
1066 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1070 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1073 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1074 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1076 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1078 unmap_pgd_range(cpa->pgd, addr,
1079 addr + (cpa->numpages << PAGE_SHIFT));
1083 cpa->numpages = ret;
1087 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1091 return populate_pgd(cpa, vaddr);
1094 * Ignore all non primary paths.
1100 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1102 * Also set numpages to '1' indicating that we processed cpa req for
1103 * one virtual address page and its pfn. TBD: numpages can be set based
1104 * on the initial value and the level returned by lookup_address().
1106 if (within(vaddr, PAGE_OFFSET,
1107 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1109 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1112 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1113 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1120 static int __change_page_attr(struct cpa_data *cpa, int primary)
1122 unsigned long address;
1125 pte_t *kpte, old_pte;
1127 if (cpa->flags & CPA_PAGES_ARRAY) {
1128 struct page *page = cpa->pages[cpa->curpage];
1129 if (unlikely(PageHighMem(page)))
1131 address = (unsigned long)page_address(page);
1132 } else if (cpa->flags & CPA_ARRAY)
1133 address = cpa->vaddr[cpa->curpage];
1135 address = *cpa->vaddr;
1137 kpte = _lookup_address_cpa(cpa, address, &level);
1139 return __cpa_process_fault(cpa, address, primary);
1142 if (!pte_val(old_pte))
1143 return __cpa_process_fault(cpa, address, primary);
1145 if (level == PG_LEVEL_4K) {
1147 pgprot_t new_prot = pte_pgprot(old_pte);
1148 unsigned long pfn = pte_pfn(old_pte);
1150 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1151 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1153 new_prot = static_protections(new_prot, address, pfn);
1156 * Set the GLOBAL flags only if the PRESENT flag is
1157 * set otherwise pte_present will return true even on
1158 * a non present pte. The canon_pgprot will clear
1159 * _PAGE_GLOBAL for the ancient hardware that doesn't
1162 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1163 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1165 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1168 * We need to keep the pfn from the existing PTE,
1169 * after all we're only going to change it's attributes
1170 * not the memory it points to
1172 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1175 * Do we really change anything ?
1177 if (pte_val(old_pte) != pte_val(new_pte)) {
1178 set_pte_atomic(kpte, new_pte);
1179 cpa->flags |= CPA_FLUSHTLB;
1186 * Check, whether we can keep the large page intact
1187 * and just change the pte:
1189 do_split = try_preserve_large_page(kpte, address, cpa);
1191 * When the range fits into the existing large page,
1192 * return. cp->numpages and cpa->tlbflush have been updated in
1199 * We have to split the large page:
1201 err = split_large_page(cpa, kpte, address);
1204 * Do a global flush tlb after splitting the large page
1205 * and before we do the actual change page attribute in the PTE.
1207 * With out this, we violate the TLB application note, that says
1208 * "The TLBs may contain both ordinary and large-page
1209 * translations for a 4-KByte range of linear addresses. This
1210 * may occur if software modifies the paging structures so that
1211 * the page size used for the address range changes. If the two
1212 * translations differ with respect to page frame or attributes
1213 * (e.g., permissions), processor behavior is undefined and may
1214 * be implementation-specific."
1216 * We do this global tlb flush inside the cpa_lock, so that we
1217 * don't allow any other cpu, with stale tlb entries change the
1218 * page attribute in parallel, that also falls into the
1219 * just split large page entry.
1228 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1230 static int cpa_process_alias(struct cpa_data *cpa)
1232 struct cpa_data alias_cpa;
1233 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1234 unsigned long vaddr;
1237 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1241 * No need to redo, when the primary call touched the direct
1244 if (cpa->flags & CPA_PAGES_ARRAY) {
1245 struct page *page = cpa->pages[cpa->curpage];
1246 if (unlikely(PageHighMem(page)))
1248 vaddr = (unsigned long)page_address(page);
1249 } else if (cpa->flags & CPA_ARRAY)
1250 vaddr = cpa->vaddr[cpa->curpage];
1252 vaddr = *cpa->vaddr;
1254 if (!(within(vaddr, PAGE_OFFSET,
1255 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1258 alias_cpa.vaddr = &laddr;
1259 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1261 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1266 #ifdef CONFIG_X86_64
1268 * If the primary call didn't touch the high mapping already
1269 * and the physical address is inside the kernel map, we need
1270 * to touch the high mapped kernel as well:
1272 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1273 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1274 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1275 __START_KERNEL_map - phys_base;
1277 alias_cpa.vaddr = &temp_cpa_vaddr;
1278 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1281 * The high mapping range is imprecise, so ignore the
1284 __change_page_attr_set_clr(&alias_cpa, 0);
1291 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1293 int ret, numpages = cpa->numpages;
1297 * Store the remaining nr of pages for the large page
1298 * preservation check.
1300 cpa->numpages = numpages;
1301 /* for array changes, we can't use large page */
1302 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1305 if (!debug_pagealloc)
1306 spin_lock(&cpa_lock);
1307 ret = __change_page_attr(cpa, checkalias);
1308 if (!debug_pagealloc)
1309 spin_unlock(&cpa_lock);
1314 ret = cpa_process_alias(cpa);
1320 * Adjust the number of pages with the result of the
1321 * CPA operation. Either a large page has been
1322 * preserved or a single page update happened.
1324 BUG_ON(cpa->numpages > numpages);
1325 numpages -= cpa->numpages;
1326 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1329 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1335 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1336 pgprot_t mask_set, pgprot_t mask_clr,
1337 int force_split, int in_flag,
1338 struct page **pages)
1340 struct cpa_data cpa;
1341 int ret, cache, checkalias;
1342 unsigned long baddr = 0;
1344 memset(&cpa, 0, sizeof(cpa));
1347 * Check, if we are requested to change a not supported
1350 mask_set = canon_pgprot(mask_set);
1351 mask_clr = canon_pgprot(mask_clr);
1352 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1355 /* Ensure we are PAGE_SIZE aligned */
1356 if (in_flag & CPA_ARRAY) {
1358 for (i = 0; i < numpages; i++) {
1359 if (addr[i] & ~PAGE_MASK) {
1360 addr[i] &= PAGE_MASK;
1364 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1366 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1367 * No need to cehck in that case
1369 if (*addr & ~PAGE_MASK) {
1372 * People should not be passing in unaligned addresses:
1377 * Save address for cache flush. *addr is modified in the call
1378 * to __change_page_attr_set_clr() below.
1383 /* Must avoid aliasing mappings in the highmem code */
1384 kmap_flush_unused();
1390 cpa.numpages = numpages;
1391 cpa.mask_set = mask_set;
1392 cpa.mask_clr = mask_clr;
1395 cpa.force_split = force_split;
1397 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1398 cpa.flags |= in_flag;
1400 /* No alias checking for _NX bit modifications */
1401 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1403 ret = __change_page_attr_set_clr(&cpa, checkalias);
1406 * Check whether we really changed something:
1408 if (!(cpa.flags & CPA_FLUSHTLB))
1412 * No need to flush, when we did not set any of the caching
1415 cache = !!pgprot2cachemode(mask_set);
1418 * On success we use CLFLUSH, when the CPU supports it to
1419 * avoid the WBINVD. If the CPU does not support it and in the
1420 * error case we fall back to cpa_flush_all (which uses
1423 if (!ret && cpu_has_clflush) {
1424 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1425 cpa_flush_array(addr, numpages, cache,
1428 cpa_flush_range(baddr, numpages, cache);
1430 cpa_flush_all(cache);
1436 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1437 pgprot_t mask, int array)
1439 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1440 (array ? CPA_ARRAY : 0), NULL);
1443 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1444 pgprot_t mask, int array)
1446 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1447 (array ? CPA_ARRAY : 0), NULL);
1450 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1453 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1454 CPA_PAGES_ARRAY, pages);
1457 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1460 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1461 CPA_PAGES_ARRAY, pages);
1464 int _set_memory_uc(unsigned long addr, int numpages)
1467 * for now UC MINUS. see comments in ioremap_nocache()
1468 * If you really need strong UC use ioremap_uc(), but note
1469 * that you cannot override IO areas with set_memory_*() as
1470 * these helpers cannot work with IO memory.
1472 return change_page_attr_set(&addr, numpages,
1473 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1477 int set_memory_uc(unsigned long addr, int numpages)
1482 * for now UC MINUS. see comments in ioremap_nocache()
1484 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1485 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1489 ret = _set_memory_uc(addr, numpages);
1496 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1500 EXPORT_SYMBOL(set_memory_uc);
1502 static int _set_memory_array(unsigned long *addr, int addrinarray,
1503 enum page_cache_mode new_type)
1505 enum page_cache_mode set_type;
1509 for (i = 0; i < addrinarray; i++) {
1510 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1516 /* If WC, set to UC- first and then WC */
1517 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1518 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1520 ret = change_page_attr_set(addr, addrinarray,
1521 cachemode2pgprot(set_type), 1);
1523 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1524 ret = change_page_attr_set_clr(addr, addrinarray,
1526 _PAGE_CACHE_MODE_WC),
1527 __pgprot(_PAGE_CACHE_MASK),
1528 0, CPA_ARRAY, NULL);
1535 for (j = 0; j < i; j++)
1536 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1541 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1543 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1545 EXPORT_SYMBOL(set_memory_array_uc);
1547 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1549 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1551 EXPORT_SYMBOL(set_memory_array_wc);
1553 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1555 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1557 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1559 int _set_memory_wc(unsigned long addr, int numpages)
1562 unsigned long addr_copy = addr;
1564 ret = change_page_attr_set(&addr, numpages,
1565 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1568 ret = change_page_attr_set_clr(&addr_copy, numpages,
1570 _PAGE_CACHE_MODE_WC),
1571 __pgprot(_PAGE_CACHE_MASK),
1577 int set_memory_wc(unsigned long addr, int numpages)
1581 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1582 _PAGE_CACHE_MODE_WC, NULL);
1586 ret = _set_memory_wc(addr, numpages);
1588 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1592 EXPORT_SYMBOL(set_memory_wc);
1594 int _set_memory_wt(unsigned long addr, int numpages)
1596 return change_page_attr_set(&addr, numpages,
1597 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1600 int set_memory_wt(unsigned long addr, int numpages)
1604 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1605 _PAGE_CACHE_MODE_WT, NULL);
1609 ret = _set_memory_wt(addr, numpages);
1611 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1615 EXPORT_SYMBOL_GPL(set_memory_wt);
1617 int _set_memory_wb(unsigned long addr, int numpages)
1619 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1620 return change_page_attr_clear(&addr, numpages,
1621 __pgprot(_PAGE_CACHE_MASK), 0);
1624 int set_memory_wb(unsigned long addr, int numpages)
1628 ret = _set_memory_wb(addr, numpages);
1632 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1635 EXPORT_SYMBOL(set_memory_wb);
1637 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1642 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1643 ret = change_page_attr_clear(addr, addrinarray,
1644 __pgprot(_PAGE_CACHE_MASK), 1);
1648 for (i = 0; i < addrinarray; i++)
1649 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1653 EXPORT_SYMBOL(set_memory_array_wb);
1655 int set_memory_x(unsigned long addr, int numpages)
1657 if (!(__supported_pte_mask & _PAGE_NX))
1660 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1662 EXPORT_SYMBOL(set_memory_x);
1664 int set_memory_nx(unsigned long addr, int numpages)
1666 if (!(__supported_pte_mask & _PAGE_NX))
1669 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1671 EXPORT_SYMBOL(set_memory_nx);
1673 int set_memory_ro(unsigned long addr, int numpages)
1675 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1678 int set_memory_rw(unsigned long addr, int numpages)
1680 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1683 int set_memory_np(unsigned long addr, int numpages)
1685 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1688 int set_memory_4k(unsigned long addr, int numpages)
1690 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1691 __pgprot(0), 1, 0, NULL);
1694 int set_pages_uc(struct page *page, int numpages)
1696 unsigned long addr = (unsigned long)page_address(page);
1698 return set_memory_uc(addr, numpages);
1700 EXPORT_SYMBOL(set_pages_uc);
1702 static int _set_pages_array(struct page **pages, int addrinarray,
1703 enum page_cache_mode new_type)
1705 unsigned long start;
1707 enum page_cache_mode set_type;
1712 for (i = 0; i < addrinarray; i++) {
1713 if (PageHighMem(pages[i]))
1715 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1716 end = start + PAGE_SIZE;
1717 if (reserve_memtype(start, end, new_type, NULL))
1721 /* If WC, set to UC- first and then WC */
1722 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1723 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1725 ret = cpa_set_pages_array(pages, addrinarray,
1726 cachemode2pgprot(set_type));
1727 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1728 ret = change_page_attr_set_clr(NULL, addrinarray,
1730 _PAGE_CACHE_MODE_WC),
1731 __pgprot(_PAGE_CACHE_MASK),
1732 0, CPA_PAGES_ARRAY, pages);
1735 return 0; /* Success */
1738 for (i = 0; i < free_idx; i++) {
1739 if (PageHighMem(pages[i]))
1741 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1742 end = start + PAGE_SIZE;
1743 free_memtype(start, end);
1748 int set_pages_array_uc(struct page **pages, int addrinarray)
1750 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1752 EXPORT_SYMBOL(set_pages_array_uc);
1754 int set_pages_array_wc(struct page **pages, int addrinarray)
1756 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1758 EXPORT_SYMBOL(set_pages_array_wc);
1760 int set_pages_array_wt(struct page **pages, int addrinarray)
1762 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1764 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1766 int set_pages_wb(struct page *page, int numpages)
1768 unsigned long addr = (unsigned long)page_address(page);
1770 return set_memory_wb(addr, numpages);
1772 EXPORT_SYMBOL(set_pages_wb);
1774 int set_pages_array_wb(struct page **pages, int addrinarray)
1777 unsigned long start;
1781 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1782 retval = cpa_clear_pages_array(pages, addrinarray,
1783 __pgprot(_PAGE_CACHE_MASK));
1787 for (i = 0; i < addrinarray; i++) {
1788 if (PageHighMem(pages[i]))
1790 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1791 end = start + PAGE_SIZE;
1792 free_memtype(start, end);
1797 EXPORT_SYMBOL(set_pages_array_wb);
1799 int set_pages_x(struct page *page, int numpages)
1801 unsigned long addr = (unsigned long)page_address(page);
1803 return set_memory_x(addr, numpages);
1805 EXPORT_SYMBOL(set_pages_x);
1807 int set_pages_nx(struct page *page, int numpages)
1809 unsigned long addr = (unsigned long)page_address(page);
1811 return set_memory_nx(addr, numpages);
1813 EXPORT_SYMBOL(set_pages_nx);
1815 int set_pages_ro(struct page *page, int numpages)
1817 unsigned long addr = (unsigned long)page_address(page);
1819 return set_memory_ro(addr, numpages);
1822 int set_pages_rw(struct page *page, int numpages)
1824 unsigned long addr = (unsigned long)page_address(page);
1826 return set_memory_rw(addr, numpages);
1829 #ifdef CONFIG_DEBUG_PAGEALLOC
1831 static int __set_pages_p(struct page *page, int numpages)
1833 unsigned long tempaddr = (unsigned long) page_address(page);
1834 struct cpa_data cpa = { .vaddr = &tempaddr,
1836 .numpages = numpages,
1837 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1838 .mask_clr = __pgprot(0),
1842 * No alias checking needed for setting present flag. otherwise,
1843 * we may need to break large pages for 64-bit kernel text
1844 * mappings (this adds to complexity if we want to do this from
1845 * atomic context especially). Let's keep it simple!
1847 return __change_page_attr_set_clr(&cpa, 0);
1850 static int __set_pages_np(struct page *page, int numpages)
1852 unsigned long tempaddr = (unsigned long) page_address(page);
1853 struct cpa_data cpa = { .vaddr = &tempaddr,
1855 .numpages = numpages,
1856 .mask_set = __pgprot(0),
1857 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1861 * No alias checking needed for setting not present flag. otherwise,
1862 * we may need to break large pages for 64-bit kernel text
1863 * mappings (this adds to complexity if we want to do this from
1864 * atomic context especially). Let's keep it simple!
1866 return __change_page_attr_set_clr(&cpa, 0);
1869 void __kernel_map_pages(struct page *page, int numpages, int enable)
1871 if (PageHighMem(page))
1874 debug_check_no_locks_freed(page_address(page),
1875 numpages * PAGE_SIZE);
1879 * The return value is ignored as the calls cannot fail.
1880 * Large pages for identity mappings are not used at boot time
1881 * and hence no memory allocations during large page split.
1884 __set_pages_p(page, numpages);
1886 __set_pages_np(page, numpages);
1889 * We should perform an IPI and flush all tlbs,
1890 * but that can deadlock->flush only current cpu:
1894 arch_flush_lazy_mmu_mode();
1897 #ifdef CONFIG_HIBERNATION
1899 bool kernel_page_present(struct page *page)
1904 if (PageHighMem(page))
1907 pte = lookup_address((unsigned long)page_address(page), &level);
1908 return (pte_val(*pte) & _PAGE_PRESENT);
1911 #endif /* CONFIG_HIBERNATION */
1913 #endif /* CONFIG_DEBUG_PAGEALLOC */
1915 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1916 unsigned numpages, unsigned long page_flags)
1918 int retval = -EINVAL;
1920 struct cpa_data cpa = {
1924 .numpages = numpages,
1925 .mask_set = __pgprot(0),
1926 .mask_clr = __pgprot(0),
1930 if (!(__supported_pte_mask & _PAGE_NX))
1933 if (!(page_flags & _PAGE_NX))
1934 cpa.mask_clr = __pgprot(_PAGE_NX);
1936 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1938 retval = __change_page_attr_set_clr(&cpa, 0);
1945 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1948 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1952 * The testcases use internal knowledge of the implementation that shouldn't
1953 * be exposed to the rest of the kernel. Include these directly here.
1955 #ifdef CONFIG_CPA_DEBUG
1956 #include "pageattr-test.c"