2 * Low-Level PCI Support for PC
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/sched.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12 #include <linux/slab.h>
15 #include <asm/segment.h>
18 #include <asm/pci_x86.h>
20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
23 unsigned int pci_early_dump_regs;
24 static int pci_bf_sort;
27 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
28 int noioapicreroute = 0;
30 int noioapicreroute = 1;
32 int pcibios_last_bus = -1;
33 unsigned long pirq_table_addr;
34 struct pci_bus *pci_root_bus;
35 struct pci_raw_ops *raw_pci_ops;
36 struct pci_raw_ops *raw_pci_ext_ops;
38 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
39 int reg, int len, u32 *val)
41 if (domain == 0 && reg < 256 && raw_pci_ops)
42 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
44 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
48 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
49 int reg, int len, u32 val)
51 if (domain == 0 && reg < 256 && raw_pci_ops)
52 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
54 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
58 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
60 return raw_pci_read(pci_domain_nr(bus), bus->number,
61 devfn, where, size, value);
64 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
66 return raw_pci_write(pci_domain_nr(bus), bus->number,
67 devfn, where, size, value);
70 struct pci_ops pci_root_ops = {
76 * This interrupt-safe spinlock protects all accesses to PCI
77 * configuration space.
79 DEFINE_RAW_SPINLOCK(pci_config_lock);
81 static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
83 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
84 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
88 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = {
90 * Systems where PCI IO resource ISA alignment can be skipped
91 * when the ISA enable bit in the bridge control is not set
94 .callback = can_skip_ioresource_align,
95 .ident = "IBM System x3800",
97 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
98 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
102 .callback = can_skip_ioresource_align,
103 .ident = "IBM System x3850",
105 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
106 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
110 .callback = can_skip_ioresource_align,
111 .ident = "IBM System x3950",
113 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
114 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
120 void __init dmi_check_skip_isa_align(void)
122 dmi_check_system(can_skip_pciprobe_dmi_table);
125 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
127 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
128 struct resource *bar_r;
131 if (pci_probe & PCI_NOASSIGN_BARS) {
133 * If the BIOS did not assign the BAR, zero out the
134 * resource so the kernel doesn't attmept to assign
135 * it later on in pci_assign_unassigned_resources
137 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
138 bar_r = &dev->resource[bar];
139 if (bar_r->start == 0 && bar_r->end != 0) {
146 if (pci_probe & PCI_NOASSIGN_ROMS) {
150 /* we deal with BIOS assigned ROM later */
153 rom_r->start = rom_r->end = rom_r->flags = 0;
158 * Called after each bus is probed, but before its children
162 void __devinit pcibios_fixup_bus(struct pci_bus *b)
168 x86_pci_root_bus_res_quirks(b);
169 pci_read_bridge_bases(b);
170 list_for_each_entry(dev, &b->devices, bus_list)
171 pcibios_fixup_device_resources(dev);
175 * Only use DMI information to set this if nothing was passed
176 * on the kernel command line (which was parsed earlier).
179 static int __devinit set_bf_sort(const struct dmi_system_id *d)
181 if (pci_bf_sort == pci_bf_sort_default) {
182 pci_bf_sort = pci_dmi_bf;
183 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
189 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
192 static int __devinit assign_all_busses(const struct dmi_system_id *d)
194 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
195 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
196 " (pci=assign-busses)\n", d->ident);
201 static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
204 * Laptops which need pci=assign-busses to see Cardbus cards
207 .callback = assign_all_busses,
208 .ident = "Samsung X20 Laptop",
210 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
211 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
214 #endif /* __i386__ */
216 .callback = set_bf_sort,
217 .ident = "Dell PowerEdge 1950",
219 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
220 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
224 .callback = set_bf_sort,
225 .ident = "Dell PowerEdge 1955",
227 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
228 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
232 .callback = set_bf_sort,
233 .ident = "Dell PowerEdge 2900",
235 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
236 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
240 .callback = set_bf_sort,
241 .ident = "Dell PowerEdge 2950",
243 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
244 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
248 .callback = set_bf_sort,
249 .ident = "Dell PowerEdge R900",
251 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
252 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
256 .callback = set_bf_sort,
257 .ident = "HP ProLiant BL20p G3",
259 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
260 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
264 .callback = set_bf_sort,
265 .ident = "HP ProLiant BL20p G4",
267 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
268 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
272 .callback = set_bf_sort,
273 .ident = "HP ProLiant BL30p G1",
275 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
276 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
280 .callback = set_bf_sort,
281 .ident = "HP ProLiant BL25p G1",
283 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
284 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
288 .callback = set_bf_sort,
289 .ident = "HP ProLiant BL35p G1",
291 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
292 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
296 .callback = set_bf_sort,
297 .ident = "HP ProLiant BL45p G1",
299 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
300 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
304 .callback = set_bf_sort,
305 .ident = "HP ProLiant BL45p G2",
307 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
308 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
312 .callback = set_bf_sort,
313 .ident = "HP ProLiant BL460c G1",
315 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
316 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
320 .callback = set_bf_sort,
321 .ident = "HP ProLiant BL465c G1",
323 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
324 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
328 .callback = set_bf_sort,
329 .ident = "HP ProLiant BL480c G1",
331 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
332 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
336 .callback = set_bf_sort,
337 .ident = "HP ProLiant BL685c G1",
339 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
340 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
344 .callback = set_bf_sort,
345 .ident = "HP ProLiant DL360",
347 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
348 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
352 .callback = set_bf_sort,
353 .ident = "HP ProLiant DL380",
355 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
356 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
361 .callback = assign_all_busses,
362 .ident = "Compaq EVO N800c",
364 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
365 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
370 .callback = set_bf_sort,
371 .ident = "HP ProLiant DL385 G2",
373 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
374 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
378 .callback = set_bf_sort,
379 .ident = "HP ProLiant DL585 G2",
381 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
382 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
388 void __init dmi_check_pciprobe(void)
390 dmi_check_system(pciprobe_dmi_table);
393 struct pci_bus * __devinit pcibios_scan_root(int busnum)
395 struct pci_bus *bus = NULL;
396 struct pci_sysdata *sd;
398 while ((bus = pci_find_next_bus(bus)) != NULL) {
399 if (bus->number == busnum) {
400 /* Already scanned */
405 /* Allocate per-root-bus (not per bus) arch-specific data.
406 * TODO: leak; this memory is never freed.
407 * It's arguable whether it's worth the trouble to care.
409 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
411 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
415 sd->node = get_mp_bus_to_node(busnum);
417 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
418 bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
424 void __init pcibios_set_cache_line_size(void)
426 struct cpuinfo_x86 *c = &boot_cpu_data;
429 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
430 * (For older CPUs that don't support cpuid, we se it to 32 bytes
431 * It's also good for 386/486s (which actually have 16)
432 * as quite a few PCI devices do not support smaller values.
434 if (c->x86_clflush_size > 0) {
435 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
436 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
437 pci_dfl_cache_line_size << 2);
439 pci_dfl_cache_line_size = 32 >> 2;
440 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
444 int __init pcibios_init(void)
447 printk(KERN_WARNING "PCI: System does not support PCI\n");
451 pcibios_set_cache_line_size();
452 pcibios_resource_survey();
454 if (pci_bf_sort >= pci_force_bf)
455 pci_sort_breadthfirst();
459 char * __devinit pcibios_setup(char *str)
461 if (!strcmp(str, "off")) {
464 } else if (!strcmp(str, "bfsort")) {
465 pci_bf_sort = pci_force_bf;
467 } else if (!strcmp(str, "nobfsort")) {
468 pci_bf_sort = pci_force_nobf;
471 #ifdef CONFIG_PCI_BIOS
472 else if (!strcmp(str, "bios")) {
473 pci_probe = PCI_PROBE_BIOS;
475 } else if (!strcmp(str, "nobios")) {
476 pci_probe &= ~PCI_PROBE_BIOS;
478 } else if (!strcmp(str, "biosirq")) {
479 pci_probe |= PCI_BIOS_IRQ_SCAN;
481 } else if (!strncmp(str, "pirqaddr=", 9)) {
482 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
486 #ifdef CONFIG_PCI_DIRECT
487 else if (!strcmp(str, "conf1")) {
488 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
491 else if (!strcmp(str, "conf2")) {
492 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
496 #ifdef CONFIG_PCI_MMCONFIG
497 else if (!strcmp(str, "nommconf")) {
498 pci_probe &= ~PCI_PROBE_MMCONF;
501 else if (!strcmp(str, "check_enable_amd_mmconf")) {
502 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
506 else if (!strcmp(str, "noacpi")) {
510 else if (!strcmp(str, "noearly")) {
511 pci_probe |= PCI_PROBE_NOEARLY;
514 #ifndef CONFIG_X86_VISWS
515 else if (!strcmp(str, "usepirqmask")) {
516 pci_probe |= PCI_USE_PIRQ_MASK;
518 } else if (!strncmp(str, "irqmask=", 8)) {
519 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
521 } else if (!strncmp(str, "lastbus=", 8)) {
522 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
526 else if (!strcmp(str, "rom")) {
527 pci_probe |= PCI_ASSIGN_ROMS;
529 } else if (!strcmp(str, "norom")) {
530 pci_probe |= PCI_NOASSIGN_ROMS;
532 } else if (!strcmp(str, "nobar")) {
533 pci_probe |= PCI_NOASSIGN_BARS;
535 } else if (!strcmp(str, "assign-busses")) {
536 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
538 } else if (!strcmp(str, "use_crs")) {
539 pci_probe |= PCI_USE__CRS;
541 } else if (!strcmp(str, "nocrs")) {
542 pci_probe |= PCI_ROOT_NO_CRS;
544 } else if (!strcmp(str, "earlydump")) {
545 pci_early_dump_regs = 1;
547 } else if (!strcmp(str, "routeirq")) {
550 } else if (!strcmp(str, "skip_isa_align")) {
551 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
553 } else if (!strcmp(str, "noioapicquirk")) {
556 } else if (!strcmp(str, "ioapicreroute")) {
557 if (noioapicreroute != -1)
560 } else if (!strcmp(str, "noioapicreroute")) {
561 if (noioapicreroute != -1)
568 unsigned int pcibios_assign_all_busses(void)
570 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
573 int pcibios_enable_device(struct pci_dev *dev, int mask)
577 if ((err = pci_enable_resources(dev, mask)) < 0)
580 if (!pci_dev_msi_enabled(dev))
581 return pcibios_enable_irq(dev);
585 void pcibios_disable_device (struct pci_dev *dev)
587 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
588 pcibios_disable_irq(dev);
591 int pci_ext_cfg_avail(struct pci_dev *dev)
599 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
601 struct pci_bus *bus = NULL;
602 struct pci_sysdata *sd;
605 * Allocate per-root-bus (not per bus) arch-specific data.
606 * TODO: leak; this memory is never freed.
607 * It's arguable whether it's worth the trouble to care.
609 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
611 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
615 bus = pci_scan_bus(busno, ops, sd);
622 struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
624 return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
628 * NUMA info for PCI busses
630 * Early arch code is responsible for filling in reasonable values here.
631 * A node id of "-1" means "use current node". In other words, if a bus
632 * has a -1 node id, it's not tightly coupled to any particular chunk
633 * of memory (as is the case on some Nehalem systems).
641 static int mp_bus_to_node[BUS_NR] = {
642 [0 ... BUS_NR - 1] = -1
645 void set_mp_bus_to_node(int busnum, int node)
647 if (busnum >= 0 && busnum < BUS_NR)
648 mp_bus_to_node[busnum] = node;
651 int get_mp_bus_to_node(int busnum)
655 if (busnum < 0 || busnum > (BUS_NR - 1))
658 node = mp_bus_to_node[busnum];
661 * let numa_node_id to decide it later in dma_alloc_pages
662 * if there is no ram on that node
664 if (node != -1 && !node_online(node))
670 #else /* CONFIG_X86_32 */
672 static int mp_bus_to_node[BUS_NR] = {
673 [0 ... BUS_NR - 1] = -1
676 void set_mp_bus_to_node(int busnum, int node)
678 if (busnum >= 0 && busnum < BUS_NR)
679 mp_bus_to_node[busnum] = (unsigned char) node;
682 int get_mp_bus_to_node(int busnum)
686 if (busnum < 0 || busnum > (BUS_NR - 1))
688 node = mp_bus_to_node[busnum];
692 #endif /* CONFIG_X86_32 */
694 #endif /* CONFIG_NUMA */