2 * Low-Level PCI Access for i386 machines
4 * Copyright 1993, 1994 Drew Eckhardt
6 * (Unix and Linux consulting and custom programming)
10 * Drew's work was sponsored by:
11 * iX Multiuser Multitasking Magazine
15 * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
17 * For more information, please consult the following manuals (look at
18 * http://www.pcisig.com/ for how to get them):
20 * PCI BIOS Specification
21 * PCI Local Bus Specification
22 * PCI to PCI Bridge Specification
23 * PCI System Design Guide
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/export.h>
30 #include <linux/pci.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/errno.h>
34 #include <linux/bootmem.h>
38 #include <asm/pci_x86.h>
39 #include <asm/io_apic.h>
43 * This list of dynamic mappings is for temporarily maintaining
44 * original BIOS BAR addresses for possible reinstatement.
46 struct pcibios_fwaddrmap {
47 struct list_head list;
49 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE];
52 static LIST_HEAD(pcibios_fwaddrmappings);
53 static DEFINE_SPINLOCK(pcibios_fwaddrmap_lock);
54 static bool pcibios_fw_addr_done;
56 /* Must be called with 'pcibios_fwaddrmap_lock' lock held. */
57 static struct pcibios_fwaddrmap *pcibios_fwaddrmap_lookup(struct pci_dev *dev)
59 struct pcibios_fwaddrmap *map;
61 WARN_ON_SMP(!spin_is_locked(&pcibios_fwaddrmap_lock));
63 list_for_each_entry(map, &pcibios_fwaddrmappings, list)
71 pcibios_save_fw_addr(struct pci_dev *dev, int idx, resource_size_t fw_addr)
74 struct pcibios_fwaddrmap *map;
76 if (pcibios_fw_addr_done)
79 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
80 map = pcibios_fwaddrmap_lookup(dev);
82 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
83 map = kzalloc(sizeof(*map), GFP_KERNEL);
87 map->dev = pci_dev_get(dev);
88 map->fw_addr[idx] = fw_addr;
89 INIT_LIST_HEAD(&map->list);
91 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
92 list_add_tail(&map->list, &pcibios_fwaddrmappings);
94 map->fw_addr[idx] = fw_addr;
95 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
98 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx)
101 struct pcibios_fwaddrmap *map;
102 resource_size_t fw_addr = 0;
104 if (pcibios_fw_addr_done)
107 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
108 map = pcibios_fwaddrmap_lookup(dev);
110 fw_addr = map->fw_addr[idx];
111 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
116 static void __init pcibios_fw_addr_list_del(void)
119 struct pcibios_fwaddrmap *entry, *next;
121 spin_lock_irqsave(&pcibios_fwaddrmap_lock, flags);
122 list_for_each_entry_safe(entry, next, &pcibios_fwaddrmappings, list) {
123 list_del(&entry->list);
124 pci_dev_put(entry->dev);
127 spin_unlock_irqrestore(&pcibios_fwaddrmap_lock, flags);
128 pcibios_fw_addr_done = true;
132 skip_isa_ioresource_align(struct pci_dev *dev) {
134 if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) &&
135 !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
141 * We need to avoid collisions with `mirrored' VGA ports
142 * and other strange ISA hardware, so we always want the
143 * addresses to be allocated in the 0x000-0x0ff region
146 * Why? Because some silly external IO cards only decode
147 * the low 10 bits of the IO address. The 0x00-0xff region
148 * is reserved for motherboard devices that decode all 16
149 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
150 * but we want to try to avoid allocating at 0x2900-0x2bff
151 * which might have be mirrored at 0x0100-0x03ff..
154 pcibios_align_resource(void *data, const struct resource *res,
155 resource_size_t size, resource_size_t align)
157 struct pci_dev *dev = data;
158 resource_size_t start = res->start;
160 if (res->flags & IORESOURCE_IO) {
161 if (skip_isa_ioresource_align(dev))
164 start = (start + 0x3ff) & ~0x3ff;
168 EXPORT_SYMBOL(pcibios_align_resource);
171 * Handle resources of PCI devices. If the world were perfect, we could
172 * just allocate all the resource regions and do nothing more. It isn't.
173 * On the other hand, we cannot just re-allocate all devices, as it would
174 * require us to know lots of host bridge internals. So we attempt to
175 * keep as much of the original configuration as possible, but tweak it
176 * when it's found to be wrong.
178 * Known BIOS problems we have to work around:
179 * - I/O or memory regions not configured
180 * - regions configured, but not enabled in the command register
181 * - bogus I/O addresses above 64K used
182 * - expansion ROMs left enabled (this may sound harmless, but given
183 * the fact the PCI specs explicitly allow address decoders to be
184 * shared between expansion ROMs and other resource regions, it's
185 * at least dangerous)
186 * - bad resource sizes or overlaps with other regions
189 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
190 * This gives us fixed barriers on where we can allocate.
191 * (2) Allocate resources for all enabled devices. If there is
192 * a collision, just mark the resource as unallocated. Also
193 * disable expansion ROMs during this step.
194 * (3) Try to allocate resources for disabled devices. If the
195 * resources were assigned correctly, everything goes well,
196 * if they weren't, they won't disturb allocation of other
198 * (4) Assign new addresses to resources which were either
199 * not configured at all or misconfigured. If explicitly
200 * requested by the user, configure expansion ROM address
204 static void pcibios_allocate_bridge_resources(struct pci_dev *dev)
209 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
210 r = &dev->resource[idx];
213 if (r->parent) /* Already allocated */
215 if (!r->start || pci_claim_resource(dev, idx) < 0) {
217 * Something is wrong with the region.
218 * Invalidate the resource to prevent
219 * child resource allocations in this
222 r->start = r->end = 0;
228 static void pcibios_allocate_bus_resources(struct pci_bus *bus)
230 struct pci_bus *child;
232 /* Depth-First Search on bus tree */
234 pcibios_allocate_bridge_resources(bus->self);
235 list_for_each_entry(child, &bus->children, node)
236 pcibios_allocate_bus_resources(child);
239 struct pci_check_idx_range {
244 static void pcibios_allocate_dev_resources(struct pci_dev *dev, int pass)
246 int idx, disabled, i;
250 struct pci_check_idx_range idx_range[] = {
251 { PCI_STD_RESOURCES, PCI_STD_RESOURCE_END },
252 #ifdef CONFIG_PCI_IOV
253 { PCI_IOV_RESOURCES, PCI_IOV_RESOURCE_END },
257 pci_read_config_word(dev, PCI_COMMAND, &command);
258 for (i = 0; i < ARRAY_SIZE(idx_range); i++)
259 for (idx = idx_range[i].start; idx <= idx_range[i].end; idx++) {
260 r = &dev->resource[idx];
261 if (r->parent) /* Already allocated */
263 if (!r->start) /* Address not assigned at all */
265 if (r->flags & IORESOURCE_IO)
266 disabled = !(command & PCI_COMMAND_IO);
268 disabled = !(command & PCI_COMMAND_MEMORY);
269 if (pass == disabled) {
271 "BAR %d: reserving %pr (d=%d, p=%d)\n",
272 idx, r, disabled, pass);
273 if (pci_claim_resource(dev, idx) < 0) {
274 if (r->flags & IORESOURCE_PCI_FIXED) {
275 dev_info(&dev->dev, "BAR %d %pR is immovable\n",
278 /* We'll assign a new address later */
279 pcibios_save_fw_addr(dev,
288 r = &dev->resource[PCI_ROM_RESOURCE];
289 if (r->flags & IORESOURCE_ROM_ENABLE) {
290 /* Turn the ROM off, leave the resource region,
291 * but keep it unregistered. */
293 dev_dbg(&dev->dev, "disabling ROM %pR\n", r);
294 r->flags &= ~IORESOURCE_ROM_ENABLE;
295 pci_read_config_dword(dev, dev->rom_base_reg, ®);
296 pci_write_config_dword(dev, dev->rom_base_reg,
297 reg & ~PCI_ROM_ADDRESS_ENABLE);
302 static void pcibios_allocate_resources(struct pci_bus *bus, int pass)
305 struct pci_bus *child;
307 list_for_each_entry(dev, &bus->devices, bus_list) {
308 pcibios_allocate_dev_resources(dev, pass);
310 child = dev->subordinate;
312 pcibios_allocate_resources(child, pass);
316 static void pcibios_allocate_dev_rom_resource(struct pci_dev *dev)
321 * Try to use BIOS settings for ROMs, otherwise let
322 * pci_assign_unassigned_resources() allocate the new
325 r = &dev->resource[PCI_ROM_RESOURCE];
326 if (!r->flags || !r->start)
328 if (r->parent) /* Already allocated */
331 if (pci_claim_resource(dev, PCI_ROM_RESOURCE) < 0) {
336 static void pcibios_allocate_rom_resources(struct pci_bus *bus)
339 struct pci_bus *child;
341 list_for_each_entry(dev, &bus->devices, bus_list) {
342 pcibios_allocate_dev_rom_resource(dev);
344 child = dev->subordinate;
346 pcibios_allocate_rom_resources(child);
350 static int __init pcibios_assign_resources(void)
354 if (!(pci_probe & PCI_ASSIGN_ROMS))
355 list_for_each_entry(bus, &pci_root_buses, node)
356 pcibios_allocate_rom_resources(bus);
358 pci_assign_unassigned_resources();
359 pcibios_fw_addr_list_del();
365 * called in fs_initcall (one below subsys_initcall),
366 * give a chance for motherboard reserve resources
368 fs_initcall(pcibios_assign_resources);
370 void pcibios_resource_survey_bus(struct pci_bus *bus)
372 dev_printk(KERN_DEBUG, &bus->dev, "Allocating resources\n");
374 pcibios_allocate_bus_resources(bus);
376 pcibios_allocate_resources(bus, 0);
377 pcibios_allocate_resources(bus, 1);
379 if (!(pci_probe & PCI_ASSIGN_ROMS))
380 pcibios_allocate_rom_resources(bus);
383 void __init pcibios_resource_survey(void)
387 DBG("PCI: Allocating resources\n");
389 list_for_each_entry(bus, &pci_root_buses, node)
390 pcibios_allocate_bus_resources(bus);
392 list_for_each_entry(bus, &pci_root_buses, node)
393 pcibios_allocate_resources(bus, 0);
394 list_for_each_entry(bus, &pci_root_buses, node)
395 pcibios_allocate_resources(bus, 1);
397 e820_reserve_resources_late();
399 * Insert the IO APIC resources after PCI initialization has
400 * occurred to handle IO APICS that are mapped in on a BAR in
401 * PCI space, but before trying to assign unassigned pci res.
403 ioapic_insert_resources();
406 static const struct vm_operations_struct pci_mmap_ops = {
407 .access = generic_access_phys,
410 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
411 enum pci_mmap_state mmap_state, int write_combine)
415 /* I/O space cannot be accessed via normal processor loads and
416 * stores on this platform.
418 if (mmap_state == pci_mmap_io)
421 prot = pgprot_val(vma->vm_page_prot);
424 * Return error if pat is not enabled and write_combine is requested.
425 * Caller can followup with UC MINUS request and add a WC mtrr if there
426 * is a free mtrr slot.
428 if (!pat_enabled && write_combine)
431 if (pat_enabled && write_combine)
432 prot |= _PAGE_CACHE_WC;
433 else if (pat_enabled || boot_cpu_data.x86 > 3)
435 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
436 * To avoid attribute conflicts, request UC MINUS here
439 prot |= _PAGE_CACHE_UC_MINUS;
441 prot |= _PAGE_IOMAP; /* creating a mapping for IO */
443 vma->vm_page_prot = __pgprot(prot);
445 if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
446 vma->vm_end - vma->vm_start,
450 vma->vm_ops = &pci_mmap_ops;