2 * numa.c - Low-level PCI access for NUMA-Q machines
6 #include <linux/init.h>
7 #include <linux/nodemask.h>
11 #define XQUAD_PORTIO_BASE 0xfe400000
12 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
14 #define BUS2QUAD(global) (mp_bus_id_to_node[global])
15 #define BUS2LOCAL(global) (mp_bus_id_to_local[global])
17 int quad_local_to_mp_bus_id [NR_CPUS/4][4];
18 #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
20 extern void *xquad_portio; /* Where the IO area was mapped */
21 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
23 #define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
24 (0x80000000 | (BUS2LOCAL(bus) << 16) | (devfn << 8) | (reg & ~3))
26 static void write_cf8(unsigned bus, unsigned devfn, unsigned reg)
28 unsigned val = PCI_CONF1_MQ_ADDRESS(bus, devfn, reg);
30 writel(val, XQUAD_PORT_ADDR(0xcf8, BUS2QUAD(bus)));
35 static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
36 unsigned int devfn, int reg, int len, u32 *value)
39 void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
41 if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
44 spin_lock_irqsave(&pci_config_lock, flags);
46 write_cf8(bus, devfn, reg);
51 *value = readb(adr + (reg & 3));
53 *value = inb(0xCFC + (reg & 3));
57 *value = readw(adr + (reg & 2));
59 *value = inw(0xCFC + (reg & 2));
69 spin_unlock_irqrestore(&pci_config_lock, flags);
74 static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
75 unsigned int devfn, int reg, int len, u32 value)
78 void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
80 if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
83 spin_lock_irqsave(&pci_config_lock, flags);
85 write_cf8(bus, devfn, reg);
90 writeb(value, adr + (reg & 3));
92 outb((u8)value, 0xCFC + (reg & 3));
96 writew(value, adr + (reg & 2));
98 outw((u16)value, 0xCFC + (reg & 2));
102 writel(value, adr + reg);
104 outl((u32)value, 0xCFC);
108 spin_unlock_irqrestore(&pci_config_lock, flags);
113 #undef PCI_CONF1_MQ_ADDRESS
115 static struct pci_raw_ops pci_direct_conf1_mq = {
116 .read = pci_conf1_mq_read,
117 .write = pci_conf1_mq_write
121 static void __devinit pci_fixup_i450nx(struct pci_dev *d)
124 * i450NX -- Find and scan all secondary buses on all PXB's.
127 u8 busno, suba, subb;
128 int quad = BUS2QUAD(d->bus->number);
130 printk("PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
132 for(pxb=0; pxb<2; pxb++) {
133 pci_read_config_byte(d, reg++, &busno);
134 pci_read_config_byte(d, reg++, &suba);
135 pci_read_config_byte(d, reg++, &subb);
136 DBG("i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno, suba, subb);
139 pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, busno));
143 pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, suba+1));
146 pcibios_last_bus = -1;
148 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx);
150 static int __init pci_numa_init(void)
154 raw_pci_ops = &pci_direct_conf1_mq;
156 if (pcibios_scanned++)
159 pci_root_bus = pcibios_scan_root(0);
161 pci_bus_add_devices(pci_root_bus);
162 if (num_online_nodes() > 1)
163 for_each_online_node(quad) {
166 printk("Scanning PCI bus %d for quad %d\n",
167 QUADLOCAL2BUS(quad,0), quad);
168 pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, 0));
173 subsys_initcall(pci_numa_init);