2 * Dynamic DMA mapping support.
5 #include <linux/types.h>
7 #include <linux/string.h>
9 #include <linux/module.h>
11 #include <asm/proto.h>
13 int iommu_merge __read_mostly = 0;
14 EXPORT_SYMBOL(iommu_merge);
16 dma_addr_t bad_dma_address __read_mostly;
17 EXPORT_SYMBOL(bad_dma_address);
19 /* This tells the BIO block layer to assume merging. Default to off
20 because we cannot guarantee merging later. */
21 int iommu_bio_merge __read_mostly = 0;
22 EXPORT_SYMBOL(iommu_bio_merge);
24 int iommu_sac_force __read_mostly = 0;
25 EXPORT_SYMBOL(iommu_sac_force);
27 int no_iommu __read_mostly;
28 #ifdef CONFIG_IOMMU_DEBUG
29 int panic_on_overflow __read_mostly = 1;
30 int force_iommu __read_mostly = 1;
32 int panic_on_overflow __read_mostly = 0;
33 int force_iommu __read_mostly= 0;
36 /* Set this to 1 if there is a HW IOMMU in the system */
37 int iommu_detected __read_mostly = 0;
39 /* Dummy device used for NULL arguments (normally ISA). Better would
40 be probably a smaller DMA mask, but this is bug-to-bug compatible
42 struct device fallback_dev = {
43 .bus_id = "fallback device",
44 .coherent_dma_mask = DMA_32BIT_MASK,
45 .dma_mask = &fallback_dev.coherent_dma_mask,
48 /* Allocate DMA memory on node near device */
49 noinline static void *
50 dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
55 if (dev->bus == &pci_bus_type)
56 node = pcibus_to_node(to_pci_dev(dev)->bus);
59 node = numa_node_id();
61 if (node < first_node(node_online_map))
62 node = first_node(node_online_map);
64 page = alloc_pages_node(node, gfp, order);
65 return page ? page_address(page) : NULL;
69 * Allocate memory for a coherent mapping.
72 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
76 unsigned long dma_mask = 0;
81 dma_mask = dev->coherent_dma_mask;
83 dma_mask = DMA_32BIT_MASK;
85 /* Don't invoke OOM killer */
88 /* Kludge to make it bug-to-bug compatible with i386. i386
89 uses the normal dma_mask for alloc_coherent. */
90 dma_mask &= *dev->dma_mask;
92 /* Why <=? Even when the mask is smaller than 4GB it is often
93 larger than 16MB and in this case we have a chance of
94 finding fitting memory in the next higher zone first. If
95 not retry with true GFP_DMA. -AK */
96 if (dma_mask <= DMA_32BIT_MASK)
100 memory = dma_alloc_pages(dev, gfp, get_order(size));
106 bus = virt_to_bus(memory);
107 high = (bus + size) >= dma_mask;
109 if (force_iommu && !(gfp & GFP_DMA))
112 free_pages((unsigned long)memory,
115 /* Don't use the 16MB ZONE_DMA unless absolutely
116 needed. It's better to use remapping first. */
117 if (dma_mask < DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
118 gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
122 /* Let low level make its own zone decisions */
123 gfp &= ~(GFP_DMA32|GFP_DMA);
125 if (dma_ops->alloc_coherent)
126 return dma_ops->alloc_coherent(dev, size,
131 memset(memory, 0, size);
133 *dma_handle = virt_to_bus(memory);
138 if (dma_ops->alloc_coherent) {
139 free_pages((unsigned long)memory, get_order(size));
140 gfp &= ~(GFP_DMA|GFP_DMA32);
141 return dma_ops->alloc_coherent(dev, size, dma_handle, gfp);
144 if (dma_ops->map_simple) {
145 *dma_handle = dma_ops->map_simple(dev, memory,
147 PCI_DMA_BIDIRECTIONAL);
148 if (*dma_handle != bad_dma_address)
152 if (panic_on_overflow)
153 panic("dma_alloc_coherent: IOMMU overflow by %lu bytes\n",size);
154 free_pages((unsigned long)memory, get_order(size));
157 EXPORT_SYMBOL(dma_alloc_coherent);
160 * Unmap coherent memory.
161 * The caller must ensure that the device has finished accessing the mapping.
163 void dma_free_coherent(struct device *dev, size_t size,
164 void *vaddr, dma_addr_t bus)
166 if (dma_ops->unmap_single)
167 dma_ops->unmap_single(dev, bus, size, 0);
168 free_pages((unsigned long)vaddr, get_order(size));
170 EXPORT_SYMBOL(dma_free_coherent);
172 int dma_supported(struct device *dev, u64 mask)
174 if (dma_ops->dma_supported)
175 return dma_ops->dma_supported(dev, mask);
177 /* Copied from i386. Doesn't make much sense, because it will
178 only work for pci_alloc_coherent.
179 The caller just has to use GFP_DMA in this case. */
180 if (mask < DMA_24BIT_MASK)
183 /* Tell the device to use SAC when IOMMU force is on. This
184 allows the driver to use cheaper accesses in some cases.
186 Problem with this is that if we overflow the IOMMU area and
187 return DAC as fallback address the device may not handle it
190 As a special case some controllers have a 39bit address
191 mode that is as efficient as 32bit (aic79xx). Don't force
192 SAC for these. Assume all masks <= 40 bits are of this
193 type. Normally this doesn't make any difference, but gives
194 more gentle handling of IOMMU overflow. */
195 if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
196 printk(KERN_INFO "%s: Force SAC with mask %Lx\n", dev->bus_id,mask);
202 EXPORT_SYMBOL(dma_supported);
204 int dma_set_mask(struct device *dev, u64 mask)
206 if (!dev->dma_mask || !dma_supported(dev, mask))
208 *dev->dma_mask = mask;
211 EXPORT_SYMBOL(dma_set_mask);
213 /* iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]][,merge]
214 [,forcesac][,fullflush][,nomerge][,biomerge]
215 size set size of iommu (in bytes)
216 noagp don't initialize the AGP driver and use full aperture.
217 off don't use the IOMMU
218 leak turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on)
219 memaper[=order] allocate an own aperture over RAM with size 32MB^order.
220 noforce don't force IOMMU usage. Default.
222 merge Do lazy merging. This may improve performance on some block devices.
223 Implies force (experimental)
224 biomerge Do merging at the BIO layer. This is more efficient than merge,
225 but should be only done with very big IOMMUs. Implies merge,force.
226 nomerge Don't do SG merging.
227 forcesac For SAC mode for masks <40bits (experimental)
228 fullflush Flush IOMMU on each allocation (default)
229 nofullflush Don't use IOMMU fullflush
230 allowed overwrite iommu off workarounds for specific chipsets.
231 soft Use software bounce buffering (default for Intel machines)
232 noaperture Don't touch the aperture for AGP.
234 __init int iommu_setup(char *p)
239 if (!strncmp(p,"off",3))
241 /* gart_parse_options has more force support */
242 if (!strncmp(p,"force",5))
244 if (!strncmp(p,"noforce",7)) {
249 if (!strncmp(p, "biomerge",8)) {
250 iommu_bio_merge = 4096;
254 if (!strncmp(p, "panic",5))
255 panic_on_overflow = 1;
256 if (!strncmp(p, "nopanic",7))
257 panic_on_overflow = 0;
258 if (!strncmp(p, "merge",5)) {
262 if (!strncmp(p, "nomerge",7))
264 if (!strncmp(p, "forcesac",8))
267 #ifdef CONFIG_SWIOTLB
268 if (!strncmp(p, "soft",4))
273 gart_parse_options(p);
276 p += strcspn(p, ",");
282 __setup("iommu=", iommu_setup);
284 void __init pci_iommu_alloc(void)
287 * The order of these functions is important for
288 * fall-back/fail-over reasons
294 #ifdef CONFIG_SWIOTLB
299 static int __init pci_iommu_init(void)
309 /* Must execute after PCI subsystem */
310 fs_initcall(pci_iommu_init);