2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
41 #include <linux/config.h>
42 #include <linux/init.h>
45 #include <linux/kernel_stat.h>
46 #include <linux/smp_lock.h>
47 #include <linux/bootmem.h>
48 #include <linux/thread_info.h>
49 #include <linux/module.h>
51 #include <linux/delay.h>
52 #include <linux/mc146818rtc.h>
54 #include <asm/pgalloc.h>
56 #include <asm/kdebug.h>
57 #include <asm/tlbflush.h>
58 #include <asm/proto.h>
61 #include <asm/hw_irq.h>
63 /* Number of siblings per CPU package */
64 int smp_num_siblings = 1;
65 /* Package ID of each logical CPU */
66 u8 phys_proc_id[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
67 /* core ID of each logical CPU */
68 u8 cpu_core_id[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
70 /* Bitmask of currently online CPUs */
71 cpumask_t cpu_online_map __read_mostly;
73 EXPORT_SYMBOL(cpu_online_map);
76 * Private maps to synchronize booting between AP and BP.
77 * Probably not needed anymore, but it makes for easier debugging. -AK
79 cpumask_t cpu_callin_map;
80 cpumask_t cpu_callout_map;
82 cpumask_t cpu_possible_map;
83 EXPORT_SYMBOL(cpu_possible_map);
85 /* Per CPU bogomips and other parameters */
86 struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
88 /* Set when the idlers are all forked */
89 int smp_threads_ready;
91 /* representing HT siblings of each logical CPU */
92 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
94 /* representing HT and core siblings of each logical CPU */
95 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
96 EXPORT_SYMBOL(cpu_core_map);
99 * Trampoline 80x86 program as an array.
102 extern unsigned char trampoline_data[];
103 extern unsigned char trampoline_end[];
105 /* State of each CPU */
106 DEFINE_PER_CPU(int, cpu_state) = { 0 };
109 * Store all idle threads, this can be reused instead of creating
110 * a new thread. Also avoids complicated thread destroy functionality
113 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
115 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
116 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
119 * Currently trivial. Write the real->protected mode
120 * bootstrap into the page concerned. The caller
121 * has made sure it's suitably aligned.
124 static unsigned long __cpuinit setup_trampoline(void)
126 void *tramp = __va(SMP_TRAMPOLINE_BASE);
127 memcpy(tramp, trampoline_data, trampoline_end - trampoline_data);
128 return virt_to_phys(tramp);
132 * The bootstrap kernel entry code has set these up. Save them for
136 static void __cpuinit smp_store_cpu_info(int id)
138 struct cpuinfo_x86 *c = cpu_data + id;
146 * New Funky TSC sync algorithm borrowed from IA64.
147 * Main advantage is that it doesn't reset the TSCs fully and
148 * in general looks more robust and it works better than my earlier
149 * attempts. I believe it was written by David Mosberger. Some minor
150 * adjustments for x86-64 by me -AK
152 * Original comment reproduced below.
154 * Synchronize TSC of the current (slave) CPU with the TSC of the
155 * MASTER CPU (normally the time-keeper CPU). We use a closed loop to
156 * eliminate the possibility of unaccounted-for errors (such as
157 * getting a machine check in the middle of a calibration step). The
158 * basic idea is for the slave to ask the master what itc value it has
159 * and to read its own itc before and after the master responds. Each
160 * iteration gives us three timestamps:
173 * The goal is to adjust the slave's TSC such that tm falls exactly
174 * half-way between t0 and t1. If we achieve this, the clocks are
175 * synchronized provided the interconnect between the slave and the
176 * master is symmetric. Even if the interconnect were asymmetric, we
177 * would still know that the synchronization error is smaller than the
178 * roundtrip latency (t0 - t1).
180 * When the interconnect is quiet and symmetric, this lets us
181 * synchronize the TSC to within one or two cycles. However, we can
182 * only *guarantee* that the synchronization is accurate to within a
183 * round-trip time, which is typically in the range of several hundred
184 * cycles (e.g., ~500 cycles). In practice, this means that the TSCs
185 * are usually almost perfectly synchronized, but we shouldn't assume
186 * that the accuracy is much better than half a micro second or so.
188 * [there are other errors like the latency of RDTSC and of the
189 * WRMSR. These can also account to hundreds of cycles. So it's
190 * probably worse. It claims 153 cycles error on a dual Opteron,
191 * but I suspect the numbers are actually somewhat worse -AK]
195 #define SLAVE (SMP_CACHE_BYTES/8)
197 /* Intentionally don't use cpu_relax() while TSC synchronization
198 because we don't want to go into funky power save modi or cause
199 hypervisors to schedule us away. Going to sleep would likely affect
200 latency and low latency is the primary objective here. -AK */
201 #define no_cpu_relax() barrier()
203 static __cpuinitdata DEFINE_SPINLOCK(tsc_sync_lock);
204 static volatile __cpuinitdata unsigned long go[SLAVE + 1];
205 static int notscsync __cpuinitdata;
207 #undef DEBUG_TSC_SYNC
209 #define NUM_ROUNDS 64 /* magic value */
210 #define NUM_ITERS 5 /* likewise */
212 /* Callback on boot CPU */
213 static __cpuinit void sync_master(void *arg)
215 unsigned long flags, i;
219 local_irq_save(flags);
221 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
228 local_irq_restore(flags);
232 * Return the number of cycles by which our tsc differs from the tsc
233 * on the master (time-keeper) CPU. A positive number indicates our
234 * tsc is ahead of the master, negative that it is behind.
237 get_delta(long *rt, long *master)
239 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
240 unsigned long tcenter, t0, t1, tm;
243 for (i = 0; i < NUM_ITERS; ++i) {
246 while (!(tm = go[SLAVE]))
251 if (t1 - t0 < best_t1 - best_t0)
252 best_t0 = t0, best_t1 = t1, best_tm = tm;
255 *rt = best_t1 - best_t0;
256 *master = best_tm - best_t0;
258 /* average best_t0 and best_t1 without overflow: */
259 tcenter = (best_t0/2 + best_t1/2);
260 if (best_t0 % 2 + best_t1 % 2 == 2)
262 return tcenter - best_tm;
265 static __cpuinit void sync_tsc(unsigned int master)
268 long delta, adj, adjust_latency = 0;
269 unsigned long flags, rt, master_time_stamp, bound;
270 #ifdef DEBUG_TSC_SYNC
271 static struct syncdebug {
272 long rt; /* roundtrip time */
273 long master; /* master's timestamp */
274 long diff; /* difference between midpoint and master's timestamp */
275 long lat; /* estimate of tsc adjustment latency */
276 } t[NUM_ROUNDS] __cpuinitdata;
279 printk(KERN_INFO "CPU %d: Syncing TSC to CPU %u.\n",
280 smp_processor_id(), master);
284 /* It is dangerous to broadcast IPI as cpus are coming up,
285 * as they may not be ready to accept them. So since
286 * we only need to send the ipi to the boot cpu direct
287 * the message, and avoid the race.
289 smp_call_function_single(master, sync_master, NULL, 1, 0);
291 while (go[MASTER]) /* wait for master to be ready */
294 spin_lock_irqsave(&tsc_sync_lock, flags);
296 for (i = 0; i < NUM_ROUNDS; ++i) {
297 delta = get_delta(&rt, &master_time_stamp);
299 done = 1; /* let's lock on to this... */
306 adjust_latency += -delta;
307 adj = -delta + adjust_latency/4;
312 wrmsrl(MSR_IA32_TSC, t + adj);
314 #ifdef DEBUG_TSC_SYNC
316 t[i].master = master_time_stamp;
318 t[i].lat = adjust_latency/4;
322 spin_unlock_irqrestore(&tsc_sync_lock, flags);
324 #ifdef DEBUG_TSC_SYNC
325 for (i = 0; i < NUM_ROUNDS; ++i)
326 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
327 t[i].rt, t[i].master, t[i].diff, t[i].lat);
331 "CPU %d: synchronized TSC with CPU %u (last diff %ld cycles, "
332 "maxerr %lu cycles)\n",
333 smp_processor_id(), master, delta, rt);
336 static void __cpuinit tsc_sync_wait(void)
339 * When the CPU has synchronized TSCs assume the BIOS
340 * or the hardware already synced. Otherwise we could
341 * mess up a possible perfect synchronization with a
342 * not-quite-perfect algorithm.
344 if (notscsync || !cpu_has_tsc || !unsynchronized_tsc())
349 static __init int notscsync_setup(char *s)
354 __setup("notscsync", notscsync_setup);
356 static atomic_t init_deasserted __cpuinitdata;
359 * Report back to the Boot Processor.
362 void __cpuinit smp_callin(void)
365 unsigned long timeout;
368 * If waken up by an INIT in an 82489DX configuration
369 * we may get here before an INIT-deassert IPI reaches
370 * our local APIC. We have to wait for the IPI or we'll
371 * lock up on an APIC access.
373 while (!atomic_read(&init_deasserted))
377 * (This works even if the APIC is not enabled.)
379 phys_id = GET_APIC_ID(apic_read(APIC_ID));
380 cpuid = smp_processor_id();
381 if (cpu_isset(cpuid, cpu_callin_map)) {
382 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
385 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
388 * STARTUP IPIs are fragile beasts as they might sometimes
389 * trigger some glue motherboard logic. Complete APIC bus
390 * silence for 1 second, this overestimates the time the
391 * boot CPU is spending to send the up to 2 STARTUP IPIs
392 * by a factor of two. This should be enough.
396 * Waiting 2s total for startup (udelay is not yet working)
398 timeout = jiffies + 2*HZ;
399 while (time_before(jiffies, timeout)) {
401 * Has the boot CPU finished it's STARTUP sequence?
403 if (cpu_isset(cpuid, cpu_callout_map))
408 if (!time_before(jiffies, timeout)) {
409 panic("smp_callin: CPU%d started up but did not get a callout!\n",
414 * the boot CPU has finished the init stage and is spinning
415 * on callin_map until we finish. We are free to set up this
416 * CPU, first the APIC. (this is probably redundant on most
420 Dprintk("CALLIN, before setup_local_APIC().\n");
426 * Need to enable IRQs because it can take longer and then
427 * the NMI watchdog might kill us.
432 Dprintk("Stack at about %p\n",&cpuid);
434 disable_APIC_timer();
437 * Save our processor parameters
439 smp_store_cpu_info(cpuid);
442 * Allow the master to continue.
444 cpu_set(cpuid, cpu_callin_map);
447 /* representing cpus for which sibling maps can be computed */
448 static cpumask_t cpu_sibling_setup_map;
450 static inline void set_cpu_sibling_map(int cpu)
453 struct cpuinfo_x86 *c = cpu_data;
455 cpu_set(cpu, cpu_sibling_setup_map);
457 if (smp_num_siblings > 1) {
458 for_each_cpu_mask(i, cpu_sibling_setup_map) {
459 if (phys_proc_id[cpu] == phys_proc_id[i] &&
460 cpu_core_id[cpu] == cpu_core_id[i]) {
461 cpu_set(i, cpu_sibling_map[cpu]);
462 cpu_set(cpu, cpu_sibling_map[i]);
463 cpu_set(i, cpu_core_map[cpu]);
464 cpu_set(cpu, cpu_core_map[i]);
468 cpu_set(cpu, cpu_sibling_map[cpu]);
471 if (current_cpu_data.x86_max_cores == 1) {
472 cpu_core_map[cpu] = cpu_sibling_map[cpu];
473 c[cpu].booted_cores = 1;
477 for_each_cpu_mask(i, cpu_sibling_setup_map) {
478 if (phys_proc_id[cpu] == phys_proc_id[i]) {
479 cpu_set(i, cpu_core_map[cpu]);
480 cpu_set(cpu, cpu_core_map[i]);
482 * Does this new cpu bringup a new core?
484 if (cpus_weight(cpu_sibling_map[cpu]) == 1) {
486 * for each core in package, increment
487 * the booted_cores for this new cpu
489 if (first_cpu(cpu_sibling_map[i]) == i)
490 c[cpu].booted_cores++;
492 * increment the core count for all
493 * the other cpus in this package
497 } else if (i != cpu && !c[cpu].booted_cores)
498 c[cpu].booted_cores = c[i].booted_cores;
504 * Setup code on secondary processor (after comming out of the trampoline)
506 void __cpuinit start_secondary(void)
509 * Dont put anything before smp_callin(), SMP
510 * booting is too fragile that we want to limit the
511 * things done here to the most necessary things.
517 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
520 Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());
521 setup_secondary_APIC_clock();
523 Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
525 if (nmi_watchdog == NMI_IO_APIC) {
526 disable_8259A_irq(0);
527 enable_NMI_through_LVT0(NULL);
534 * The sibling maps must be set before turing the online map on for
537 set_cpu_sibling_map(smp_processor_id());
540 * Wait for TSC sync to not schedule things before.
541 * We still process interrupts, which could see an inconsistent
542 * time in that window unfortunately.
543 * Do this here because TSC sync has global unprotected state.
548 * We need to hold call_lock, so there is no inconsistency
549 * between the time smp_call_function() determines number of
550 * IPI receipients, and the time when the determination is made
551 * for which cpus receive the IPI in genapic_flat.c. Holding this
552 * lock helps us to not include this cpu in a currently in progress
553 * smp_call_function().
555 lock_ipi_call_lock();
558 * Allow the master to continue.
560 cpu_set(smp_processor_id(), cpu_online_map);
561 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
562 unlock_ipi_call_lock();
567 extern volatile unsigned long init_rsp;
568 extern void (*initial_code)(void);
571 static void inquire_remote_apic(int apicid)
573 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
574 char *names[] = { "ID", "VERSION", "SPIV" };
577 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
579 for (i = 0; i < sizeof(regs) / sizeof(*regs); i++) {
580 printk("... APIC #%d %s: ", apicid, names[i]);
585 apic_wait_icr_idle();
587 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
588 apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
593 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
594 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
597 case APIC_ICR_RR_VALID:
598 status = apic_read(APIC_RRR);
599 printk("%08x\n", status);
609 * Kick the secondary to wake up.
611 static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
613 unsigned long send_status = 0, accept_status = 0;
614 int maxlvt, timeout, num_starts, j;
616 Dprintk("Asserting INIT.\n");
619 * Turn INIT on target chip
621 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
626 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
629 Dprintk("Waiting for send to finish...\n");
634 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
635 } while (send_status && (timeout++ < 1000));
639 Dprintk("Deasserting INIT.\n");
642 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
645 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
647 Dprintk("Waiting for send to finish...\n");
652 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
653 } while (send_status && (timeout++ < 1000));
656 atomic_set(&init_deasserted, 1);
661 * Run STARTUP IPI loop.
663 Dprintk("#startup loops: %d.\n", num_starts);
665 maxlvt = get_maxlvt();
667 for (j = 1; j <= num_starts; j++) {
668 Dprintk("Sending STARTUP #%d.\n",j);
669 apic_read_around(APIC_SPIV);
670 apic_write(APIC_ESR, 0);
672 Dprintk("After apic_write.\n");
679 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
681 /* Boot on the stack */
682 /* Kick the second */
683 apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
686 * Give the other CPU some time to accept the IPI.
690 Dprintk("Startup point 1.\n");
692 Dprintk("Waiting for send to finish...\n");
697 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
698 } while (send_status && (timeout++ < 1000));
701 * Give the other CPU some time to accept the IPI.
705 * Due to the Pentium erratum 3AP.
708 apic_read_around(APIC_SPIV);
709 apic_write(APIC_ESR, 0);
711 accept_status = (apic_read(APIC_ESR) & 0xEF);
712 if (send_status || accept_status)
715 Dprintk("After Startup.\n");
718 printk(KERN_ERR "APIC never delivered???\n");
720 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
722 return (send_status | accept_status);
726 struct task_struct *idle;
727 struct completion done;
731 void do_fork_idle(void *_c_idle)
733 struct create_idle *c_idle = _c_idle;
735 c_idle->idle = fork_idle(c_idle->cpu);
736 complete(&c_idle->done);
742 static int __cpuinit do_boot_cpu(int cpu, int apicid)
744 unsigned long boot_error;
746 unsigned long start_rip;
747 struct create_idle c_idle = {
749 .done = COMPLETION_INITIALIZER(c_idle.done),
751 DECLARE_WORK(work, do_fork_idle, &c_idle);
753 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
754 if (!cpu_gdt_descr[cpu].address &&
755 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
756 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
760 /* Allocate node local memory for AP pdas */
761 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
762 struct x8664_pda *newpda, *pda;
763 int node = cpu_to_node(cpu);
765 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
768 memcpy(newpda, pda, sizeof (struct x8664_pda));
769 cpu_pda(cpu) = newpda;
772 "Could not allocate node local PDA for CPU %d on node %d\n",
777 c_idle.idle = get_idle_for_cpu(cpu);
780 c_idle.idle->thread.rsp = (unsigned long) (((struct pt_regs *)
781 (THREAD_SIZE + (unsigned long) c_idle.idle->thread_info)) - 1);
782 init_idle(c_idle.idle, cpu);
787 * During cold boot process, keventd thread is not spun up yet.
788 * When we do cpu hot-add, we create idle threads on the fly, we should
789 * not acquire any attributes from the calling context. Hence the clean
790 * way to create kernel_threads() is to do that from keventd().
791 * We do the current_is_keventd() due to the fact that ACPI notifier
792 * was also queuing to keventd() and when the caller is already running
793 * in context of keventd(), we would end up with locking up the keventd
796 if (!keventd_up() || current_is_keventd())
797 work.func(work.data);
799 schedule_work(&work);
800 wait_for_completion(&c_idle.done);
803 if (IS_ERR(c_idle.idle)) {
804 printk("failed fork for CPU %d\n", cpu);
805 return PTR_ERR(c_idle.idle);
808 set_idle_for_cpu(cpu, c_idle.idle);
812 cpu_pda(cpu)->pcurrent = c_idle.idle;
814 start_rip = setup_trampoline();
816 init_rsp = c_idle.idle->thread.rsp;
817 per_cpu(init_tss,cpu).rsp0 = init_rsp;
818 initial_code = start_secondary;
819 clear_ti_thread_flag(c_idle.idle->thread_info, TIF_FORK);
821 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
822 cpus_weight(cpu_present_map),
826 * This grunge runs the startup process for
827 * the targeted processor.
830 atomic_set(&init_deasserted, 0);
832 Dprintk("Setting warm reset code and vector.\n");
834 CMOS_WRITE(0xa, 0xf);
837 *((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
839 *((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
843 * Be paranoid about clearing APIC errors.
845 if (APIC_INTEGRATED(apic_version[apicid])) {
846 apic_read_around(APIC_SPIV);
847 apic_write(APIC_ESR, 0);
852 * Status is now clean
857 * Starting actual IPI sequence...
859 boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
863 * allow APs to start initializing.
865 Dprintk("Before Callout %d.\n", cpu);
866 cpu_set(cpu, cpu_callout_map);
867 Dprintk("After Callout %d.\n", cpu);
870 * Wait 5s total for a response
872 for (timeout = 0; timeout < 50000; timeout++) {
873 if (cpu_isset(cpu, cpu_callin_map))
874 break; /* It has booted */
878 if (cpu_isset(cpu, cpu_callin_map)) {
879 /* number CPUs logically, starting from 1 (BSP is 0) */
880 Dprintk("CPU has booted.\n");
883 if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
885 /* trampoline started but...? */
886 printk("Stuck ??\n");
888 /* trampoline code not run */
889 printk("Not responding.\n");
891 inquire_remote_apic(apicid);
896 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
897 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
898 cpu_clear(cpu, cpu_present_map);
899 cpu_clear(cpu, cpu_possible_map);
900 x86_cpu_to_apicid[cpu] = BAD_APICID;
901 x86_cpu_to_log_apicid[cpu] = BAD_APICID;
908 cycles_t cacheflush_time;
909 unsigned long cache_decay_ticks;
912 * Cleanup possible dangling ends...
914 static __cpuinit void smp_cleanup_boot(void)
917 * Paranoid: Set warm reset code and vector here back
923 * Reset trampoline flag
925 *((volatile int *) phys_to_virt(0x467)) = 0;
929 * Fall back to non SMP mode after errors.
931 * RED-PEN audit/test this more. I bet there is more state messed up here.
933 static __init void disable_smp(void)
935 cpu_present_map = cpumask_of_cpu(0);
936 cpu_possible_map = cpumask_of_cpu(0);
937 if (smp_found_config)
938 phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
940 phys_cpu_present_map = physid_mask_of_physid(0);
941 cpu_set(0, cpu_sibling_map[0]);
942 cpu_set(0, cpu_core_map[0]);
945 #ifdef CONFIG_HOTPLUG_CPU
947 int additional_cpus __initdata = -1;
950 * cpu_possible_map should be static, it cannot change as cpu's
951 * are onlined, or offlined. The reason is per-cpu data-structures
952 * are allocated by some modules at init time, and dont expect to
953 * do this dynamically on cpu arrival/departure.
954 * cpu_present_map on the other hand can change dynamically.
955 * In case when cpu_hotplug is not compiled, then we resort to current
956 * behaviour, which is cpu_possible == cpu_present.
959 * Three ways to find out the number of additional hotplug CPUs:
960 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
961 * - The user can overwrite it with additional_cpus=NUM
962 * - Otherwise don't reserve additional CPUs.
963 * We do this because additional CPUs waste a lot of memory.
966 __init void prefill_possible_map(void)
971 if (additional_cpus == -1) {
972 if (disabled_cpus > 0)
973 additional_cpus = disabled_cpus;
977 possible = num_processors + additional_cpus;
978 if (possible > NR_CPUS)
981 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
983 max_t(int, possible - num_processors, 0));
985 for (i = 0; i < possible; i++)
986 cpu_set(i, cpu_possible_map);
991 * Various sanity checks.
993 static int __init smp_sanity_check(unsigned max_cpus)
995 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
996 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
997 hard_smp_processor_id());
998 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1002 * If we couldn't find an SMP configuration at boot time,
1003 * get out of here now!
1005 if (!smp_found_config) {
1006 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1008 if (APIC_init_uniprocessor())
1009 printk(KERN_NOTICE "Local APIC not detected."
1010 " Using dummy APIC emulation.\n");
1015 * Should not be necessary because the MP table should list the boot
1016 * CPU too, but we do it for the sake of robustness anyway.
1018 if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
1019 printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
1021 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1025 * If we couldn't find a local APIC, then get out of here now!
1027 if (APIC_INTEGRATED(apic_version[boot_cpu_id]) && !cpu_has_apic) {
1028 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1030 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
1036 * If SMP should be disabled, then really disable it!
1039 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
1048 * Prepare for SMP bootup. The MP table or ACPI has been read
1049 * earlier. Just do some sanity checking here and enable APIC mode.
1051 void __init smp_prepare_cpus(unsigned int max_cpus)
1053 nmi_watchdog_default();
1054 current_cpu_data = boot_cpu_data;
1055 current_thread_info()->cpu = 0; /* needed? */
1056 set_cpu_sibling_map(0);
1058 if (smp_sanity_check(max_cpus) < 0) {
1059 printk(KERN_INFO "SMP disabled\n");
1066 * Switch from PIC to APIC mode.
1071 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
1072 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1073 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
1074 /* Or can we switch back to PIC here? */
1078 * Now start the IO-APICs
1080 if (!skip_ioapic_setup && nr_ioapics)
1086 * Set up local APIC timer on boot CPU.
1089 setup_boot_APIC_clock();
1093 * Early setup to make printk work.
1095 void __init smp_prepare_boot_cpu(void)
1097 int me = smp_processor_id();
1098 cpu_set(me, cpu_online_map);
1099 cpu_set(me, cpu_callout_map);
1100 per_cpu(cpu_state, me) = CPU_ONLINE;
1104 * Entry point to boot a CPU.
1106 int __cpuinit __cpu_up(unsigned int cpu)
1109 int apicid = cpu_present_to_apicid(cpu);
1111 WARN_ON(irqs_disabled());
1113 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
1115 if (apicid == BAD_APICID || apicid == boot_cpu_id ||
1116 !physid_isset(apicid, phys_cpu_present_map)) {
1117 printk("__cpu_up: bad cpu %d\n", cpu);
1122 * Already booted CPU?
1124 if (cpu_isset(cpu, cpu_callin_map)) {
1125 Dprintk("do_boot_cpu %d Already started\n", cpu);
1129 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
1131 err = do_boot_cpu(cpu, apicid);
1133 Dprintk("do_boot_cpu failed %d\n", err);
1137 /* Unleash the CPU! */
1138 Dprintk("waiting for cpu %d\n", cpu);
1140 while (!cpu_isset(cpu, cpu_online_map))
1148 * Finish the SMP boot.
1150 void __init smp_cpus_done(unsigned int max_cpus)
1154 #ifdef CONFIG_X86_IO_APIC
1155 setup_ioapic_dest();
1160 check_nmi_watchdog();
1163 #ifdef CONFIG_HOTPLUG_CPU
1165 static void remove_siblinginfo(int cpu)
1168 struct cpuinfo_x86 *c = cpu_data;
1170 for_each_cpu_mask(sibling, cpu_core_map[cpu]) {
1171 cpu_clear(cpu, cpu_core_map[sibling]);
1173 * last thread sibling in this cpu core going down
1175 if (cpus_weight(cpu_sibling_map[cpu]) == 1)
1176 c[sibling].booted_cores--;
1179 for_each_cpu_mask(sibling, cpu_sibling_map[cpu])
1180 cpu_clear(cpu, cpu_sibling_map[sibling]);
1181 cpus_clear(cpu_sibling_map[cpu]);
1182 cpus_clear(cpu_core_map[cpu]);
1183 phys_proc_id[cpu] = BAD_APICID;
1184 cpu_core_id[cpu] = BAD_APICID;
1185 cpu_clear(cpu, cpu_sibling_setup_map);
1188 void remove_cpu_from_maps(void)
1190 int cpu = smp_processor_id();
1192 cpu_clear(cpu, cpu_callout_map);
1193 cpu_clear(cpu, cpu_callin_map);
1194 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
1197 int __cpu_disable(void)
1199 int cpu = smp_processor_id();
1202 * Perhaps use cpufreq to drop frequency, but that could go
1203 * into generic code.
1205 * We won't take down the boot processor on i386 due to some
1206 * interrupts only being able to be serviced by the BSP.
1207 * Especially so if we're not using an IOAPIC -zwane
1216 * Allow any queued timer interrupts to get serviced
1217 * This is only a temporary solution until we cleanup
1218 * fixup_irqs as we do for IA64.
1223 local_irq_disable();
1224 remove_siblinginfo(cpu);
1226 /* It's now safe to remove this processor from the online map */
1227 cpu_clear(cpu, cpu_online_map);
1228 remove_cpu_from_maps();
1229 fixup_irqs(cpu_online_map);
1233 void __cpu_die(unsigned int cpu)
1235 /* We don't do anything here: idle task is faking death itself. */
1238 for (i = 0; i < 10; i++) {
1239 /* They ack this in play_dead by setting CPU_DEAD */
1240 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1241 printk ("CPU %d is now offline\n", cpu);
1246 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1249 static __init int setup_additional_cpus(char *s)
1251 return get_option(&s, &additional_cpus);
1253 __setup("additional_cpus=", setup_additional_cpus);
1255 #else /* ... !CONFIG_HOTPLUG_CPU */
1257 int __cpu_disable(void)
1262 void __cpu_die(unsigned int cpu)
1264 /* We said "no" in __cpu_disable */
1267 #endif /* CONFIG_HOTPLUG_CPU */