2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
30 #include <acpi/achware.h> /* for PM timer frequency */
32 #include <asm/8253pit.h>
33 #include <asm/pgtable.h>
34 #include <asm/vsyscall.h>
35 #include <asm/timex.h>
36 #include <asm/proto.h>
38 #include <asm/sections.h>
39 #include <linux/cpufreq.h>
40 #include <linux/hpet.h>
41 #ifdef CONFIG_X86_LOCAL_APIC
45 #ifdef CONFIG_CPU_FREQ
46 static void cpufreq_delayed_get(void);
48 extern void i8254_timer_resume(void);
49 extern int using_apic_timer;
51 DEFINE_SPINLOCK(rtc_lock);
52 DEFINE_SPINLOCK(i8253_lock);
54 static int nohpet __initdata = 0;
55 static int notsc __initdata = 0;
57 #undef HPET_HACK_ENABLE_DANGEROUS
59 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
60 static unsigned long hpet_period; /* fsecs / HPET clock */
61 unsigned long hpet_tick; /* HPET clocks / interrupt */
62 static int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
63 unsigned long vxtime_hz = PIT_TICK_RATE;
64 int report_lost_ticks; /* command line option */
65 unsigned long long monotonic_base;
67 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
69 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
70 unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
71 struct timespec __xtime __section_xtime;
72 struct timezone __sys_tz __section_sys_tz;
74 static inline void rdtscll_sync(unsigned long *tsc)
83 * do_gettimeoffset() returns microseconds since last timer interrupt was
84 * triggered by hardware. A memory read of HPET is slower than a register read
85 * of TSC, but much more reliable. It's also synchronized to the timer
86 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
87 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
88 * This is not a problem, because jiffies hasn't updated either. They are bound
89 * together by xtime_lock.
92 static inline unsigned int do_gettimeoffset_tsc(void)
97 if (t < vxtime.last_tsc) t = vxtime.last_tsc; /* hack */
98 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> 32;
102 static inline unsigned int do_gettimeoffset_hpet(void)
104 /* cap counter read to one tick to avoid inconsistencies */
105 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
106 return (min(counter,hpet_tick) * vxtime.quot) >> 32;
109 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
112 * This version of gettimeofday() has microsecond resolution and better than
113 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
117 void do_gettimeofday(struct timeval *tv)
119 unsigned long seq, t;
120 unsigned int sec, usec;
123 seq = read_seqbegin(&xtime_lock);
126 usec = xtime.tv_nsec / 1000;
128 /* i386 does some correction here to keep the clock
129 monotonous even when ntpd is fixing drift.
130 But they didn't work for me, there is a non monotonic
131 clock anyways with ntp.
132 I dropped all corrections now until a real solution can
133 be found. Note when you fix it here you need to do the same
134 in arch/x86_64/kernel/vsyscall.c and export all needed
135 variables in vmlinux.lds. -AK */
137 t = (jiffies - wall_jiffies) * (1000000L / HZ) +
141 } while (read_seqretry(&xtime_lock, seq));
143 tv->tv_sec = sec + usec / 1000000;
144 tv->tv_usec = usec % 1000000;
147 EXPORT_SYMBOL(do_gettimeofday);
150 * settimeofday() first undoes the correction that gettimeofday would do
151 * on the time, and then saves it. This is ugly, but has been like this for
155 int do_settimeofday(struct timespec *tv)
157 time_t wtm_sec, sec = tv->tv_sec;
158 long wtm_nsec, nsec = tv->tv_nsec;
160 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
163 write_seqlock_irq(&xtime_lock);
165 nsec -= do_gettimeoffset() * 1000 +
166 (jiffies - wall_jiffies) * (NSEC_PER_SEC/HZ);
168 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
169 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
171 set_normalized_timespec(&xtime, sec, nsec);
172 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
176 write_sequnlock_irq(&xtime_lock);
181 EXPORT_SYMBOL(do_settimeofday);
183 unsigned long profile_pc(struct pt_regs *regs)
185 unsigned long pc = instruction_pointer(regs);
187 /* Assume the lock function has either no stack frame or only a single word.
188 This checks if the address on the stack looks like a kernel text address.
189 There is a small window for false hits, but in that case the tick
190 is just accounted to the spinlock function.
191 Better would be to write these functions in assembler again
192 and check exactly. */
193 if (in_lock_functions(pc)) {
194 char *v = *(char **)regs->rsp;
195 if ((v >= _stext && v <= _etext) ||
196 (v >= _sinittext && v <= _einittext) ||
197 (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
198 return (unsigned long)v;
199 return ((unsigned long *)regs->rsp)[1];
203 EXPORT_SYMBOL(profile_pc);
206 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
207 * ms after the second nowtime has started, because when nowtime is written
208 * into the registers of the CMOS clock, it will jump to the next second
209 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
213 static void set_rtc_mmss(unsigned long nowtime)
215 int real_seconds, real_minutes, cmos_minutes;
216 unsigned char control, freq_select;
219 * IRQs are disabled when we're called from the timer interrupt,
220 * no need for spin_lock_irqsave()
223 spin_lock(&rtc_lock);
226 * Tell the clock it's being set and stop it.
229 control = CMOS_READ(RTC_CONTROL);
230 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
232 freq_select = CMOS_READ(RTC_FREQ_SELECT);
233 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
235 cmos_minutes = CMOS_READ(RTC_MINUTES);
236 BCD_TO_BIN(cmos_minutes);
239 * since we're only adjusting minutes and seconds, don't interfere with hour
240 * overflow. This avoids messing with unknown time zones but requires your RTC
241 * not to be off by more than 15 minutes. Since we're calling it only when
242 * our clock is externally synchronized using NTP, this shouldn't be a problem.
245 real_seconds = nowtime % 60;
246 real_minutes = nowtime / 60;
247 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
248 real_minutes += 30; /* correct for half hour time zone */
252 /* AMD 8111 is a really bad time keeper and hits this regularly.
253 It probably was an attempt to avoid screwing up DST, but ignore
255 if (abs(real_minutes - cmos_minutes) >= 30) {
256 printk(KERN_WARNING "time.c: can't update CMOS clock "
257 "from %d to %d\n", cmos_minutes, real_minutes);
262 BIN_TO_BCD(real_seconds);
263 BIN_TO_BCD(real_minutes);
264 CMOS_WRITE(real_seconds, RTC_SECONDS);
265 CMOS_WRITE(real_minutes, RTC_MINUTES);
269 * The following flags have to be released exactly in this order, otherwise the
270 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
271 * not reset the oscillator and will not update precisely 500 ms later. You
272 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
273 * believes data sheets anyway ... -- Markus Kuhn
276 CMOS_WRITE(control, RTC_CONTROL);
277 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
279 spin_unlock(&rtc_lock);
283 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
284 * Note: This function is required to return accurate
285 * time even in the absence of multiple timer ticks.
287 unsigned long long monotonic_clock(void)
290 u32 last_offset, this_offset, offset;
291 unsigned long long base;
293 if (vxtime.mode == VXTIME_HPET) {
295 seq = read_seqbegin(&xtime_lock);
297 last_offset = vxtime.last;
298 base = monotonic_base;
299 this_offset = hpet_readl(HPET_COUNTER);
301 } while (read_seqretry(&xtime_lock, seq));
302 offset = (this_offset - last_offset);
303 offset *=(NSEC_PER_SEC/HZ)/hpet_tick;
304 return base + offset;
307 seq = read_seqbegin(&xtime_lock);
309 last_offset = vxtime.last_tsc;
310 base = monotonic_base;
311 } while (read_seqretry(&xtime_lock, seq));
313 rdtscll(this_offset);
314 offset = (this_offset - last_offset)*1000/cpu_khz;
315 return base + offset;
320 EXPORT_SYMBOL(monotonic_clock);
322 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
324 static long lost_count;
327 if (report_lost_ticks) {
328 printk(KERN_WARNING "time.c: Lost %d timer "
330 print_symbol("rip %s)\n", regs->rip);
333 if (lost_count == 1000 && !warned) {
335 "warning: many lost ticks.\n"
336 KERN_WARNING "Your time source seems to be instable or "
337 "some driver is hogging interupts\n");
338 print_symbol("rip %s\n", regs->rip);
339 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
340 printk(KERN_WARNING "Falling back to HPET\n");
341 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
342 vxtime.mode = VXTIME_HPET;
343 do_gettimeoffset = do_gettimeoffset_hpet;
345 /* else should fall back to PIT, but code missing. */
350 #ifdef CONFIG_CPU_FREQ
351 /* In some cases the CPU can change frequency without us noticing
352 (like going into thermal throttle)
353 Give cpufreq a change to catch up. */
354 if ((lost_count+1) % 25 == 0) {
355 cpufreq_delayed_get();
360 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
362 static unsigned long rtc_update = 0;
364 int delay, offset = 0, lost = 0;
367 * Here we are in the timer irq handler. We have irqs locally disabled (so we
368 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
369 * on the other CPU, so we need a lock. We also need to lock the vsyscall
370 * variables, because both do_timer() and us change them -arca+vojtech
373 write_seqlock(&xtime_lock);
375 if (vxtime.hpet_address)
376 offset = hpet_readl(HPET_COUNTER);
378 if (hpet_use_timer) {
379 /* if we're using the hpet timer functionality,
380 * we can more accurately know the counter value
381 * when the timer interrupt occured.
383 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
384 delay = hpet_readl(HPET_COUNTER) - offset;
386 spin_lock(&i8253_lock);
389 delay |= inb(0x40) << 8;
390 spin_unlock(&i8253_lock);
391 delay = LATCH - 1 - delay;
396 if (vxtime.mode == VXTIME_HPET) {
397 if (offset - vxtime.last > hpet_tick) {
398 lost = (offset - vxtime.last) / hpet_tick - 1;
402 (offset - vxtime.last)*(NSEC_PER_SEC/HZ) / hpet_tick;
404 vxtime.last = offset;
405 #ifdef CONFIG_X86_PM_TIMER
406 } else if (vxtime.mode == VXTIME_PMTMR) {
407 lost = pmtimer_mark_offset();
410 offset = (((tsc - vxtime.last_tsc) *
411 vxtime.tsc_quot) >> 32) - (USEC_PER_SEC / HZ);
416 if (offset > (USEC_PER_SEC / HZ)) {
417 lost = offset / (USEC_PER_SEC / HZ);
418 offset %= (USEC_PER_SEC / HZ);
421 monotonic_base += (tsc - vxtime.last_tsc)*1000000/cpu_khz ;
423 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
425 if ((((tsc - vxtime.last_tsc) *
426 vxtime.tsc_quot) >> 32) < offset)
427 vxtime.last_tsc = tsc -
428 (((long) offset << 32) / vxtime.tsc_quot) - 1;
432 handle_lost_ticks(lost, regs);
437 * Do the timer stuff.
442 update_process_times(user_mode(regs));
446 * In the SMP case we use the local APIC timer interrupt to do the profiling,
447 * except when we simulate SMP mode on a uniprocessor system, in that case we
448 * have to call the local interrupt handler.
451 #ifndef CONFIG_X86_LOCAL_APIC
452 profile_tick(CPU_PROFILING, regs);
454 if (!using_apic_timer)
455 smp_local_timer_interrupt(regs);
459 * If we have an externally synchronized Linux clock, then update CMOS clock
460 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
461 * closest to exactly 500 ms before the next second. If the update fails, we
462 * don't care, as it'll be updated on the next turn, and the problem (time way
463 * off) isn't likely to go away much sooner anyway.
466 if (ntp_synced() && xtime.tv_sec > rtc_update &&
467 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
468 set_rtc_mmss(xtime.tv_sec);
469 rtc_update = xtime.tv_sec + 660;
472 write_sequnlock(&xtime_lock);
474 #ifdef CONFIG_X86_LOCAL_APIC
475 if (using_apic_timer)
476 smp_send_timer_broadcast_ipi();
482 static unsigned int cyc2ns_scale;
483 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
485 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
487 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
490 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
492 return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
495 unsigned long long sched_clock(void)
500 /* Don't do a HPET read here. Using TSC always is much faster
501 and HPET may not be mapped yet when the scheduler first runs.
502 Disadvantage is a small drift between CPUs in some configurations,
503 but that should be tolerable. */
504 if (__vxtime.mode == VXTIME_HPET)
505 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> 32;
508 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
509 which means it is not completely exact and may not be monotonous between
510 CPUs. But the errors should be too small to matter for scheduling
514 return cycles_2_ns(a);
517 unsigned long get_cmos_time(void)
519 unsigned int timeout, year, mon, day, hour, min, sec;
520 unsigned char last, this;
524 * The Linux interpretation of the CMOS clock register contents: When the
525 * Update-In-Progress (UIP) flag goes from 1 to 0, the RTC registers show the
526 * second which has precisely just started. Waiting for this can take up to 1
527 * second, we timeout approximately after 2.4 seconds on a machine with
528 * standard 8.3 MHz ISA bus.
531 spin_lock_irqsave(&rtc_lock, flags);
536 while (timeout && last && !this) {
538 this = CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP;
543 * Here we are safe to assume the registers won't change for a whole second, so
544 * we just go ahead and read them.
547 sec = CMOS_READ(RTC_SECONDS);
548 min = CMOS_READ(RTC_MINUTES);
549 hour = CMOS_READ(RTC_HOURS);
550 day = CMOS_READ(RTC_DAY_OF_MONTH);
551 mon = CMOS_READ(RTC_MONTH);
552 year = CMOS_READ(RTC_YEAR);
554 spin_unlock_irqrestore(&rtc_lock, flags);
557 * We know that x86-64 always uses BCD format, no need to check the config
569 * x86-64 systems only exists since 2002.
570 * This will work up to Dec 31, 2100
574 return mktime(year, mon, day, hour, min, sec);
577 #ifdef CONFIG_CPU_FREQ
579 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
582 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
583 not that important because current Opteron setups do not support
584 scaling on SMP anyroads.
586 Should fix up last_tsc too. Currently gettimeofday in the
587 first tick after the change will be slightly wrong. */
589 #include <linux/workqueue.h>
591 static unsigned int cpufreq_delayed_issched = 0;
592 static unsigned int cpufreq_init = 0;
593 static struct work_struct cpufreq_delayed_get_work;
595 static void handle_cpufreq_delayed_get(void *v)
598 for_each_online_cpu(cpu) {
601 cpufreq_delayed_issched = 0;
604 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
605 * to verify the CPU frequency the timing core thinks the CPU is running
606 * at is still correct.
608 static void cpufreq_delayed_get(void)
611 if (cpufreq_init && !cpufreq_delayed_issched) {
612 cpufreq_delayed_issched = 1;
615 printk(KERN_DEBUG "Losing some ticks... checking if CPU frequency changed.\n");
617 schedule_work(&cpufreq_delayed_get_work);
621 static unsigned int ref_freq = 0;
622 static unsigned long loops_per_jiffy_ref = 0;
624 static unsigned long cpu_khz_ref = 0;
626 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
629 struct cpufreq_freqs *freq = data;
630 unsigned long *lpj, dummy;
632 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
636 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
638 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
640 lpj = &boot_cpu_data.loops_per_jiffy;
644 ref_freq = freq->old;
645 loops_per_jiffy_ref = *lpj;
646 cpu_khz_ref = cpu_khz;
648 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
649 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
650 (val == CPUFREQ_RESUMECHANGE)) {
652 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
654 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
655 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
656 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
659 set_cyc2ns_scale(cpu_khz_ref);
664 static struct notifier_block time_cpufreq_notifier_block = {
665 .notifier_call = time_cpufreq_notifier
668 static int __init cpufreq_tsc(void)
670 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
671 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
672 CPUFREQ_TRANSITION_NOTIFIER))
677 core_initcall(cpufreq_tsc);
682 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
683 * it to the HPET timer of known frequency.
686 #define TICK_COUNT 100000000
688 static unsigned int __init hpet_calibrate_tsc(void)
690 int tsc_start, hpet_start;
691 int tsc_now, hpet_now;
694 local_irq_save(flags);
697 hpet_start = hpet_readl(HPET_COUNTER);
702 hpet_now = hpet_readl(HPET_COUNTER);
705 local_irq_restore(flags);
706 } while ((tsc_now - tsc_start) < TICK_COUNT &&
707 (hpet_now - hpet_start) < TICK_COUNT);
709 return (tsc_now - tsc_start) * 1000000000L
710 / ((hpet_now - hpet_start) * hpet_period / 1000);
715 * pit_calibrate_tsc() uses the speaker output (channel 2) of
716 * the PIT. This is better than using the timer interrupt output,
717 * because we can read the value of the speaker with just one inb(),
718 * where we need three i/o operations for the interrupt channel.
719 * We count how many ticks the TSC does in 50 ms.
722 static unsigned int __init pit_calibrate_tsc(void)
724 unsigned long start, end;
727 spin_lock_irqsave(&i8253_lock, flags);
729 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
732 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
733 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
736 while ((inb(0x61) & 0x20) == 0);
740 spin_unlock_irqrestore(&i8253_lock, flags);
742 return (end - start) / 50;
746 static __init int late_hpet_init(void)
751 if (!vxtime.hpet_address)
754 memset(&hd, 0, sizeof (hd));
756 ntimer = hpet_readl(HPET_ID);
757 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
761 * Register with driver.
762 * Timer0 and Timer1 is used by platform.
764 hd.hd_phys_address = vxtime.hpet_address;
765 hd.hd_address = (void *)fix_to_virt(FIX_HPET_BASE);
766 hd.hd_nirqs = ntimer;
767 hd.hd_flags = HPET_DATA_PLATFORM;
768 hpet_reserve_timer(&hd, 0);
769 #ifdef CONFIG_HPET_EMULATE_RTC
770 hpet_reserve_timer(&hd, 1);
772 hd.hd_irq[0] = HPET_LEGACY_8254;
773 hd.hd_irq[1] = HPET_LEGACY_RTC;
776 struct hpet_timer *timer;
779 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
781 for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
783 hd.hd_irq[i] = (timer->hpet_config &
784 Tn_INT_ROUTE_CNF_MASK) >>
785 Tn_INT_ROUTE_CNF_SHIFT;
792 fs_initcall(late_hpet_init);
795 static int hpet_timer_stop_set_go(unsigned long tick)
800 * Stop the timers and reset the main counter.
803 cfg = hpet_readl(HPET_CFG);
804 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
805 hpet_writel(cfg, HPET_CFG);
806 hpet_writel(0, HPET_COUNTER);
807 hpet_writel(0, HPET_COUNTER + 4);
810 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
811 * and period also hpet_tick.
813 if (hpet_use_timer) {
814 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
815 HPET_TN_32BIT, HPET_T0_CFG);
816 hpet_writel(hpet_tick, HPET_T0_CMP);
817 hpet_writel(hpet_tick, HPET_T0_CMP); /* AK: why twice? */
818 cfg |= HPET_CFG_LEGACY;
824 cfg |= HPET_CFG_ENABLE;
825 hpet_writel(cfg, HPET_CFG);
830 static int hpet_init(void)
834 if (!vxtime.hpet_address)
836 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
837 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
840 * Read the period, compute tick and quotient.
843 id = hpet_readl(HPET_ID);
845 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
848 hpet_period = hpet_readl(HPET_PERIOD);
849 if (hpet_period < 100000 || hpet_period > 100000000)
852 hpet_tick = (1000000000L * (USEC_PER_SEC / HZ) + hpet_period / 2) /
855 hpet_use_timer = (id & HPET_ID_LEGSUP);
857 return hpet_timer_stop_set_go(hpet_tick);
860 static int hpet_reenable(void)
862 return hpet_timer_stop_set_go(hpet_tick);
865 void __init pit_init(void)
869 spin_lock_irqsave(&i8253_lock, flags);
870 outb_p(0x34, 0x43); /* binary, mode 2, LSB/MSB, ch 0 */
871 outb_p(LATCH & 0xff, 0x40); /* LSB */
872 outb_p(LATCH >> 8, 0x40); /* MSB */
873 spin_unlock_irqrestore(&i8253_lock, flags);
876 int __init time_setup(char *str)
878 report_lost_ticks = 1;
882 static struct irqaction irq0 = {
883 timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL
886 extern void __init config_acpi_tables(void);
888 void __init time_init(void)
892 #ifdef HPET_HACK_ENABLE_DANGEROUS
893 if (!vxtime.hpet_address) {
894 printk(KERN_WARNING "time.c: WARNING: Enabling HPET base "
896 outl(0x800038a0, 0xcf8);
897 outl(0xff000001, 0xcfc);
898 outl(0x800038a0, 0xcf8);
899 vxtime.hpet_address = inl(0xcfc) & 0xfffffffe;
900 printk(KERN_WARNING "time.c: WARNING: Enabled HPET "
901 "at %#lx.\n", vxtime.hpet_address);
905 vxtime.hpet_address = 0;
907 xtime.tv_sec = get_cmos_time();
910 set_normalized_timespec(&wall_to_monotonic,
911 -xtime.tv_sec, -xtime.tv_nsec);
914 vxtime_hz = (1000000000000000L + hpet_period / 2) /
917 vxtime.hpet_address = 0;
919 if (hpet_use_timer) {
920 cpu_khz = hpet_calibrate_tsc();
922 #ifdef CONFIG_X86_PM_TIMER
923 } else if (pmtmr_ioport && !vxtime.hpet_address) {
924 vxtime_hz = PM_TIMER_FREQUENCY;
927 cpu_khz = pit_calibrate_tsc();
931 cpu_khz = pit_calibrate_tsc();
935 printk(KERN_INFO "time.c: Using %ld.%06ld MHz %s timer.\n",
936 vxtime_hz / 1000000, vxtime_hz % 1000000, timename);
937 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
938 cpu_khz / 1000, cpu_khz % 1000);
939 vxtime.mode = VXTIME_TSC;
940 vxtime.quot = (1000000L << 32) / vxtime_hz;
941 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
942 rdtscll_sync(&vxtime.last_tsc);
945 set_cyc2ns_scale(cpu_khz);
953 * Make an educated guess if the TSC is trustworthy and synchronized
956 __init int unsynchronized_tsc(void)
959 if (oem_force_hpet_timer())
961 /* Intel systems are normally all synchronized. Exceptions
962 are handled in the OEM check above. */
963 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
966 /* Assume multi socket systems are not synchronized */
967 return num_present_cpus() > 1;
971 * Decide after all CPUs are booted what mode gettimeofday should use.
973 void __init time_init_gtod(void)
977 if (unsynchronized_tsc())
979 if (vxtime.hpet_address && notsc) {
980 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
981 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
982 vxtime.mode = VXTIME_HPET;
983 do_gettimeoffset = do_gettimeoffset_hpet;
984 #ifdef CONFIG_X86_PM_TIMER
985 /* Using PM for gettimeofday is quite slow, but we have no other
986 choice because the TSC is too unreliable on some systems. */
987 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
989 do_gettimeoffset = do_gettimeoffset_pm;
990 vxtime.mode = VXTIME_PMTMR;
992 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
995 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
996 vxtime.mode = VXTIME_TSC;
999 printk(KERN_INFO "time.c: Using %s based timekeeping.\n", timetype);
1002 __setup("report_lost_ticks", time_setup);
1004 static long clock_cmos_diff;
1005 static unsigned long sleep_start;
1007 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1010 * Estimate time zone so that set_time can update the clock
1012 long cmos_time = get_cmos_time();
1014 clock_cmos_diff = -cmos_time;
1015 clock_cmos_diff += get_seconds();
1016 sleep_start = cmos_time;
1020 static int timer_resume(struct sys_device *dev)
1022 unsigned long flags;
1024 unsigned long ctime = get_cmos_time();
1025 unsigned long sleep_length = (ctime - sleep_start) * HZ;
1027 if (vxtime.hpet_address)
1030 i8254_timer_resume();
1032 sec = ctime + clock_cmos_diff;
1033 write_seqlock_irqsave(&xtime_lock,flags);
1036 write_sequnlock_irqrestore(&xtime_lock,flags);
1037 jiffies += sleep_length;
1038 wall_jiffies += sleep_length;
1039 touch_softlockup_watchdog();
1043 static struct sysdev_class timer_sysclass = {
1044 .resume = timer_resume,
1045 .suspend = timer_suspend,
1046 set_kset_name("timer"),
1050 /* XXX this driverfs stuff should probably go elsewhere later -john */
1051 static struct sys_device device_timer = {
1053 .cls = &timer_sysclass,
1056 static int time_init_device(void)
1058 int error = sysdev_class_register(&timer_sysclass);
1060 error = sysdev_register(&device_timer);
1064 device_initcall(time_init_device);
1066 #ifdef CONFIG_HPET_EMULATE_RTC
1067 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1068 * is enabled, we support RTC interrupt functionality in software.
1069 * RTC has 3 kinds of interrupts:
1070 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1072 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1073 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1074 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1075 * (1) and (2) above are implemented using polling at a frequency of
1076 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1077 * overhead. (DEFAULT_RTC_INT_FREQ)
1078 * For (3), we use interrupts at 64Hz or user specified periodic
1079 * frequency, whichever is higher.
1081 #include <linux/rtc.h>
1083 #define DEFAULT_RTC_INT_FREQ 64
1084 #define RTC_NUM_INTS 1
1086 static unsigned long UIE_on;
1087 static unsigned long prev_update_sec;
1089 static unsigned long AIE_on;
1090 static struct rtc_time alarm_time;
1092 static unsigned long PIE_on;
1093 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1094 static unsigned long PIE_count;
1096 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1097 static unsigned int hpet_t1_cmp; /* cached comparator register */
1099 int is_hpet_enabled(void)
1101 return vxtime.hpet_address != 0;
1105 * Timer 1 for RTC, we do not use periodic interrupt feature,
1106 * even if HPET supports periodic interrupts on Timer 1.
1107 * The reason being, to set up a periodic interrupt in HPET, we need to
1108 * stop the main counter. And if we do that everytime someone diables/enables
1109 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1110 * So, for the time being, simulate the periodic interrupt in software.
1112 * hpet_rtc_timer_init() is called for the first time and during subsequent
1113 * interuppts reinit happens through hpet_rtc_timer_reinit().
1115 int hpet_rtc_timer_init(void)
1117 unsigned int cfg, cnt;
1118 unsigned long flags;
1120 if (!is_hpet_enabled())
1123 * Set the counter 1 and enable the interrupts.
1125 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1126 hpet_rtc_int_freq = PIE_freq;
1128 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1130 local_irq_save(flags);
1131 cnt = hpet_readl(HPET_COUNTER);
1132 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1133 hpet_writel(cnt, HPET_T1_CMP);
1135 local_irq_restore(flags);
1137 cfg = hpet_readl(HPET_T1_CFG);
1138 cfg &= ~HPET_TN_PERIODIC;
1139 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1140 hpet_writel(cfg, HPET_T1_CFG);
1145 static void hpet_rtc_timer_reinit(void)
1147 unsigned int cfg, cnt;
1149 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1150 cfg = hpet_readl(HPET_T1_CFG);
1151 cfg &= ~HPET_TN_ENABLE;
1152 hpet_writel(cfg, HPET_T1_CFG);
1156 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1157 hpet_rtc_int_freq = PIE_freq;
1159 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1161 /* It is more accurate to use the comparator value than current count.*/
1163 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1164 hpet_writel(cnt, HPET_T1_CMP);
1169 * The functions below are called from rtc driver.
1170 * Return 0 if HPET is not being used.
1171 * Otherwise do the necessary changes and return 1.
1173 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1175 if (!is_hpet_enabled())
1178 if (bit_mask & RTC_UIE)
1180 if (bit_mask & RTC_PIE)
1182 if (bit_mask & RTC_AIE)
1188 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1190 int timer_init_reqd = 0;
1192 if (!is_hpet_enabled())
1195 if (!(PIE_on | AIE_on | UIE_on))
1196 timer_init_reqd = 1;
1198 if (bit_mask & RTC_UIE) {
1201 if (bit_mask & RTC_PIE) {
1205 if (bit_mask & RTC_AIE) {
1209 if (timer_init_reqd)
1210 hpet_rtc_timer_init();
1215 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1217 if (!is_hpet_enabled())
1220 alarm_time.tm_hour = hrs;
1221 alarm_time.tm_min = min;
1222 alarm_time.tm_sec = sec;
1227 int hpet_set_periodic_freq(unsigned long freq)
1229 if (!is_hpet_enabled())
1238 int hpet_rtc_dropped_irq(void)
1240 if (!is_hpet_enabled())
1246 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1248 struct rtc_time curr_time;
1249 unsigned long rtc_int_flag = 0;
1250 int call_rtc_interrupt = 0;
1252 hpet_rtc_timer_reinit();
1254 if (UIE_on | AIE_on) {
1255 rtc_get_rtc_time(&curr_time);
1258 if (curr_time.tm_sec != prev_update_sec) {
1259 /* Set update int info, call real rtc int routine */
1260 call_rtc_interrupt = 1;
1261 rtc_int_flag = RTC_UF;
1262 prev_update_sec = curr_time.tm_sec;
1267 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1268 /* Set periodic int info, call real rtc int routine */
1269 call_rtc_interrupt = 1;
1270 rtc_int_flag |= RTC_PF;
1275 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1276 (curr_time.tm_min == alarm_time.tm_min) &&
1277 (curr_time.tm_hour == alarm_time.tm_hour)) {
1278 /* Set alarm int info, call real rtc int routine */
1279 call_rtc_interrupt = 1;
1280 rtc_int_flag |= RTC_AF;
1283 if (call_rtc_interrupt) {
1284 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1285 rtc_interrupt(rtc_int_flag, dev_id, regs);
1293 static int __init nohpet_setup(char *s)
1299 __setup("nohpet", nohpet_setup);
1302 static int __init notsc_setup(char *s)
1308 __setup("notsc", notsc_setup);