2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004 - 2008 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/coprocessor.h>
20 #include <asm/thread_info.h>
21 #include <asm/uaccess.h>
22 #include <asm/unistd.h>
23 #include <asm/ptrace.h>
24 #include <asm/current.h>
25 #include <asm/pgtable.h>
27 #include <asm/signal.h>
28 #include <asm/tlbflush.h>
29 #include <variant/tie-asm.h>
31 /* Unimplemented features. */
33 #undef KERNEL_STACK_OVERFLOW_CHECK
34 #undef PREEMPTIBLE_KERNEL
35 #undef ALLOCA_EXCEPTION_IN_IRAM
43 * Macro to find first bit set in WINDOWBASE from the left + 1
50 .macro ffs_ws bit mask
53 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
54 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
58 _bltui \mask, 0x10000, 99f
60 extui \mask, \mask, 16, 16
63 99: _bltui \mask, 0x100, 99f
67 99: _bltui \mask, 0x10, 99f
70 99: _bltui \mask, 0x4, 99f
73 99: _bltui \mask, 0x2, 99f
80 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
83 * First-level exception handler for user exceptions.
84 * Save some special registers, extra states and all registers in the AR
85 * register file that were in use in the user task, and jump to the common
87 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
88 * save them for kernel exceptions).
90 * Entry condition for user_exception:
92 * a0: trashed, original value saved on stack (PT_AREG0)
94 * a2: new stack pointer, original value in depc
96 * depc: a2, original value saved on stack (PT_DEPC)
99 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
100 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
102 * Entry condition for _user_exception:
104 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
105 * excsave has been restored, and
106 * stack pointer (a1) has been set.
108 * Note: _user_exception might be at an odd address. Don't use call0..call12
111 ENTRY(user_exception)
113 /* Save a2, a3, and depc, restore excsave_1 and set SP. */
117 s32i a1, a2, PT_AREG1
118 s32i a0, a2, PT_AREG2
119 s32i a3, a2, PT_AREG3
122 .globl _user_exception
125 /* Save SAR and turn off single stepping */
131 s32i a2, a1, PT_ICOUNTLEVEL
133 #if XCHAL_HAVE_THREADPTR
135 s32i a2, a1, PT_THREADPTR
138 /* Rotate ws so that the current windowbase is at bit0. */
139 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
144 s32i a2, a1, PT_WINDOWBASE
145 s32i a3, a1, PT_WINDOWSTART
146 slli a2, a3, 32-WSBITS
148 srli a2, a2, 32-WSBITS
149 s32i a2, a1, PT_WMASK # needed for restoring registers
151 /* Save only live registers. */
154 s32i a4, a1, PT_AREG4
155 s32i a5, a1, PT_AREG5
156 s32i a6, a1, PT_AREG6
157 s32i a7, a1, PT_AREG7
159 s32i a8, a1, PT_AREG8
160 s32i a9, a1, PT_AREG9
161 s32i a10, a1, PT_AREG10
162 s32i a11, a1, PT_AREG11
164 s32i a12, a1, PT_AREG12
165 s32i a13, a1, PT_AREG13
166 s32i a14, a1, PT_AREG14
167 s32i a15, a1, PT_AREG15
168 _bnei a2, 1, 1f # only one valid frame?
170 /* Only one valid frame, skip saving regs. */
174 /* Save the remaining registers.
175 * We have to save all registers up to the first '1' from
176 * the right, except the current frame (bit 0).
177 * Assume a2 is: 001001000110001
178 * All register frames starting from the top field to the marked '1'
182 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
183 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
184 and a3, a3, a2 # max. only one bit is set
186 /* Find number of frames to save */
188 ffs_ws a0, a3 # number of frames to the '1' from left
190 /* Store information into WMASK:
191 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
192 * bits 4...: number of valid 4-register frames
195 slli a3, a0, 4 # number of frames to save in bits 8..4
196 extui a2, a2, 0, 4 # mask for the first 16 registers
198 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
200 /* Save 4 registers at a time */
203 s32i a0, a5, PT_AREG_END - 16
204 s32i a1, a5, PT_AREG_END - 12
205 s32i a2, a5, PT_AREG_END - 8
206 s32i a3, a5, PT_AREG_END - 4
211 /* WINDOWBASE still in SAR! */
213 rsr a2, sar # original WINDOWBASE
217 wsr a3, windowstart # set corresponding WINDOWSTART bit
218 wsr a2, windowbase # and WINDOWSTART
221 /* We are back to the original stack pointer (a1) */
223 2: /* Now, jump to the common exception handler. */
227 ENDPROC(user_exception)
230 * First-level exit handler for kernel exceptions
231 * Save special registers and the live window frame.
232 * Note: Even though we changes the stack pointer, we don't have to do a
233 * MOVSP here, as we do that when we return from the exception.
234 * (See comment in the kernel exception exit code)
236 * Entry condition for kernel_exception:
238 * a0: trashed, original value saved on stack (PT_AREG0)
240 * a2: new stack pointer, original in DEPC
242 * depc: a2, original value saved on stack (PT_DEPC)
245 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
246 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
248 * Entry condition for _kernel_exception:
250 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
251 * excsave has been restored, and
252 * stack pointer (a1) has been set.
254 * Note: _kernel_exception might be at an odd address. Don't use call0..call12
257 ENTRY(kernel_exception)
259 /* Save a0, a2, a3, DEPC and set SP. */
261 xsr a3, excsave1 # restore a3, excsave_1
262 rsr a0, depc # get a2
263 s32i a1, a2, PT_AREG1
264 s32i a0, a2, PT_AREG2
265 s32i a3, a2, PT_AREG3
268 .globl _kernel_exception
271 /* Save SAR and turn off single stepping */
277 s32i a2, a1, PT_ICOUNTLEVEL
279 /* Rotate ws so that the current windowbase is at bit0. */
280 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
282 rsr a2, windowbase # don't need to save these, we only
283 rsr a3, windowstart # need shifted windowstart: windowmask
285 slli a2, a3, 32-WSBITS
287 srli a2, a2, 32-WSBITS
288 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
290 /* Save only the live window-frame */
293 s32i a4, a1, PT_AREG4
294 s32i a5, a1, PT_AREG5
295 s32i a6, a1, PT_AREG6
296 s32i a7, a1, PT_AREG7
298 s32i a8, a1, PT_AREG8
299 s32i a9, a1, PT_AREG9
300 s32i a10, a1, PT_AREG10
301 s32i a11, a1, PT_AREG11
303 s32i a12, a1, PT_AREG12
304 s32i a13, a1, PT_AREG13
305 s32i a14, a1, PT_AREG14
306 s32i a15, a1, PT_AREG15
310 #ifdef KERNEL_STACK_OVERFLOW_CHECK
312 /* Stack overflow check, for debugging */
313 extui a2, a1, TASK_SIZE_BITS,XX
315 _bge a2, a3, out_of_stack_panic
320 * This is the common exception handler.
321 * We get here from the user exception handler or simply by falling through
322 * from the kernel exception handler.
323 * Save the remaining special registers, switch to kernel mode, and jump
324 * to the second-level exception handler.
330 /* Save some registers, disable loops and clear the syscall flag. */
334 s32i a2, a1, PT_DEBUGCAUSE
339 s32i a2, a1, PT_SYSCALL
341 s32i a3, a1, PT_EXCVADDR
343 s32i a2, a1, PT_LCOUNT
345 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
350 s32i a0, a1, PT_EXCCAUSE
351 s32i a3, a2, EXC_TABLE_FIXUP
353 /* All unrecoverable states are saved on stack, now, and a1 is valid,
354 * so we can allow exceptions and interrupts (*) again.
355 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
357 * (*) We only allow interrupts of higher priority than current IRQ
363 extui a3, a3, PS_INTLEVEL_SHIFT, PS_INTLEVEL_WIDTH
365 movnez a2, a3, a3 # a2 = 1: level-1, > 1: high priority
366 moveqz a3, a2, a0 # a3 = IRQ level iff interrupt
367 movi a2, 1 << PS_WOE_BIT
372 s32i a3, a1, PT_PS # save ps
374 /* Save lbeg, lend */
383 #if XCHAL_HAVE_S32C1I
385 s32i a2, a1, PT_SCOMPARE1
388 /* Save optional registers. */
390 save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
392 #ifdef CONFIG_TRACE_IRQFLAGS
394 /* Double exception means we came here with an exception
395 * while PS.EXCM was set, i.e. interrupts disabled.
397 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
398 l32i a4, a1, PT_EXCCAUSE
399 bnei a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
400 /* We came here with an interrupt means interrupts were enabled
401 * and we've just disabled them.
403 movi a4, trace_hardirqs_off
408 /* Go to second-level dispatcher. Set up parameters to pass to the
409 * exception handler and call the exception handler.
413 mov a6, a1 # pass stack frame
414 mov a7, a0 # pass EXCCAUSE
416 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
418 /* Call the second-level handler */
422 /* Jump here for exception exit */
423 .global common_exception_return
424 common_exception_return:
426 #ifdef CONFIG_TRACE_IRQFLAGS
428 /* Double exception means we came here with an exception
429 * while PS.EXCM was set, i.e. interrupts disabled.
431 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
432 l32i a4, a1, PT_EXCCAUSE
433 bnei a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
434 /* We came here with an interrupt means interrupts were enabled
435 * and we'll reenable them on return.
437 movi a4, trace_hardirqs_on
442 /* Jump if we are returning from kernel exceptions. */
444 1: l32i a3, a1, PT_PS
445 _bbci.l a3, PS_UM_BIT, 4f
447 /* Specific to a user exception exit:
448 * We need to check some flags for signal handling and rescheduling,
449 * and have to restore WB and WS, extra states, and all registers
450 * in the register file that were in use in the user task.
451 * Note that we don't disable interrupts here.
454 GET_THREAD_INFO(a2,a1)
455 l32i a4, a2, TI_FLAGS
457 _bbsi.l a4, TIF_NEED_RESCHED, 3f
458 _bbsi.l a4, TIF_NOTIFY_RESUME, 2f
459 _bbci.l a4, TIF_SIGPENDING, 4f
461 2: l32i a4, a1, PT_DEPC
462 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
464 /* Call do_signal() */
466 movi a4, do_notify_resume # int do_notify_resume(struct pt_regs*)
473 movi a4, schedule # void schedule (void)
477 4: /* Restore optional registers. */
479 load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
481 /* Restore SCOMPARE1 */
483 #if XCHAL_HAVE_S32C1I
484 l32i a2, a1, PT_SCOMPARE1
487 wsr a3, ps /* disable interrupts */
489 _bbci.l a3, PS_UM_BIT, kernel_exception_exit
493 /* Restore the state of the task and return from the exception. */
495 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
497 l32i a2, a1, PT_WINDOWBASE
498 l32i a3, a1, PT_WINDOWSTART
499 wsr a1, depc # use DEPC as temp storage
500 wsr a3, windowstart # restore WINDOWSTART
501 ssr a2 # preserve user's WB in the SAR
502 wsr a2, windowbase # switch to user's saved WB
504 rsr a1, depc # restore stack pointer
505 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
506 rotw -1 # we restore a4..a7
507 _bltui a6, 16, 1f # only have to restore current window?
509 /* The working registers are a0 and a3. We are restoring to
510 * a4..a7. Be careful not to destroy what we have just restored.
511 * Note: wmask has the format YYYYM:
512 * Y: number of registers saved in groups of 4
513 * M: 4 bit mask of first 16 registers
519 2: rotw -1 # a0..a3 become a4..a7
520 addi a3, a7, -4*4 # next iteration
521 addi a2, a6, -16 # decrementing Y in WMASK
522 l32i a4, a3, PT_AREG_END + 0
523 l32i a5, a3, PT_AREG_END + 4
524 l32i a6, a3, PT_AREG_END + 8
525 l32i a7, a3, PT_AREG_END + 12
528 /* Clear unrestored registers (don't leak anything to user-land */
530 1: rsr a0, windowbase
534 extui a3, a3, 0, WBBITS
544 /* We are back were we were when we started.
545 * Note: a2 still contains WMASK (if we've returned to the original
546 * frame where we had loaded a2), or at least the lower 4 bits
547 * (if we have restored WSBITS-1 frames).
550 #if XCHAL_HAVE_THREADPTR
551 l32i a3, a1, PT_THREADPTR
555 2: j common_exception_exit
557 /* This is the kernel exception exit.
558 * We avoided to do a MOVSP when we entered the exception, but we
559 * have to do it here.
562 kernel_exception_exit:
564 #ifdef PREEMPTIBLE_KERNEL
566 #ifdef CONFIG_PREEMPT
569 * Note: We've just returned from a call4, so we have
570 * at least 4 addt'l regs.
573 /* Check current_thread_info->preempt_count */
576 l32i a3, a2, TI_PREEMPT
579 l32i a2, a2, TI_FLAGS
587 /* Check if we have to do a movsp.
589 * We only have to do a movsp if the previous window-frame has
590 * been spilled to the *temporary* exception stack instead of the
591 * task's stack. This is the case if the corresponding bit in
592 * WINDOWSTART for the previous window-frame was set before
593 * (not spilled) but is zero now (spilled).
594 * If this bit is zero, all other bits except the one for the
595 * current window frame are also zero. So, we can use a simple test:
596 * 'and' WINDOWSTART and WINDOWSTART-1:
598 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
600 * The result is zero only if one bit was set.
602 * (Note: We might have gone through several task switches before
603 * we come back to the current task, so WINDOWBASE might be
604 * different from the time the exception occurred.)
607 /* Test WINDOWSTART before and after the exception.
608 * We actually have WMASK, so we only have to test if it is 1 or not.
611 l32i a2, a1, PT_WMASK
612 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
614 /* Test WINDOWSTART now. If spilled, do the movsp */
619 _bnez a3, common_exception_exit
621 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
626 s32i a3, a1, PT_SIZE+0
627 s32i a4, a1, PT_SIZE+4
630 s32i a3, a1, PT_SIZE+8
631 s32i a4, a1, PT_SIZE+12
633 /* Common exception exit.
634 * We restore the special register and the current window frame, and
635 * return from the exception.
637 * Note: We expect a2 to hold PT_WMASK
640 common_exception_exit:
642 /* Restore address registers. */
645 l32i a4, a1, PT_AREG4
646 l32i a5, a1, PT_AREG5
647 l32i a6, a1, PT_AREG6
648 l32i a7, a1, PT_AREG7
650 l32i a8, a1, PT_AREG8
651 l32i a9, a1, PT_AREG9
652 l32i a10, a1, PT_AREG10
653 l32i a11, a1, PT_AREG11
655 l32i a12, a1, PT_AREG12
656 l32i a13, a1, PT_AREG13
657 l32i a14, a1, PT_AREG14
658 l32i a15, a1, PT_AREG15
660 /* Restore PC, SAR */
662 1: l32i a2, a1, PT_PC
667 /* Restore LBEG, LEND, LCOUNT */
672 l32i a2, a1, PT_LCOUNT
676 /* We control single stepping through the ICOUNTLEVEL register. */
678 l32i a2, a1, PT_ICOUNTLEVEL
683 /* Check if it was double exception. */
686 l32i a3, a1, PT_AREG3
687 _bltui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
690 l32i a2, a1, PT_AREG2
691 l32i a0, a1, PT_AREG0
692 l32i a1, a1, PT_AREG1
696 /* Restore a0...a3 and return */
699 extui a2, a0, PS_INTLEVEL_SHIFT, PS_INTLEVEL_WIDTH
703 l32i a2, a1, PT_AREG2
706 .macro irq_exit_level level
708 .if XCHAL_EXCM_LEVEL >= \level
711 l32i a0, a1, PT_AREG0
712 l32i a1, a1, PT_AREG1
719 l32i a0, a1, PT_AREG0
720 l32i a1, a1, PT_AREG1
724 /* no rfi for level-1 irq, handled by rfe above*/
733 ENDPROC(kernel_exception)
736 * Debug exception handler.
738 * Currently, we don't support KGDB, so only user application can be debugged.
740 * When we get here, a0 is trashed and saved to excsave[debuglevel]
743 ENTRY(debug_exception)
745 rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL
746 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
748 /* Set EPC1 and EXCCAUSE */
750 wsr a2, depc # save a2 temporarily
751 rsr a2, SREG_EPC + XCHAL_DEBUGLEVEL
754 movi a2, EXCCAUSE_MAPPED_DEBUG
757 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
759 movi a2, 1 << PS_EXCM_BIT
761 movi a0, debug_exception # restore a3, debug jump vector
763 xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
765 /* Switch to kernel/user stack, restore jump vector, and save a0 */
767 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
769 addi a2, a1, -16-PT_SIZE # assume kernel stack
770 s32i a0, a2, PT_AREG0
772 s32i a1, a2, PT_AREG1
773 s32i a0, a2, PT_DEPC # mark it as a regular exception
775 s32i a3, a2, PT_AREG3
776 s32i a0, a2, PT_AREG2
781 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
782 s32i a0, a2, PT_AREG0
784 s32i a1, a2, PT_AREG1
787 s32i a3, a2, PT_AREG3
788 s32i a0, a2, PT_AREG2
792 /* Debug exception while in exception mode. */
795 ENDPROC(debug_exception)
798 * We get here in case of an unrecoverable exception.
799 * The only thing we can do is to be nice and print a panic message.
800 * We only produce a single stack frame for panic, so ???
805 * - a0 contains the caller address; original value saved in excsave1.
806 * - the original a0 contains a valid return address (backtrace) or 0.
807 * - a2 contains a valid stackpointer
811 * - If the stack pointer could be invalid, the caller has to setup a
812 * dummy stack pointer (e.g. the stack of the init_task)
814 * - If the return address could be invalid, the caller has to set it
815 * to 0, so the backtrace would stop.
820 .ascii "Unrecoverable error in exception handler\0"
822 ENTRY(unrecoverable_exception)
831 movi a1, (1 << PS_WOE_BIT) | LOCKLEVEL
837 addi a1, a1, PT_REGS_OFFSET
840 movi a6, unrecoverable_text
846 ENDPROC(unrecoverable_exception)
848 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
851 * Fast-handler for alloca exceptions
853 * The ALLOCA handler is entered when user code executes the MOVSP
854 * instruction and the caller's frame is not in the register file.
855 * In this case, the caller frame's a0..a3 are on the stack just
856 * below sp (a1), and this handler moves them.
858 * For "MOVSP <ar>,<as>" without destination register a1, this routine
859 * simply moves the value from <as> to <ar> without moving the save area.
863 * a0: trashed, original value saved on stack (PT_AREG0)
865 * a2: new stack pointer, original in DEPC
867 * depc: a2, original value saved on stack (PT_DEPC)
870 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
871 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
875 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
876 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
878 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
879 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
884 /* We shouldn't be in a double exception. */
887 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
889 rsr a0, depc # get a2
890 s32i a4, a2, PT_AREG4 # save a4 and
891 s32i a0, a2, PT_AREG2 # a2 to stack
893 /* Exit critical section. */
896 s32i a0, a3, EXC_TABLE_FIXUP
898 /* Restore a3, excsave_1 */
900 xsr a3, excsave1 # make sure excsave_1 is valid for dbl.
901 rsr a4, epc1 # get exception address
902 s32i a3, a2, PT_AREG3 # save a3 to stack
904 #ifdef ALLOCA_EXCEPTION_IN_IRAM
905 #error iram not supported
907 /* Note: l8ui not allowed in IRAM/IROM!! */
908 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
911 _EXTUI_MOVSP_SRC(a0) # extract source register number
917 movi a0, unrecoverable_exception
922 l32i a3, a2, PT_AREG0; _j 1f; .align 8
923 mov a3, a1; _j 1f; .align 8
924 l32i a3, a2, PT_AREG2; _j 1f; .align 8
925 l32i a3, a2, PT_AREG3; _j 1f; .align 8
926 l32i a3, a2, PT_AREG4; _j 1f; .align 8
927 mov a3, a5; _j 1f; .align 8
928 mov a3, a6; _j 1f; .align 8
929 mov a3, a7; _j 1f; .align 8
930 mov a3, a8; _j 1f; .align 8
931 mov a3, a9; _j 1f; .align 8
932 mov a3, a10; _j 1f; .align 8
933 mov a3, a11; _j 1f; .align 8
934 mov a3, a12; _j 1f; .align 8
935 mov a3, a13; _j 1f; .align 8
936 mov a3, a14; _j 1f; .align 8
937 mov a3, a15; _j 1f; .align 8
941 #ifdef ALLOCA_EXCEPTION_IN_IRAM
942 #error iram not supported
944 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
946 addi a4, a4, 3 # step over movsp
947 _EXTUI_MOVSP_DST(a0) # extract destination register
948 wsr a4, epc1 # save new epc_1
950 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
952 /* Move the save area. This implies the use of the L32E
953 * and S32E instructions, because this move must be done with
954 * the user's PS.RING privilege levels, not with ring 0
955 * (kernel's) privileges currently active with PS.EXCM
956 * set. Note that we have stil registered a fixup routine with the
957 * double exception vector in case a double exception occurs.
960 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
971 /* Restore stack-pointer and all the other saved registers. */
975 l32i a4, a2, PT_AREG4
976 l32i a3, a2, PT_AREG3
977 l32i a0, a2, PT_AREG0
978 l32i a2, a2, PT_AREG2
981 /* MOVSP <at>,<as> was invoked with <at> != a1.
982 * Because the stack pointer is not being modified,
983 * we should be able to just modify the pointer
984 * without moving any save area.
985 * The processor only traps these occurrences if the
986 * caller window isn't live, so unfortunately we can't
987 * use this as an alternate trap mechanism.
988 * So we just do the move. This requires that we
989 * resolve the destination register, not just the source,
990 * so there's some extra work.
991 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
994 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
996 1: movi a4, .Lmovsp_dst
1002 s32i a3, a2, PT_AREG0; _j 1f; .align 8
1003 mov a1, a3; _j 1f; .align 8
1004 s32i a3, a2, PT_AREG2; _j 1f; .align 8
1005 s32i a3, a2, PT_AREG3; _j 1f; .align 8
1006 s32i a3, a2, PT_AREG4; _j 1f; .align 8
1007 mov a5, a3; _j 1f; .align 8
1008 mov a6, a3; _j 1f; .align 8
1009 mov a7, a3; _j 1f; .align 8
1010 mov a8, a3; _j 1f; .align 8
1011 mov a9, a3; _j 1f; .align 8
1012 mov a10, a3; _j 1f; .align 8
1013 mov a11, a3; _j 1f; .align 8
1014 mov a12, a3; _j 1f; .align 8
1015 mov a13, a3; _j 1f; .align 8
1016 mov a14, a3; _j 1f; .align 8
1017 mov a15, a3; _j 1f; .align 8
1019 1: l32i a4, a2, PT_AREG4
1020 l32i a3, a2, PT_AREG3
1021 l32i a0, a2, PT_AREG0
1022 l32i a2, a2, PT_AREG2
1025 ENDPROC(fast_alloca)
1028 * fast system calls.
1030 * WARNING: The kernel doesn't save the entire user context before
1031 * handling a fast system call. These functions are small and short,
1032 * usually offering some functionality not available to user tasks.
1034 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
1038 * a0: trashed, original value saved on stack (PT_AREG0)
1040 * a2: new stack pointer, original in DEPC
1041 * a3: dispatch table
1042 * depc: a2, original value saved on stack (PT_DEPC)
1046 ENTRY(fast_syscall_kernel)
1054 l32i a0, a2, PT_DEPC
1055 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1057 rsr a0, depc # get syscall-nr
1058 _beqz a0, fast_syscall_spill_registers
1059 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1063 ENDPROC(fast_syscall_kernel)
1065 ENTRY(fast_syscall_user)
1073 l32i a0, a2, PT_DEPC
1074 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
1076 rsr a0, depc # get syscall-nr
1077 _beqz a0, fast_syscall_spill_registers
1078 _beqi a0, __NR_xtensa, fast_syscall_xtensa
1082 ENDPROC(fast_syscall_user)
1084 ENTRY(fast_syscall_unrecoverable)
1086 /* Restore all states. */
1088 l32i a0, a2, PT_AREG0 # restore a0
1089 xsr a2, depc # restore a2, depc
1093 movi a0, unrecoverable_exception
1096 ENDPROC(fast_syscall_unrecoverable)
1099 * sysxtensa syscall handler
1101 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1102 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1103 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1104 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1109 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1111 * a2: new stack pointer, original in a0 and DEPC
1112 * a3: dispatch table, original in excsave_1
1113 * a4..a15: unchanged
1114 * depc: a2, original value saved on stack (PT_DEPC)
1117 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1118 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1120 * Note: we don't have to save a2; a2 holds the return value
1122 * We use the two macros TRY and CATCH:
1124 * TRY adds an entry to the __ex_table fixup table for the immediately
1125 * following instruction.
1127 * CATCH catches any exception that occurred at one of the preceding TRY
1128 * statements and continues from there
1130 * Usage TRY l32i a0, a1, 0
1133 * CATCH <set return code>
1138 .section __ex_table, "a"; \
1146 ENTRY(fast_syscall_xtensa)
1148 xsr a3, excsave1 # restore a3, excsave1
1150 s32i a7, a2, PT_AREG7 # we need an additional register
1151 movi a7, 4 # sizeof(unsigned int)
1152 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1154 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1
1155 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill
1156 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1158 /* Fall through for ATOMIC_CMP_SWP. */
1160 .Lswp: /* Atomic compare and swap */
1162 TRY l32i a0, a3, 0 # read old value
1163 bne a0, a4, 1f # same as old value? jump
1164 TRY s32i a5, a3, 0 # different, modify value
1165 l32i a7, a2, PT_AREG7 # restore a7
1166 l32i a0, a2, PT_AREG0 # restore a0
1167 movi a2, 1 # and return 1
1168 addi a6, a6, 1 # restore a6 (really necessary?)
1171 1: l32i a7, a2, PT_AREG7 # restore a7
1172 l32i a0, a2, PT_AREG0 # restore a0
1173 movi a2, 0 # return 0 (note that we cannot set
1174 addi a6, a6, 1 # restore a6 (really necessary?)
1177 .Lnswp: /* Atomic set, add, and exg_add. */
1179 TRY l32i a7, a3, 0 # orig
1180 add a0, a4, a7 # + arg
1181 moveqz a0, a4, a6 # set
1182 TRY s32i a0, a3, 0 # write new value
1186 l32i a7, a0, PT_AREG7 # restore a7
1187 l32i a0, a0, PT_AREG0 # restore a0
1188 addi a6, a6, 1 # restore a6 (really necessary?)
1192 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1193 l32i a0, a2, PT_AREG0 # restore a0
1197 .Lill: l32i a7, a2, PT_AREG0 # restore a7
1198 l32i a0, a2, PT_AREG0 # restore a0
1202 ENDPROC(fast_syscall_xtensa)
1205 /* fast_syscall_spill_registers.
1209 * a0: trashed, original value saved on stack (PT_AREG0)
1211 * a2: new stack pointer, original in DEPC
1212 * a3: dispatch table
1213 * depc: a2, original value saved on stack (PT_DEPC)
1216 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1219 ENTRY(fast_syscall_spill_registers)
1221 /* Register a FIXUP handler (pass current wb as a parameter) */
1223 movi a0, fast_syscall_spill_registers_fixup
1224 s32i a0, a3, EXC_TABLE_FIXUP
1226 s32i a0, a3, EXC_TABLE_PARAM
1228 /* Save a3 and SAR on stack. */
1231 xsr a3, excsave1 # restore a3 and excsave_1
1232 s32i a3, a2, PT_AREG3
1233 s32i a4, a2, PT_AREG4
1234 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1236 /* The spill routine might clobber a7, a11, and a15. */
1238 s32i a7, a2, PT_AREG7
1239 s32i a11, a2, PT_AREG11
1240 s32i a15, a2, PT_AREG15
1242 call0 _spill_registers # destroys a3, a4, and SAR
1244 /* Advance PC, restore registers and SAR, and return from exception. */
1246 l32i a3, a2, PT_AREG5
1247 l32i a4, a2, PT_AREG4
1248 l32i a0, a2, PT_AREG0
1250 l32i a3, a2, PT_AREG3
1252 /* Restore clobbered registers. */
1254 l32i a7, a2, PT_AREG7
1255 l32i a11, a2, PT_AREG11
1256 l32i a15, a2, PT_AREG15
1261 ENDPROC(fast_syscall_spill_registers)
1265 * We get here if the spill routine causes an exception, e.g. tlb miss.
1266 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1267 * we entered the spill routine and jump to the user exception handler.
1269 * a0: value of depc, original value in depc
1270 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1271 * a3: exctable, original value in excsave1
1274 fast_syscall_spill_registers_fixup:
1276 rsr a2, windowbase # get current windowbase (a2 is saved)
1277 xsr a0, depc # restore depc and a0
1278 ssl a2 # set shift (32 - WB)
1280 /* We need to make sure the current registers (a0-a3) are preserved.
1281 * To do this, we simply set the bit for the current window frame
1282 * in WS, so that the exception handlers save them to the task stack.
1285 rsr a3, excsave1 # get spill-mask
1286 slli a2, a3, 1 # shift left by one
1288 slli a3, a2, 32-WSBITS
1289 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1290 wsr a2, windowstart # set corrected windowstart
1293 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1294 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1296 /* Return to the original (user task) WINDOWBASE.
1297 * We leave the following frame behind:
1299 * a3: trashed (saved in excsave_1)
1300 * depc: depc (we have to return to that address)
1307 /* We are now in the original frame when we entered _spill_registers:
1308 * a0: return address
1309 * a1: used, stack pointer
1310 * a2: kernel stack pointer
1311 * a3: available, saved in EXCSAVE_1
1312 * depc: exception address
1314 * Note: This frame might be the same as above.
1317 /* Setup stack pointer. */
1319 addi a2, a2, -PT_USER_SIZE
1320 s32i a0, a2, PT_AREG0
1322 /* Make sure we return to this fixup handler. */
1324 movi a3, fast_syscall_spill_registers_fixup_return
1325 s32i a3, a2, PT_DEPC # setup depc
1327 /* Jump to the exception handler. */
1331 addx4 a0, a0, a3 # find entry in table
1332 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1335 fast_syscall_spill_registers_fixup_return:
1337 /* When we return here, all registers have been restored (a2: DEPC) */
1339 wsr a2, depc # exception address
1341 /* Restore fixup handler. */
1344 movi a2, fast_syscall_spill_registers_fixup
1345 s32i a2, a3, EXC_TABLE_FIXUP
1347 s32i a2, a3, EXC_TABLE_PARAM
1348 l32i a2, a3, EXC_TABLE_KSTK
1350 /* Load WB at the time the exception occurred. */
1352 rsr a3, sar # WB is still in SAR
1357 /* Restore a3 and return. */
1366 * spill all registers.
1368 * This is not a real function. The following conditions must be met:
1370 * - must be called with call0.
1371 * - uses a3, a4 and SAR.
1372 * - the last 'valid' register of each frame are clobbered.
1373 * - the caller must have registered a fixup handler
1374 * (or be inside a critical section)
1375 * - PS_EXCM must be set (PS_WOE cleared?)
1378 ENTRY(_spill_registers)
1381 * Rotate ws so that the current windowbase is at bit 0.
1382 * Assume ws = xxxwww1yy (www1 current window frame).
1383 * Rotate ws right so that a4 = yyxxxwww1.
1387 rsr a3, windowstart # a3 = xxxwww1yy
1390 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy
1391 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1393 /* We are done if there are no more than the current register frame. */
1395 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1396 movi a4, (1 << (WSBITS-1))
1397 _beqz a3, .Lnospill # only one active frame? jump
1399 /* We want 1 at the top, so that we return to the current windowbase */
1401 or a3, a3, a4 # 1yyxxxwww
1403 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1405 wsr a3, windowstart # save shifted windowstart
1407 and a3, a4, a3 # first bit set from right: 000010000
1409 ffs_ws a4, a3 # a4: shifts to skip empty frames
1411 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right
1412 ssr a4 # save in SAR for later.
1420 srl a3, a3 # shift windowstart
1422 /* WB is now just one frame below the oldest frame in the register
1423 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1424 and WS differ by one 4-register frame. */
1426 /* Save frames. Depending what call was used (call4, call8, call12),
1427 * we have to save 4,8. or 12 registers.
1433 /* Special case: we have a call12-frame starting at a4. */
1435 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1437 s32e a4, a1, -16 # a1 is valid with an empty spill area
1447 .Lloop: _bbsi.l a3, 1, .Lc4
1448 _bbci.l a3, 2, .Lc12
1450 .Lc8: s32e a4, a13, -16
1460 srli a11, a3, 2 # shift windowbase by 2
1464 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1474 .Lc4: s32e a4, a9, -16
1484 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1486 /* 12-register frame (call12) */
1492 .Lc12c: s32e a9, a8, -44
1501 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1502 * window, grab the stackpointer, and rotate back.
1503 * Alternatively, we could also use the following approach, but that
1504 * makes the fixup routine much more complicated:
1527 /* We get here because of an unrecoverable error in the window
1528 * registers. If we are in user space, we kill the application,
1529 * however, this condition is unrecoverable in kernel space.
1533 _bbci.l a0, PS_UM_BIT, 1f
1535 /* User space: Setup a dummy frame and kill application.
1536 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1549 l32i a1, a3, EXC_TABLE_KSTK
1552 movi a4, (1 << PS_WOE_BIT) | LOCKLEVEL
1560 1: /* Kernel space: PANIC! */
1563 movi a0, unrecoverable_exception
1564 callx0 a0 # should not return
1567 ENDPROC(_spill_registers)
1571 * We should never get here. Bail out!
1574 ENTRY(fast_second_level_miss_double_kernel)
1576 1: movi a0, unrecoverable_exception
1577 callx0 a0 # should not return
1580 ENDPROC(fast_second_level_miss_double_kernel)
1582 /* First-level entry handler for user, kernel, and double 2nd-level
1583 * TLB miss exceptions. Note that for now, user and kernel miss
1584 * exceptions share the same entry point and are handled identically.
1586 * An old, less-efficient C version of this function used to exist.
1587 * We include it below, interleaved as comments, for reference.
1591 * a0: trashed, original value saved on stack (PT_AREG0)
1593 * a2: new stack pointer, original in DEPC
1594 * a3: dispatch table
1595 * depc: a2, original value saved on stack (PT_DEPC)
1598 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1599 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1602 ENTRY(fast_second_level_miss)
1604 /* Save a1. Note: we don't expect a double exception. */
1606 s32i a1, a2, PT_AREG1
1608 /* We need to map the page of PTEs for the user task. Find
1609 * the pointer to that page. Also, it's possible for tsk->mm
1610 * to be NULL while tsk->active_mm is nonzero if we faulted on
1611 * a vmalloc address. In that rare case, we must use
1612 * active_mm instead to avoid a fault in this handler. See
1614 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1615 * (or search Internet on "mm vs. active_mm")
1618 * mm = tsk->active_mm;
1619 * pgd = pgd_offset (mm, regs->excvaddr);
1620 * pmd = pmd_offset (pgd, regs->excvaddr);
1625 l32i a0, a1, TASK_MM # tsk->mm
1629 /* We deliberately destroy a3 that holds the exception table. */
1631 8: rsr a3, excvaddr # fault address
1632 _PGD_OFFSET(a0, a3, a1)
1633 l32i a0, a0, 0 # read pmdval
1636 /* Read ptevaddr and convert to top of page-table page.
1638 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1639 * vpnval += DTLB_WAY_PGTABLE;
1640 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1641 * write_dtlb_entry (pteval, vpnval);
1643 * The messy computation for 'pteval' above really simplifies
1644 * into the following:
1646 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY
1649 movi a1, (-PAGE_OFFSET) & 0xffffffff
1650 add a0, a0, a1 # pmdval - PAGE_OFFSET
1651 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1654 movi a1, _PAGE_DIRECTORY
1655 or a0, a0, a1 # ... | PAGE_DIRECTORY
1658 * We utilize all three wired-ways (7-9) to hold pmd translations.
1659 * Memory regions are mapped to the DTLBs according to bits 28 and 29.
1660 * This allows to map the three most common regions to three different
1662 * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000)
1663 * 2 -> way 8 shared libaries (2000.0000)
1664 * 3 -> way 0 stack (3000.0000)
1667 extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3
1669 addx2 a3, a3, a3 # -> 0,3,6,9
1670 srli a1, a1, PAGE_SHIFT
1671 extui a3, a3, 2, 2 # -> 0,0,1,2
1672 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1673 addi a3, a3, DTLB_WAY_PGD
1674 add a1, a1, a3 # ... + way_number
1679 /* Exit critical section. */
1681 4: movi a3, exc_table # restore a3
1683 s32i a0, a3, EXC_TABLE_FIXUP
1685 /* Restore the working registers, and return. */
1687 l32i a0, a2, PT_AREG0
1688 l32i a1, a2, PT_AREG1
1689 l32i a2, a2, PT_DEPC
1692 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1694 /* Restore excsave1 and return. */
1699 /* Return from double exception. */
1705 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1708 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
1710 2: /* Special case for cache aliasing.
1711 * We (should) only get here if a clear_user_page, copy_user_page
1712 * or the aliased cache flush functions got preemptively interrupted
1713 * by another task. Re-establish temporary mapping to the
1714 * TLBTEMP_BASE areas.
1717 /* We shouldn't be in a double exception */
1719 l32i a0, a2, PT_DEPC
1720 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f
1722 /* Make sure the exception originated in the special functions */
1724 movi a0, __tlbtemp_mapping_start
1727 movi a0, __tlbtemp_mapping_end
1730 /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */
1732 movi a3, TLBTEMP_BASE_1
1736 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT))
1739 /* Check if we have to restore an ITLB mapping. */
1741 movi a1, __tlbtemp_mapping_itlb
1750 /* Jump for ITLB entry */
1754 /* We can use up to two TLBTEMP areas, one for src and one for dst. */
1756 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1759 /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */
1765 /* ITLB entry. We only use dst in a6. */
1772 #endif // DCACHE_WAY_SIZE > PAGE_SIZE
1775 2: /* Invalid PGD, default exception handling */
1780 s32i a1, a2, PT_AREG2
1781 s32i a3, a2, PT_AREG3
1785 bbsi.l a2, PS_UM_BIT, 1f
1787 1: j _user_exception
1789 ENDPROC(fast_second_level_miss)
1792 * StoreProhibitedException
1794 * Update the pte and invalidate the itlb mapping for this pte.
1798 * a0: trashed, original value saved on stack (PT_AREG0)
1800 * a2: new stack pointer, original in DEPC
1801 * a3: dispatch table
1802 * depc: a2, original value saved on stack (PT_DEPC)
1805 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1806 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1809 ENTRY(fast_store_prohibited)
1811 /* Save a1 and a4. */
1813 s32i a1, a2, PT_AREG1
1814 s32i a4, a2, PT_AREG4
1817 l32i a0, a1, TASK_MM # tsk->mm
1820 8: rsr a1, excvaddr # fault address
1821 _PGD_OFFSET(a0, a1, a4)
1825 /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/
1827 _PTE_OFFSET(a0, a1, a4)
1828 l32i a4, a0, 0 # read pteval
1829 bbci.l a4, _PAGE_WRITABLE_BIT, 2f
1831 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
1836 /* We need to flush the cache if we have page coloring. */
1837 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1843 /* Exit critical section. */
1846 s32i a0, a3, EXC_TABLE_FIXUP
1848 /* Restore the working registers, and return. */
1850 l32i a4, a2, PT_AREG4
1851 l32i a1, a2, PT_AREG1
1852 l32i a0, a2, PT_AREG0
1853 l32i a2, a2, PT_DEPC
1855 /* Restore excsave1 and a3. */
1858 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1863 /* Double exception. Restore FIXUP handler and return. */
1869 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1872 2: /* If there was a problem, handle fault in C */
1874 rsr a4, depc # still holds a2
1876 s32i a4, a2, PT_AREG2
1877 s32i a3, a2, PT_AREG3
1878 l32i a4, a2, PT_AREG4
1882 bbsi.l a2, PS_UM_BIT, 1f
1884 1: j _user_exception
1886 ENDPROC(fast_store_prohibited)
1888 #endif /* CONFIG_MMU */
1893 * void system_call (struct pt_regs* regs, int exccause)
1901 /* regs->syscall = regs->areg[2] */
1903 l32i a3, a2, PT_AREG2
1905 movi a4, do_syscall_trace_enter
1906 s32i a3, a2, PT_SYSCALL
1909 /* syscall = sys_call_table[syscall_nr] */
1911 movi a4, sys_call_table;
1912 movi a5, __NR_syscall_count
1918 movi a5, sys_ni_syscall;
1921 /* Load args: arg0 - arg5 are passed via regs. */
1923 l32i a6, a2, PT_AREG6
1924 l32i a7, a2, PT_AREG3
1925 l32i a8, a2, PT_AREG4
1926 l32i a9, a2, PT_AREG5
1927 l32i a10, a2, PT_AREG8
1928 l32i a11, a2, PT_AREG9
1930 /* Pass one additional argument to the syscall: pt_regs (on stack) */
1935 1: /* regs->areg[2] = return_value */
1937 s32i a6, a2, PT_AREG2
1938 movi a4, do_syscall_trace_leave
1943 ENDPROC(system_call)
1949 * struct task* _switch_to (struct task* prev, struct task* next)
1957 mov a12, a2 # preserve 'prev' (a2)
1958 mov a13, a3 # and 'next' (a3)
1960 l32i a4, a2, TASK_THREAD_INFO
1961 l32i a5, a3, TASK_THREAD_INFO
1963 save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1965 s32i a0, a12, THREAD_RA # save return address
1966 s32i a1, a12, THREAD_SP # save stack pointer
1968 /* Disable ints while we manipulate the stack pointer. */
1970 movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL
1974 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
1976 /* Switch CPENABLE */
1978 #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
1979 l32i a3, a5, THREAD_CPENABLE
1981 s32i a3, a4, THREAD_CPENABLE
1984 /* Flush register file. */
1986 call0 _spill_registers # destroys a3, a4, and SAR
1988 /* Set kernel stack (and leave critical section)
1989 * Note: It's save to set it here. The stack will not be overwritten
1990 * because the kernel stack will only be loaded again after
1991 * we return from kernel space.
1994 rsr a3, excsave1 # exc_table
1996 addi a7, a5, PT_REGS_OFFSET
1997 s32i a6, a3, EXC_TABLE_FIXUP
1998 s32i a7, a3, EXC_TABLE_KSTK
2000 /* restore context of the task 'next' */
2002 l32i a0, a13, THREAD_RA # restore return address
2003 l32i a1, a13, THREAD_SP # restore stack pointer
2005 load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
2008 mov a2, a12 # return 'prev'
2015 ENTRY(ret_from_fork)
2017 /* void schedule_tail (struct task_struct *prev)
2018 * Note: prev is still in a6 (return value from fake call4 frame)
2020 movi a4, schedule_tail
2023 movi a4, do_syscall_trace_leave
2027 j common_exception_return
2029 ENDPROC(ret_from_fork)
2032 * Kernel thread creation helper
2033 * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg
2034 * left from _switch_to: a6 = prev
2036 ENTRY(ret_from_kernel_thread)
2041 j common_exception_return
2043 ENDPROC(ret_from_kernel_thread)