board/BuR/kwb/board.c

   1 /*
   2  * board.c
   3  *
   4  * Board functions for B&R KWB Board
   5  *
   6  * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
   7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  *
  11  */
  12 #include <common.h>
  13 #include <errno.h>
  14 #include <spl.h>
  15 #include <asm/arch/cpu.h>
  16 #include <asm/arch/hardware.h>
  17 #include <asm/arch/omap.h>
  18 #include <asm/arch/ddr_defs.h>
  19 #include <asm/arch/clock.h>
  20 #include <asm/arch/gpio.h>
  21 #include <asm/arch/sys_proto.h>
  22 #include <asm/arch/mem.h>
  23 #include <asm/io.h>
  24 #include <asm/emif.h>
  25 #include <asm/gpio.h>
  26 #include <i2c.h>
  27 #include <power/tps65217.h>
  28 #include "../common/bur_common.h"
  29 #include <lcd.h>
  30
  31 /* -------------------------------------------------------------------------*/
  32 /* -- defines for used GPIO Hardware -- */
  33 #define ESC_KEY                                 (0+19)
  34 #define LCD_PWR                                 (0+5)
  35 #define PUSH_KEY                                (0+31)
  36 /* -------------------------------------------------------------------------*/
  37 /* -- PSOC Resetcontroller Register defines -- */
  38
  39 /* I2C Address of controller */
  40 #define RSTCTRL_ADDR                            0x75
  41 /* Register for CTRL-word */
  42 #define RSTCTRL_CTRLREG                         0x01
  43 /* Register for giving some information to VxWorks OS */
  44 #define RSTCTRL_SCRATCHREG                      0x04
  45
  46 /* -- defines for RSTCTRL_CTRLREG  -- */
  47 #define RSTCTRL_FORCE_PWR_NEN                   0x0404
  48 #define RSTCTRL_CAN_STB                         0x4040
  49
  50 #if defined(CONFIG_SPL_BUILD)
  51 /* TODO: check ram-timing ! */
  52 static const struct ddr_data ddr3_data = {
  53         .datardsratio0 = MT41K256M16HA125E_RD_DQS,
  54         .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
  55         .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
  56         .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
  57 };
  58 static const struct cmd_control ddr3_cmd_ctrl_data = {
  59         .cmd0csratio = MT41K256M16HA125E_RATIO,
  60         .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  61
  62         .cmd1csratio = MT41K256M16HA125E_RATIO,
  63         .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  64
  65         .cmd2csratio = MT41K256M16HA125E_RATIO,
  66         .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
  67 };
  68 static struct emif_regs ddr3_emif_reg_data = {
  69         .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
  70         .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
  71         .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
  72         .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
  73         .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
  74         .zq_config = MT41K256M16HA125E_ZQ_CFG,
  75         .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
  76 };
  77
  78 static const struct ctrl_ioregs ddr3_ioregs = {
  79         .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  80         .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  81         .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  82         .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  83         .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
  84 };
  85
  86 #define OSC     (V_OSCK/1000000)
  87 const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
  88
  89 void am33xx_spl_board_init(void)
  90 {
  91         unsigned int oldspeed;
  92         unsigned short buf;
  93
  94         struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
  95         struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;
  96         /*
  97          * enable additional clocks of modules which are accessed later from
  98          * VxWorks OS
  99          */
 100         u32 *const clk_domains[] = { 0 };
 101
 102         u32 *const clk_modules_kwbspecific[] = {
 103                 &cmwkup->wkup_adctscctrl,
 104                 &cmper->spi1clkctrl,
 105                 &cmper->dcan0clkctrl,
 106                 &cmper->dcan1clkctrl,
 107                 &cmper->epwmss0clkctrl,
 108                 &cmper->epwmss1clkctrl,
 109                 &cmper->epwmss2clkctrl,
 110                 &cmper->lcdclkctrl,
 111                 &cmper->lcdcclkstctrl,
 112                 0
 113         };
 114         do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1);
 115         /* setup LCD-Pixel Clock */
 116         writel(0x2, CM_DPLL + 0x34);
 117         /* power-OFF LCD-Display */
 118         gpio_direction_output(LCD_PWR, 0);
 119
 120         /* setup I2C */
 121         enable_i2c0_pin_mux();
 122         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
 123
 124         /* power-ON  3V3 via Resetcontroller */
 125         oldspeed = i2c_get_bus_speed();
 126         if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
 127                 buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
 128                 i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
 129                           (uint8_t *)&buf, sizeof(buf));
 130                 i2c_set_bus_speed(oldspeed);
 131         } else {
 132                 puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
 133         }
 134
 135         pmicsetup(0);
 136 }
 137
 138 const struct dpll_params *get_dpll_ddr_params(void)
 139 {
 140         return &dpll_ddr3;
 141 }
 142
 143 void sdram_init(void)
 144 {
 145         config_ddr(400, &ddr3_ioregs,
 146                    &ddr3_data,
 147                    &ddr3_cmd_ctrl_data,
 148                    &ddr3_emif_reg_data, 0);
 149 }
 150 #endif /* CONFIG_SPL_BUILD */
 151 /*
 152  * Basic board specific setup.  Pinmux has been handled already.
 153  */
 154 int board_init(void)
 155 {
 156         gpmc_init();
 157         return 0;
 158 }
 159
 160 #ifdef CONFIG_BOARD_LATE_INIT
 161 int board_late_init(void)
 162 {
 163         const unsigned int toff = 1000;
 164         unsigned int cnt  = 3;
 165         unsigned short buf = 0xAAAA;
 166         unsigned int oldspeed;
 167
 168         tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
 169                            TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */
 170
 171         if (gpio_get_value(ESC_KEY)) {
 172                 do {
 173                         lcd_position_cursor(1, 8);
 174                         switch (cnt) {
 175                         case 3:
 176                                 lcd_puts(
 177                                 "release ESC-KEY to enter SERVICE-mode.");
 178                                 break;
 179                         case 2:
 180                                 lcd_puts(
 181                                 "release ESC-KEY to enter DIAGNOSE-mode.");
 182                                 break;
 183                         case 1:
 184                                 lcd_puts(
 185                                 "release ESC-KEY to enter BOOT-mode.    ");
 186                                 break;
 187                         }
 188                         mdelay(toff);
 189                         cnt--;
 190                         if (!gpio_get_value(ESC_KEY) &&
 191                             gpio_get_value(PUSH_KEY) && 2 == cnt) {
 192                                 lcd_position_cursor(1, 8);
 193                                 lcd_puts(
 194                                 "switching to network-console ...       ");
 195                                 setenv("bootcmd", "run netconsole");
 196                                 cnt = 4;
 197                                 break;
 198                         } else if (!gpio_get_value(ESC_KEY) &&
 199                             gpio_get_value(PUSH_KEY) && 1 == cnt) {
 200                                 lcd_position_cursor(1, 8);
 201                                 lcd_puts(
 202                                 "updating U-BOOT from USB ...           ");
 203                                 setenv("bootcmd", "run usbupdate");
 204                                 cnt = 4;
 205                                 break;
 206                         } else if ((!gpio_get_value(ESC_KEY) &&
 207                                     gpio_get_value(PUSH_KEY) && cnt == 0) ||
 208                                     (gpio_get_value(ESC_KEY) &&
 209                                     gpio_get_value(PUSH_KEY) && cnt == 0)) {
 210                                 lcd_position_cursor(1, 8);
 211                                 lcd_puts(
 212                                 "starting script from network ...      ");
 213                                 setenv("bootcmd", "run netscript");
 214                                 cnt = 4;
 215                                 break;
 216                         } else if (!gpio_get_value(ESC_KEY)) {
 217                                 break;
 218                         }
 219                 } while (cnt);
 220         }
 221
 222         lcd_position_cursor(1, 8);
 223         switch (cnt) {
 224         case 0:
 225                 lcd_puts("entering BOOT-mode.                    ");
 226                 setenv("bootcmd", "run defaultAR");
 227                 buf = 0x0000;
 228                 break;
 229         case 1:
 230                 lcd_puts("entering DIAGNOSE-mode.                ");
 231                 buf = 0x0F0F;
 232                 break;
 233         case 2:
 234                 lcd_puts("entering SERVICE mode.                 ");
 235                 buf = 0xB4B4;
 236                 break;
 237         case 3:
 238                 lcd_puts("loading OS...                          ");
 239                 buf = 0x0404;
 240                 break;
 241         }
 242         /* write bootinfo into scratchregister of resetcontroller */
 243         oldspeed = i2c_get_bus_speed();
 244         if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
 245                 i2c_write(RSTCTRL_ADDR, RSTCTRL_SCRATCHREG, 1,
 246                           (uint8_t *)&buf, sizeof(buf));
 247                 i2c_set_bus_speed(oldspeed);
 248         } else {
 249                 puts("ERROR: i2c_set_bus_speed failed! (scratchregister)\n");
 250         }
 251         /*
 252          * reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
 253          * expect that vectors are there, original u-boot moves them to _start
 254          */
 255         __asm__("ldr r0,=0x20000");
 256         __asm__("mcr p15, 0, r0, c12, c0, 0"); /* Set VBAR */
 257
 258         return 0;
 259 }
 260 #endif /* CONFIG_BOARD_LATE_INIT */