3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
16 extern u_long pci9054_iobase;
19 /***************************************************************************
21 * Routines for PLX PCI9054 eeprom access
25 static unsigned int PciEepromReadLongVPD (int offs)
31 pci_write_config_dword (CONFIG_SYS_PCI9054_DEV_FN, 0x4c,
32 (offs << 16) | 0x0003);
37 pci_read_config_dword (CONFIG_SYS_PCI9054_DEV_FN, 0x4c, &ret);
38 if ((ret & 0x80000000) != 0) {
43 printf ("\nTimeout: ret=%08x - Please try again!\n", ret);
49 pci_read_config_dword (CONFIG_SYS_PCI9054_DEV_FN, 0x50, &value);
55 static int PciEepromWriteLongVPD (int offs, unsigned int value)
60 pci_write_config_dword (CONFIG_SYS_PCI9054_DEV_FN, 0x50, value);
61 pci_write_config_dword (CONFIG_SYS_PCI9054_DEV_FN, 0x4c,
62 (offs << 16) | 0x80000003);
67 pci_read_config_dword (CONFIG_SYS_PCI9054_DEV_FN, 0x4c, &ret);
68 if ((ret & 0x80000000) == 0) {
73 printf ("\nTimeout: ret=%08x - Please try again!\n", ret);
83 static void showPci9054 (void)
88 /* read 9054-values */
89 for (l = 0; l < 6; l++) {
90 printf ("%02x: ", l * 0x10);
91 for (i = 0; i < 4; i++) {
92 pci_read_config_dword (CONFIG_SYS_PCI9054_DEV_FN,
94 (unsigned int *)&val);
95 printf ("%08x ", val);
101 for (l = 0; l < 7; l++) {
102 printf ("%02x: ", l * 0x10);
103 for (i = 0; i < 4; i++)
105 PciEepromReadLongVPD ((i + l * 4) * 4));
112 static void updatePci9054 (void)
115 * Set EEPROM write-protect register to 0
117 out_be32 ((void *)(pci9054_iobase + 0x0c),
118 in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff);
120 /* Long Serial EEPROM Load Registers... */
121 PciEepromWriteLongVPD (0x00, 0x905410b5);
122 PciEepromWriteLongVPD (0x04, 0x09800001); /* other input controller */
123 PciEepromWriteLongVPD (0x08, 0x28140100);
125 PciEepromWriteLongVPD (0x0c, 0x00000000); /* MBOX0... */
126 PciEepromWriteLongVPD (0x10, 0x00000000);
128 /* las0: fpga access (0x0000.0000 ... 0x0003.ffff) */
129 PciEepromWriteLongVPD (0x14, 0xfffc0000); /* LAS0RR... */
130 PciEepromWriteLongVPD (0x18, 0x00000001); /* LAS0BA */
132 PciEepromWriteLongVPD (0x1c, 0x00200000); /* MARBR... */
133 PciEepromWriteLongVPD (0x20, 0x00300500); /* LMISC/BIGEND */
135 PciEepromWriteLongVPD (0x24, 0x00000000); /* EROMRR... */
136 PciEepromWriteLongVPD (0x28, 0x00000000); /* EROMBA */
138 PciEepromWriteLongVPD (0x2c, 0x43030000); /* LBRD0... */
140 PciEepromWriteLongVPD (0x30, 0x00000000); /* DMRR... */
141 PciEepromWriteLongVPD (0x34, 0x00000000);
142 PciEepromWriteLongVPD (0x38, 0x00000000);
144 PciEepromWriteLongVPD (0x3c, 0x00000000); /* DMPBAM... */
145 PciEepromWriteLongVPD (0x40, 0x00000000);
147 /* Extra Long Serial EEPROM Load Registers... */
148 PciEepromWriteLongVPD (0x44, 0x010212fe); /* PCISID... */
150 /* las1: 505-sram access (0x0004.0000 ... 0x001f.ffff) */
151 /* Offset to LAS1: Group 1: 0x00040000 */
152 /* Group 2: 0x00080000 */
153 /* Group 3: 0x000c0000 */
154 PciEepromWriteLongVPD (0x48, 0xffe00000); /* LAS1RR */
155 PciEepromWriteLongVPD (0x4c, 0x00040001); /* LAS1BA */
156 PciEepromWriteLongVPD (0x50, 0x00000208); /* LBRD1 */ /* so wars bisher */
158 PciEepromWriteLongVPD (0x54, 0x00004c06); /* HotSwap... */
160 printf ("Finished writing defaults into PLX PCI9054 EEPROM!\n");
164 static void clearPci9054 (void)
167 * Set EEPROM write-protect register to 0
169 out_be32 ((void *)(pci9054_iobase + 0x0c),
170 in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff);
172 /* Long Serial EEPROM Load Registers... */
173 PciEepromWriteLongVPD (0x00, 0xffffffff);
174 PciEepromWriteLongVPD (0x04, 0xffffffff); /* other input controller */
176 printf ("Finished clearing PLX PCI9054 EEPROM!\n");
180 /* ------------------------------------------------------------------------- */
181 int do_pci9054 (cmd_tbl_t * cmdtp, int flag, int argc,
184 if (strcmp (argv[1], "info") == 0) {
189 if (strcmp (argv[1], "update") == 0) {
194 if (strcmp (argv[1], "clear") == 0) {
199 return cmd_usage(cmdtp);
203 pci9054, 3, 1, do_pci9054,
204 "PLX PCI9054 EEPROM access",
205 "pci9054 info - print EEPROM values\n"
206 "pci9054 update - updates EEPROM with default values"
209 /* ------------------------------------------------------------------------- */