2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/clock.h>
26 #include <asm/arch/imx-regs.h>
27 #include <asm/arch/mx6x_pins.h>
28 #include <asm/errno.h>
30 #include <asm/imx-common/iomux-v3.h>
31 #include <asm/imx-common/mxc_i2c.h>
33 #include <fsl_esdhc.h>
37 DECLARE_GLOBAL_DATA_PTR;
39 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
40 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
41 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
43 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
44 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
45 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
47 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
48 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
49 PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
51 #define SPI_PAD_CTRL (PAD_CTL_HYS | \
52 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
53 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
55 #define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
56 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
57 PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
59 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
60 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
61 PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
62 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
66 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
71 iomux_v3_cfg_t uart1_pads[] = {
72 MX6Q_PAD_SD3_DAT6__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
73 MX6Q_PAD_SD3_DAT7__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
76 iomux_v3_cfg_t uart2_pads[] = {
77 MX6Q_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
78 MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
81 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
84 struct i2c_pads_info i2c_pad_info0 = {
86 .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
87 .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC,
88 .gp = GPIO_NUMBER(3, 21)
91 .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
92 .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC,
93 .gp = GPIO_NUMBER(3, 28)
97 /* I2C2 Camera, MIPI */
98 struct i2c_pads_info i2c_pad_info1 = {
100 .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
101 .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC,
102 .gp = GPIO_NUMBER(4, 12)
105 .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
106 .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC,
107 .gp = GPIO_NUMBER(4, 13)
111 /* I2C3, J15 - RGB connector */
112 struct i2c_pads_info i2c_pad_info2 = {
114 .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC,
115 .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC,
116 .gp = GPIO_NUMBER(1, 5)
119 .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC,
120 .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC,
121 .gp = GPIO_NUMBER(7, 11)
125 iomux_v3_cfg_t usdhc3_pads[] = {
126 MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
127 MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
128 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
129 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
130 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
131 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
132 MX6Q_PAD_SD3_DAT5__GPIO_7_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
135 iomux_v3_cfg_t usdhc4_pads[] = {
136 MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
137 MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
138 MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
139 MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
140 MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
141 MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
142 MX6Q_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
145 iomux_v3_cfg_t enet_pads1[] = {
146 MX6Q_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
147 MX6Q_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
148 MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
149 MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
150 MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
151 MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
152 MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
153 MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
154 MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
155 /* pin 35 - 1 (PHY_AD2) on reset */
156 MX6Q_PAD_RGMII_RXC__GPIO_6_30 | MUX_PAD_CTRL(NO_PAD_CTRL),
157 /* pin 32 - 1 - (MODE0) all */
158 MX6Q_PAD_RGMII_RD0__GPIO_6_25 | MUX_PAD_CTRL(NO_PAD_CTRL),
159 /* pin 31 - 1 - (MODE1) all */
160 MX6Q_PAD_RGMII_RD1__GPIO_6_27 | MUX_PAD_CTRL(NO_PAD_CTRL),
161 /* pin 28 - 1 - (MODE2) all */
162 MX6Q_PAD_RGMII_RD2__GPIO_6_28 | MUX_PAD_CTRL(NO_PAD_CTRL),
163 /* pin 27 - 1 - (MODE3) all */
164 MX6Q_PAD_RGMII_RD3__GPIO_6_29 | MUX_PAD_CTRL(NO_PAD_CTRL),
165 /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
166 MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 | MUX_PAD_CTRL(NO_PAD_CTRL),
167 /* pin 42 PHY nRST */
168 MX6Q_PAD_EIM_D23__GPIO_3_23 | MUX_PAD_CTRL(NO_PAD_CTRL),
171 iomux_v3_cfg_t enet_pads2[] = {
172 MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
173 MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
174 MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
175 MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
176 MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
177 MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
180 /* Button assignments for J14 */
181 static iomux_v3_cfg_t button_pads[] = {
183 MX6Q_PAD_NANDF_D1__GPIO_2_1 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
185 MX6Q_PAD_NANDF_D2__GPIO_2_2 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
186 /* Labelled Search (mapped to Power under Android) */
187 MX6Q_PAD_NANDF_D3__GPIO_2_3 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
189 MX6Q_PAD_NANDF_D4__GPIO_2_4 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
191 MX6Q_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
193 MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
196 static void setup_iomux_enet(void)
198 gpio_direction_output(87, 0); /* GPIO 3-23 */
199 gpio_direction_output(190, 1); /* GPIO 6-30 */
200 gpio_direction_output(185, 1); /* GPIO 6-25 */
201 gpio_direction_output(187, 1); /* GPIO 6-27 */
202 gpio_direction_output(188, 1); /* GPIO 6-28*/
203 gpio_direction_output(189, 1); /* GPIO 6-29 */
204 imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1));
205 gpio_direction_output(184, 1); /* GPIO 6-24 */
207 /* Need delay 10ms according to KSZ9021 spec */
209 gpio_set_value(87, 1); /* GPIO 3-23 */
211 imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2));
214 iomux_v3_cfg_t usb_pads[] = {
215 MX6Q_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL),
218 static void setup_iomux_uart(void)
220 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
221 imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
224 #ifdef CONFIG_USB_EHCI_MX6
225 int board_ehci_hcd_init(int port)
227 imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads));
230 gpio_direction_output(GPIO_NUMBER(7, 12), 0);
232 gpio_set_value(GPIO_NUMBER(7, 12), 1);
238 #ifdef CONFIG_FSL_ESDHC
239 struct fsl_esdhc_cfg usdhc_cfg[2] = {
240 {USDHC3_BASE_ADDR, 1},
241 {USDHC4_BASE_ADDR, 1},
244 int board_mmc_getcd(struct mmc *mmc)
246 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
249 if (cfg->esdhc_base == USDHC3_BASE_ADDR) {
250 gpio_direction_input(192); /*GPIO7_0*/
251 ret = !gpio_get_value(192);
253 gpio_direction_input(38); /*GPIO2_6*/
254 ret = !gpio_get_value(38);
260 int board_mmc_init(bd_t *bis)
265 for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
268 imx_iomux_v3_setup_multiple_pads(
269 usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
272 imx_iomux_v3_setup_multiple_pads(
273 usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
276 printf("Warning: you configured more USDHC controllers"
277 "(%d) then supported by the board (%d)\n",
278 index + 1, CONFIG_SYS_FSL_USDHC_NUM);
282 status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
289 u32 get_board_rev(void)
294 #ifdef CONFIG_MXC_SPI
295 iomux_v3_cfg_t ecspi1_pads[] = {
297 MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(SPI_PAD_CTRL),
298 MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
299 MX6Q_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
300 MX6Q_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
305 gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1);
306 imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
307 ARRAY_SIZE(ecspi1_pads));
311 int board_phy_config(struct phy_device *phydev)
313 /* min rx data delay */
314 ksz9021_phy_extended_write(phydev,
315 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0);
316 /* min tx data delay */
317 ksz9021_phy_extended_write(phydev,
318 MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0);
319 /* max rx/tx clock delay, min rx/tx control */
320 ksz9021_phy_extended_write(phydev,
321 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0);
322 if (phydev->drv->config)
323 phydev->drv->config(phydev);
328 int board_eth_init(bd_t *bis)
334 ret = cpu_eth_init(bis);
336 printf("FEC MXC: %s:failed\n", __func__);
341 static void setup_buttons(void)
343 imx_iomux_v3_setup_multiple_pads(button_pads,
344 ARRAY_SIZE(button_pads));
347 #ifdef CONFIG_CMD_SATA
351 struct iomuxc_base_regs *const iomuxc_regs
352 = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
353 int ret = enable_sata_clock();
357 clrsetbits_le32(&iomuxc_regs->gpr[13],
358 IOMUXC_GPR13_SATA_MASK,
359 IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
360 |IOMUXC_GPR13_SATA_PHY_7_SATA2M
361 |IOMUXC_GPR13_SATA_SPEED_3G
362 |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
363 |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
364 |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
365 |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
366 |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
367 |IOMUXC_GPR13_SATA_PHY_1_SLOW);
373 int board_early_init_f(void)
383 /* address of boot parameters */
384 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
386 #ifdef CONFIG_MXC_SPI
389 setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
390 setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
391 setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
393 #ifdef CONFIG_CMD_SATA
402 puts("Board: MX6Q-Sabre Lite\n");
413 static struct button_key const buttons[] = {
414 {"back", GPIO_NUMBER(2, 2), 'B'},
415 {"home", GPIO_NUMBER(2, 4), 'H'},
416 {"menu", GPIO_NUMBER(2, 1), 'M'},
417 {"search", GPIO_NUMBER(2, 3), 'S'},
418 {"volup", GPIO_NUMBER(7, 13), 'V'},
419 {"voldown", GPIO_NUMBER(4, 5), 'v'},
423 * generate a null-terminated string containing the buttons pressed
424 * returns number of keys pressed
426 static int read_keys(char *buf)
428 int i, numpressed = 0;
429 for (i = 0; i < ARRAY_SIZE(buttons); i++) {
430 if (!gpio_get_value(buttons[i].gpnum))
431 buf[numpressed++] = buttons[i].ident;
433 buf[numpressed] = '\0';
437 static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
439 char envvalue[ARRAY_SIZE(buttons)+1];
440 int numpressed = read_keys(envvalue);
441 setenv("keybd", envvalue);
442 return numpressed == 0;
447 "Tests for keypresses, sets 'keybd' environment variable",
448 "Returns 0 (true) to shell if key is pressed."
451 #ifdef CONFIG_PREBOOT
452 static char const kbd_magic_prefix[] = "key_magic";
453 static char const kbd_command_prefix[] = "key_cmd";
455 static void preboot_keys(void)
458 char keypress[ARRAY_SIZE(buttons)+1];
459 numpressed = read_keys(keypress);
461 char *kbd_magic_keys = getenv("magic_keys");
464 * loop over all magic keys
466 for (suffix = kbd_magic_keys; *suffix; ++suffix) {
468 char magic[sizeof(kbd_magic_prefix) + 1];
469 sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
470 keys = getenv(magic);
472 if (!strcmp(keys, keypress))
477 char cmd_name[sizeof(kbd_command_prefix) + 1];
479 sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
480 cmd = getenv(cmd_name);
482 setenv("preboot", cmd);
490 int misc_init_r(void)
492 #ifdef CONFIG_PREBOOT