2 * Copyright (C) 2011-2013 Lothar Waßmann <LW@KARO-electronics.de>
3 * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
22 #include <fdt_support.h>
27 #include <linux/list.h>
31 #include <asm/arch/iomux-mx28.h>
32 #include <asm/arch/clock.h>
33 #include <asm/arch/imx-regs.h>
34 #include <asm/arch/sys_proto.h>
36 #include "../common/karo.h"
38 DECLARE_GLOBAL_DATA_PTR;
40 #define MXS_GPIO_NR(p, o) (((p) << 5) | (o))
42 #define TX28_LCD_PWR_GPIO MX28_PAD_LCD_ENABLE__GPIO_1_31
43 #define TX28_LCD_RST_GPIO MX28_PAD_LCD_RESET__GPIO_3_30
44 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
46 #define TX28_USBH_VBUSEN_GPIO MX28_PAD_SPDIF__GPIO_3_27
47 #define TX28_USBH_OC_GPIO MX28_PAD_JTAG_RTCK__GPIO_4_20
48 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
49 #define TX28_USBOTG_OC_GPIO MX28_PAD_GPMI_CE3N__GPIO_0_19
50 #define TX28_USBOTG_ID_GPIO MX28_PAD_PWM2__GPIO_3_18
52 #define TX28_LED_GPIO MX28_PAD_ENET0_RXD3__GPIO_4_10
54 #define STK5_CAN_XCVR_GPIO MX28_PAD_LCD_D00__GPIO_1_0
56 static const struct gpio tx28_gpios[] = {
57 { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
58 { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
59 { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
60 { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
61 { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
64 static const iomux_cfg_t tx28_pads[] = {
66 #if CONFIG_CONS_INDEX == 0
67 MX28_PAD_AUART0_RX__DUART_CTS,
68 MX28_PAD_AUART0_TX__DUART_RTS,
69 MX28_PAD_AUART0_CTS__DUART_RX,
70 MX28_PAD_AUART0_RTS__DUART_TX,
71 #elif CONFIG_CONS_INDEX == 1
72 MX28_PAD_AUART1_RX__AUART1_RX,
73 MX28_PAD_AUART1_TX__AUART1_TX,
74 MX28_PAD_AUART1_CTS__AUART1_CTS,
75 MX28_PAD_AUART1_RTS__AUART1_RTS,
76 #elif CONFIG_CONS_INDEX == 2
77 MX28_PAD_AUART3_RX__AUART3_RX,
78 MX28_PAD_AUART3_TX__AUART3_TX,
79 MX28_PAD_AUART3_CTS__AUART3_CTS,
80 MX28_PAD_AUART3_RTS__AUART3_RTS,
82 /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
83 MX28_PAD_I2C0_SCL__I2C0_SCL,
84 MX28_PAD_I2C0_SDA__I2C0_SDA,
87 MX28_PAD_SPDIF__GPIO_3_27,
88 MX28_PAD_JTAG_RTCK__GPIO_4_20,
90 /* USBOTG VBUSEN, OC, ID */
91 MX28_PAD_GPMI_CE2N__GPIO_0_18,
92 MX28_PAD_GPMI_CE3N__GPIO_0_19,
93 MX28_PAD_PWM2__GPIO_3_18,
100 /* provide at least _some_ sort of randomness */
101 #define MAX_LOOPS 100
103 static u32 random __attribute__((section("data")));
105 static inline void random_init(void)
107 struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
111 for (i = 0; i < MAX_LOOPS; i++) {
112 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
113 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
114 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
116 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
122 #define RTC_PERSISTENT0_CLK32_MASK (RTC_PERSISTENT0_CLOCKSOURCE | \
123 RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
124 static u32 boot_cause __attribute__((section("data")));
126 int board_early_init_f(void)
128 struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
134 /* IO0 clock at 480MHz */
135 mxs_set_ioclk(MXC_IOCLK0, 480000);
136 /* IO1 clock at 480MHz */
137 mxs_set_ioclk(MXC_IOCLK1, 480000);
139 /* SSP0 clock at 96MHz */
140 mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
141 /* SSP2 clock at 96MHz */
142 mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
144 gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
145 mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
147 while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
148 RTC_STAT_STALE_REGS_PERSISTENT0) {
153 boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
154 if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
155 RTC_PERSISTENT0_CLK32_MASK) {
156 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
158 writel(RTC_PERSISTENT0_CLK32_MASK,
159 &rtc_regs->hw_rtc_persistent0_set);
164 serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
171 printf("CTRL-C detected; safeboot enabled\n");
175 /* Address of boot parameters */
176 #ifdef CONFIG_OF_LIBFDT
177 gd->bd->bi_arch_number = -1;
179 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
185 return mxs_dram_init();
188 #ifdef CONFIG_CMD_MMC
189 static int tx28_mmc_wp(int dev_no)
194 int board_mmc_init(bd_t *bis)
196 return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
198 #endif /* CONFIG_CMD_MMC */
200 #ifdef CONFIG_FEC_MXC
201 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
203 #ifndef CONFIG_TX28_S
204 #define FEC_MAX_IDX 1
206 #define FEC_MAX_IDX 0
212 static int fec_get_mac_addr(int index)
215 struct mxs_ocotp_regs *ocotp_regs =
216 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
217 u32 *cust = &ocotp_regs->hw_ocotp_cust0;
219 char env_name[] = "eth.addr";
223 if (index < 0 || index > FEC_MAX_IDX)
226 /* set this bit to open the OTP banks for reading */
227 writel(OCOTP_CTRL_RD_BANK_OPEN,
228 &ocotp_regs->hw_ocotp_ctrl_set);
230 /* wait until OTP contents are readable */
231 while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
237 for (i = 0; i < sizeof(mac); i++) {
238 int shift = 24 - i % 4 * 8;
241 val = readl(&cust[index * 8 + i]);
242 mac[i] = val >> shift;
244 if (!is_valid_ethaddr(mac)) {
246 printf("No valid MAC address programmed\n");
251 printf("MAC addr from fuse: %pM\n", mac);
252 snprintf(env_name, sizeof(env_name), "ethaddr");
254 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
256 eth_setenv_enetaddr(env_name, mac);
260 static inline int tx28_fec1_enabled(void)
268 off = fdt_path_offset(gd->fdt_blob, "ethernet1");
272 status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
273 return status && (strcmp(status, "okay") == 0);
276 static void tx28_init_mac(void)
280 ret = fec_get_mac_addr(0);
282 printf("Failed to read FEC0 MAC address from OCOTP\n");
286 if (tx28_fec1_enabled()) {
287 ret = fec_get_mac_addr(1);
289 printf("Failed to read FEC1 MAC address from OCOTP\n");
296 static inline void tx28_init_mac(void)
299 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
301 static const iomux_cfg_t tx28_fec_pads[] = {
302 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
303 MX28_PAD_ENET0_RXD0__ENET0_RXD0,
304 MX28_PAD_ENET0_RXD1__ENET0_RXD1,
307 int board_eth_init(bd_t *bis)
311 /* Reset the external phy */
312 gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
314 /* Power on the external phy */
315 gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
317 /* Pull strap pins to high */
318 gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
319 gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
320 gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
321 gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
324 gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
327 mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
329 ret = cpu_eth_init(bis);
331 printf("cpu_eth_init() failed: %d\n", ret);
335 #ifndef CONFIG_TX28_S
336 if (getenv("ethaddr")) {
337 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
339 printf("FEC MXS: Unable to init FEC0\n");
344 if (getenv("eth1addr")) {
345 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
347 printf("FEC MXS: Unable to init FEC1\n");
352 if (getenv("ethaddr")) {
353 ret = fecmxc_initialize(bis);
355 printf("FEC MXS: Unable to init FEC\n");
363 static inline void tx28_init_mac(void)
366 #endif /* CONFIG_FEC_MXC */
374 void show_activity(int arg)
376 static int led_state = LED_STATE_INIT;
379 if (led_state == LED_STATE_INIT) {
381 gpio_set_value(TX28_LED_GPIO, 1);
382 led_state = LED_STATE_ON;
384 if (get_timer(last) > CONFIG_SYS_HZ) {
386 if (led_state == LED_STATE_ON) {
387 gpio_set_value(TX28_LED_GPIO, 0);
389 gpio_set_value(TX28_LED_GPIO, 1);
391 led_state = 1 - led_state;
396 static const iomux_cfg_t stk5_pads[] = {
397 /* SW controlled LED on STK5 baseboard */
398 MX28_PAD_ENET0_RXD3__GPIO_4_10,
401 static const struct gpio stk5_gpios[] = {
405 static ushort tx28_cmap[256];
406 vidinfo_t panel_info = {
407 /* set to max. size supported by SoC */
411 .vl_bpix = LCD_COLOR32, /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
415 static struct fb_videomode tx28_fb_modes[] = {
417 /* Standard VGA timing */
422 .pixclock = KHZ2PICOS(25175),
429 .vmode = FB_VMODE_NONINTERLACED,
432 /* Emerging ETV570 640 x 480 display. Syncs low active,
433 * DE high active, 115.2 mm x 86.4 mm display area
434 * VGA compatible timing
440 .pixclock = KHZ2PICOS(25175),
447 .vmode = FB_VMODE_NONINTERLACED,
450 /* Emerging ET0350G0DH6 320 x 240 display.
451 * 70.08 mm x 52.56 mm display area.
457 .pixclock = KHZ2PICOS(6500),
458 .left_margin = 68 - 34,
461 .upper_margin = 18 - 3,
464 .vmode = FB_VMODE_NONINTERLACED,
467 /* Emerging ET0430G0DH6 480 x 272 display.
468 * 95.04 mm x 53.856 mm display area.
474 .pixclock = KHZ2PICOS(9000),
481 .sync = FB_SYNC_CLK_LAT_FALL,
482 .vmode = FB_VMODE_NONINTERLACED,
485 /* Emerging ET0500G0DH6 800 x 480 display.
486 * 109.6 mm x 66.4 mm display area.
492 .pixclock = KHZ2PICOS(33260),
493 .left_margin = 216 - 128,
495 .right_margin = 1056 - 800 - 216,
496 .upper_margin = 35 - 2,
498 .lower_margin = 525 - 480 - 35,
499 .vmode = FB_VMODE_NONINTERLACED,
502 /* Emerging ETQ570G0DH6 320 x 240 display.
503 * 115.2 mm x 86.4 mm display area.
509 .pixclock = KHZ2PICOS(6400),
513 .upper_margin = 16, /* 15 according to datasheet */
514 .vsync_len = 3, /* TVP -> 1>x>5 */
515 .lower_margin = 4, /* 4.5 according to datasheet */
516 .vmode = FB_VMODE_NONINTERLACED,
519 /* Emerging ET0700G0DH6 800 x 480 display.
520 * 152.4 mm x 91.44 mm display area.
526 .pixclock = KHZ2PICOS(33260),
527 .left_margin = 216 - 128,
529 .right_margin = 1056 - 800 - 216,
530 .upper_margin = 35 - 2,
532 .lower_margin = 525 - 480 - 35,
533 .vmode = FB_VMODE_NONINTERLACED,
536 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
537 .vmode = FB_VMODE_NONINTERLACED,
541 static int lcd_enabled = 1;
542 static int lcd_bl_polarity;
544 static int lcd_backlight_polarity(void)
546 return lcd_bl_polarity;
549 void lcd_enable(void)
552 * global variable from common/lcd.c
553 * Set to 0 here to prevent messages from going to LCD
554 * rather than serial console
558 karo_load_splashimage(1);
560 debug("Switching LCD on\n");
561 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
563 gpio_set_value(TX28_LCD_RST_GPIO, 1);
565 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
566 lcd_backlight_polarity());
570 void lcd_disable(void)
574 void lcd_panel_disable(void)
577 debug("Switching LCD off\n");
578 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
579 !lcd_backlight_polarity());
580 gpio_set_value(TX28_LCD_RST_GPIO, 0);
581 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
585 static const iomux_cfg_t stk5_lcd_pads[] = {
587 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
588 /* LCD POWER_ENABLE */
589 MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
590 /* LCD Backlight (PWM) */
591 MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
594 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
595 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
596 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
597 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
598 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
599 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
600 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
601 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
602 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
603 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
604 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
605 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
606 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
607 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
608 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
609 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
610 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
611 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
612 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
613 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
614 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
615 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
616 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
617 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
618 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
619 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
620 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
621 MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
624 static const struct gpio stk5_lcd_gpios[] = {
625 { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
626 { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
627 { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
630 extern void video_hw_init(void *lcdbase);
632 void lcd_ctrl_init(void *lcdbase)
634 int color_depth = 24;
635 const char *video_mode = karo_get_vmode(getenv("video_mode"));
639 struct fb_videomode *p = tx28_fb_modes;
640 struct fb_videomode fb_mode;
641 int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
644 debug("LCD disabled\n");
649 debug("Disabling LCD\n");
651 setenv("splashimage", NULL);
656 lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
658 if (video_mode == NULL) {
659 debug("Disabling LCD\n");
664 if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
666 debug("Using video mode from FDT\n");
668 if (fb_mode.xres > panel_info.vl_col ||
669 fb_mode.yres > panel_info.vl_row) {
670 printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
671 fb_mode.xres, fb_mode.yres,
672 panel_info.vl_col, panel_info.vl_row);
678 debug("Trying compiled-in video modes\n");
679 while (p->name != NULL) {
680 if (strcmp(p->name, vm) == 0) {
681 debug("Using video mode: '%s'\n", p->name);
688 debug("Trying to decode video_mode: '%s'\n", vm);
689 while (*vm != '\0') {
690 if (*vm >= '0' && *vm <= '9') {
693 val = simple_strtoul(vm, &end, 0);
696 if (val > panel_info.vl_col)
697 val = panel_info.vl_col;
699 panel_info.vl_col = val;
701 } else if (!yres_set) {
702 if (val > panel_info.vl_row)
703 val = panel_info.vl_row;
705 panel_info.vl_row = val;
707 } else if (!bpp_set) {
717 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
718 end - vm, vm, color_depth);
721 } else if (!refresh_set) {
748 if (p->xres == 0 || p->yres == 0) {
749 printf("Invalid video mode: %s\n", getenv("video_mode"));
751 printf("Supported video modes are:");
752 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
753 printf(" %s", p->name);
758 if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
759 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
760 p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
764 panel_info.vl_col = p->xres;
765 panel_info.vl_row = p->yres;
767 switch (color_depth) {
769 panel_info.vl_bpix = LCD_COLOR8;
772 panel_info.vl_bpix = LCD_COLOR16;
775 panel_info.vl_bpix = LCD_COLOR32;
778 p->pixclock = KHZ2PICOS(refresh *
779 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
780 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
782 debug("Pixel clock set to %lu.%03lu MHz\n",
783 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
788 debug("Creating new display-timing node from '%s'\n",
790 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
792 printf("Failed to create new display-timing node from '%s': %d\n",
796 gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
797 mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
798 ARRAY_SIZE(stk5_lcd_pads));
800 debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
801 color_depth, refresh);
803 if (karo_load_splashimage(0) == 0) {
806 /* setup env variable for mxsfb display driver */
807 snprintf(vmode, sizeof(vmode),
808 "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
809 p->xres, p->yres, p->left_margin, p->right_margin,
810 p->upper_margin, p->lower_margin, p->hsync_len,
811 p->vsync_len, p->sync, p->pixclock, color_depth);
812 setenv("videomode", vmode);
814 debug("Initializing LCD controller\n");
815 video_hw_init(lcdbase);
816 setenv("videomode", NULL);
818 debug("Skipping initialization of LCD controller\n");
822 #define lcd_enabled 0
823 #endif /* CONFIG_LCD */
825 static void stk5_board_init(void)
827 gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
828 mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
831 static void stk5v3_board_init(void)
836 static void stk5v5_board_init(void)
840 /* init flexcan transceiver enable GPIO */
841 gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
842 "Flexcan Transceiver");
843 mxs_iomux_setup_pad(STK5_CAN_XCVR_GPIO);
846 int board_late_init(void)
849 const char *baseboard;
854 setenv_ulong("safeboot", 1);
858 baseboard = getenv("baseboard");
862 printf("Baseboard: %s\n", baseboard);
864 if (strncmp(baseboard, "stk5", 4) == 0) {
865 if ((strlen(baseboard) == 4) ||
866 strcmp(baseboard, "stk5-v3") == 0) {
868 } else if (strcmp(baseboard, "stk5-v5") == 0) {
869 const char *otg_mode = getenv("otg_mode");
871 if (otg_mode && strcmp(otg_mode, "host") == 0) {
872 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
873 otg_mode, baseboard);
874 setenv("otg_mode", "none");
878 printf("WARNING: Unsupported STK5 board rev.: %s\n",
882 printf("WARNING: Unsupported baseboard: '%s'\n",
893 #define BOOT_CAUSE_MASK (RTC_PERSISTENT0_EXTERNAL_RESET | \
894 RTC_PERSISTENT0_ALARM_WAKE | \
895 RTC_PERSISTENT0_THERMAL_RESET)
897 static void thermal_init(void)
899 struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
900 struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
902 writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
903 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
904 &power_regs->hw_power_thermal);
906 writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
907 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
908 &clkctrl_regs->hw_clkctrl_reset);
913 struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
914 u32 pwr_sts = readl(&power_regs->hw_power_sts);
915 u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
916 const char *dlm = "";
918 printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
919 CONFIG_SYS_SDRAM_SIZE / SZ_128M +
920 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
922 printf("POWERUP Source: ");
923 if (pwrup_src & (3 << 0)) {
924 printf("%sPSWITCH %s voltage", dlm,
925 pwrup_src & (1 << 1) ? "HIGH" : "MID");
928 if (pwrup_src & (1 << 4)) {
929 printf("%sRTC", dlm);
932 if (pwrup_src & (1 << 5)) {
938 if (boot_cause & BOOT_CAUSE_MASK) {
940 printf("Last boot cause: ");
941 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
942 printf("%sEXTERNAL", dlm);
945 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
946 printf("%sTHERMAL", dlm);
951 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
952 printf("%sALARM WAKE", dlm);
958 while (pwr_sts & POWER_STS_THERMAL_WARNING) {
959 static int first = 1;
962 printf("CPU too hot to boot\n");
967 pwr_sts = readl(&power_regs->hw_power_sts);
970 if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
976 #if defined(CONFIG_OF_BOARD_SETUP)
977 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
978 #include <jffs2/jffs2.h>
979 #include <mtd_node.h>
980 static struct node_info tx28_nand_nodes[] = {
981 { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
984 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
987 static const char *tx28_touchpanels[] = {
993 int ft_board_setup(void *blob, bd_t *bd)
995 const char *baseboard = getenv("baseboard");
996 int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
997 const char *video_mode = karo_get_vmode(getenv("video_mode"));
1000 ret = fdt_increase_size(blob, 4096);
1002 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
1005 #ifdef CONFIG_TX28_S
1006 /* TX28-41xx (aka TX28S) has no external RTC
1007 * and no I2C GPIO extender
1009 karo_fdt_remove_node(blob, "ds1339");
1010 karo_fdt_remove_node(blob, "gpio5");
1013 karo_fdt_enable_node(blob, "stk5led", 0);
1015 fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1017 karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1018 ARRAY_SIZE(tx28_touchpanels));
1019 karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1020 karo_fdt_fixup_flexcan(blob, stk5_v5);
1021 karo_fdt_update_fb_mode(blob, video_mode);
1025 #endif /* CONFIG_OF_BOARD_SETUP */