2 * Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
21 #include <asm/arch/imx-regs.h>
25 #define LTC3676_BUCK1 0x01
26 #define LTC3676_BUCK2 0x02
27 #define LTC3676_BUCK3 0x03
28 #define LTC3676_BUCK4 0x04
29 #define LTC3676_DVB1A 0x0A
30 #define LTC3676_DVB1B 0x0B
31 #define LTC3676_DVB2A 0x0C
32 #define LTC3676_DVB2B 0x0D
33 #define LTC3676_DVB3A 0x0E
34 #define LTC3676_DVB3B 0x0F
35 #define LTC3676_DVB4A 0x10
36 #define LTC3676_DVB4B 0x11
37 #define LTC3676_MSKPG 0x13
38 #define LTC3676_CLIRQ 0x1f
40 #define LTC3676_BUCK_DVDT_FAST (1 << 0)
41 #define LTC3676_BUCK_KEEP_ALIVE (1 << 1)
42 #define LTC3676_BUCK_CLK_RATE_LOW (1 << 2)
43 #define LTC3676_BUCK_PHASE_SEL (1 << 3)
44 #define LTC3676_BUCK_ENABLE_300 (1 << 4)
45 #define LTC3676_BUCK_PULSE_SKIP (0 << 5)
46 #define LTC3676_BUCK_BURST_MODE (1 << 5)
47 #define LTC3676_BUCK_CONTINUOUS (2 << 5)
48 #define LTC3676_BUCK_ENABLE (1 << 7)
50 #define LTC3676_PGOOD_MASK (1 << 5)
52 #define LTC3676_MSKPG_BUCK1 (1 << 0)
53 #define LTC3676_MSKPG_BUCK2 (1 << 1)
54 #define LTC3676_MSKPG_BUCK3 (1 << 2)
55 #define LTC3676_MSKPG_BUCK4 (1 << 3)
56 #define LTC3676_MSKPG_LDO2 (1 << 5)
57 #define LTC3676_MSKPG_LDO3 (1 << 6)
58 #define LTC3676_MSKPG_LDO4 (1 << 7)
60 #define VDD_IO_VAL mV_to_regval(vout_to_vref(3300, 5))
61 #define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100, 5))
62 #define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300, 5_2))
63 #define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100, 5_2))
64 #define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425, 6))
65 #define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900, 6))
66 #define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500, 7))
67 #define VDD_DDR_VAL_LP mV_to_regval(vout_to_vref(1500, 7))
68 #define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425, 8))
69 #define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900, 8))
92 /* calculate voltages in 10mV */
93 #define R1(idx) R1_##idx
94 #define R2(idx) R2_##idx
96 #define v2r(v,n,m) DIV_ROUND(((((v) < (n)) ? (n) : (v)) - (n)), (m))
97 #define r2v(r,n,m) (((r) * (m) + (n)) / 10)
99 #define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx)))
100 #define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx))
102 #define mV_to_regval(mV) v2r((mV) * 10, 4125, 125)
103 #define regval_to_mV(r) r2v(r, 4125, 125)
105 static struct ltc3676_regs {
110 { LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, },
111 { LTC3676_DVB2B, VDD_SOC_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
112 { LTC3676_DVB3B, VDD_DDR_VAL_LP, ~0x3f, },
113 { LTC3676_DVB4B, VDD_CORE_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
114 { LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, },
115 { LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, },
116 { LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, },
117 { LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, },
118 { LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, },
119 { LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, },
120 { LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, },
121 { LTC3676_CLIRQ, 0, }, /* clear interrupt status */
124 static struct ltc3676_regs ltc3676_regs_1[] = {
125 { LTC3676_DVB1B, VDD_IO_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
126 { LTC3676_DVB1A, VDD_IO_VAL, ~0x3f, },
129 static struct ltc3676_regs ltc3676_regs_2[] = {
130 { LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, },
131 { LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, },
134 static int tx6_rev_2(void)
136 struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
137 struct fuse_bank5_regs *fuse = (void *)ocotp->bank[5].fuse_regs;
138 u32 pad_settings = readl(&fuse->pad_settings);
140 debug("Fuse pad_settings @ %p = %02x\n",
141 &fuse->pad_settings, pad_settings);
142 return pad_settings & 1;
145 static int ltc3676_setup_regs(uchar slave_addr, struct ltc3676_regs *r,
151 for (i = 0; i < count; i++, r++) {
155 ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
156 if ((value & ~r->mask) != r->val) {
157 printf("Changing PMIC reg %02x from %02x to %02x\n",
158 r->addr, value, r->val);
161 printf("%s: failed to read PMIC register %02x: %d\n",
162 __func__, r->addr, ret);
166 ret = i2c_write(slave_addr, r->addr, 1, &r->val, 1);
168 printf("%s: failed to write PMIC register %02x: %d\n",
169 __func__, r->addr, ret);
176 int ltc3676_pmic_setup(uchar slave_addr)
181 ret = i2c_read(slave_addr, 0x11, 1, &value, 1);
183 printf("%s: i2c_read error: %d\n", __func__, ret);
187 ret = ltc3676_setup_regs(slave_addr, ltc3676_regs,
188 ARRAY_SIZE(ltc3676_regs));
192 ret = i2c_read(slave_addr, LTC3676_DVB4A, 1, &value, 1);
194 printf("VDDCORE set to %umV\n",
195 vref_to_vout(regval_to_mV(value), 8));
197 printf("Failed to read VDDCORE register setting\n");
200 ret = i2c_read(slave_addr, LTC3676_DVB2A, 1, &value, 1);
202 printf("VDDSOC set to %umV\n",
203 vref_to_vout(regval_to_mV(value), 6));
205 printf("Failed to read VDDSOC register setting\n");
209 ret = ltc3676_setup_regs(slave_addr, ltc3676_regs_2,
210 ARRAY_SIZE(ltc3676_regs_2));
212 ret = i2c_read(slave_addr, LTC3676_DVB1A, 1, &value, 1);
214 printf("VDDIO set to %umV\n",
215 vref_to_vout(regval_to_mV(value), 5_2));
217 printf("Failed to read VDDIO register setting\n");
220 ret = ltc3676_setup_regs(slave_addr, ltc3676_regs_1,
221 ARRAY_SIZE(ltc3676_regs_1));