2 * Copyright (C) 2008 Miromico AG
4 * Mostly copied form atmel ATNGW100 sources
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include "../cpu/at32ap/at32ap700x/sm.h"
30 #include <asm/sdram.h>
31 #include <asm/arch/clk.h>
32 #include <asm/arch/gpio.h>
33 #include <asm/arch/hmatrix.h>
34 #include <asm/arch/memory-map.h>
36 DECLARE_GLOBAL_DATA_PTR;
38 static const struct sdram_config sdram_config = {
39 .data_bits = SDRAM_DATA_32BIT,
51 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
54 extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
57 int board_eth_init(bd_t *bis)
59 return macb_eth_initialize(0, (void *)MACB0_BASE, bis->bi_phy_id[0]);
63 int board_early_init_f(void)
65 /* Enable SDRAM in the EBI mux */
66 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
71 #if defined(CONFIG_MACB)
74 #if defined(CONFIG_MMC)
80 phys_size_t initdram(int board_type)
82 unsigned long expected_size;
83 unsigned long actual_size;
86 sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
88 expected_size = sdram_init(sdram_base, &sdram_config);
89 actual_size = get_ram_size(sdram_base, expected_size);
91 unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
93 if (expected_size != actual_size)
94 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
95 actual_size >> 20, expected_size >> 20);
100 void board_init_info(void)
102 gd->bd->bi_phy_id[0] = 0x01;
107 /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
109 /* Select GCLK3 peripheral function */
110 gpio_select_periph_A(GPIO_PIN_PB29, 0);
112 /* Enable GCLK3 with no input divider, from OSC0 (crystal) */
113 sm_writel(PM_GCCTRL(3), SM_BIT(CEN));