3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <linux/types.h>
35 #include <linux/string.h> /* for strdup */
39 * Memory Controller Using
41 * CS0 - Flash memory (0x40000000)
42 * CS1 - SDRAM (0x00000000}
51 /* ------------------------------------------------------------------------- */
53 #define _not_used_ 0xffffffff
55 const uint sdram_table[]=
57 /* single read. (offset 0 in upm RAM) */
58 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
61 /* MRS initialization (offset 5) */
63 0x1ff77c34, 0xefeabc34, 0x1fb57c35,
65 /* burst read. (offset 8 in upm RAM) */
66 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
67 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
68 _not_used_, _not_used_, _not_used_, _not_used_,
69 _not_used_, _not_used_, _not_used_, _not_used_,
71 /* single write. (offset 18 in upm RAM) */
72 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
73 _not_used_, _not_used_, _not_used_, _not_used_,
75 /* burst write. (offset 20 in upm RAM) */
76 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
77 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
78 _not_used_, _not_used_, _not_used_, _not_used_,
79 _not_used_, _not_used_, _not_used_, _not_used_,
81 /* refresh. (offset 30 in upm RAM) */
82 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
83 0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
84 _not_used_, _not_used_, _not_used_, _not_used_,
86 /* exception. (offset 3c in upm RAM) */
87 0x7ffffc07, _not_used_, _not_used_, _not_used_ };
89 /* ------------------------------------------------------------------------- */
92 * Check Board Identity:
97 puts ("Board: R360 MPI Board\n");
101 /* ------------------------------------------------------------------------- */
103 static long int dram_size (long int, long int *, long int);
105 /* ------------------------------------------------------------------------- */
107 long int initdram (int board_type)
109 volatile immap_t *immap = (immap_t *) CFG_IMMR;
110 volatile memctl8xx_t *memctl = &immap->im_memctl;
111 long int size8, size9;
112 long int size_b0 = 0;
115 upmconfig (UPMA, (uint *) sdram_table,
116 sizeof (sdram_table) / sizeof (uint));
119 * Preliminary prescaler for refresh (depends on number of
120 * banks): This value is selected for four cycles every 62.4 us
121 * with two SDRAM banks or four cycles every 31.2 us with one
122 * bank. It will be adjusted after memory sizing.
124 memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
126 memctl->memc_mar = 0x00000088;
129 * Map controller bank 2 to the SDRAM bank at
130 * preliminary address - these have to be modified after the
131 * SDRAM size has been determined.
133 memctl->memc_or2 = CFG_OR2_PRELIM;
134 memctl->memc_br2 = CFG_BR2_PRELIM;
136 memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
140 /* perform SDRAM initializsation sequence */
142 memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
144 memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
147 memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
152 * Check Bank 0 Memory Size for re-configuration
156 size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
164 size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
167 if (size8 < size9) { /* leave configuration at 9 columns */
169 /* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
170 } else { /* back to 8 columns */
172 memctl->memc_mamr = CFG_MAMR_8COL;
174 /* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
180 * Adjust refresh rate depending on SDRAM type, both banks
181 * For types > 128 MBit leave it at the current (fast) rate
183 if ((size_b0 < 0x02000000)) {
184 /* reduce to 15.6 us (62.4 us / quad) */
185 memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
193 memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
194 memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
196 /* adjust refresh rate depending on SDRAM type, one bank */
197 reg = memctl->memc_mptpr;
198 reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
199 memctl->memc_mptpr = reg;
203 #ifdef CONFIG_CAN_DRIVER
204 /* Initialize OR3 / BR3 */
205 memctl->memc_or3 = CFG_OR3_CAN; /* switch GPLB_5 to GPLA_5 */
206 memctl->memc_br3 = CFG_BR3_CAN;
208 /* Initialize MBMR */
209 memctl->memc_mbmr = MAMR_GPL_B4DIS; /* GPL_B4 works as UPWAITB */
211 /* Initialize UPMB for CAN: single read */
212 memctl->memc_mdr = 0xFFFFC004;
213 memctl->memc_mcr = 0x0100 | UPMB;
215 memctl->memc_mdr = 0x0FFFD004;
216 memctl->memc_mcr = 0x0101 | UPMB;
218 memctl->memc_mdr = 0x0FFFC000;
219 memctl->memc_mcr = 0x0102 | UPMB;
221 memctl->memc_mdr = 0x3FFFC004;
222 memctl->memc_mcr = 0x0103 | UPMB;
224 memctl->memc_mdr = 0xFFFFDC05;
225 memctl->memc_mcr = 0x0104 | UPMB;
227 /* Initialize UPMB for CAN: single write */
228 memctl->memc_mdr = 0xFFFCC004;
229 memctl->memc_mcr = 0x0118 | UPMB;
231 memctl->memc_mdr = 0xCFFCD004;
232 memctl->memc_mcr = 0x0119 | UPMB;
234 memctl->memc_mdr = 0x0FFCC000;
235 memctl->memc_mcr = 0x011A | UPMB;
237 memctl->memc_mdr = 0x7FFCC004;
238 memctl->memc_mcr = 0x011B | UPMB;
240 memctl->memc_mdr = 0xFFFDCC05;
241 memctl->memc_mcr = 0x011C | UPMB;
247 /* ------------------------------------------------------------------------- */
250 * Check memory range for valid RAM. A simple memory test determines
251 * the actually available RAM size between addresses `base' and
252 * `base + maxsize'. Some (not all) hardware errors are detected:
253 * - short between address lines
254 * - short between data lines
257 static long int dram_size (long int mamr_value,
258 long int *base, long int maxsize)
260 volatile immap_t *immap = (immap_t *) CFG_IMMR;
261 volatile memctl8xx_t *memctl = &immap->im_memctl;
262 volatile long int *addr;
264 ulong save[32]; /* to make test non-destructive */
267 memctl->memc_mamr = mamr_value;
269 for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
270 addr = base + cnt; /* pointer arith! */
276 /* write 0 to base address */
281 /* check at base address */
282 if ((val = *addr) != 0) {
287 for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
288 addr = base + cnt; /* pointer arith! */
293 return (cnt * sizeof (long));
299 /* ------------------------------------------------------------------------- */
301 void r360_i2c_lcd_write (uchar data0, uchar data1)
303 if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
304 printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
308 /* ------------------------------------------------------------------------- */
310 /*-----------------------------------------------------------------------
311 * Keyboard Controller
314 /* Number of bytes returned from Keyboard Controller */
315 #define KEYBD_KEY_MAX 16 /* maximum key number */
316 #define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
318 static uchar *key_match (uchar *);
320 int misc_init_r (void)
322 uchar kbd_data[KEYBD_DATALEN];
323 uchar keybd_env[2 * KEYBD_DATALEN + 1];
327 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
329 i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
331 for (i = 0; i < KEYBD_DATALEN; ++i) {
332 sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
334 setenv ("keybd", keybd_env);
336 str = strdup (key_match (keybd_env)); /* decode keys */
338 #ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
339 setenv ("preboot", str); /* set or delete definition */
340 #endif /* CONFIG_PREBOOT */
348 /*-----------------------------------------------------------------------
349 * Check if pressed key(s) match magic sequence,
350 * and return the command string associated with that key(s).
352 * If no key press was decoded, NULL is returned.
354 * Note: the first character of the argument will be overwritten with
355 * the "magic charcter code" of the decoded key(s), or '\0'.
358 * Note: the string points to static environment data and must be
359 * saved before you call any function that modifies the environment.
361 #ifdef CONFIG_PREBOOT
363 static uchar kbd_magic_prefix[] = "key_magic";
364 static uchar kbd_command_prefix[] = "key_cmd";
366 static uchar *key_match (uchar * kbd_str)
368 uchar magic[sizeof (kbd_magic_prefix) + 1];
369 uchar cmd_name[sizeof (kbd_command_prefix) + 1];
371 uchar *kbd_magic_keys;
375 * The following string defines the characters that can pe appended
376 * to "key_magic" to form the names of environment variables that
377 * hold "magic" key codes, i. e. such key codes that can cause
378 * pre-boot actions. If the string is empty (""), then only
379 * "key_magic" is checked (old behaviour); the string "125" causes
380 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
382 if ((kbd_magic_keys = getenv ("magic_keys")) != NULL) {
383 /* loop over all magic keys;
384 * use '\0' suffix in case of empty string
386 for (suffix = kbd_magic_keys;
387 *suffix || suffix == kbd_magic_keys;
389 sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
392 printf ("### Check magic \"%s\"\n", magic);
395 if ((str = getenv (magic)) != 0) {
398 printf ("### Compare \"%s\" \"%s\"\n",
401 if (strcmp (kbd_str, str) == 0) {
402 sprintf (cmd_name, "%s%c",
406 if ((cmd = getenv (cmd_name)) != 0) {
408 printf ("### Set PREBOOT to $(%s): \"%s\"\n",
418 printf ("### Delete PREBOOT\n");
423 #endif /* CONFIG_PREBOOT */
425 /* Read Keyboard status */
426 int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
428 uchar kbd_data[KEYBD_DATALEN];
429 uchar keybd_env[2 * KEYBD_DATALEN + 1];
432 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
435 i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
438 for (i = 0; i < KEYBD_DATALEN; ++i) {
439 sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
440 printf (" %02x", kbd_data[i]);
443 setenv ("keybd", keybd_env);