2 * Copyright (C) 2011 Samsung Electronics
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/cpu.h>
10 #include <asm/arch/gpio.h>
11 #include <asm/arch/mmc.h>
12 #include <asm/arch/periph.h>
13 #include <asm/arch/pinmux.h>
15 DECLARE_GLOBAL_DATA_PTR;
16 struct exynos4_gpio_part1 *gpio1;
17 struct exynos4_gpio_part2 *gpio2;
21 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
22 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
24 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
28 static int board_uart_init(void)
32 err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
34 debug("UART0 not configured\n");
38 err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
40 debug("UART1 not configured\n");
44 err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
46 debug("UART2 not configured\n");
50 err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
52 debug("UART3 not configured\n");
59 #ifdef CONFIG_BOARD_EARLY_INIT_F
60 int board_early_init_f(void)
63 err = board_uart_init();
65 debug("UART init failed\n");
74 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
75 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
76 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
77 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
82 void dram_init_banksize(void)
84 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
85 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
87 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
88 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
90 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
91 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
93 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
94 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
98 #ifdef CONFIG_DISPLAY_BOARDINFO
101 printf("\nBoard: ORIGEN\n");
106 #ifdef CONFIG_GENERIC_MMC
107 int board_mmc_init(bd_t *bis)
114 * GPK2[0] SD_2_CLK(2)
115 * GPK2[1] SD_2_CMD(2)
117 * GPK2[3:6] SD_2_DATA[0:3](2)
119 for (i = 0; i < 7; i++) {
120 /* GPK2[0:6] special function 2 */
121 s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2));
123 /* GPK2[0:6] drv 4x */
124 s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
126 /* GPK2[0:1] pull disable */
127 if (i == 0 || i == 1) {
128 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
132 /* GPK2[2:6] pull up */
133 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP);
136 err = s5p_mmc_init(2, 4);