2 * Copyright (C) 2003 ETC s.r.o.
4 * This code was inspired by Marius Groeger and Kyle Harris code
5 * available in other board ports for U-Boot
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Written by Peter Figuli <peposh@etc.sk>, 2003.
34 * This code should handle CFI FLASH memory device. This code is very
35 * minimalistic approach without many essential error handling code as well.
36 * Because U-Boot actually is missing smart handling of FLASH device,
37 * we just set flash_id to anything else to FLASH_UNKNOW, so common code
38 * can call us without any restrictions.
39 * TODO: Add CFI Query, to be able to determine FLASH device.
40 * TODO: Add error handling code
41 * NOTE: This code was tested with BUS_WIDTH 4 and ITERLEAVE 2 only, but
42 * hopefully may work with other configurations.
45 #if ( SCB9328_FLASH_BUS_WIDTH == 1 )
46 # define FLASH_BUS vu_char
47 # if ( SCB9328_FLASH_INTERLEAVE == 1 )
48 # define FLASH_CMD( x ) x
50 # error "With 8bit bus only one chip is allowed"
54 #elif ( SCB9328_FLASH_BUS_WIDTH == 2 )
55 # define FLASH_BUS vu_short
56 # if ( SCB9328_FLASH_INTERLEAVE == 1 )
57 # define FLASH_CMD( x ) x
58 # elif ( SCB9328_FLASH_INTERLEAVE == 2 )
59 # define FLASH_CMD( x ) (( x << 8 )| x )
61 # error "With 16bit bus only 1 or 2 chip(s) are allowed"
65 #elif ( SCB9328_FLASH_BUS_WIDTH == 4 )
66 # define FLASH_BUS vu_long
67 # if ( SCB9328_FLASH_INTERLEAVE == 1 )
68 # define FLASH_CMD( x ) x
69 # elif ( SCB9328_FLASH_INTERLEAVE == 2 )
70 # define FLASH_CMD( x ) (( x << 16 )| x )
71 # elif ( SCB9328_FLASH_INTERLEAVE == 4 )
72 # define FLASH_CMD( x ) (( x << 24 )|( x << 16 ) ( x << 8 )| x )
74 # error "With 32bit bus only 1,2 or 4 chip(s) are allowed"
78 # error "Flash bus width might be 1,2,4 for 8,16,32 bit configuration"
82 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
84 static FLASH_BUS flash_status_reg (void)
87 FLASH_BUS *addr = (FLASH_BUS *) 0;
89 *addr = FLASH_CMD (CFI_INTEL_CMD_READ_STATUS_REGISTER);
94 static int flash_ready (ulong timeout)
98 reset_timer_masked ();
99 while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) !=
100 FLASH_CMD (CFI_INTEL_SR_READY)) {
101 if (get_timer_masked () > timeout && timeout != 0) {
109 #if ( CFG_MAX_FLASH_BANKS != 1 )
110 # error "SCB9328 platform has only one flash bank!"
114 ulong flash_init (void)
117 unsigned long address = SCB9328_FLASH_BASE;
119 flash_info[0].size = SCB9328_FLASH_BANK_SIZE;
120 flash_info[0].sector_count = CFG_MAX_FLASH_SECT;
121 flash_info[0].flash_id = INTEL_MANUFACT;
122 memset (flash_info[0].protect, 0, CFG_MAX_FLASH_SECT);
124 for (i = 0; i < CFG_MAX_FLASH_SECT; i++) {
125 flash_info[0].start[i] = address;
126 #ifdef SCB9328_FLASH_UNLOCK
127 /* Some devices are hw locked after start. */
128 *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_LOCK_SETUP);
129 *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_UNLOCK_BLOCK);
131 *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
133 address += SCB9328_FLASH_SECT_SIZE;
136 flash_protect (FLAG_PROTECT_SET,
138 CFG_FLASH_BASE + monitor_flash_len - 1,
141 flash_protect (FLAG_PROTECT_SET,
143 CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
145 return SCB9328_FLASH_BANK_SIZE;
148 void flash_print_info (flash_info_t * info)
152 printf (" Intel vendor\n");
153 printf (" Size: %ld MB in %d Sectors\n",
154 info->size >> 20, info->sector_count);
156 printf (" Sector Start Addresses:");
157 for (i = 0; i < info->sector_count; i++) {
162 printf (" %08lX%s", info->start[i],
163 info->protect[i] ? " (RO)" : " ");
169 int flash_erase (flash_info_t * info, int s_first, int s_last)
171 int flag, non_protected = 0, sector;
176 for (sector = s_first; sector <= s_last; sector++) {
177 if (!info->protect[sector]) {
182 if (!non_protected) {
183 return ERR_PROTECTED;
187 * Disable interrupts which might cause a timeout
188 * here. Remember that our exception vectors are
189 * at address 0 in the flash, and we don't want a
190 * (ticker) exception to happen while the flash
191 * chip is in programming mode.
193 flag = disable_interrupts ();
196 /* Start erase on unprotected sectors */
197 for (sector = s_first; sector <= s_last && !ctrlc (); sector++) {
198 if (info->protect[sector]) {
199 printf ("Protected sector %2d skipping...\n", sector);
202 printf ("Erasing sector %2d ... ", sector);
205 address = (FLASH_BUS *) (info->start[sector]);
207 *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE);
208 *address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM);
209 if (flash_ready (CFG_FLASH_ERASE_TOUT)) {
210 *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
213 *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
215 printf ("timeout! Aborting...\n");
218 *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
221 printf ("User Interrupt!\n");
223 /* allow flash to settle - wait 10 ms */
224 udelay_masked (10000);
226 enable_interrupts ();
232 static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data)
234 FLASH_BUS *address = (FLASH_BUS *) dest;
238 /* Check if Flash is (sufficiently) erased */
239 if ((*address & data) != data) {
240 return ERR_NOT_ERASED;
244 * Disable interrupts which might cause a timeout
245 * here. Remember that our exception vectors are
246 * at address 0 in the flash, and we don't want a
247 * (ticker) exception to happen while the flash
248 * chip is in programming mode.
251 flag = disable_interrupts ();
253 *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
254 *address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1);
257 if (!flash_ready (CFG_FLASH_WRITE_TOUT)) {
258 *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
260 printf ("timeout! Aborting...\n");
263 *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
265 enable_interrupts ();
271 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
273 ulong read_addr, write_addr;
275 int i, result = ERR_OK;
278 read_addr = addr & ~(sizeof (FLASH_BUS) - 1);
279 write_addr = read_addr;
280 if (read_addr != addr) {
282 for (i = 0; i < sizeof (FLASH_BUS); i++) {
283 if (read_addr < addr || cnt == 0) {
284 data |= *((uchar *) read_addr) << i * 8;
286 data |= (*src++) << i * 8;
291 if ((result = write_data (info, write_addr, data)) != ERR_OK) {
294 write_addr += sizeof (FLASH_BUS);
296 for (; cnt >= sizeof (FLASH_BUS); cnt -= sizeof (FLASH_BUS)) {
297 if ((result = write_data (info, write_addr,
298 *((FLASH_BUS *) src))) != ERR_OK) {
301 write_addr += sizeof (FLASH_BUS);
302 src += sizeof (FLASH_BUS);
305 read_addr = write_addr;
307 for (i = 0; i < sizeof (FLASH_BUS); i++) {
309 data |= (*src++) << i * 8;
312 data |= *((uchar *) read_addr) << i * 8;
316 if ((result = write_data (info, write_addr, data)) != 0) {