2 * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net>
3 * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
9 * Some board init for the Allwinner A10-evb board.
11 * SPDX-License-Identifier: GPL-2.0+
16 #ifdef CONFIG_AXP152_POWER
19 #ifdef CONFIG_AXP209_POWER
22 #ifdef CONFIG_AXP221_POWER
25 #include <asm/arch/clock.h>
26 #include <asm/arch/cpu.h>
27 #include <asm/arch/display.h>
28 #include <asm/arch/dram.h>
29 #include <asm/arch/gpio.h>
30 #include <asm/arch/mmc.h>
31 #include <asm/arch/usbc.h>
33 #include <linux/usb/musb.h>
36 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
37 /* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */
38 int soft_i2c_gpio_sda;
39 int soft_i2c_gpio_scl;
42 DECLARE_GLOBAL_DATA_PTR;
44 /* add board specific code here */
49 gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
51 asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1));
52 debug("id_pfr1: 0x%08x\n", id_pfr1);
53 /* Generic Timer Extension available? */
54 if ((id_pfr1 >> 16) & 0xf) {
55 debug("Setting CNTFRQ\n");
56 /* CNTFRQ == 24 MHz */
57 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r"(24000000));
65 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE);
70 #ifdef CONFIG_GENERIC_MMC
71 static void mmc_pinmux_setup(int sdc)
74 __maybe_unused int pins;
79 for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) {
80 sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0);
81 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
82 sunxi_gpio_set_drv(pin, 2);
87 pins = sunxi_name_to_gpio_bank(CONFIG_MMC1_PINS);
89 #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
90 if (pins == SUNXI_GPIO_H) {
91 /* SDC1: PH22-PH-27 */
92 for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
93 sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1);
94 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
95 sunxi_gpio_set_drv(pin, 2);
99 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
100 sunxi_gpio_set_cfgpin(pin, SUN4I_GPG_SDC1);
101 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
102 sunxi_gpio_set_drv(pin, 2);
105 #elif defined(CONFIG_MACH_SUN5I)
107 for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) {
108 sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1);
109 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
110 sunxi_gpio_set_drv(pin, 2);
112 #elif defined(CONFIG_MACH_SUN6I)
114 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
115 sunxi_gpio_set_cfgpin(pin, SUN6I_GPG_SDC1);
116 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
117 sunxi_gpio_set_drv(pin, 2);
119 #elif defined(CONFIG_MACH_SUN8I)
120 if (pins == SUNXI_GPIO_D) {
122 for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) {
123 sunxi_gpio_set_cfgpin(pin, SUN8I_GPD_SDC1);
124 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
125 sunxi_gpio_set_drv(pin, 2);
129 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
130 sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1);
131 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
132 sunxi_gpio_set_drv(pin, 2);
139 pins = sunxi_name_to_gpio_bank(CONFIG_MMC2_PINS);
141 #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
143 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {
144 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
145 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
146 sunxi_gpio_set_drv(pin, 2);
148 #elif defined(CONFIG_MACH_SUN5I)
149 if (pins == SUNXI_GPIO_E) {
151 for (pin = SUNXI_GPE(4); pin <= SUNXI_GPD(9); pin++) {
152 sunxi_gpio_set_cfgpin(pin, SUN5I_GPE_SDC2);
153 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
154 sunxi_gpio_set_drv(pin, 2);
158 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
159 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
160 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
161 sunxi_gpio_set_drv(pin, 2);
164 #elif defined(CONFIG_MACH_SUN6I)
165 if (pins == SUNXI_GPIO_A) {
167 for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
168 sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC2);
169 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
170 sunxi_gpio_set_drv(pin, 2);
173 /* SDC2: PC6-PC15, PC24 */
174 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
175 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
176 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
177 sunxi_gpio_set_drv(pin, 2);
180 sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
181 sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
182 sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
184 #elif defined(CONFIG_MACH_SUN8I)
185 /* SDC2: PC5-PC6, PC8-PC16 */
186 for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) {
187 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
188 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
189 sunxi_gpio_set_drv(pin, 2);
192 for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) {
193 sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
194 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
195 sunxi_gpio_set_drv(pin, 2);
201 pins = sunxi_name_to_gpio_bank(CONFIG_MMC3_PINS);
203 #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
205 for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) {
206 sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3);
207 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
208 sunxi_gpio_set_drv(pin, 2);
210 #elif defined(CONFIG_MACH_SUN6I)
211 if (pins == SUNXI_GPIO_A) {
213 for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
214 sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC3);
215 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
216 sunxi_gpio_set_drv(pin, 2);
219 /* SDC3: PC6-PC15, PC24 */
220 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
221 sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3);
222 sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
223 sunxi_gpio_set_drv(pin, 2);
226 sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);
227 sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
228 sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
234 printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc);
239 int board_mmc_init(bd_t *bis)
241 __maybe_unused struct mmc *mmc0, *mmc1;
242 __maybe_unused char buf[512];
244 mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
245 mmc0 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT);
249 #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
250 mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA);
251 mmc1 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA);
256 #if CONFIG_MMC_SUNXI_SLOT == 0 && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
258 * Both mmc0 and mmc2 are bootable, figure out where we're booting
259 * from. Try mmc0 first, just like the brom does.
261 if (mmc_getcd(mmc0) && mmc_init(mmc0) == 0 &&
262 mmc0->block_dev.block_read(0, 16, 1, buf) == 1) {
264 if (strcmp(&buf[4], "eGON.BT0") == 0)
268 /* no bootable card in mmc0, so we must be booting from mmc2, swap */
269 mmc0->block_dev.dev = 1;
270 mmc1->block_dev.dev = 0;
277 void i2c_init_board(void)
279 sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB_TWI0);
280 sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB_TWI0);
281 clock_twi_onoff(0, 1);
282 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
283 soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA);
284 soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL);
288 #ifdef CONFIG_SPL_BUILD
289 void sunxi_board_init(void)
291 int power_failed = 0;
292 unsigned long ramsize;
294 #ifdef CONFIG_AXP152_POWER
295 power_failed = axp152_init();
296 power_failed |= axp152_set_dcdc2(1400);
297 power_failed |= axp152_set_dcdc3(1500);
298 power_failed |= axp152_set_dcdc4(1250);
299 power_failed |= axp152_set_ldo2(3000);
301 #ifdef CONFIG_AXP209_POWER
302 power_failed |= axp209_init();
303 power_failed |= axp209_set_dcdc2(1400);
304 power_failed |= axp209_set_dcdc3(1250);
305 power_failed |= axp209_set_ldo2(3000);
306 power_failed |= axp209_set_ldo3(2800);
307 power_failed |= axp209_set_ldo4(2800);
309 #ifdef CONFIG_AXP221_POWER
310 power_failed = axp221_init();
311 power_failed |= axp221_set_dcdc1(CONFIG_AXP221_DCDC1_VOLT);
312 power_failed |= axp221_set_dcdc2(1200); /* A31:VDD-GPU, A23:VDD-SYS */
313 power_failed |= axp221_set_dcdc3(1200); /* VDD-CPU */
314 #ifdef CONFIG_MACH_SUN6I
315 power_failed |= axp221_set_dcdc4(1200); /* A31:VDD-SYS */
317 power_failed |= axp221_set_dcdc4(0); /* A23:unused */
319 power_failed |= axp221_set_dcdc5(1500); /* VCC-DRAM */
320 power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT);
321 power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT);
322 power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT);
323 power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT);
324 power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT);
325 power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT);
329 ramsize = sunxi_dram_init();
330 printf(" %lu MiB\n", ramsize >> 20);
335 * Only clock up the CPU to full speed if we are reasonably
336 * assured it's being powered with suitable core voltage
339 clock_set_pll1(CONFIG_SYS_CLK_FREQ);
341 printf("Failed to set core voltage! Can't set CPU frequency\n");
345 #if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
346 static struct musb_hdrc_config musb_config = {
353 static struct musb_hdrc_platform_data musb_plat = {
354 #if defined(CONFIG_MUSB_HOST)
357 .mode = MUSB_PERIPHERAL,
359 .config = &musb_config,
361 .platform_ops = &sunxi_musb_ops,
365 #ifdef CONFIG_USB_GADGET
366 int g_dnl_board_usb_cable_connected(void)
368 return sunxi_usbc_vbus_detect(0);
372 #ifdef CONFIG_MISC_INIT_R
373 int misc_init_r(void)
375 char serial_string[17] = { 0 };
380 ret = sunxi_get_sid(sid);
381 if (ret == 0 && sid[0] != 0 && sid[3] != 0) {
382 if (!getenv("ethaddr")) {
383 /* Non OUI / registered MAC address */
385 mac_addr[1] = (sid[0] >> 0) & 0xff;
386 mac_addr[2] = (sid[3] >> 24) & 0xff;
387 mac_addr[3] = (sid[3] >> 16) & 0xff;
388 mac_addr[4] = (sid[3] >> 8) & 0xff;
389 mac_addr[5] = (sid[3] >> 0) & 0xff;
391 eth_setenv_enetaddr("ethaddr", mac_addr);
394 if (!getenv("serial#")) {
395 snprintf(serial_string, sizeof(serial_string),
396 "%08x%08x", sid[0], sid[3]);
398 setenv("serial#", serial_string);
402 #if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
403 musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
409 #ifdef CONFIG_OF_BOARD_SETUP
410 int ft_board_setup(void *blob, bd_t *bd)
412 #ifdef CONFIG_VIDEO_DT_SIMPLEFB
413 return sunxi_simplefb_setup(blob);
416 #endif /* CONFIG_OF_BOARD_SETUP */