2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
27 /* TODO: Can we move these into arch/ headers? */
37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
44 #include <status_led.h>
47 #include <asm/errno.h>
49 #include <asm/sections.h>
51 #include <asm/init_helpers.h>
52 #include <asm/relocate.h>
55 #include <asm/state.h>
58 #include <linux/compiler.h>
61 * Pointer to initial global data area
63 * Here we initialize it if needed.
65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
70 DECLARE_GLOBAL_DATA_PTR;
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
77 * void led_set_state(enum led_colour_t colour, int on);
79 /************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
84 __weak void coloured_LED_init(void) {}
85 __weak void red_led_on(void) {}
86 __weak void red_led_off(void) {}
87 __weak void green_led_on(void) {}
88 __weak void green_led_off(void) {}
89 __weak void yellow_led_on(void) {}
90 __weak void yellow_led_off(void) {}
91 __weak void blue_led_on(void) {}
92 __weak void blue_led_off(void) {}
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
110 static int init_func_watchdog_init(void)
112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
115 defined(CONFIG_IMX_WATCHDOG))
118 puts(" Watchdog enabled\n");
124 int init_func_watchdog_reset(void)
130 #endif /* CONFIG_WATCHDOG */
132 __weak void board_add_ram_info(int use_default)
134 /* please define platform specific board_add_ram_info() */
137 static int init_baud_rate(void)
139 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
143 static int display_text_info(void)
145 #ifndef CONFIG_SANDBOX
146 ulong bss_start, bss_end, text_base;
148 bss_start = (ulong)&__bss_start;
149 bss_end = (ulong)&__bss_end;
151 #ifdef CONFIG_SYS_TEXT_BASE
152 text_base = CONFIG_SYS_TEXT_BASE;
154 text_base = CONFIG_SYS_MONITOR_BASE;
157 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
158 text_base, bss_start, bss_end);
161 #ifdef CONFIG_MODEM_SUPPORT
162 debug("Modem Support enabled\n");
164 #ifdef CONFIG_USE_IRQ
165 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
166 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
172 static int announce_dram_init(void)
178 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
179 static int init_func_ram(void)
181 #ifdef CONFIG_BOARD_TYPES
182 int board_type = gd->board_type;
184 int board_type = 0; /* use dummy arg */
187 gd->ram_size = initdram(board_type);
189 if (gd->ram_size > 0)
192 puts("*** failed ***\n");
197 static int show_dram_config(void)
199 unsigned long long size;
201 #ifdef CONFIG_NR_DRAM_BANKS
204 debug("\nRAM Configuration:\n");
205 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
206 size += gd->bd->bi_dram[i].size;
207 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
209 print_size(gd->bd->bi_dram[i].size, "\n");
217 print_size(size, "");
218 board_add_ram_info(0);
224 __weak void dram_init_banksize(void)
226 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
227 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
228 gd->bd->bi_dram[0].size = get_effective_memsize();
232 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
233 static int init_func_i2c(void)
236 #ifdef CONFIG_SYS_I2C
239 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
246 #if defined(CONFIG_HARD_SPI)
247 static int init_func_spi(void)
257 static int zero_global_data(void)
259 memset((void *)gd, '\0', sizeof(gd_t));
264 static int setup_mon_len(void)
266 #if defined(__ARM__) || defined(__MICROBLAZE__)
267 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
268 #elif defined(CONFIG_SANDBOX)
269 gd->mon_len = (ulong)&_end - (ulong)_init;
270 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
271 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
273 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
274 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
279 __weak int arch_cpu_init(void)
284 __weak unsigned long get_timer_masked(void)
289 #ifdef CONFIG_OF_HOSTFILE
291 static int read_fdt_from_file(void)
293 struct sandbox_state *state = state_get_current();
294 const char *fname = state->fdt_fname;
300 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
301 if (!state->fdt_fname) {
302 err = fdt_create_empty_tree(blob, 256);
305 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
309 err = os_get_filesize(fname, &size);
311 printf("Failed to file FDT file '%s'\n", fname);
314 fd = os_open(fname, OS_O_RDONLY);
316 printf("Failed to open FDT file '%s'\n", fname);
319 if (os_read(fd, blob, size) != size) {
332 #ifdef CONFIG_SANDBOX
333 static int setup_ram_buf(void)
335 struct sandbox_state *state = state_get_current();
337 gd->arch.ram_buf = state->ram_buf;
338 gd->ram_size = state->ram_size;
344 static int setup_fdt(void)
346 #ifdef CONFIG_OF_CONTROL
347 # ifdef CONFIG_OF_EMBED
348 /* Get a pointer to the FDT */
349 gd->fdt_blob = __dtb_dt_begin;
350 # elif defined CONFIG_OF_SEPARATE
351 /* FDT is at end of image */
352 gd->fdt_blob = (ulong *)&_end;
353 # elif defined(CONFIG_OF_HOSTFILE)
354 if (read_fdt_from_file()) {
355 puts("Failed to read control FDT\n");
359 /* Allow the early environment to override the fdt address */
360 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
361 (uintptr_t)gd->fdt_blob);
366 /* Get the top of usable RAM */
367 __weak ulong board_get_usable_ram_top(ulong total_size)
369 #ifdef CONFIG_SYS_SDRAM_BASE
371 * Detect whether we have so much RAM it goes past the end of our
372 * 32-bit address space. If so, clip the usable RAM so it doesn't.
374 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
376 * Will wrap back to top of 32-bit space when reservations
384 static int setup_dest_addr(void)
386 debug("Monitor len: %08lX\n", gd->mon_len);
388 * Ram is setup, size stored in gd !!
390 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
391 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
393 * Subtract specified amount of memory to hide so that it won't
394 * get "touched" at all by U-Boot. By fixing up gd->ram_size
395 * the Linux kernel should now get passed the now "corrected"
396 * memory size and won't touch it either. This should work
397 * for arch/ppc and arch/powerpc. Only Linux board ports in
398 * arch/powerpc with bootwrapper support, that recalculate the
399 * memory size from the SDRAM controller setup will have to
402 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
404 #ifdef CONFIG_SYS_SDRAM_BASE
405 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
407 gd->ram_top += get_effective_memsize();
408 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
409 gd->relocaddr = gd->ram_top;
410 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
411 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
413 * We need to make sure the location we intend to put secondary core
414 * boot code is reserved and not used by any part of u-boot
416 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
417 gd->relocaddr = determine_mp_bootpg(NULL);
418 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
424 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
425 static int reserve_logbuffer(void)
427 /* reserve kernel log buffer */
428 gd->relocaddr -= LOGBUFF_RESERVE;
429 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
436 /* reserve protected RAM */
437 static int reserve_pram(void)
441 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
442 gd->relocaddr -= (reg << 10); /* size is in kB */
443 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
447 #endif /* CONFIG_PRAM */
449 /* Round memory pointer down to next 4 kB limit */
450 static int reserve_round_4k(void)
452 gd->relocaddr &= ~(4096 - 1);
456 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
458 static int reserve_mmu(void)
460 /* reserve TLB table */
461 gd->arch.tlb_size = PGTABLE_SIZE;
462 gd->relocaddr -= gd->arch.tlb_size;
464 /* round down to next 64 kB limit */
465 gd->relocaddr &= ~(0x10000 - 1);
467 gd->arch.tlb_addr = gd->relocaddr;
468 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
469 gd->arch.tlb_addr + gd->arch.tlb_size);
475 static int reserve_lcd(void)
477 #ifdef CONFIG_FB_ADDR
478 gd->fb_base = CONFIG_FB_ADDR;
480 /* reserve memory for LCD display (always full pages) */
481 gd->relocaddr = lcd_setmem(gd->relocaddr);
482 gd->fb_base = gd->relocaddr;
483 #endif /* CONFIG_FB_ADDR */
486 #endif /* CONFIG_LCD */
488 static int reserve_trace(void)
491 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
492 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
493 debug("Reserving %dk for trace data at: %08lx\n",
494 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
500 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
501 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
502 !defined(CONFIG_BLACKFIN)
503 static int reserve_video(void)
505 /* reserve memory for video display (always full pages) */
506 gd->relocaddr = video_setmem(gd->relocaddr);
507 gd->fb_base = gd->relocaddr;
513 static int reserve_uboot(void)
516 * reserve memory for U-Boot code, data & bss
517 * round down to next 4 kB limit
519 gd->relocaddr -= gd->mon_len;
520 gd->relocaddr &= ~(4096 - 1);
522 /* round down to next 64 kB limit so that IVPR stays aligned */
523 gd->relocaddr &= ~(65536 - 1);
526 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
529 gd->start_addr_sp = gd->relocaddr;
534 #ifndef CONFIG_SPL_BUILD
535 /* reserve memory for malloc() area */
536 static int reserve_malloc(void)
538 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
539 debug("Reserving %dk for malloc() at: %08lx\n",
540 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
544 /* (permanently) allocate a Board Info struct */
545 static int reserve_board(void)
548 gd->start_addr_sp -= sizeof(bd_t);
549 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
550 memset(gd->bd, '\0', sizeof(bd_t));
551 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
552 sizeof(bd_t), gd->start_addr_sp);
558 static int setup_machine(void)
560 #ifdef CONFIG_MACH_TYPE
561 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
566 static int reserve_global_data(void)
568 gd->start_addr_sp -= sizeof(gd_t);
569 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
570 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
571 sizeof(gd_t), gd->start_addr_sp);
575 static int reserve_fdt(void)
578 * If the device tree is sitting immediate above our image then we
579 * must relocate it. If it is embedded in the data section, then it
580 * will be relocated with other data.
583 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
585 gd->start_addr_sp -= gd->fdt_size;
586 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
587 debug("Reserving %lu Bytes for FDT at: %08lx\n",
588 gd->fdt_size, gd->start_addr_sp);
594 int arch_reserve_stacks(void)
599 static int reserve_stacks(void)
601 /* make stack pointer 16-byte aligned */
602 gd->start_addr_sp -= 16;
603 gd->start_addr_sp &= ~0xf;
606 * let the architecture specific code tailor gd->start_addr_sp and
609 return arch_reserve_stacks();
612 static int display_new_sp(void)
614 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
619 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
620 static int setup_board_part1(void)
625 * Save local variables to board info struct
628 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
629 bd->bi_memsize = gd->ram_size; /* size in bytes */
631 #ifdef CONFIG_SYS_SRAM_BASE
632 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
633 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
636 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
637 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
638 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
640 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
641 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
643 #if defined(CONFIG_MPC83xx)
644 bd->bi_immrbar = CONFIG_SYS_IMMR;
650 static int setup_board_part2(void)
654 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
655 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
656 #if defined(CONFIG_CPM2)
657 bd->bi_cpmfreq = gd->arch.cpm_clk;
658 bd->bi_brgfreq = gd->arch.brg_clk;
659 bd->bi_sccfreq = gd->arch.scc_clk;
660 bd->bi_vco = gd->arch.vco_out;
661 #endif /* CONFIG_CPM2 */
662 #if defined(CONFIG_MPC512X)
663 bd->bi_ipsfreq = gd->arch.ips_clk;
664 #endif /* CONFIG_MPC512X */
665 #if defined(CONFIG_MPC5xxx)
666 bd->bi_ipbfreq = gd->arch.ipb_clk;
667 bd->bi_pcifreq = gd->pci_clk;
668 #endif /* CONFIG_MPC5xxx */
669 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
670 bd->bi_pcifreq = gd->pci_clk;
672 #if defined(CONFIG_EXTRA_CLOCK)
673 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
674 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
675 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
682 #ifdef CONFIG_SYS_EXTBDINFO
683 static int setup_board_extra(void)
687 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
688 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
689 sizeof(bd->bi_r_version));
691 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
692 bd->bi_plb_busfreq = gd->bus_clk;
693 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
694 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
695 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
696 bd->bi_pci_busfreq = get_PCI_freq();
697 bd->bi_opbfreq = get_OPB_freq();
698 #elif defined(CONFIG_XILINX_405)
699 bd->bi_pci_busfreq = get_PCI_freq();
707 static int init_post(void)
709 post_bootmode_init();
710 post_run(NULL, POST_ROM | post_bootmode_get(0));
716 static int setup_dram_config(void)
718 /* Ram is board specific, so move it to board code ... */
719 dram_init_banksize();
724 static int reloc_fdt(void)
727 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
728 gd->fdt_blob = gd->new_fdt;
734 static int setup_reloc(void)
736 #ifdef CONFIG_SYS_TEXT_BASE
737 #if defined(CONFIG_M68K)
739 * On all ColdFire arch cpu, monitor code starts always
740 * just after the default vector table location, so at 0x400
742 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
743 #elif defined(CONFIG_ARM)
744 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
746 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
748 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
750 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
751 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
752 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
758 /* ARM calls relocate_code from its crt0.S */
759 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
761 static int jump_to_copy(void)
764 * x86 is special, but in a nice way. It uses a trampoline which
765 * enables the dcache if possible.
767 * For now, other archs use relocate_code(), which is implemented
768 * similarly for all archs. When we do generic relocation, hopefully
769 * we can make all archs enable the dcache prior to relocation.
773 * SDRAM and console are now initialised. The final stack can now
774 * be setup in SDRAM. Code execution will continue in Flash, but
775 * with the stack in SDRAM and Global Data in temporary memory
778 board_init_f_r_trampoline(gd->start_addr_sp);
780 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
787 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
788 static int mark_bootstage(void)
790 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
795 static int initf_malloc(void)
797 #ifdef CONFIG_SYS_MALLOC_F_LEN
798 assert(gd->malloc_base); /* Set up by crt0.S */
799 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
806 static int initf_dm(void)
808 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
811 ret = dm_init_and_scan(true);
819 /* Architecture-specific memory reservation */
820 __weak int reserve_arch(void)
825 static init_fnc_t init_sequence_f[] = {
826 #ifdef CONFIG_SANDBOX
835 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
836 /* TODO: can this go into arch_cpu_init()? */
839 arch_cpu_init, /* basic arch cpu dependent setup */
841 #ifdef CONFIG_OF_CONTROL
845 #if defined(CONFIG_BOARD_EARLY_INIT_F)
848 /* TODO: can any of this go into arch_cpu_init()? */
849 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
850 get_clocks, /* get CPU and bus clocks (etc.) */
851 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
852 && !defined(CONFIG_TQM885D)
853 adjust_sdram_tbs_8xx,
855 /* TODO: can we rename this to timer_init()? */
858 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
859 timer_init, /* initialize timer */
861 #ifdef CONFIG_SYS_ALLOC_DPRAM
862 #if !defined(CONFIG_CPM2)
866 #if defined(CONFIG_BOARD_POSTCLK_INIT)
869 #ifdef CONFIG_FSL_ESDHC
875 env_init, /* initialize environment */
876 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
877 /* get CPU and bus clocks according to the environment variable */
879 /* adjust sdram refresh rate according to the new clock */
883 init_baud_rate, /* initialze baudrate settings */
884 serial_init, /* serial communications setup */
885 console_init_f, /* stage 1 init of console */
886 #ifdef CONFIG_SANDBOX
887 sandbox_early_getopt_check,
889 #ifdef CONFIG_OF_CONTROL
892 display_options, /* say that we are here */
893 display_text_info, /* show debugging info if required */
894 #if defined(CONFIG_MPC8260)
897 #endif /* CONFIG_MPC8260 */
898 #if defined(CONFIG_MPC83xx)
901 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
904 print_cpuinfo, /* display cpu info (and speed) */
905 #if defined(CONFIG_MPC5xxx)
907 #endif /* CONFIG_MPC5xxx */
908 #if defined(CONFIG_DISPLAY_BOARDINFO)
911 INIT_FUNC_WATCHDOG_INIT
912 #if defined(CONFIG_MISC_INIT_F)
915 INIT_FUNC_WATCHDOG_RESET
916 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
919 #if defined(CONFIG_HARD_SPI)
923 /* TODO: unify all these dram functions? */
924 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
925 dram_init, /* configure available RAM banks */
927 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
933 INIT_FUNC_WATCHDOG_RESET
934 #if defined(CONFIG_SYS_DRAM_TEST)
936 #endif /* CONFIG_SYS_DRAM_TEST */
937 INIT_FUNC_WATCHDOG_RESET
942 INIT_FUNC_WATCHDOG_RESET
944 * Now that we have DRAM mapped and working, we can
945 * relocate the code and continue running from DRAM.
947 * Reserve memory at end of RAM for (top down in that order):
948 * - area that won't get touched by U-Boot and Linux (optional)
949 * - kernel log buffer
953 * - board info struct
956 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
957 /* Blackfin u-boot monitor should be on top of the ram */
960 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
967 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
975 /* TODO: Why the dependency on CONFIG_8xx? */
976 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
977 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
978 !defined(CONFIG_BLACKFIN)
981 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
984 #ifndef CONFIG_SPL_BUILD
995 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
997 INIT_FUNC_WATCHDOG_RESET
1001 #ifdef CONFIG_SYS_EXTBDINFO
1004 INIT_FUNC_WATCHDOG_RESET
1010 do_elf_reloc_fixups,
1012 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1018 void board_init_f(ulong boot_flags)
1020 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1022 * For some archtectures, global data is initialized and used before
1023 * calling this function. The data should be preserved. For others,
1024 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1025 * here to host global data until relocation.
1032 * Clear global data before it is accessed at debug print
1033 * in initcall_run_list. Otherwise the debug print probably
1034 * get the wrong vaule of gd->have_console.
1039 gd->flags = boot_flags;
1040 gd->have_console = 0;
1042 if (initcall_run_list(init_sequence_f))
1045 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1046 /* NOTREACHED - jump_to_copy() does not return */
1053 * For now this code is only used on x86.
1055 * init_sequence_f_r is the list of init functions which are run when
1056 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1057 * The following limitations must be considered when implementing an
1059 * - 'static' variables are read-only
1060 * - Global Data (gd->xxx) is read/write
1062 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1063 * supported). It _should_, if possible, copy global data to RAM and
1064 * initialise the CPU caches (to speed up the relocation process)
1066 * NOTE: At present only x86 uses this route, but it is intended that
1067 * all archs will move to this when generic relocation is implemented.
1069 static init_fnc_t init_sequence_f_r[] = {
1075 void board_init_f_r(void)
1077 if (initcall_run_list(init_sequence_f_r))
1081 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1082 * Transfer execution from Flash to RAM by calculating the address
1083 * of the in-RAM copy of board_init_r() and calling it
1085 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1087 /* NOTREACHED - board_init_r() does not return */
1091 ulong board_init_f_mem(ulong top)
1093 /* Leave space for the stack we are running with now */
1096 top -= sizeof(struct global_data);
1097 top = ALIGN(top, 16);
1098 gd = (struct global_data *)top;
1099 memset((void *)gd, '\0', sizeof(*gd));
1101 #ifdef CONFIG_SYS_MALLOC_F_LEN
1102 top -= CONFIG_SYS_MALLOC_F_LEN;
1103 gd->malloc_base = top;
1108 #endif /* CONFIG_X86 */