2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
28 /* TODO: Can we move these into arch/ headers? */
38 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
45 #include <status_led.h>
48 #include <asm/errno.h>
50 #include <asm/sections.h>
51 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
52 #include <asm/init_helpers.h>
53 #include <asm/relocate.h>
56 #include <asm/state.h>
59 #include <linux/compiler.h>
62 * Pointer to initial global data area
64 * Here we initialize it if needed.
66 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
67 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
68 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
69 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
71 DECLARE_GLOBAL_DATA_PTR;
75 * sjg: IMO this code should be
76 * refactored to a single function, something like:
78 * void led_set_state(enum led_colour_t colour, int on);
80 /************************************************************************
81 * Coloured LED functionality
82 ************************************************************************
83 * May be supplied by boards if desired
85 __weak void coloured_LED_init(void) {}
86 __weak void red_led_on(void) {}
87 __weak void red_led_off(void) {}
88 __weak void green_led_on(void) {}
89 __weak void green_led_off(void) {}
90 __weak void yellow_led_on(void) {}
91 __weak void yellow_led_off(void) {}
92 __weak void blue_led_on(void) {}
93 __weak void blue_led_off(void) {}
96 * Why is gd allocated a register? Prior to reloc it might be better to
97 * just pass it around to each function in this file?
99 * After reloc one could argue that it is hardly used and doesn't need
100 * to be in a register. Or if it is it should perhaps hold pointers to all
101 * global data for all modules, so that post-reloc we can avoid the massive
102 * literal pool we get on ARM. Or perhaps just encourage each module to use
107 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
110 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
111 static int init_func_watchdog_init(void)
113 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
114 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
115 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
116 defined(CONFIG_IMX_WATCHDOG))
119 puts(" Watchdog enabled\n");
125 int init_func_watchdog_reset(void)
131 #endif /* CONFIG_WATCHDOG */
133 __weak void board_add_ram_info(int use_default)
135 /* please define platform specific board_add_ram_info() */
138 static int init_baud_rate(void)
140 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
144 static int display_text_info(void)
146 #ifndef CONFIG_SANDBOX
147 ulong bss_start, bss_end, text_base;
149 bss_start = (ulong)&__bss_start;
150 bss_end = (ulong)&__bss_end;
152 #ifdef CONFIG_SYS_TEXT_BASE
153 text_base = CONFIG_SYS_TEXT_BASE;
155 text_base = CONFIG_SYS_MONITOR_BASE;
158 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
159 text_base, bss_start, bss_end);
162 #ifdef CONFIG_MODEM_SUPPORT
163 debug("Modem Support enabled\n");
165 #ifdef CONFIG_USE_IRQ
166 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
167 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
173 static int announce_dram_init(void)
179 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
180 static int init_func_ram(void)
182 #ifdef CONFIG_BOARD_TYPES
183 int board_type = gd->board_type;
185 int board_type = 0; /* use dummy arg */
188 gd->ram_size = initdram(board_type);
190 if (gd->ram_size > 0)
193 puts("*** failed ***\n");
198 static int show_dram_config(void)
200 unsigned long long size;
202 #ifdef CONFIG_NR_DRAM_BANKS
205 debug("\nRAM Configuration:\n");
206 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
207 size += gd->bd->bi_dram[i].size;
208 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
210 print_size(gd->bd->bi_dram[i].size, "\n");
218 print_size(size, "");
219 board_add_ram_info(0);
225 __weak void dram_init_banksize(void)
227 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
228 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
229 gd->bd->bi_dram[0].size = get_effective_memsize();
233 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
234 static int init_func_i2c(void)
237 #ifdef CONFIG_SYS_I2C
240 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
247 #if defined(CONFIG_HARD_SPI)
248 static int init_func_spi(void)
258 static int zero_global_data(void)
260 memset((void *)gd, '\0', sizeof(gd_t));
265 static int setup_mon_len(void)
267 #if defined(__ARM__) || defined(__MICROBLAZE__)
268 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
269 #elif defined(CONFIG_SANDBOX)
270 gd->mon_len = (ulong)&_end - (ulong)_init;
271 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
272 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
274 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
275 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
280 __weak int arch_cpu_init(void)
285 __weak unsigned long get_timer_masked(void)
290 #ifdef CONFIG_OF_HOSTFILE
292 static int read_fdt_from_file(void)
294 struct sandbox_state *state = state_get_current();
295 const char *fname = state->fdt_fname;
301 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
302 if (!state->fdt_fname) {
303 err = fdt_create_empty_tree(blob, 256);
306 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
310 err = os_get_filesize(fname, &size);
312 printf("Failed to file FDT file '%s'\n", fname);
315 fd = os_open(fname, OS_O_RDONLY);
317 printf("Failed to open FDT file '%s'\n", fname);
320 if (os_read(fd, blob, size) != size) {
333 #ifdef CONFIG_SANDBOX
334 static int setup_ram_buf(void)
336 struct sandbox_state *state = state_get_current();
338 gd->arch.ram_buf = state->ram_buf;
339 gd->ram_size = state->ram_size;
345 static int setup_fdt(void)
347 #ifdef CONFIG_OF_CONTROL
348 # ifdef CONFIG_OF_EMBED
349 /* Get a pointer to the FDT */
350 gd->fdt_blob = __dtb_dt_begin;
351 # elif defined CONFIG_OF_SEPARATE
352 /* FDT is at end of image */
353 gd->fdt_blob = (ulong *)&_end;
354 # elif defined(CONFIG_OF_HOSTFILE)
355 if (read_fdt_from_file()) {
356 puts("Failed to read control FDT\n");
360 /* Allow the early environment to override the fdt address */
361 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
362 (uintptr_t)gd->fdt_blob);
367 /* Get the top of usable RAM */
368 __weak ulong board_get_usable_ram_top(ulong total_size)
370 #ifdef CONFIG_SYS_SDRAM_BASE
372 * Detect whether we have so much RAM it goes past the end of our
373 * 32-bit address space. If so, clip the usable RAM so it doesn't.
375 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
377 * Will wrap back to top of 32-bit space when reservations
385 static int setup_dest_addr(void)
387 debug("Monitor len: %08lX\n", gd->mon_len);
389 * Ram is setup, size stored in gd !!
391 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
392 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
394 * Subtract specified amount of memory to hide so that it won't
395 * get "touched" at all by U-Boot. By fixing up gd->ram_size
396 * the Linux kernel should now get passed the now "corrected"
397 * memory size and won't touch it either. This should work
398 * for arch/ppc and arch/powerpc. Only Linux board ports in
399 * arch/powerpc with bootwrapper support, that recalculate the
400 * memory size from the SDRAM controller setup will have to
403 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
405 #ifdef CONFIG_SYS_SDRAM_BASE
406 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
408 gd->ram_top += get_effective_memsize();
409 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
410 gd->relocaddr = gd->ram_top;
411 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
412 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
414 * We need to make sure the location we intend to put secondary core
415 * boot code is reserved and not used by any part of u-boot
417 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
418 gd->relocaddr = determine_mp_bootpg(NULL);
419 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
425 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
426 static int reserve_logbuffer(void)
428 /* reserve kernel log buffer */
429 gd->relocaddr -= LOGBUFF_RESERVE;
430 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
437 /* reserve protected RAM */
438 static int reserve_pram(void)
442 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
443 gd->relocaddr -= (reg << 10); /* size is in kB */
444 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
448 #endif /* CONFIG_PRAM */
450 /* Round memory pointer down to next 4 kB limit */
451 static int reserve_round_4k(void)
453 gd->relocaddr &= ~(4096 - 1);
457 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
459 static int reserve_mmu(void)
461 /* reserve TLB table */
462 gd->arch.tlb_size = PGTABLE_SIZE;
463 gd->relocaddr -= gd->arch.tlb_size;
465 /* round down to next 64 kB limit */
466 gd->relocaddr &= ~(0x10000 - 1);
468 gd->arch.tlb_addr = gd->relocaddr;
469 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
470 gd->arch.tlb_addr + gd->arch.tlb_size);
476 static int reserve_lcd(void)
478 #ifdef CONFIG_FB_ADDR
479 gd->fb_base = CONFIG_FB_ADDR;
481 /* reserve memory for LCD display (always full pages) */
482 gd->relocaddr = lcd_setmem(gd->relocaddr);
483 gd->fb_base = gd->relocaddr;
484 #endif /* CONFIG_FB_ADDR */
487 #endif /* CONFIG_LCD */
489 static int reserve_trace(void)
492 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
493 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
494 debug("Reserving %dk for trace data at: %08lx\n",
495 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
501 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
502 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
503 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
504 static int reserve_video(void)
506 /* reserve memory for video display (always full pages) */
507 gd->relocaddr = video_setmem(gd->relocaddr);
508 gd->fb_base = gd->relocaddr;
514 static int reserve_uboot(void)
517 * reserve memory for U-Boot code, data & bss
518 * round down to next 4 kB limit
520 gd->relocaddr -= gd->mon_len;
521 gd->relocaddr &= ~(4096 - 1);
523 /* round down to next 64 kB limit so that IVPR stays aligned */
524 gd->relocaddr &= ~(65536 - 1);
527 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
530 gd->start_addr_sp = gd->relocaddr;
535 #ifndef CONFIG_SPL_BUILD
536 /* reserve memory for malloc() area */
537 static int reserve_malloc(void)
539 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
540 debug("Reserving %dk for malloc() at: %08lx\n",
541 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
545 /* (permanently) allocate a Board Info struct */
546 static int reserve_board(void)
549 gd->start_addr_sp -= sizeof(bd_t);
550 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
551 memset(gd->bd, '\0', sizeof(bd_t));
552 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
553 sizeof(bd_t), gd->start_addr_sp);
559 static int setup_machine(void)
561 #ifdef CONFIG_MACH_TYPE
562 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
567 static int reserve_global_data(void)
569 gd->start_addr_sp -= sizeof(gd_t);
570 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
571 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
572 sizeof(gd_t), gd->start_addr_sp);
576 static int reserve_fdt(void)
579 * If the device tree is sitting immediate above our image then we
580 * must relocate it. If it is embedded in the data section, then it
581 * will be relocated with other data.
584 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
586 gd->start_addr_sp -= gd->fdt_size;
587 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
588 debug("Reserving %lu Bytes for FDT at: %08lx\n",
589 gd->fdt_size, gd->start_addr_sp);
595 int arch_reserve_stacks(void)
600 static int reserve_stacks(void)
602 /* make stack pointer 16-byte aligned */
603 gd->start_addr_sp -= 16;
604 gd->start_addr_sp &= ~0xf;
607 * let the architecture specific code tailor gd->start_addr_sp and
610 return arch_reserve_stacks();
613 static int display_new_sp(void)
615 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
620 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
621 static int setup_board_part1(void)
626 * Save local variables to board info struct
629 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
630 bd->bi_memsize = gd->ram_size; /* size in bytes */
632 #ifdef CONFIG_SYS_SRAM_BASE
633 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
634 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
637 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
638 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
639 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
641 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
642 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
644 #if defined(CONFIG_MPC83xx)
645 bd->bi_immrbar = CONFIG_SYS_IMMR;
651 static int setup_board_part2(void)
655 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
656 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
657 #if defined(CONFIG_CPM2)
658 bd->bi_cpmfreq = gd->arch.cpm_clk;
659 bd->bi_brgfreq = gd->arch.brg_clk;
660 bd->bi_sccfreq = gd->arch.scc_clk;
661 bd->bi_vco = gd->arch.vco_out;
662 #endif /* CONFIG_CPM2 */
663 #if defined(CONFIG_MPC512X)
664 bd->bi_ipsfreq = gd->arch.ips_clk;
665 #endif /* CONFIG_MPC512X */
666 #if defined(CONFIG_MPC5xxx)
667 bd->bi_ipbfreq = gd->arch.ipb_clk;
668 bd->bi_pcifreq = gd->pci_clk;
669 #endif /* CONFIG_MPC5xxx */
670 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
671 bd->bi_pcifreq = gd->pci_clk;
673 #if defined(CONFIG_EXTRA_CLOCK)
674 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
675 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
676 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
683 #ifdef CONFIG_SYS_EXTBDINFO
684 static int setup_board_extra(void)
688 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
689 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
690 sizeof(bd->bi_r_version));
692 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
693 bd->bi_plb_busfreq = gd->bus_clk;
694 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
695 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
696 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
697 bd->bi_pci_busfreq = get_PCI_freq();
698 bd->bi_opbfreq = get_OPB_freq();
699 #elif defined(CONFIG_XILINX_405)
700 bd->bi_pci_busfreq = get_PCI_freq();
708 static int init_post(void)
710 post_bootmode_init();
711 post_run(NULL, POST_ROM | post_bootmode_get(0));
717 static int setup_dram_config(void)
719 /* Ram is board specific, so move it to board code ... */
720 dram_init_banksize();
725 static int reloc_fdt(void)
728 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
729 gd->fdt_blob = gd->new_fdt;
735 static int setup_reloc(void)
737 #ifdef CONFIG_SYS_TEXT_BASE
738 #if defined(CONFIG_M68K)
740 * On all ColdFire arch cpu, monitor code starts always
741 * just after the default vector table location, so at 0x400
743 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
744 #elif defined(CONFIG_ARM)
745 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
747 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
750 * On all ColdFire arch cpu, monitor code starts always
751 * just after the default vector table location, so at 0x400
753 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
757 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
759 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
760 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
761 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
767 /* ARM calls relocate_code from its crt0.S */
768 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
770 static int jump_to_copy(void)
773 * x86 is special, but in a nice way. It uses a trampoline which
774 * enables the dcache if possible.
776 * For now, other archs use relocate_code(), which is implemented
777 * similarly for all archs. When we do generic relocation, hopefully
778 * we can make all archs enable the dcache prior to relocation.
780 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
782 * SDRAM and console are now initialised. The final stack can now
783 * be setup in SDRAM. Code execution will continue in Flash, but
784 * with the stack in SDRAM and Global Data in temporary memory
787 board_init_f_r_trampoline(gd->start_addr_sp);
789 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
796 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
797 static int mark_bootstage(void)
799 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
804 static int initf_malloc(void)
806 #ifdef CONFIG_SYS_MALLOC_F_LEN
807 assert(gd->malloc_base); /* Set up by crt0.S */
808 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
815 static int initf_dm(void)
817 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
820 ret = dm_init_and_scan(true);
828 /* Architecture-specific memory reservation */
829 __weak int reserve_arch(void)
834 __weak int arch_cpu_init_dm(void)
839 static init_fnc_t init_sequence_f[] = {
840 #ifdef CONFIG_SANDBOX
849 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
850 /* TODO: can this go into arch_cpu_init()? */
853 arch_cpu_init, /* basic arch cpu dependent setup */
855 #ifdef CONFIG_OF_CONTROL
860 #if defined(CONFIG_BOARD_EARLY_INIT_F)
863 /* TODO: can any of this go into arch_cpu_init()? */
864 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
865 get_clocks, /* get CPU and bus clocks (etc.) */
866 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
867 && !defined(CONFIG_TQM885D)
868 adjust_sdram_tbs_8xx,
870 /* TODO: can we rename this to timer_init()? */
873 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
874 timer_init, /* initialize timer */
876 #ifdef CONFIG_SYS_ALLOC_DPRAM
877 #if !defined(CONFIG_CPM2)
881 #if defined(CONFIG_BOARD_POSTCLK_INIT)
884 #ifdef CONFIG_FSL_ESDHC
890 env_init, /* initialize environment */
891 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
892 /* get CPU and bus clocks according to the environment variable */
894 /* adjust sdram refresh rate according to the new clock */
898 init_baud_rate, /* initialze baudrate settings */
899 serial_init, /* serial communications setup */
900 console_init_f, /* stage 1 init of console */
901 #ifdef CONFIG_SANDBOX
902 sandbox_early_getopt_check,
904 #ifdef CONFIG_OF_CONTROL
907 display_options, /* say that we are here */
908 display_text_info, /* show debugging info if required */
909 #if defined(CONFIG_MPC8260)
912 #endif /* CONFIG_MPC8260 */
913 #if defined(CONFIG_MPC83xx)
916 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
919 print_cpuinfo, /* display cpu info (and speed) */
920 #if defined(CONFIG_MPC5xxx)
922 #endif /* CONFIG_MPC5xxx */
923 #if defined(CONFIG_DISPLAY_BOARDINFO)
926 INIT_FUNC_WATCHDOG_INIT
927 #if defined(CONFIG_MISC_INIT_F)
930 INIT_FUNC_WATCHDOG_RESET
931 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
934 #if defined(CONFIG_HARD_SPI)
938 /* TODO: unify all these dram functions? */
939 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
940 dram_init, /* configure available RAM banks */
942 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
948 INIT_FUNC_WATCHDOG_RESET
949 #if defined(CONFIG_SYS_DRAM_TEST)
951 #endif /* CONFIG_SYS_DRAM_TEST */
952 INIT_FUNC_WATCHDOG_RESET
957 INIT_FUNC_WATCHDOG_RESET
959 * Now that we have DRAM mapped and working, we can
960 * relocate the code and continue running from DRAM.
962 * Reserve memory at end of RAM for (top down in that order):
963 * - area that won't get touched by U-Boot and Linux (optional)
964 * - kernel log buffer
968 * - board info struct
971 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
972 /* Blackfin u-boot monitor should be on top of the ram */
975 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
982 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
990 /* TODO: Why the dependency on CONFIG_8xx? */
991 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
992 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
993 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
996 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
999 #ifndef CONFIG_SPL_BUILD
1004 reserve_global_data,
1010 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1012 INIT_FUNC_WATCHDOG_RESET
1016 #ifdef CONFIG_SYS_EXTBDINFO
1019 INIT_FUNC_WATCHDOG_RESET
1022 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1025 do_elf_reloc_fixups,
1027 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1033 void board_init_f(ulong boot_flags)
1035 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1037 * For some archtectures, global data is initialized and used before
1038 * calling this function. The data should be preserved. For others,
1039 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1040 * here to host global data until relocation.
1047 * Clear global data before it is accessed at debug print
1048 * in initcall_run_list. Otherwise the debug print probably
1049 * get the wrong vaule of gd->have_console.
1054 gd->flags = boot_flags;
1055 gd->have_console = 0;
1057 if (initcall_run_list(init_sequence_f))
1060 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1061 /* NOTREACHED - jump_to_copy() does not return */
1066 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1068 * For now this code is only used on x86.
1070 * init_sequence_f_r is the list of init functions which are run when
1071 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1072 * The following limitations must be considered when implementing an
1074 * - 'static' variables are read-only
1075 * - Global Data (gd->xxx) is read/write
1077 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1078 * supported). It _should_, if possible, copy global data to RAM and
1079 * initialise the CPU caches (to speed up the relocation process)
1081 * NOTE: At present only x86 uses this route, but it is intended that
1082 * all archs will move to this when generic relocation is implemented.
1084 static init_fnc_t init_sequence_f_r[] = {
1090 void board_init_f_r(void)
1092 if (initcall_run_list(init_sequence_f_r))
1096 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1097 * Transfer execution from Flash to RAM by calculating the address
1098 * of the in-RAM copy of board_init_r() and calling it
1100 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1102 /* NOTREACHED - board_init_r() does not return */
1105 #endif /* CONFIG_X86 */
1108 ulong board_init_f_mem(ulong top)
1110 /* Leave space for the stack we are running with now */
1113 top -= sizeof(struct global_data);
1114 top = ALIGN(top, 16);
1115 gd = (struct global_data *)top;
1116 memset((void *)gd, '\0', sizeof(*gd));
1118 #ifdef CONFIG_SYS_MALLOC_F_LEN
1119 top -= CONFIG_SYS_MALLOC_F_LEN;
1120 gd->malloc_base = top;
1125 #endif /* !CONFIG_X86 */