2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <asm/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
59 #include <asm/relocate.h>
62 #include <asm/state.h>
65 #include <linux/compiler.h>
68 * Pointer to initial global data area
70 * Here we initialize it if needed.
72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
73 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
74 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
77 DECLARE_GLOBAL_DATA_PTR;
81 * TODO(sjg@chromium.org): IMO this code should be
82 * refactored to a single function, something like:
84 * void led_set_state(enum led_colour_t colour, int on);
86 /************************************************************************
87 * Coloured LED functionality
88 ************************************************************************
89 * May be supplied by boards if desired
91 __weak void coloured_LED_init(void) {}
92 __weak void red_led_on(void) {}
93 __weak void red_led_off(void) {}
94 __weak void green_led_on(void) {}
95 __weak void green_led_off(void) {}
96 __weak void yellow_led_on(void) {}
97 __weak void yellow_led_off(void) {}
98 __weak void blue_led_on(void) {}
99 __weak void blue_led_off(void) {}
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
117 static int init_func_watchdog_init(void)
119 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
120 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
123 defined(CONFIG_IMX_WATCHDOG))
125 puts(" Watchdog enabled\n");
132 int init_func_watchdog_reset(void)
138 #endif /* CONFIG_WATCHDOG */
140 __weak void board_add_ram_info(int use_default)
142 /* please define platform specific board_add_ram_info() */
145 static int init_baud_rate(void)
147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
151 static int display_text_info(void)
153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
154 ulong bss_start, bss_end, text_base;
156 bss_start = (ulong)&__bss_start;
157 bss_end = (ulong)&__bss_end;
159 #ifdef CONFIG_SYS_TEXT_BASE
160 text_base = CONFIG_SYS_TEXT_BASE;
162 text_base = CONFIG_SYS_MONITOR_BASE;
165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
166 text_base, bss_start, bss_end);
169 #ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
177 static int announce_dram_init(void)
183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
184 static int init_func_ram(void)
186 #ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
189 int board_type = 0; /* use dummy arg */
192 gd->ram_size = initdram(board_type);
194 if (gd->ram_size > 0)
197 puts("*** failed ***\n");
202 static int show_dram_config(void)
204 unsigned long long size;
206 #ifdef CONFIG_NR_DRAM_BANKS
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
212 debug("Bank #%d: %llx ", i,
213 (unsigned long long)(gd->bd->bi_dram[i].start));
215 print_size(gd->bd->bi_dram[i].size, "\n");
223 print_size(size, "");
224 board_add_ram_info(0);
230 __weak void dram_init_banksize(void)
232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
234 gd->bd->bi_dram[0].size = get_effective_memsize();
238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
239 static int init_func_i2c(void)
242 #ifdef CONFIG_SYS_I2C
245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
252 #if defined(CONFIG_HARD_SPI)
253 static int init_func_spi(void)
263 static int zero_global_data(void)
265 memset((void *)gd, '\0', sizeof(gd_t));
270 static int setup_mon_len(void)
272 #if defined(__ARM__) || defined(__MICROBLAZE__)
273 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
275 gd->mon_len = (ulong)&_end - (ulong)_init;
276 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) || \
277 defined(CONFIG_XTENSA)
278 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
279 #elif defined(CONFIG_NDS32)
280 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
281 #elif defined(CONFIG_SYS_MONITOR_BASE)
282 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
283 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
288 __weak int arch_cpu_init(void)
293 #ifdef CONFIG_SANDBOX
294 static int setup_ram_buf(void)
296 struct sandbox_state *state = state_get_current();
298 gd->arch.ram_buf = state->ram_buf;
299 gd->ram_size = state->ram_size;
305 /* Get the top of usable RAM */
306 __weak ulong board_get_usable_ram_top(ulong total_size)
308 #ifdef CONFIG_SYS_SDRAM_BASE
310 * Detect whether we have so much RAM that it goes past the end of our
311 * 32-bit address space. If so, clip the usable RAM so it doesn't.
313 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
315 * Will wrap back to top of 32-bit space when reservations
323 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
325 #ifdef CONFIG_SYS_MEM_TOP_HIDE
326 return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
332 static int setup_dest_addr(void)
334 debug("Monitor len: %08lX\n", gd->mon_len);
336 * Ram is setup, size stored in gd !!
338 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
339 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
340 /* Reserve memory for secure MMU tables, and/or security monitor */
341 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
343 * Record secure memory location. Need recalcuate if memory splits
344 * into banks, or the ram base is not zero.
346 gd->arch.secure_ram = gd->ram_size;
349 * Subtract specified amount of memory to hide so that it won't
350 * get "touched" at all by U-Boot. By fixing up gd->ram_size
351 * the Linux kernel should now get passed the now "corrected"
352 * memory size and won't touch it either. This has been used
353 * by arch/powerpc exclusively. Now ARMv8 takes advantage of
354 * thie mechanism. If memory is split into banks, addresses
355 * need to be calculated.
357 gd->ram_size = board_reserve_ram_top(gd->ram_size);
359 #ifdef CONFIG_SYS_SDRAM_BASE
360 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
362 gd->ram_top += get_effective_memsize();
363 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
364 gd->relocaddr = gd->ram_top;
365 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
366 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
368 * We need to make sure the location we intend to put secondary core
369 * boot code is reserved and not used by any part of u-boot
371 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
372 gd->relocaddr = determine_mp_bootpg(NULL);
373 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
379 #if defined(CONFIG_SPARC)
380 static int reserve_prom(void)
382 /* defined in arch/sparc/cpu/leon?/prom.c */
383 extern void *__prom_start_reloc;
384 int size = 8192; /* page table = 2k, prom = 6k */
385 gd->relocaddr -= size;
386 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
387 debug("Reserving %dk for PROM and page table at %08lx\n", size,
393 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
394 static int reserve_logbuffer(void)
396 /* reserve kernel log buffer */
397 gd->relocaddr -= LOGBUFF_RESERVE;
398 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
405 /* reserve protected RAM */
406 static int reserve_pram(void)
410 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
411 gd->relocaddr -= (reg << 10); /* size is in kB */
412 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
416 #endif /* CONFIG_PRAM */
418 /* Round memory pointer down to next 4 kB limit */
419 static int reserve_round_4k(void)
421 gd->relocaddr &= ~(4096 - 1);
425 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
427 static int reserve_mmu(void)
429 /* reserve TLB table */
430 gd->arch.tlb_size = PGTABLE_SIZE;
431 gd->relocaddr -= gd->arch.tlb_size;
433 /* round down to next 64 kB limit */
434 gd->relocaddr &= ~(0x10000 - 1);
436 gd->arch.tlb_addr = gd->relocaddr;
437 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
438 gd->arch.tlb_addr + gd->arch.tlb_size);
440 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
442 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
443 * with location within secure ram.
445 gd->arch.tlb_allocated = gd->arch.tlb_addr;
452 #ifdef CONFIG_DM_VIDEO
453 static int reserve_video(void)
458 addr = gd->relocaddr;
459 ret = video_reserve(&addr);
462 gd->relocaddr = addr;
469 static int reserve_lcd(void)
471 # ifdef CONFIG_FB_ADDR
472 gd->fb_base = CONFIG_FB_ADDR;
474 /* reserve memory for LCD display (always full pages) */
475 gd->relocaddr = lcd_setmem(gd->relocaddr);
476 gd->fb_base = gd->relocaddr;
477 # endif /* CONFIG_FB_ADDR */
481 # endif /* CONFIG_LCD */
483 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
484 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
485 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
486 static int reserve_legacy_video(void)
488 /* reserve memory for video display (always full pages) */
489 gd->relocaddr = video_setmem(gd->relocaddr);
490 gd->fb_base = gd->relocaddr;
495 #endif /* !CONFIG_DM_VIDEO */
497 static int reserve_trace(void)
500 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
501 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
502 debug("Reserving %dk for trace data at: %08lx\n",
503 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
509 static int reserve_uboot(void)
512 * reserve memory for U-Boot code, data & bss
513 * round down to next 4 kB limit
515 gd->relocaddr -= gd->mon_len;
516 gd->relocaddr &= ~(4096 - 1);
518 /* round down to next 64 kB limit so that IVPR stays aligned */
519 gd->relocaddr &= ~(65536 - 1);
522 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
525 gd->start_addr_sp = gd->relocaddr;
530 #ifndef CONFIG_SPL_BUILD
531 /* reserve memory for malloc() area */
532 static int reserve_malloc(void)
534 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
535 debug("Reserving %dk for malloc() at: %08lx\n",
536 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
540 /* (permanently) allocate a Board Info struct */
541 static int reserve_board(void)
544 gd->start_addr_sp -= sizeof(bd_t);
545 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
546 memset(gd->bd, '\0', sizeof(bd_t));
547 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
548 sizeof(bd_t), gd->start_addr_sp);
554 static int setup_machine(void)
556 #ifdef CONFIG_MACH_TYPE
557 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
562 static int reserve_global_data(void)
564 gd->start_addr_sp -= sizeof(gd_t);
565 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
566 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
567 sizeof(gd_t), gd->start_addr_sp);
571 static int reserve_fdt(void)
573 #ifndef CONFIG_OF_EMBED
575 * If the device tree is sitting immediately above our image then we
576 * must relocate it. If it is embedded in the data section, then it
577 * will be relocated with other data.
580 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
582 gd->start_addr_sp -= gd->fdt_size;
583 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
584 debug("Reserving %lu Bytes for FDT at: %08lx\n",
585 gd->fdt_size, gd->start_addr_sp);
592 int arch_reserve_stacks(void)
597 static int reserve_stacks(void)
599 /* make stack pointer 16-byte aligned */
600 gd->start_addr_sp -= 16;
601 gd->start_addr_sp &= ~0xf;
604 * let the architecture-specific code tailor gd->start_addr_sp and
607 return arch_reserve_stacks();
610 static int display_new_sp(void)
612 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
617 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
618 static int setup_board_part1(void)
623 * Save local variables to board info struct
625 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
626 bd->bi_memsize = gd->ram_size; /* size in bytes */
628 #ifdef CONFIG_SYS_SRAM_BASE
629 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
630 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
633 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
634 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
635 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
637 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
638 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
640 #if defined(CONFIG_MPC83xx)
641 bd->bi_immrbar = CONFIG_SYS_IMMR;
648 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
649 static int setup_board_part2(void)
653 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
654 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
655 #if defined(CONFIG_CPM2)
656 bd->bi_cpmfreq = gd->arch.cpm_clk;
657 bd->bi_brgfreq = gd->arch.brg_clk;
658 bd->bi_sccfreq = gd->arch.scc_clk;
659 bd->bi_vco = gd->arch.vco_out;
660 #endif /* CONFIG_CPM2 */
661 #if defined(CONFIG_MPC512X)
662 bd->bi_ipsfreq = gd->arch.ips_clk;
663 #endif /* CONFIG_MPC512X */
664 #if defined(CONFIG_MPC5xxx)
665 bd->bi_ipbfreq = gd->arch.ipb_clk;
666 bd->bi_pcifreq = gd->pci_clk;
667 #endif /* CONFIG_MPC5xxx */
668 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
669 bd->bi_pcifreq = gd->pci_clk;
671 #if defined(CONFIG_EXTRA_CLOCK)
672 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
673 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
674 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
681 #ifdef CONFIG_SYS_EXTBDINFO
682 static int setup_board_extra(void)
686 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
687 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
688 sizeof(bd->bi_r_version));
690 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
691 bd->bi_plb_busfreq = gd->bus_clk;
692 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
693 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
694 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
695 bd->bi_pci_busfreq = get_PCI_freq();
696 bd->bi_opbfreq = get_OPB_freq();
697 #elif defined(CONFIG_XILINX_405)
698 bd->bi_pci_busfreq = get_PCI_freq();
706 static int init_post(void)
708 post_bootmode_init();
709 post_run(NULL, POST_ROM | post_bootmode_get(0));
715 static int setup_dram_config(void)
717 /* Ram is board specific, so move it to board code ... */
718 dram_init_banksize();
723 static int reloc_fdt(void)
725 #ifndef CONFIG_OF_EMBED
726 if (gd->flags & GD_FLG_SKIP_RELOC)
729 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
730 gd->fdt_blob = gd->new_fdt;
737 static int setup_reloc(void)
739 if (gd->flags & GD_FLG_SKIP_RELOC) {
740 debug("Skipping relocation due to flag\n");
744 #ifdef CONFIG_SYS_TEXT_BASE
745 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
748 * On all ColdFire arch cpu, monitor code starts always
749 * just after the default vector table location, so at 0x400
751 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
754 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
756 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
757 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
758 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
764 /* ARM calls relocate_code from its crt0.S */
765 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
767 static int jump_to_copy(void)
769 if (gd->flags & GD_FLG_SKIP_RELOC)
772 * x86 is special, but in a nice way. It uses a trampoline which
773 * enables the dcache if possible.
775 * For now, other archs use relocate_code(), which is implemented
776 * similarly for all archs. When we do generic relocation, hopefully
777 * we can make all archs enable the dcache prior to relocation.
779 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
781 * SDRAM and console are now initialised. The final stack can now
782 * be setup in SDRAM. Code execution will continue in Flash, but
783 * with the stack in SDRAM and Global Data in temporary memory
786 arch_setup_gd(gd->new_gd);
787 board_init_f_r_trampoline(gd->start_addr_sp);
789 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
796 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
797 static int mark_bootstage(void)
799 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
804 static int initf_console_record(void)
806 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
807 return console_record_init();
813 static int initf_dm(void)
815 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
818 ret = dm_init_and_scan(true);
822 #ifdef CONFIG_TIMER_EARLY
823 ret = dm_timer_init();
831 /* Architecture-specific memory reservation */
832 __weak int reserve_arch(void)
837 __weak int arch_cpu_init_dm(void)
842 static init_fnc_t init_sequence_f[] = {
843 #ifdef CONFIG_SANDBOX
847 #ifdef CONFIG_OF_CONTROL
854 initf_console_record,
855 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
856 /* TODO: can this go into arch_cpu_init()? */
859 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
862 arch_cpu_init, /* basic arch cpu dependent setup */
865 mark_bootstage, /* need timer, go after init dm */
866 #if defined(CONFIG_BOARD_EARLY_INIT_F)
869 /* TODO: can any of this go into arch_cpu_init()? */
870 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
871 get_clocks, /* get CPU and bus clocks (etc.) */
872 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
873 && !defined(CONFIG_TQM885D)
874 adjust_sdram_tbs_8xx,
876 /* TODO: can we rename this to timer_init()? */
879 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
880 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
881 defined(CONFIG_SPARC)
882 timer_init, /* initialize timer */
884 #ifdef CONFIG_SYS_ALLOC_DPRAM
885 #if !defined(CONFIG_CPM2)
889 #if defined(CONFIG_BOARD_POSTCLK_INIT)
892 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
895 env_init, /* initialize environment */
896 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
897 /* get CPU and bus clocks according to the environment variable */
899 /* adjust sdram refresh rate according to the new clock */
903 init_baud_rate, /* initialze baudrate settings */
904 serial_init, /* serial communications setup */
905 console_init_f, /* stage 1 init of console */
906 #ifdef CONFIG_SANDBOX
907 sandbox_early_getopt_check,
909 #ifdef CONFIG_OF_CONTROL
912 display_options, /* say that we are here */
913 display_text_info, /* show debugging info if required */
914 #if defined(CONFIG_MPC8260)
917 #endif /* CONFIG_MPC8260 */
918 #if defined(CONFIG_MPC83xx)
921 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
924 print_cpuinfo, /* display cpu info (and speed) */
925 #if defined(CONFIG_MPC5xxx)
927 #endif /* CONFIG_MPC5xxx */
928 #if defined(CONFIG_DISPLAY_BOARDINFO)
931 INIT_FUNC_WATCHDOG_INIT
932 #if defined(CONFIG_MISC_INIT_F)
935 INIT_FUNC_WATCHDOG_RESET
936 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
939 #if defined(CONFIG_HARD_SPI)
943 /* TODO: unify all these dram functions? */
944 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
945 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
946 dram_init, /* configure available RAM banks */
948 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
954 INIT_FUNC_WATCHDOG_RESET
955 #if defined(CONFIG_SYS_DRAM_TEST)
957 #endif /* CONFIG_SYS_DRAM_TEST */
958 INIT_FUNC_WATCHDOG_RESET
963 INIT_FUNC_WATCHDOG_RESET
965 * Now that we have DRAM mapped and working, we can
966 * relocate the code and continue running from DRAM.
968 * Reserve memory at end of RAM for (top down in that order):
969 * - area that won't get touched by U-Boot and Linux (optional)
970 * - kernel log buffer
974 * - board info struct
977 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_XTENSA)
978 /* Blackfin u-boot monitor should be on top of the ram */
981 #if defined(CONFIG_SPARC)
984 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
991 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
995 #ifdef CONFIG_DM_VIDEO
1001 /* TODO: Why the dependency on CONFIG_8xx? */
1002 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
1003 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
1004 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
1005 reserve_legacy_video,
1007 #endif /* CONFIG_DM_VIDEO */
1009 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_XTENSA)
1012 #ifndef CONFIG_SPL_BUILD
1017 reserve_global_data,
1023 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
1026 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1027 INIT_FUNC_WATCHDOG_RESET
1031 #ifdef CONFIG_SYS_EXTBDINFO
1034 INIT_FUNC_WATCHDOG_RESET
1037 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1040 do_elf_reloc_fixups,
1042 #if defined(CONFIG_XTENSA)
1045 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1051 void board_init_f(ulong boot_flags)
1053 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1055 * For some archtectures, global data is initialized and used before
1056 * calling this function. The data should be preserved. For others,
1057 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1058 * here to host global data until relocation.
1065 * Clear global data before it is accessed at debug print
1066 * in initcall_run_list. Otherwise the debug print probably
1067 * get the wrong vaule of gd->have_console.
1072 gd->flags = boot_flags;
1073 gd->have_console = 0;
1075 if (initcall_run_list(init_sequence_f))
1078 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1079 !defined(CONFIG_EFI_APP)
1080 /* NOTREACHED - jump_to_copy() does not return */
1085 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1087 * For now this code is only used on x86.
1089 * init_sequence_f_r is the list of init functions which are run when
1090 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1091 * The following limitations must be considered when implementing an
1093 * - 'static' variables are read-only
1094 * - Global Data (gd->xxx) is read/write
1096 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1097 * supported). It _should_, if possible, copy global data to RAM and
1098 * initialise the CPU caches (to speed up the relocation process)
1100 * NOTE: At present only x86 uses this route, but it is intended that
1101 * all archs will move to this when generic relocation is implemented.
1103 static init_fnc_t init_sequence_f_r[] = {
1109 void board_init_f_r(void)
1111 if (initcall_run_list(init_sequence_f_r))
1115 * The pre-relocation drivers may be using memory that has now gone
1116 * away. Mark serial as unavailable - this will fall back to the debug
1117 * UART if available.
1119 gd->flags &= ~GD_FLG_SERIAL_READY;
1122 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1123 * Transfer execution from Flash to RAM by calculating the address
1124 * of the in-RAM copy of board_init_r() and calling it
1126 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1128 /* NOTREACHED - board_init_r() does not return */
1131 #endif /* CONFIG_X86 */