2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
50 #include <asm/errno.h>
52 #include <asm/sections.h>
53 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
54 #include <asm/init_helpers.h>
55 #include <asm/relocate.h>
58 #include <asm/state.h>
61 #include <linux/compiler.h>
64 * Pointer to initial global data area
66 * Here we initialize it if needed.
68 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
69 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
70 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
71 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
73 DECLARE_GLOBAL_DATA_PTR;
77 * TODO(sjg@chromium.org): IMO this code should be
78 * refactored to a single function, something like:
80 * void led_set_state(enum led_colour_t colour, int on);
82 /************************************************************************
83 * Coloured LED functionality
84 ************************************************************************
85 * May be supplied by boards if desired
87 __weak void coloured_LED_init(void) {}
88 __weak void red_led_on(void) {}
89 __weak void red_led_off(void) {}
90 __weak void green_led_on(void) {}
91 __weak void green_led_off(void) {}
92 __weak void yellow_led_on(void) {}
93 __weak void yellow_led_off(void) {}
94 __weak void blue_led_on(void) {}
95 __weak void blue_led_off(void) {}
98 * Why is gd allocated a register? Prior to reloc it might be better to
99 * just pass it around to each function in this file?
101 * After reloc one could argue that it is hardly used and doesn't need
102 * to be in a register. Or if it is it should perhaps hold pointers to all
103 * global data for all modules, so that post-reloc we can avoid the massive
104 * literal pool we get on ARM. Or perhaps just encourage each module to use
109 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
112 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
113 static int init_func_watchdog_init(void)
115 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
116 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
117 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
118 defined(CONFIG_IMX_WATCHDOG))
121 puts(" Watchdog enabled\n");
127 int init_func_watchdog_reset(void)
133 #endif /* CONFIG_WATCHDOG */
135 __weak void board_add_ram_info(int use_default)
137 /* please define platform specific board_add_ram_info() */
140 static int init_baud_rate(void)
142 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
146 static int display_text_info(void)
148 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
149 ulong bss_start, bss_end, text_base;
151 bss_start = (ulong)&__bss_start;
152 bss_end = (ulong)&__bss_end;
154 #ifdef CONFIG_SYS_TEXT_BASE
155 text_base = CONFIG_SYS_TEXT_BASE;
157 text_base = CONFIG_SYS_MONITOR_BASE;
160 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
161 text_base, bss_start, bss_end);
164 #ifdef CONFIG_MODEM_SUPPORT
165 debug("Modem Support enabled\n");
167 #ifdef CONFIG_USE_IRQ
168 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
169 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
175 static int announce_dram_init(void)
181 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
182 static int init_func_ram(void)
184 #ifdef CONFIG_BOARD_TYPES
185 int board_type = gd->board_type;
187 int board_type = 0; /* use dummy arg */
190 gd->ram_size = initdram(board_type);
192 if (gd->ram_size > 0)
195 puts("*** failed ***\n");
200 static int show_dram_config(void)
202 unsigned long long size;
204 #ifdef CONFIG_NR_DRAM_BANKS
207 debug("\nRAM Configuration:\n");
208 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
209 size += gd->bd->bi_dram[i].size;
210 debug("Bank #%d: %llx ", i,
211 (unsigned long long)(gd->bd->bi_dram[i].start));
213 print_size(gd->bd->bi_dram[i].size, "\n");
221 print_size(size, "");
222 board_add_ram_info(0);
228 __weak void dram_init_banksize(void)
230 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
231 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
232 gd->bd->bi_dram[0].size = get_effective_memsize();
236 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
237 static int init_func_i2c(void)
240 #ifdef CONFIG_SYS_I2C
243 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
250 #if defined(CONFIG_HARD_SPI)
251 static int init_func_spi(void)
261 static int zero_global_data(void)
263 memset((void *)gd, '\0', sizeof(gd_t));
268 static int setup_mon_len(void)
270 #if defined(__ARM__) || defined(__MICROBLAZE__)
271 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
272 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
273 gd->mon_len = (ulong)&_end - (ulong)_init;
274 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
275 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276 #elif defined(CONFIG_NDS32)
277 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
279 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
285 __weak int arch_cpu_init(void)
290 #ifdef CONFIG_SANDBOX
291 static int setup_ram_buf(void)
293 struct sandbox_state *state = state_get_current();
295 gd->arch.ram_buf = state->ram_buf;
296 gd->ram_size = state->ram_size;
302 /* Get the top of usable RAM */
303 __weak ulong board_get_usable_ram_top(ulong total_size)
305 #ifdef CONFIG_SYS_SDRAM_BASE
307 * Detect whether we have so much RAM that it goes past the end of our
308 * 32-bit address space. If so, clip the usable RAM so it doesn't.
310 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
312 * Will wrap back to top of 32-bit space when reservations
320 static int setup_dest_addr(void)
322 debug("Monitor len: %08lX\n", gd->mon_len);
324 * Ram is setup, size stored in gd !!
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
338 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
340 #ifdef CONFIG_SYS_SDRAM_BASE
341 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
343 gd->ram_top += get_effective_memsize();
344 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
345 gd->relocaddr = gd->ram_top;
346 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
352 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
353 gd->relocaddr = determine_mp_bootpg(NULL);
354 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
360 #if defined(CONFIG_SPARC)
361 static int reserve_prom(void)
363 /* defined in arch/sparc/cpu/leon?/prom.c */
364 extern void *__prom_start_reloc;
365 int size = 8192; /* page table = 2k, prom = 6k */
366 gd->relocaddr -= size;
367 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
368 debug("Reserving %dk for PROM and page table at %08lx\n", size,
374 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
375 static int reserve_logbuffer(void)
377 /* reserve kernel log buffer */
378 gd->relocaddr -= LOGBUFF_RESERVE;
379 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
386 /* reserve protected RAM */
387 static int reserve_pram(void)
391 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
392 gd->relocaddr -= (reg << 10); /* size is in kB */
393 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
397 #endif /* CONFIG_PRAM */
399 /* Round memory pointer down to next 4 kB limit */
400 static int reserve_round_4k(void)
402 gd->relocaddr &= ~(4096 - 1);
406 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
408 static int reserve_mmu(void)
410 /* reserve TLB table */
411 gd->arch.tlb_size = PGTABLE_SIZE;
412 gd->relocaddr -= gd->arch.tlb_size;
414 /* round down to next 64 kB limit */
415 gd->relocaddr &= ~(0x10000 - 1);
417 gd->arch.tlb_addr = gd->relocaddr;
418 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
419 gd->arch.tlb_addr + gd->arch.tlb_size);
425 static int reserve_lcd(void)
427 #ifdef CONFIG_FB_ADDR
428 gd->fb_base = CONFIG_FB_ADDR;
430 /* reserve memory for LCD display (always full pages) */
431 gd->relocaddr = lcd_setmem(gd->relocaddr);
432 gd->fb_base = gd->relocaddr;
433 #endif /* CONFIG_FB_ADDR */
436 #endif /* CONFIG_LCD */
438 static int reserve_trace(void)
441 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
442 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
443 debug("Reserving %dk for trace data at: %08lx\n",
444 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
450 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
451 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
452 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
453 static int reserve_video(void)
455 /* reserve memory for video display (always full pages) */
456 gd->relocaddr = video_setmem(gd->relocaddr);
457 gd->fb_base = gd->relocaddr;
463 static int reserve_uboot(void)
466 * reserve memory for U-Boot code, data & bss
467 * round down to next 4 kB limit
469 gd->relocaddr -= gd->mon_len;
470 gd->relocaddr &= ~(4096 - 1);
472 /* round down to next 64 kB limit so that IVPR stays aligned */
473 gd->relocaddr &= ~(65536 - 1);
476 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
479 gd->start_addr_sp = gd->relocaddr;
484 #ifndef CONFIG_SPL_BUILD
485 /* reserve memory for malloc() area */
486 static int reserve_malloc(void)
488 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
489 debug("Reserving %dk for malloc() at: %08lx\n",
490 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
494 /* (permanently) allocate a Board Info struct */
495 static int reserve_board(void)
498 gd->start_addr_sp -= sizeof(bd_t);
499 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
500 memset(gd->bd, '\0', sizeof(bd_t));
501 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
502 sizeof(bd_t), gd->start_addr_sp);
508 static int setup_machine(void)
510 #ifdef CONFIG_MACH_TYPE
511 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
516 static int reserve_global_data(void)
518 gd->start_addr_sp -= sizeof(gd_t);
519 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
520 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
521 sizeof(gd_t), gd->start_addr_sp);
525 static int reserve_fdt(void)
528 * If the device tree is sitting immediately above our image then we
529 * must relocate it. If it is embedded in the data section, then it
530 * will be relocated with other data.
533 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
535 gd->start_addr_sp -= gd->fdt_size;
536 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
537 debug("Reserving %lu Bytes for FDT at: %08lx\n",
538 gd->fdt_size, gd->start_addr_sp);
544 int arch_reserve_stacks(void)
549 static int reserve_stacks(void)
551 /* make stack pointer 16-byte aligned */
552 gd->start_addr_sp -= 16;
553 gd->start_addr_sp &= ~0xf;
556 * let the architecture-specific code tailor gd->start_addr_sp and
559 return arch_reserve_stacks();
562 static int display_new_sp(void)
564 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
569 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
570 static int setup_board_part1(void)
575 * Save local variables to board info struct
577 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
578 bd->bi_memsize = gd->ram_size; /* size in bytes */
580 #ifdef CONFIG_SYS_SRAM_BASE
581 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
582 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
585 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
586 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
587 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
589 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
590 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
592 #if defined(CONFIG_MPC83xx)
593 bd->bi_immrbar = CONFIG_SYS_IMMR;
600 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
601 static int setup_board_part2(void)
605 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
606 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
607 #if defined(CONFIG_CPM2)
608 bd->bi_cpmfreq = gd->arch.cpm_clk;
609 bd->bi_brgfreq = gd->arch.brg_clk;
610 bd->bi_sccfreq = gd->arch.scc_clk;
611 bd->bi_vco = gd->arch.vco_out;
612 #endif /* CONFIG_CPM2 */
613 #if defined(CONFIG_MPC512X)
614 bd->bi_ipsfreq = gd->arch.ips_clk;
615 #endif /* CONFIG_MPC512X */
616 #if defined(CONFIG_MPC5xxx)
617 bd->bi_ipbfreq = gd->arch.ipb_clk;
618 bd->bi_pcifreq = gd->pci_clk;
619 #endif /* CONFIG_MPC5xxx */
620 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
621 bd->bi_pcifreq = gd->pci_clk;
623 #if defined(CONFIG_EXTRA_CLOCK)
624 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
625 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
626 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
633 #ifdef CONFIG_SYS_EXTBDINFO
634 static int setup_board_extra(void)
638 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
639 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
640 sizeof(bd->bi_r_version));
642 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
643 bd->bi_plb_busfreq = gd->bus_clk;
644 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
645 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
646 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
647 bd->bi_pci_busfreq = get_PCI_freq();
648 bd->bi_opbfreq = get_OPB_freq();
649 #elif defined(CONFIG_XILINX_405)
650 bd->bi_pci_busfreq = get_PCI_freq();
658 static int init_post(void)
660 post_bootmode_init();
661 post_run(NULL, POST_ROM | post_bootmode_get(0));
667 static int setup_dram_config(void)
669 /* Ram is board specific, so move it to board code ... */
670 dram_init_banksize();
675 static int reloc_fdt(void)
677 if (gd->flags & GD_FLG_SKIP_RELOC)
680 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
681 gd->fdt_blob = gd->new_fdt;
687 static int setup_reloc(void)
689 if (gd->flags & GD_FLG_SKIP_RELOC) {
690 debug("Skipping relocation due to flag\n");
694 #ifdef CONFIG_SYS_TEXT_BASE
695 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
698 * On all ColdFire arch cpu, monitor code starts always
699 * just after the default vector table location, so at 0x400
701 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
704 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
706 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
707 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
708 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
714 /* ARM calls relocate_code from its crt0.S */
715 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
717 static int jump_to_copy(void)
719 if (gd->flags & GD_FLG_SKIP_RELOC)
722 * x86 is special, but in a nice way. It uses a trampoline which
723 * enables the dcache if possible.
725 * For now, other archs use relocate_code(), which is implemented
726 * similarly for all archs. When we do generic relocation, hopefully
727 * we can make all archs enable the dcache prior to relocation.
729 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
731 * SDRAM and console are now initialised. The final stack can now
732 * be setup in SDRAM. Code execution will continue in Flash, but
733 * with the stack in SDRAM and Global Data in temporary memory
736 arch_setup_gd(gd->new_gd);
737 board_init_f_r_trampoline(gd->start_addr_sp);
739 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
746 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
747 static int mark_bootstage(void)
749 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
754 static int initf_console_record(void)
756 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
757 return console_record_init();
763 static int initf_dm(void)
765 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
768 ret = dm_init_and_scan(true);
776 /* Architecture-specific memory reservation */
777 __weak int reserve_arch(void)
782 __weak int arch_cpu_init_dm(void)
787 static init_fnc_t init_sequence_f[] = {
788 #ifdef CONFIG_SANDBOX
792 #ifdef CONFIG_OF_CONTROL
799 initf_console_record,
800 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
801 /* TODO: can this go into arch_cpu_init()? */
804 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
807 arch_cpu_init, /* basic arch cpu dependent setup */
810 mark_bootstage, /* need timer, go after init dm */
811 #if defined(CONFIG_BOARD_EARLY_INIT_F)
814 /* TODO: can any of this go into arch_cpu_init()? */
815 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
816 get_clocks, /* get CPU and bus clocks (etc.) */
817 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
818 && !defined(CONFIG_TQM885D)
819 adjust_sdram_tbs_8xx,
821 /* TODO: can we rename this to timer_init()? */
824 #if defined(CONFIG_X86) || defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
825 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
826 defined(CONFIG_SPARC)
827 timer_init, /* initialize timer */
829 #ifdef CONFIG_SYS_ALLOC_DPRAM
830 #if !defined(CONFIG_CPM2)
834 #if defined(CONFIG_BOARD_POSTCLK_INIT)
837 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
840 env_init, /* initialize environment */
841 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
842 /* get CPU and bus clocks according to the environment variable */
844 /* adjust sdram refresh rate according to the new clock */
848 init_baud_rate, /* initialze baudrate settings */
849 serial_init, /* serial communications setup */
850 console_init_f, /* stage 1 init of console */
851 #ifdef CONFIG_SANDBOX
852 sandbox_early_getopt_check,
854 #ifdef CONFIG_OF_CONTROL
857 display_options, /* say that we are here */
858 display_text_info, /* show debugging info if required */
859 #if defined(CONFIG_MPC8260)
862 #endif /* CONFIG_MPC8260 */
863 #if defined(CONFIG_MPC83xx)
866 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
869 print_cpuinfo, /* display cpu info (and speed) */
870 #if defined(CONFIG_MPC5xxx)
872 #endif /* CONFIG_MPC5xxx */
873 #if defined(CONFIG_DISPLAY_BOARDINFO)
876 INIT_FUNC_WATCHDOG_INIT
877 #if defined(CONFIG_MISC_INIT_F)
880 INIT_FUNC_WATCHDOG_RESET
881 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
884 #if defined(CONFIG_HARD_SPI)
888 /* TODO: unify all these dram functions? */
889 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
890 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
891 dram_init, /* configure available RAM banks */
893 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
899 INIT_FUNC_WATCHDOG_RESET
900 #if defined(CONFIG_SYS_DRAM_TEST)
902 #endif /* CONFIG_SYS_DRAM_TEST */
903 INIT_FUNC_WATCHDOG_RESET
908 INIT_FUNC_WATCHDOG_RESET
910 * Now that we have DRAM mapped and working, we can
911 * relocate the code and continue running from DRAM.
913 * Reserve memory at end of RAM for (top down in that order):
914 * - area that won't get touched by U-Boot and Linux (optional)
915 * - kernel log buffer
919 * - board info struct
922 #if defined(CONFIG_BLACKFIN)
923 /* Blackfin u-boot monitor should be on top of the ram */
926 #if defined(CONFIG_SPARC)
929 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
936 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
944 /* TODO: Why the dependency on CONFIG_8xx? */
945 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
946 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
947 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
950 #if !defined(CONFIG_BLACKFIN)
953 #ifndef CONFIG_SPL_BUILD
964 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
967 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
968 INIT_FUNC_WATCHDOG_RESET
972 #ifdef CONFIG_SYS_EXTBDINFO
975 INIT_FUNC_WATCHDOG_RESET
978 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
983 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
989 void board_init_f(ulong boot_flags)
991 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
993 * For some archtectures, global data is initialized and used before
994 * calling this function. The data should be preserved. For others,
995 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
996 * here to host global data until relocation.
1003 * Clear global data before it is accessed at debug print
1004 * in initcall_run_list. Otherwise the debug print probably
1005 * get the wrong vaule of gd->have_console.
1010 gd->flags = boot_flags;
1011 gd->have_console = 0;
1013 if (initcall_run_list(init_sequence_f))
1016 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1017 !defined(CONFIG_EFI_APP)
1018 /* NOTREACHED - jump_to_copy() does not return */
1023 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1025 * For now this code is only used on x86.
1027 * init_sequence_f_r is the list of init functions which are run when
1028 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1029 * The following limitations must be considered when implementing an
1031 * - 'static' variables are read-only
1032 * - Global Data (gd->xxx) is read/write
1034 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1035 * supported). It _should_, if possible, copy global data to RAM and
1036 * initialise the CPU caches (to speed up the relocation process)
1038 * NOTE: At present only x86 uses this route, but it is intended that
1039 * all archs will move to this when generic relocation is implemented.
1041 static init_fnc_t init_sequence_f_r[] = {
1047 void board_init_f_r(void)
1049 if (initcall_run_list(init_sequence_f_r))
1053 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1054 * Transfer execution from Flash to RAM by calculating the address
1055 * of the in-RAM copy of board_init_r() and calling it
1057 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1059 /* NOTREACHED - board_init_r() does not return */
1062 #endif /* CONFIG_X86 */