2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
19 #if defined(CONFIG_CMD_IDE)
26 /* TODO: Can we move these into arch/ headers? */
42 #include <asm/errno.h>
47 #include <asm/sections.h>
49 #include <asm/init_helpers.h>
50 #include <asm/relocate.h>
53 #include <asm/state.h>
55 #include <linux/compiler.h>
58 * Pointer to initial global data area
60 * Here we initialize it if needed.
62 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
63 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
64 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
65 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
67 DECLARE_GLOBAL_DATA_PTR;
71 * sjg: IMO this code should be
72 * refactored to a single function, something like:
74 * void led_set_state(enum led_colour_t colour, int on);
76 /************************************************************************
77 * Coloured LED functionality
78 ************************************************************************
79 * May be supplied by boards if desired
81 inline void __coloured_LED_init(void) {}
82 void coloured_LED_init(void)
83 __attribute__((weak, alias("__coloured_LED_init")));
84 inline void __red_led_on(void) {}
85 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
86 inline void __red_led_off(void) {}
87 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
88 inline void __green_led_on(void) {}
89 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
90 inline void __green_led_off(void) {}
91 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
92 inline void __yellow_led_on(void) {}
93 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
94 inline void __yellow_led_off(void) {}
95 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
96 inline void __blue_led_on(void) {}
97 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
98 inline void __blue_led_off(void) {}
99 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
102 * Why is gd allocated a register? Prior to reloc it might be better to
103 * just pass it around to each function in this file?
105 * After reloc one could argue that it is hardly used and doesn't need
106 * to be in a register. Or if it is it should perhaps hold pointers to all
107 * global data for all modules, so that post-reloc we can avoid the massive
108 * literal pool we get on ARM. Or perhaps just encourage each module to use
113 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
116 #if defined(CONFIG_WATCHDOG)
117 static int init_func_watchdog_init(void)
119 puts(" Watchdog enabled\n");
125 int init_func_watchdog_reset(void)
131 #endif /* CONFIG_WATCHDOG */
133 void __board_add_ram_info(int use_default)
135 /* please define platform specific board_add_ram_info() */
138 void board_add_ram_info(int)
139 __attribute__ ((weak, alias("__board_add_ram_info")));
141 static int init_baud_rate(void)
143 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
147 static int display_text_info(void)
149 #ifndef CONFIG_SANDBOX
150 ulong bss_start, bss_end;
152 bss_start = (ulong)&__bss_start;
153 bss_end = (ulong)&__bss_end;
155 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
156 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
159 #ifdef CONFIG_MODEM_SUPPORT
160 debug("Modem Support enabled\n");
162 #ifdef CONFIG_USE_IRQ
163 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
164 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170 static int announce_dram_init(void)
177 static int init_func_ram(void)
179 #ifdef CONFIG_BOARD_TYPES
180 int board_type = gd->board_type;
182 int board_type = 0; /* use dummy arg */
185 gd->ram_size = initdram(board_type);
187 if (gd->ram_size > 0)
190 puts("*** failed ***\n");
195 static int show_dram_config(void)
199 #ifdef CONFIG_NR_DRAM_BANKS
202 debug("\nRAM Configuration:\n");
203 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
204 size += gd->bd->bi_dram[i].size;
205 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
207 print_size(gd->bd->bi_dram[i].size, "\n");
215 print_size(size, "");
216 board_add_ram_info(0);
222 ulong get_effective_memsize(void)
224 #ifndef CONFIG_VERY_BIG_RAM
227 /* limit stack to what we can reasonable map */
228 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
229 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
233 void __dram_init_banksize(void)
235 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
236 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
237 gd->bd->bi_dram[0].size = get_effective_memsize();
241 void dram_init_banksize(void)
242 __attribute__((weak, alias("__dram_init_banksize")));
244 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
245 static int init_func_i2c(void)
248 #ifdef CONFIG_SYS_I2C
251 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
258 #if defined(CONFIG_HARD_SPI)
259 static int init_func_spi(void)
269 static int zero_global_data(void)
271 memset((void *)gd, '\0', sizeof(gd_t));
276 static int setup_mon_len(void)
279 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
280 #elif defined(CONFIG_SANDBOX)
281 gd->mon_len = (ulong)&_end - (ulong)_init;
283 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
284 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
289 __weak int arch_cpu_init(void)
294 #ifdef CONFIG_OF_HOSTFILE
296 #define CHECK(x) err = (x); if (err) goto failed;
298 /* Create an empty device tree blob */
299 static int make_empty_fdt(void *fdt)
303 CHECK(fdt_create(fdt, 256));
304 CHECK(fdt_finish_reservemap(fdt));
305 CHECK(fdt_begin_node(fdt, ""));
306 CHECK(fdt_end_node(fdt));
307 CHECK(fdt_finish(fdt));
311 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
315 static int read_fdt_from_file(void)
317 struct sandbox_state *state = state_get_current();
322 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
323 if (!state->fdt_fname) {
324 err = make_empty_fdt(blob);
329 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
332 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
343 #ifdef CONFIG_SANDBOX
344 static int setup_ram_buf(void)
346 struct sandbox_state *state = state_get_current();
348 gd->arch.ram_buf = state->ram_buf;
349 gd->ram_size = state->ram_size;
355 static int setup_fdt(void)
357 #ifdef CONFIG_OF_EMBED
358 /* Get a pointer to the FDT */
359 gd->fdt_blob = __dtb_dt_begin;
360 #elif defined CONFIG_OF_SEPARATE
361 /* FDT is at end of image */
362 gd->fdt_blob = (ulong *)&_end;
363 #elif defined(CONFIG_OF_HOSTFILE)
364 if (read_fdt_from_file()) {
365 puts("Failed to read control FDT\n");
369 /* Allow the early environment to override the fdt address */
370 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
371 (uintptr_t)gd->fdt_blob);
375 /* Get the top of usable RAM */
376 __weak ulong board_get_usable_ram_top(ulong total_size)
381 static int setup_dest_addr(void)
383 debug("Monitor len: %08lX\n", gd->mon_len);
385 * Ram is setup, size stored in gd !!
387 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
388 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
390 * Subtract specified amount of memory to hide so that it won't
391 * get "touched" at all by U-Boot. By fixing up gd->ram_size
392 * the Linux kernel should now get passed the now "corrected"
393 * memory size and won't touch it either. This should work
394 * for arch/ppc and arch/powerpc. Only Linux board ports in
395 * arch/powerpc with bootwrapper support, that recalculate the
396 * memory size from the SDRAM controller setup will have to
399 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
401 #ifdef CONFIG_SYS_SDRAM_BASE
402 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
404 gd->ram_top += get_effective_memsize();
405 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
406 gd->relocaddr = gd->ram_top;
407 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
408 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
410 * We need to make sure the location we intend to put secondary core
411 * boot code is reserved and not used by any part of u-boot
413 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
414 gd->relocaddr = determine_mp_bootpg(NULL);
415 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
421 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
422 static int reserve_logbuffer(void)
424 /* reserve kernel log buffer */
425 gd->relocaddr -= LOGBUFF_RESERVE;
426 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
433 /* reserve protected RAM */
434 static int reserve_pram(void)
438 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
439 gd->relocaddr -= (reg << 10); /* size is in kB */
440 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
444 #endif /* CONFIG_PRAM */
446 /* Round memory pointer down to next 4 kB limit */
447 static int reserve_round_4k(void)
449 gd->relocaddr &= ~(4096 - 1);
453 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
455 static int reserve_mmu(void)
457 /* reserve TLB table */
458 gd->arch.tlb_size = PGTABLE_SIZE;
459 gd->relocaddr -= gd->arch.tlb_size;
461 /* round down to next 64 kB limit */
462 gd->relocaddr &= ~(0x10000 - 1);
464 gd->arch.tlb_addr = gd->relocaddr;
465 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
466 gd->arch.tlb_addr + gd->arch.tlb_size);
472 static int reserve_lcd(void)
474 #ifdef CONFIG_FB_ADDR
475 gd->fb_base = CONFIG_FB_ADDR;
477 /* reserve memory for LCD display (always full pages) */
478 gd->relocaddr = lcd_setmem(gd->relocaddr);
479 gd->fb_base = gd->relocaddr;
480 #endif /* CONFIG_FB_ADDR */
483 #endif /* CONFIG_LCD */
485 static int reserve_trace(void)
488 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
489 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
490 debug("Reserving %dk for trace data at: %08lx\n",
491 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
497 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
498 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
499 static int reserve_video(void)
501 /* reserve memory for video display (always full pages) */
502 gd->relocaddr = video_setmem(gd->relocaddr);
503 gd->fb_base = gd->relocaddr;
509 static int reserve_uboot(void)
512 * reserve memory for U-Boot code, data & bss
513 * round down to next 4 kB limit
515 gd->relocaddr -= gd->mon_len;
516 gd->relocaddr &= ~(4096 - 1);
518 /* round down to next 64 kB limit so that IVPR stays aligned */
519 gd->relocaddr &= ~(65536 - 1);
522 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
525 gd->start_addr_sp = gd->relocaddr;
530 #ifndef CONFIG_SPL_BUILD
531 /* reserve memory for malloc() area */
532 static int reserve_malloc(void)
534 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
535 debug("Reserving %dk for malloc() at: %08lx\n",
536 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
540 /* (permanently) allocate a Board Info struct */
541 static int reserve_board(void)
543 gd->start_addr_sp -= sizeof(bd_t);
544 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
545 memset(gd->bd, '\0', sizeof(bd_t));
546 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
547 sizeof(bd_t), gd->start_addr_sp);
552 static int setup_machine(void)
554 #ifdef CONFIG_MACH_TYPE
555 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
560 static int reserve_global_data(void)
562 gd->start_addr_sp -= sizeof(gd_t);
563 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
564 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
565 sizeof(gd_t), gd->start_addr_sp);
569 static int reserve_fdt(void)
572 * If the device tree is sitting immediate above our image then we
573 * must relocate it. If it is embedded in the data section, then it
574 * will be relocated with other data.
577 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
579 gd->start_addr_sp -= gd->fdt_size;
580 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
581 debug("Reserving %lu Bytes for FDT at: %08lx\n",
582 gd->fdt_size, gd->start_addr_sp);
588 static int reserve_stacks(void)
590 #ifdef CONFIG_SPL_BUILD
592 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
593 gd->irq_sp = gd->start_addr_sp;
600 /* setup stack pointer for exceptions */
601 gd->start_addr_sp -= 16;
602 gd->start_addr_sp &= ~0xf;
603 gd->irq_sp = gd->start_addr_sp;
606 * Handle architecture-specific things here
607 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
608 * to handle this and put in arch/xxx/lib/stack.c
610 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
611 # ifdef CONFIG_USE_IRQ
612 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
613 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
614 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
616 /* 8-byte alignment for ARM ABI compliance */
617 gd->start_addr_sp &= ~0x07;
619 /* leave 3 words for abort-stack, plus 1 for alignment */
620 gd->start_addr_sp -= 16;
621 # elif defined(CONFIG_PPC)
622 /* Clear initial stack frame */
623 s = (ulong *) gd->start_addr_sp;
624 *s = 0; /* Terminate back chain */
625 *++s = 0; /* NULL return address */
626 # endif /* Architecture specific code */
632 static int display_new_sp(void)
634 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
640 static int setup_board_part1(void)
645 * Save local variables to board info struct
648 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
649 bd->bi_memsize = gd->ram_size; /* size in bytes */
651 #ifdef CONFIG_SYS_SRAM_BASE
652 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
653 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
656 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
657 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
658 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
660 #if defined(CONFIG_MPC5xxx)
661 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
663 #if defined(CONFIG_MPC83xx)
664 bd->bi_immrbar = CONFIG_SYS_IMMR;
670 static int setup_board_part2(void)
674 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
675 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
676 #if defined(CONFIG_CPM2)
677 bd->bi_cpmfreq = gd->arch.cpm_clk;
678 bd->bi_brgfreq = gd->arch.brg_clk;
679 bd->bi_sccfreq = gd->arch.scc_clk;
680 bd->bi_vco = gd->arch.vco_out;
681 #endif /* CONFIG_CPM2 */
682 #if defined(CONFIG_MPC512X)
683 bd->bi_ipsfreq = gd->arch.ips_clk;
684 #endif /* CONFIG_MPC512X */
685 #if defined(CONFIG_MPC5xxx)
686 bd->bi_ipbfreq = gd->arch.ipb_clk;
687 bd->bi_pcifreq = gd->pci_clk;
688 #endif /* CONFIG_MPC5xxx */
694 #ifdef CONFIG_SYS_EXTBDINFO
695 static int setup_board_extra(void)
699 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
700 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
701 sizeof(bd->bi_r_version));
703 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
704 bd->bi_plb_busfreq = gd->bus_clk;
705 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
706 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
707 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
708 bd->bi_pci_busfreq = get_PCI_freq();
709 bd->bi_opbfreq = get_OPB_freq();
710 #elif defined(CONFIG_XILINX_405)
711 bd->bi_pci_busfreq = get_PCI_freq();
719 static int init_post(void)
721 post_bootmode_init();
722 post_run(NULL, POST_ROM | post_bootmode_get(0));
728 static int setup_baud_rate(void)
730 /* Ick, can we get rid of this line? */
731 gd->bd->bi_baudrate = gd->baudrate;
736 static int setup_dram_config(void)
738 /* Ram is board specific, so move it to board code ... */
739 dram_init_banksize();
744 static int reloc_fdt(void)
747 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
748 gd->fdt_blob = gd->new_fdt;
754 static int setup_reloc(void)
756 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
757 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
759 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
760 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
761 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
767 /* ARM calls relocate_code from its crt0.S */
768 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
770 static int jump_to_copy(void)
773 * x86 is special, but in a nice way. It uses a trampoline which
774 * enables the dcache if possible.
776 * For now, other archs use relocate_code(), which is implemented
777 * similarly for all archs. When we do generic relocation, hopefully
778 * we can make all archs enable the dcache prior to relocation.
782 * SDRAM and console are now initialised. The final stack can now
783 * be setup in SDRAM. Code execution will continue in Flash, but
784 * with the stack in SDRAM and Global Data in temporary memory
787 board_init_f_r_trampoline(gd->start_addr_sp);
789 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
796 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
797 static int mark_bootstage(void)
799 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
804 static init_fnc_t init_sequence_f[] = {
805 #ifdef CONFIG_SANDBOX
811 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
812 /* TODO: can this go into arch_cpu_init()? */
815 arch_cpu_init, /* basic arch cpu dependent setup */
817 cpu_init_f, /* TODO(sjg@chromium.org): remove */
818 # ifdef CONFIG_OF_CONTROL
819 find_fdt, /* TODO(sjg@chromium.org): remove */
823 #ifdef CONFIG_OF_CONTROL
826 #if defined(CONFIG_BOARD_EARLY_INIT_F)
829 /* TODO: can any of this go into arch_cpu_init()? */
830 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
831 get_clocks, /* get CPU and bus clocks (etc.) */
832 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
833 && !defined(CONFIG_TQM885D)
834 adjust_sdram_tbs_8xx,
836 /* TODO: can we rename this to timer_init()? */
840 timer_init, /* initialize timer */
842 #ifdef CONFIG_SYS_ALLOC_DPRAM
843 #if !defined(CONFIG_CPM2)
847 #if defined(CONFIG_BOARD_POSTCLK_INIT)
850 #ifdef CONFIG_FSL_ESDHC
853 env_init, /* initialize environment */
854 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
855 /* get CPU and bus clocks according to the environment variable */
857 /* adjust sdram refresh rate according to the new clock */
861 init_baud_rate, /* initialze baudrate settings */
862 serial_init, /* serial communications setup */
863 console_init_f, /* stage 1 init of console */
864 #ifdef CONFIG_SANDBOX
865 sandbox_early_getopt_check,
867 #ifdef CONFIG_OF_CONTROL
870 display_options, /* say that we are here */
871 display_text_info, /* show debugging info if required */
872 #if defined(CONFIG_8260)
875 #endif /* CONFIG_8260 */
876 #if defined(CONFIG_MPC83xx)
882 print_cpuinfo, /* display cpu info (and speed) */
883 #if defined(CONFIG_MPC5xxx)
885 #endif /* CONFIG_MPC5xxx */
886 #if defined(CONFIG_DISPLAY_BOARDINFO)
887 checkboard, /* display board info */
889 INIT_FUNC_WATCHDOG_INIT
890 #if defined(CONFIG_MISC_INIT_F)
893 INIT_FUNC_WATCHDOG_RESET
894 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
897 #if defined(CONFIG_HARD_SPI)
901 dram_init_f, /* configure available RAM banks */
902 calculate_relocation_address,
905 /* TODO: unify all these dram functions? */
907 dram_init, /* configure available RAM banks */
915 INIT_FUNC_WATCHDOG_RESET
916 #if defined(CONFIG_SYS_DRAM_TEST)
918 #endif /* CONFIG_SYS_DRAM_TEST */
919 INIT_FUNC_WATCHDOG_RESET
924 INIT_FUNC_WATCHDOG_RESET
926 * Now that we have DRAM mapped and working, we can
927 * relocate the code and continue running from DRAM.
929 * Reserve memory at end of RAM for (top down in that order):
930 * - area that won't get touched by U-Boot and Linux (optional)
931 * - kernel log buffer
935 * - board info struct
938 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
945 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
953 /* TODO: Why the dependency on CONFIG_8xx? */
954 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
955 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
959 #ifndef CONFIG_SPL_BUILD
971 INIT_FUNC_WATCHDOG_RESET
976 #ifdef CONFIG_SYS_EXTBDINFO
979 INIT_FUNC_WATCHDOG_RESET
982 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
988 void board_init_f(ulong boot_flags)
997 * Clear global data before it is accessed at debug print
998 * in initcall_run_list. Otherwise the debug print probably
999 * get the wrong vaule of gd->have_console.
1001 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
1002 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
1003 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
1007 gd->flags = boot_flags;
1008 gd->have_console = 0;
1010 if (initcall_run_list(init_sequence_f))
1013 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1014 /* NOTREACHED - jump_to_copy() does not return */
1021 * For now this code is only used on x86.
1023 * init_sequence_f_r is the list of init functions which are run when
1024 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1025 * The following limitations must be considered when implementing an
1027 * - 'static' variables are read-only
1028 * - Global Data (gd->xxx) is read/write
1030 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1031 * supported). It _should_, if possible, copy global data to RAM and
1032 * initialise the CPU caches (to speed up the relocation process)
1034 * NOTE: At present only x86 uses this route, but it is intended that
1035 * all archs will move to this when generic relocation is implemented.
1037 static init_fnc_t init_sequence_f_r[] = {
1041 do_elf_reloc_fixups,
1046 void board_init_f_r(void)
1048 if (initcall_run_list(init_sequence_f_r))
1052 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1053 * Transfer execution from Flash to RAM by calculating the address
1054 * of the in-RAM copy of board_init_r() and calling it
1056 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1058 /* NOTREACHED - board_init_r() does not return */
1061 #endif /* CONFIG_X86 */