3 * Texas Instruments <www.ti.com>
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
13 * (C) Copyright 2002-2004
14 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
20 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
22 * See file CREDITS for list of people who contributed to this
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License as
27 * published by the Free Software Foundation; either version 2 of
28 * the License, or (at your option) any later version.
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
42 #include <asm/proc-armv/ptrace.h>
45 static ulong timer_load_val;
49 static s3c64xx_timers *s3c64xx_get_base_timers(void)
51 return (s3c64xx_timers *)ELFIN_TIMER_BASE;
54 /* macro to read the 16 bit timer */
55 static inline ulong read_timer(void)
57 s3c64xx_timers *const timers = s3c64xx_get_base_timers();
59 return timers->TCNTO4;
62 /* Internal tick units */
63 /* Last decremneter snapshot */
64 static unsigned long lastdec;
65 /* Monotonic incrementing timer */
66 static unsigned long long timestamp;
68 int interrupt_init(void)
70 s3c64xx_timers *const timers = s3c64xx_get_base_timers();
72 /* use PWM Timer 4 because it has no output */
74 * We use the following scheme for the timer:
75 * Prescaler is hard fixed at 167, divider at 1/4.
76 * This gives at PCLK frequency 66MHz approx. 10us ticks
77 * The timer is set to wrap after 100s, at 66MHz this obviously
78 * happens after 10,000,000 ticks. A long variable can thus
79 * keep values up to 40,000s, i.e., 11 hours. This should be
80 * enough for most uses:-) Possible optimizations: select a
81 * binary-friendly frequency, e.g., 1ms / 128. Also calculate
82 * the prescaler automatically for other PCLK frequencies.
84 timers->TCFG0 = PRESCALER << 8;
85 if (timer_load_val == 0) {
86 timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
87 timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
90 /* load value for 10 ms timeout */
91 lastdec = timers->TCNTB4 = timer_load_val;
92 /* auto load, manual update of Timer 4 */
93 timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
96 /* auto load, start Timer 4 */
97 timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
104 * timer without interrupts
108 * This function is derived from PowerPC code (read timebase as long long).
109 * On ARM it just returns the timer value.
111 unsigned long long get_ticks(void)
113 ulong now = read_timer();
115 if (lastdec >= now) {
117 timestamp += lastdec - now;
119 /* we have an overflow ... */
120 timestamp += lastdec + timer_load_val - now;
128 * This function is derived from PowerPC code (timebase clock frequency).
129 * On ARM it returns the number of timer ticks per second.
131 ulong get_tbclk(void)
133 /* We overrun in 100s */
134 return (ulong)(timer_load_val / 100);
137 void reset_timer_masked(void)
140 lastdec = read_timer();
144 void reset_timer(void)
146 reset_timer_masked();
149 ulong get_timer_masked(void)
151 return get_ticks() / (timer_load_val / (100 * CFG_HZ));
154 ulong get_timer(ulong base)
156 return get_timer_masked() - base;
159 void set_timer(ulong t)
161 timestamp = t * (timer_load_val / (100 * CFG_HZ));
164 void udelay(unsigned long usec)
166 unsigned long long tmp;
169 tmo = (usec + 9) / 10;
170 tmp = get_ticks() + tmo; /* get current timestamp */
172 while (get_ticks() < tmp)/* loop till event */