2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
15 * @defgroup GPIO_MX53 Board GPIO and Muxing Setup
19 * @file mach-mx53/iomux.c
21 * @brief I/O Muxing control functions
27 #include <asm/arch/mx53.h>
28 #include <asm/arch/mx53_pins.h>
29 #include <asm/arch/iomux.h>
32 * IOMUX register (base) addresses
35 IOMUXGPR0 = IOMUXC_BASE_ADDR,
36 IOMUXGPR1 = IOMUXC_BASE_ADDR + 0x004,
37 IOMUXGPR2 = IOMUXC_BASE_ADDR + 0x008,
38 IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR,
39 IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + MUX_I_END,
40 IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + PAD_I_START,
41 IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + INPUT_CTL_START,
44 static inline u32 _get_mux_reg(iomux_pin_name_t pin)
46 u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
48 mux_reg += IOMUXSW_MUX_CTL;
53 static inline u32 _get_pad_reg(iomux_pin_name_t pin)
55 u32 pad_reg = PIN_TO_IOMUX_PAD(pin);
57 pad_reg += IOMUXSW_PAD_CTL;
62 static inline u32 _get_mux_end(void)
64 return IOMUXSW_MUX_END;
68 * This function is used to configure a pin through the IOMUX module.
69 * FIXED ME: for backward compatible. Will be static function!
70 * @param pin a pin number as defined in \b #iomux_pin_name_t
71 * @param cfg an output function as defined in \b #iomux_pin_cfg_t
73 * @return 0 if successful; Non-zero otherwise
75 static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
77 u32 mux_reg = _get_mux_reg(pin);
79 if ((mux_reg > _get_mux_end()) || (mux_reg < IOMUXSW_MUX_CTL))
81 if (cfg == IOMUX_CONFIG_GPIO)
82 writel(PIN_TO_ALT_GPIO(pin), mux_reg);
90 * Request ownership for an IO pin. This function has to be the first one
91 * being called before that pin is used. The caller has to check the
92 * return value to make sure it returns 0.
94 * @param pin a name defined by \b iomux_pin_name_t
95 * @param cfg an input function as defined in \b #iomux_pin_cfg_t
97 * @return 0 if successful; Non-zero otherwise
99 int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
101 int ret = iomux_config_mux(pin, cfg);
107 * Release ownership for an IO pin
109 * @param pin a name defined by \b iomux_pin_name_t
110 * @param cfg an input function as defined in \b #iomux_pin_cfg_t
112 void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
117 * This function configures the pad value for a IOMUX pin.
119 * @param pin a pin number as defined in \b #iomux_pin_name_t
120 * @param config the ORed value of elements defined in \b #iomux_pad_config_t
122 void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
124 u32 pad_reg = _get_pad_reg(pin);
126 writel(config, pad_reg);
129 unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin)
131 u32 pad_reg = _get_pad_reg(pin);
133 return readl(pad_reg);
136 * This function configures input path.
138 * @param input index of input select register as defined in \b
139 * #iomux_input_select_t
140 * @param config the binary value of elements defined in \b
141 * #iomux_input_config_t
143 void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
145 u32 reg = IOMUXSW_INPUT_CTL + (input << 2);