cpu/blackfin/cpu.c

   1 /*
   2  * U-boot - cpu.c CPU specific functions
   3  *
   4  * Copyright (c) 2005-2008 Analog Devices Inc.
   5  *
   6  * (C) Copyright 2000-2004
   7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   8  *
   9  * Licensed under the GPL-2 or later.
  10  */
  11
  12 #include <common.h>
  13 #include <command.h>
  14 #include <asm/blackfin.h>
  15 #include <asm/cplb.h>
  16 #include <asm/mach-common/bits/core.h>
  17 #include <asm/mach-common/bits/ebiu.h>
  18 #include <asm/mach-common/bits/trace.h>
  19
  20 #include "cpu.h"
  21 #include "serial.h"
  22
  23 ulong bfin_poweron_retx;
  24
  25 __attribute__ ((__noreturn__))
  26 void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
  27 {
  28         /* Build a NOP slide over the LDR jump block.  Whee! */
  29         serial_early_puts("NOP Slide\n");
  30         char nops[0xC];
  31         memset(nops, 0x00, sizeof(nops));
  32         extern char _stext_l1;
  33         memcpy(&_stext_l1 - sizeof(nops), nops, sizeof(nops));
  34
  35         if (!loaded_from_ldr) {
  36                 /* Relocate sections into L1 if the LDR didn't do it -- don't
  37                  * check length because the linker script does the size
  38                  * checking at build time.
  39                  */
  40                 serial_early_puts("L1 Relocate\n");
  41                 extern char _stext_l1, _etext_l1, _stext_l1_lma;
  42                 memcpy(&_stext_l1, &_stext_l1_lma, (&_etext_l1 - &_stext_l1));
  43                 extern char _sdata_l1, _edata_l1, _sdata_l1_lma;
  44                 memcpy(&_sdata_l1, &_sdata_l1_lma, (&_edata_l1 - &_sdata_l1));
  45         }
  46 #if defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
  47         /* The BF537 bootrom will reset the EBIU_AMGCTL register on us
  48          * after it has finished loading the LDR.  So configure it again.
  49          */
  50         else
  51                 bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL);
  52 #endif
  53
  54         /* Save RETX so we can pass it while booting Linux */
  55         bfin_poweron_retx = bootflag;
  56
  57 #ifdef CONFIG_DEBUG_DUMP
  58         /* Turn on hardware trace buffer */
  59         bfin_write_TBUFCTL(TBUFPWR | TBUFEN);
  60 #endif
  61
  62 #ifndef CONFIG_PANIC_HANG
  63         /* Reset upon a double exception rather than just hanging.
  64          * Do not do bfin_read on SWRST as that will reset status bits.
  65          */
  66         bfin_write_SWRST(DOUBLE_FAULT);
  67 #endif
  68
  69         serial_early_puts("Board init flash\n");
  70         board_init_f(bootflag);
  71 }
  72
  73 int exception_init(void)
  74 {
  75         bfin_write_EVT3(trap);
  76         return 0;
  77 }
  78
  79 int irq_init(void)
  80 {
  81 #ifdef SIC_IMASK0
  82         bfin_write_SIC_IMASK0(0);
  83         bfin_write_SIC_IMASK1(0);
  84 # ifdef SIC_IMASK2
  85         bfin_write_SIC_IMASK2(0);
  86 # endif
  87 #elif defined(SICA_IMASK0)
  88         bfin_write_SICA_IMASK0(0);
  89         bfin_write_SICA_IMASK1(0);
  90 #else
  91         bfin_write_SIC_IMASK(0);
  92 #endif
  93         bfin_write_EVT2(evt_default);   /* NMI */
  94         bfin_write_EVT5(evt_default);   /* hardware error */
  95         bfin_write_EVT6(evt_default);   /* core timer */
  96         bfin_write_EVT7(evt_default);
  97         bfin_write_EVT8(evt_default);
  98         bfin_write_EVT9(evt_default);
  99         bfin_write_EVT10(evt_default);
 100         bfin_write_EVT11(evt_default);
 101         bfin_write_EVT12(evt_default);
 102         bfin_write_EVT13(evt_default);
 103         bfin_write_EVT14(evt_default);
 104         bfin_write_EVT15(evt_default);
 105         bfin_write_ILAT(0);
 106         CSYNC();
 107         /* enable hardware error irq */
 108         irq_flags = 0x3f;
 109         local_irq_enable();
 110         return 0;
 111 }