2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #ifndef CONFIG_IDENT_STRING
28 #define CONFIG_IDENT_STRING ""
37 move.w #0x2700,%sr; /* disable intrs */ \
38 subl #60,%sp; /* space for 15 regs */ \
39 moveml %d0-%d7/%a0-%a6,%sp@; \
42 moveml %sp@,%d0-%d7/%a0-%a6; \
43 addl #60,%sp; /* space for 15 regs */ \
46 /* If we come from a pre-loader we don't need an initial exception
49 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
53 * Vector table. This is used for initial platform startup.
54 * These vectors are to catch any un-intended traps.
59 .long 0x00000000, _START
61 .long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */
63 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 /* if we come from a pre-loader we have no exception table and
110 * therefore no VBR to set
112 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
113 move.l #CFG_FLASH_BASE, %d0
117 #if defined(CONFIG_M5272) || defined(CONFIG_M5249)
118 move.l #(CFG_MBAR + 1), %d0 /* set MBAR address + valid flag */
121 /*** The 5249 has MBAR2 as well ***/
123 move.l #(CFG_MBAR2 + 1), %d0 /* Get MBAR2 address */
124 movec %d0, #0xc0e /* Set MBAR2 */
127 move.l #(CFG_INIT_RAM_ADDR + 1), %d0
129 #endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
131 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
132 /* Initialize IPSBAR */
133 move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
134 move.l %d0, 0x40000000
137 /* Initialize FLASHBAR: locate internal Flash and validate it */
138 move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
142 /* Initialize RAMBAR1: locate SRAM and validate it */
143 move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
148 move.l #(_flash_setup-CFG_FLASH_BASE), %a0
149 move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
150 move.l #(CFG_INIT_RAM_ADDR), %a2
152 move.l (%a0)+, (%a2)+
155 jmp CFG_INIT_RAM_ADDR
160 /* invalidate and disable cache */
161 move.l #0x01000000, %d0 /* Invalidate cache cmd */
162 movec %d0, %CACR /* Invalidate cache */
168 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
169 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
172 move.l #__got_start, %a5 /* put relocation table address to a5 */
174 bsr cpu_init_f /* run low-level CPU init code (from flash) */
175 bsr board_init_f /* run low-level board init code (from flash) */
177 /* board_init_f() does not return */
179 /*------------------------------------------------------------------------------*/
184 move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
185 move.w %d0, 0x40000080
188 move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */
189 move.w %d0, 0x4000008A
192 move.l #0x001f0001, %d0 /* 2 MB, valid */
193 move.l %d0, 0x40000084
195 jmp _after_flash_copy.L
200 * void relocate_code (addr_sp, gd, addr_moni)
202 * This "function" does not return, instead it continues in RAM
203 * after relocating the monitor code.
207 * r5 = length in bytes
213 move.l 8(%a6), %sp /* set new stack pointer */
215 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
216 move.l 16(%a6), %a0 /* Save copy of Destination Address */
218 move.l #CFG_MONITOR_BASE, %a1
219 move.l #__init_end, %a2
222 /* copy the code to RAM */
224 move.l (%a1)+, (%a3)+
229 * We are done. Do not return, instead branch to second part of board
230 * initialization, now running from RAM.
233 add.l #(in_ram - CFG_MONITOR_BASE), %a1
240 * Now clear BSS segment
243 add.l #(_sbss - CFG_MONITOR_BASE),%a1
245 add.l #(_ebss - CFG_MONITOR_BASE),%d1
252 * fix got table in RAM
255 add.l #(__got_start - CFG_MONITOR_BASE),%a1
256 move.l %a1,%a5 /* * fix got pointer register a5 */
259 add.l #(__got_end - CFG_MONITOR_BASE),%a2
269 /* calculate relative jump to board_init_r in ram */
271 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
273 /* set parameters for board_init_r */
274 move.l %a0,-(%sp) /* dest_addr */
275 move.l %d0,-(%sp) /* gd */
278 /*------------------------------------------------------------------------------*/
300 /*------------------------------------------------------------------------------*/
301 /* cache functions */
305 move.l #0x01000000, %d0 /* Invalidate cache cmd */
306 movec %d0, %CACR /* Invalidate cache */
307 move.l #0x0000c000, %d0 /* Setup cache mask */
308 movec %d0, %ACR0 /* Enable cache */
309 move.l #0xff00c000, %d0 /* Setup cache mask */
310 movec %d0, %ACR1 /* Enable cache */
311 move.l #0x80000100, %d0 /* Setup cache mask */
312 movec %d0, %CACR /* Enable cache */
314 move.l %d0, icache_state
321 move.l #0x01000000, %d0 /* Invalidate cache cmd */
322 movec %d0, %CACR /* Invalidate cache */
323 move.l #0x0000c000, %d0 /* Setup cache mask */
324 movec %d0, %ACR0 /* Enable cache */
325 move.l #0xff00c000, %d0 /* Setup cache mask */
326 movec %d0, %ACR1 /* Enable cache */
327 move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
328 movec %d0, %CACR /* Enable cache */
330 move.l %d0, icache_state
338 * Note: The 5249 Documentation doesn't give a bit position for CINV!
339 * From the 5272 and the 5307 documentation, I have deduced that it is
340 * probably CACR[24]. Should someone say something to Motorola?
343 move.l #0x01000000, %d0 /* Invalidate whole cache */
345 move.l #0xff00c000, %d0 /* Set FLASH cachable: always match (SM=0b10) */
347 move.l #0x0000c000, %d0 /* Set SDRAM cachable: always match (SM=0b10) */
349 move.l #0x90000200, %d0 /* Set cache enable cmd */
352 move.l %d0, icache_state
356 .globl icache_disable
358 move.l #0x00000100, %d0 /* Setup cache mask */
359 movec %d0, %CACR /* Enable cache */
360 clr.l %d0 /* Setup cache mask */
361 movec %d0, %ACR0 /* Enable cache */
362 movec %d0, %ACR1 /* Enable cache */
364 move.l %d0, icache_state
369 move.l icache_state, %d0
377 /*------------------------------------------------------------------------------*/
379 .globl version_string
381 .ascii U_BOOT_VERSION
382 .ascii " (", __DATE__, " - ", __TIME__, ")"
383 .ascii CONFIG_IDENT_STRING, "\0"