2 # Copyright (C) 2015 Google. Inc
3 # Written by Simon Glass <sjg@chromium.org>
5 # SPDX-License-Identifier: GPL-2.0+
11 There are several repositories available with versions of U-Boot that support
12 many Rockchip devices [1] [2].
14 The current mainline support is experimental only and is not useful for
15 anything. It should provide a base on which to build.
17 So far only support for the RK3288 is provided.
25 - Firefly RK3288 baord
26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
39 At present three RK3288 boards are supported:
41 - Firefly RK3288 - use firefly-rk3288 configuration
42 - Radxa Rock Pro - also uses firefly-rk3288 configuration
43 - Haier Chromebook - use chromebook_jerry configuration
47 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
49 (or you can use another cross compiler if you prefer)
51 Note that the Radxa Rock Pro uses the Firefly configuration for now as
52 device tree files are not yet available for the Rock Pro. Clearly the two
53 have hardware differences, so this approach will break down as more drivers
57 Writing to the board with USB
58 =============================
60 For USB to work you must get your board into ROM boot mode, either by erasing
61 your MMC or (perhaps) holding the recovery button when you boot the board.
62 To erase your MMC, you can boot into Linux and type (as root)
64 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
66 Connect your board's OTG port to your computer.
68 To create a suitable image and write it to the board:
70 ./firefly-rk3288/tools/mkimage -T rkimage -d ./firefly-rk3288/spl/u-boot-spl-dtb.bin out
71 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
73 If all goes well you should something like:
75 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
76 Card did not respond to voltage select!
77 spl: mmc init failed with error: -17
78 ### ERROR ### Please RESET the board ###
80 You will need to reset the board before each time you try. Yes, that's all
81 it does so far. If support for the Rockchip USB protocol or DFU were added
82 in SPL then we could in principle load U-Boot and boot to a prompt from USB
83 as several other platforms do. However it does not seem to be possible to
84 use the existing boot ROM code from SPL.
87 Booting from an SD card
88 =======================
90 To write an image that boots from an SD card (assumed to be /dev/sdc):
92 ./firefly-rk3288/tools/mkimage -T rksd -d firefly-rk3288/spl/u-boot-spl-dtb.bin out
93 sudo dd if=out of=/dev/sdc
94 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
96 This puts the Rockchip header and SPL image first and then places the U-Boot
97 image at block 256 (i.e. 128KB from the start of the SD card). This
98 corresponds with this setting in U-Boot:
100 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
102 Put this SD (or micro-SD) card into your board and reset it. You should see
105 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40)
108 U-Boot 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40)
112 Using default environment
123 To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
125 ./chromebook_jerry/tools/mkimage -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out
126 dd if=spl.bin of=out.bin bs=128K conv=sync
127 cat chromebook_jerry/u-boot-dtb.img out.bin
128 dd if=out.bin of=out.bin.pad bs=4M conv=sync
130 This converts the SPL image to the required SPI format by adding the Rockchip
131 header and skipping every 2KB block. Then the U-Boot image is written at
132 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
133 The position of U-Boot is controlled with this setting in U-Boot:
135 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
137 If you have a Dediprog em100pro connected then you can write the image with:
139 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
141 When booting you should see something like:
143 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
146 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
151 Using default environment
162 Immediate priorities are:
164 - MMC support (in U-Boot itself)
165 - GPIO (driver exists but is lightly tested)
166 - I2C (driver exists but is non-functional)
169 - PMIC and regulators (only ACT8846 is supported at present)
171 - Run CPU at full speed
174 - Support for other Rockchip parts
175 - Boot U-Boot proper over USB OTG (at present only SPL works)
181 There are plenty of patches in the links below to help with this work.
183 [1] https://github.com/rkchrome/uboot.git
184 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
185 [3] https://github.com/linux-rockchip/rkflashtool.git
186 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
191 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
192 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
193 followed by u-boot-spl-dtb.bin.
195 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
196 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
201 rksd.c produces an image consisting of 32KB of empty space, a header and
202 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
203 most of the fields are unused by U-Boot. We just need to specify the
204 signature, a flag and the block offset and size of the SPL image.
206 The header occupies a single block but we pad it out to 4 blocks. The header
207 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
208 image can be encoded too but we don't do that.
210 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
211 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
212 around this limitation, since there is plenty of SRAM, but at present the
213 board refuses to boot if this limit is exceeded.
215 The image produced is padded up to a block boundary (512 bytes). It should be
216 written to the start of an SD card using dd.
218 Since this image is set to load U-Boot from the SD card at block offset,
219 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
220 u-boot-dtb.img to the SD card at that offset. See above for instructions.
225 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
226 resulting image is then spread out so that only the first 2KB of each 4KB
227 sector is used. The header is the same as with rksd and the maximum size is
228 also 32KB (before spreading). The image should be written to the start of
231 See above for instructions on how to write a SPI image.
234 Device tree and driver model
235 ----------------------------
237 Where possible driver model is used to provide a structure to the
238 functionality. Device tree is used for configuration. However these have an
239 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
240 In general all Rockchip drivers should use these features, with SPL-specific
241 modifications where required.
245 Simon Glass <sjg@chromium.org>