2 * pata_atiixp.c - ATI PATA for new ATA layer
4 * (C) 2009 Bartlomiej Zolnierkiewicz
8 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
10 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
11 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/init.h>
19 #include <linux/blkdev.h>
20 #include <linux/delay.h>
21 #include <scsi/scsi_host.h>
22 #include <linux/libata.h>
24 #define DRV_NAME "pata_atiixp"
25 #define DRV_VERSION "0.4.6"
28 ATIIXP_IDE_PIO_TIMING = 0x40,
29 ATIIXP_IDE_MWDMA_TIMING = 0x44,
30 ATIIXP_IDE_PIO_CONTROL = 0x48,
31 ATIIXP_IDE_PIO_MODE = 0x4a,
32 ATIIXP_IDE_UDMA_CONTROL = 0x54,
33 ATIIXP_IDE_UDMA_MODE = 0x56
36 static int atiixp_cable_detect(struct ata_port *ap)
38 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
41 /* Hack from drivers/ide/pci. Really we want to know how to do the
42 raw detection not play follow the bios mode guess */
43 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
44 if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
45 return ATA_CBL_PATA80;
46 return ATA_CBL_PATA40;
50 * atiixp_set_pio_timing - set initial PIO mode data
54 * Called by both the pio and dma setup functions to set the controller
55 * timings for PIO transfers. We must load both the mode number and
56 * timing values into the controller.
59 static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
61 static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
63 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
64 int dn = 2 * ap->port_no + adev->devno;
65 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
69 pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
70 pio_mode_data &= ~(0x7 << (4 * dn));
71 pio_mode_data |= pio << (4 * dn);
72 pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
74 pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
75 pio_timing_data &= ~(0xFF << timing_shift);
76 pio_timing_data |= (pio_timings[pio] << timing_shift);
77 pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
81 * atiixp_set_piomode - set initial PIO mode data
85 * Called to do the PIO mode setup. We use a shared helper for this
86 * as the DMA setup must also adjust the PIO timing information.
89 static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
91 atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
95 * atiixp_set_dmamode - set initial DMA mode data
99 * Called to do the DMA mode setup. We use timing tables for most
100 * modes but must tune an appropriate PIO mode to match.
103 static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
105 static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
107 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
108 int dma = adev->dma_mode;
109 int dn = 2 * ap->port_no + adev->devno;
112 if (adev->dma_mode >= XFER_UDMA_0) {
117 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
118 udma_mode_data &= ~(0x7 << (4 * dn));
119 udma_mode_data |= dma << (4 * dn);
120 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
122 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
123 u32 mwdma_timing_data;
125 dma -= XFER_MW_DMA_0;
127 pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
129 mwdma_timing_data &= ~(0xFF << timing_shift);
130 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
131 pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
135 * We must now look at the PIO mode situation. We may need to
136 * adjust the PIO mode to keep the timings acceptable
138 if (adev->dma_mode >= XFER_MW_DMA_2)
140 else if (adev->dma_mode == XFER_MW_DMA_1)
142 else if (adev->dma_mode == XFER_MW_DMA_0)
146 if (adev->pio_mode != wanted_pio)
147 atiixp_set_pio_timing(ap, adev, wanted_pio);
151 * atiixp_bmdma_start - DMA start callback
152 * @qc: Command in progress
154 * When DMA begins we need to ensure that the UDMA control
155 * register for the channel is correctly set.
157 * Note: The host lock held by the libata layer protects
158 * us from two channels both trying to set DMA bits at once
161 static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
163 struct ata_port *ap = qc->ap;
164 struct ata_device *adev = qc->dev;
166 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
167 int dn = (2 * ap->port_no) + adev->devno;
170 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
171 if (ata_using_udma(adev))
175 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
180 * atiixp_dma_stop - DMA stop callback
181 * @qc: Command in progress
183 * DMA has completed. Clear the UDMA flag as the next operations will
184 * be PIO ones not UDMA data transfer.
186 * Note: The host lock held by the libata layer protects
187 * us from two channels both trying to set DMA bits at once
190 static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
192 struct ata_port *ap = qc->ap;
193 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
194 int dn = (2 * ap->port_no) + qc->dev->devno;
197 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
199 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
203 static struct scsi_host_template atiixp_sht = {
204 ATA_BMDMA_SHT(DRV_NAME),
205 .sg_tablesize = LIBATA_DUMB_MAX_PRD,
208 static struct ata_port_operations atiixp_port_ops = {
209 .inherits = &ata_bmdma_port_ops,
211 .qc_prep = ata_sff_dumb_qc_prep,
212 .bmdma_start = atiixp_bmdma_start,
213 .bmdma_stop = atiixp_bmdma_stop,
215 .cable_detect = atiixp_cable_detect,
216 .set_piomode = atiixp_set_piomode,
217 .set_dmamode = atiixp_set_dmamode,
220 static int atiixp_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
222 static const struct ata_port_info info = {
223 .flags = ATA_FLAG_SLAVE_POSS,
224 .pio_mask = ATA_PIO4,
225 .mwdma_mask = ATA_MWDMA12_ONLY,
226 .udma_mask = ATA_UDMA5,
227 .port_ops = &atiixp_port_ops
229 static const struct pci_bits atiixp_enable_bits[] = {
230 { 0x48, 1, 0x01, 0x00 },
231 { 0x48, 1, 0x08, 0x00 }
233 const struct ata_port_info *ppi[] = { &info, &info };
236 for (i = 0; i < 2; i++)
237 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[i]))
238 ppi[i] = &ata_dummy_port_info;
240 return ata_pci_sff_init_one(pdev, ppi, &atiixp_sht, NULL);
243 static const struct pci_device_id atiixp[] = {
244 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
245 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
246 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
247 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
248 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), },
249 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), },
254 static struct pci_driver atiixp_pci_driver = {
257 .probe = atiixp_init_one,
258 .remove = ata_pci_remove_one,
260 .resume = ata_pci_device_resume,
261 .suspend = ata_pci_device_suspend,
265 static int __init atiixp_init(void)
267 return pci_register_driver(&atiixp_pci_driver);
271 static void __exit atiixp_exit(void)
273 pci_unregister_driver(&atiixp_pci_driver);
276 MODULE_AUTHOR("Alan Cox");
277 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
278 MODULE_LICENSE("GPL");
279 MODULE_DEVICE_TABLE(pci, atiixp);
280 MODULE_VERSION(DRV_VERSION);
282 module_init(atiixp_init);
283 module_exit(atiixp_exit);