2 A FORE Systems 200E-series driver for ATM on Linux.
3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
7 This driver simultaneously supports PCA-200E and SBA-200E adapters
8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/init.h>
29 #include <linux/capability.h>
30 #include <linux/interrupt.h>
31 #include <linux/bitops.h>
32 #include <linux/pci.h>
33 #include <linux/module.h>
34 #include <linux/atmdev.h>
35 #include <linux/sonet.h>
36 #include <linux/atm_suni.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/delay.h>
39 #include <linux/firmware.h>
41 #include <asm/string.h>
45 #include <asm/byteorder.h>
46 #include <asm/uaccess.h>
47 #include <asm/atomic.h>
51 #include <linux/of_device.h>
52 #include <asm/idprom.h>
53 #include <asm/openprom.h>
54 #include <asm/oplib.h>
55 #include <asm/pgtable.h>
58 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
59 #define FORE200E_USE_TASKLET
62 #if 0 /* enable the debugging code of the buffer supply queues */
63 #define FORE200E_BSQ_DEBUG
66 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
67 #define FORE200E_52BYTE_AAL0_SDU
73 #define FORE200E_VERSION "0.3e"
75 #define FORE200E "fore200e: "
77 #if 0 /* override .config */
78 #define CONFIG_ATM_FORE200E_DEBUG 1
80 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
84 #define DPRINTK(level, format, args...) do {} while (0)
88 #define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
91 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
93 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
95 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
98 #define ASSERT(expr) if (!(expr)) { \
99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
100 __func__, __LINE__, #expr); \
101 panic(FORE200E "%s", __func__); \
104 #define ASSERT(expr) do {} while (0)
108 static const struct atmdev_ops fore200e_ops;
109 static const struct fore200e_bus fore200e_bus[];
111 static LIST_HEAD(fore200e_boards);
114 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
115 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
116 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
119 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
120 { BUFFER_S1_NBR, BUFFER_L1_NBR },
121 { BUFFER_S2_NBR, BUFFER_L2_NBR }
124 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
130 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
131 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
135 #if 0 /* currently unused */
137 fore200e_fore2atm_aal(enum fore200e_aal aal)
140 case FORE200E_AAL0: return ATM_AAL0;
141 case FORE200E_AAL34: return ATM_AAL34;
142 case FORE200E_AAL5: return ATM_AAL5;
150 static enum fore200e_aal
151 fore200e_atm2fore_aal(int aal)
154 case ATM_AAL0: return FORE200E_AAL0;
155 case ATM_AAL34: return FORE200E_AAL34;
158 case ATM_AAL5: return FORE200E_AAL5;
166 fore200e_irq_itoa(int irq)
169 sprintf(str, "%d", irq);
174 /* allocate and align a chunk of memory intended to hold the data behing exchanged
175 between the driver and the adapter (using streaming DVMA) */
178 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
180 unsigned long offset = 0;
182 if (alignment <= sizeof(int))
185 chunk->alloc_size = size + alignment;
186 chunk->align_size = size;
187 chunk->direction = direction;
189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
190 if (chunk->alloc_addr == NULL)
194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
196 chunk->align_addr = chunk->alloc_addr + offset;
198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
204 /* free a chunk of memory */
207 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
211 kfree(chunk->alloc_addr);
216 fore200e_spin(int msecs)
218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
219 while (time_before(jiffies, timeout));
224 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
234 } while (time_before(jiffies, timeout));
238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
248 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
254 if ((ok = (fore200e->bus->read(addr) == val)))
257 } while (time_before(jiffies, timeout));
261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
262 fore200e->bus->read(addr), val);
271 fore200e_free_rx_buf(struct fore200e* fore200e)
273 int scheme, magn, nbr;
274 struct buffer* buffer;
276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
283 struct chunk* data = &buffer[ nbr ].data;
285 if (data->alloc_addr != NULL)
286 fore200e_chunk_free(fore200e, data);
295 fore200e_uninit_bs_queue(struct fore200e* fore200e)
299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
305 if (status->alloc_addr)
306 fore200e->bus->dma_chunk_free(fore200e, status);
308 if (rbd_block->alloc_addr)
309 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
316 fore200e_reset(struct fore200e* fore200e, int diag)
320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
324 fore200e->bus->reset(fore200e);
327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
330 printk(FORE200E "device %s self-test failed\n", fore200e->name);
334 printk(FORE200E "device %s self-test passed\n", fore200e->name);
336 fore200e->state = FORE200E_STATE_RESET;
344 fore200e_shutdown(struct fore200e* fore200e)
346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
347 fore200e->name, fore200e->phys_base,
348 fore200e_irq_itoa(fore200e->irq));
350 if (fore200e->state > FORE200E_STATE_RESET) {
351 /* first, reset the board to prevent further interrupts or data transfers */
352 fore200e_reset(fore200e, 0);
355 /* then, release all allocated resources */
356 switch(fore200e->state) {
358 case FORE200E_STATE_COMPLETE:
359 kfree(fore200e->stats);
361 case FORE200E_STATE_IRQ:
362 free_irq(fore200e->irq, fore200e->atm_dev);
364 case FORE200E_STATE_ALLOC_BUF:
365 fore200e_free_rx_buf(fore200e);
367 case FORE200E_STATE_INIT_BSQ:
368 fore200e_uninit_bs_queue(fore200e);
370 case FORE200E_STATE_INIT_RXQ:
371 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
372 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
374 case FORE200E_STATE_INIT_TXQ:
375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
378 case FORE200E_STATE_INIT_CMDQ:
379 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
381 case FORE200E_STATE_INITIALIZE:
382 /* nothing to do for that state */
384 case FORE200E_STATE_START_FW:
385 /* nothing to do for that state */
387 case FORE200E_STATE_RESET:
388 /* nothing to do for that state */
390 case FORE200E_STATE_MAP:
391 fore200e->bus->unmap(fore200e);
393 case FORE200E_STATE_CONFIGURE:
394 /* nothing to do for that state */
396 case FORE200E_STATE_REGISTER:
397 /* XXX shouldn't we *start* by deregistering the device? */
398 atm_dev_deregister(fore200e->atm_dev);
400 case FORE200E_STATE_BLANK:
401 /* nothing to do for that state */
409 static u32 fore200e_pca_read(volatile u32 __iomem *addr)
411 /* on big-endian hosts, the board is configured to convert
412 the endianess of slave RAM accesses */
413 return le32_to_cpu(readl(addr));
417 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
419 /* on big-endian hosts, the board is configured to convert
420 the endianess of slave RAM accesses */
421 writel(cpu_to_le32(val), addr);
426 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
428 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
430 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
431 virt_addr, size, direction, dma_addr);
438 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
440 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
441 dma_addr, size, direction);
443 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
448 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
450 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
452 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
456 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
460 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
464 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
465 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
468 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
469 int size, int nbr, int alignment)
471 /* returned chunks are page-aligned */
472 chunk->alloc_size = size * nbr;
473 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
477 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
480 chunk->align_addr = chunk->alloc_addr;
486 /* free a DMA consistent chunk of memory */
489 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
491 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
499 fore200e_pca_irq_check(struct fore200e* fore200e)
501 /* this is a 1 bit register */
502 int irq_posted = readl(fore200e->regs.pca.psr);
504 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
505 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
506 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
515 fore200e_pca_irq_ack(struct fore200e* fore200e)
517 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
522 fore200e_pca_reset(struct fore200e* fore200e)
524 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
526 writel(0, fore200e->regs.pca.hcr);
531 fore200e_pca_map(struct fore200e* fore200e)
533 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
535 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
537 if (fore200e->virt_base == NULL) {
538 printk(FORE200E "can't map device %s\n", fore200e->name);
542 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
544 /* gain access to the PCA specific registers */
545 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
546 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
547 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
549 fore200e->state = FORE200E_STATE_MAP;
555 fore200e_pca_unmap(struct fore200e* fore200e)
557 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
559 if (fore200e->virt_base != NULL)
560 iounmap(fore200e->virt_base);
565 fore200e_pca_configure(struct fore200e* fore200e)
567 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
568 u8 master_ctrl, latency;
570 DPRINTK(2, "device %s being configured\n", fore200e->name);
572 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
573 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
577 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
579 master_ctrl = master_ctrl
580 #if defined(__BIG_ENDIAN)
581 /* request the PCA board to convert the endianess of slave RAM accesses */
582 | PCA200E_CTRL_CONVERT_ENDIAN
585 | PCA200E_CTRL_DIS_CACHE_RD
586 | PCA200E_CTRL_DIS_WRT_INVAL
587 | PCA200E_CTRL_ENA_CONT_REQ_MODE
588 | PCA200E_CTRL_2_CACHE_WRT_INVAL
590 | PCA200E_CTRL_LARGE_PCI_BURSTS;
592 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
594 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
595 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
596 this may impact the performances of other PCI devices on the same bus, though */
598 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
600 fore200e->state = FORE200E_STATE_CONFIGURE;
606 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
608 struct host_cmdq* cmdq = &fore200e->host_cmdq;
609 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
610 struct prom_opcode opcode;
614 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
616 opcode.opcode = OPCODE_GET_PROM;
619 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
621 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
623 *entry->status = STATUS_PENDING;
625 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
627 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
629 *entry->status = STATUS_FREE;
631 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
634 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
638 #if defined(__BIG_ENDIAN)
640 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
642 /* MAC address is stored as little-endian */
643 swap_here(&prom->mac_addr[0]);
644 swap_here(&prom->mac_addr[4]);
652 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
654 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
656 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
657 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
660 #endif /* CONFIG_PCI */
665 static u32 fore200e_sba_read(volatile u32 __iomem *addr)
667 return sbus_readl(addr);
670 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
672 sbus_writel(val, addr);
675 static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
677 struct platform_device *op = fore200e->bus_dev;
680 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
682 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
683 virt_addr, size, direction, dma_addr);
688 static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
690 struct platform_device *op = fore200e->bus_dev;
692 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
693 dma_addr, size, direction);
695 dma_unmap_single(&op->dev, dma_addr, size, direction);
698 static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
700 struct platform_device *op = fore200e->bus_dev;
702 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
704 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
707 static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
709 struct platform_device *op = fore200e->bus_dev;
711 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
713 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
716 /* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
717 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
719 static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
720 int size, int nbr, int alignment)
722 struct platform_device *op = fore200e->bus_dev;
724 chunk->alloc_size = chunk->align_size = size * nbr;
726 /* returned chunks are page-aligned */
727 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
728 &chunk->dma_addr, GFP_ATOMIC);
730 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
733 chunk->align_addr = chunk->alloc_addr;
738 /* free a DVMA consistent chunk of memory */
739 static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
741 struct platform_device *op = fore200e->bus_dev;
743 dma_free_coherent(&op->dev, chunk->alloc_size,
744 chunk->alloc_addr, chunk->dma_addr);
747 static void fore200e_sba_irq_enable(struct fore200e *fore200e)
749 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
750 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
753 static int fore200e_sba_irq_check(struct fore200e *fore200e)
755 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
758 static void fore200e_sba_irq_ack(struct fore200e *fore200e)
760 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
761 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
764 static void fore200e_sba_reset(struct fore200e *fore200e)
766 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
768 fore200e->bus->write(0, fore200e->regs.sba.hcr);
771 static int __init fore200e_sba_map(struct fore200e *fore200e)
773 struct platform_device *op = fore200e->bus_dev;
776 /* gain access to the SBA specific registers */
777 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
778 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
779 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
780 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
782 if (!fore200e->virt_base) {
783 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
787 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
789 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
791 /* get the supported DVMA burst sizes */
792 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
794 if (sbus_can_dma_64bit())
795 sbus_set_sbus64(&op->dev, bursts);
797 fore200e->state = FORE200E_STATE_MAP;
801 static void fore200e_sba_unmap(struct fore200e *fore200e)
803 struct platform_device *op = fore200e->bus_dev;
805 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
806 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
807 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
808 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
811 static int __init fore200e_sba_configure(struct fore200e *fore200e)
813 fore200e->state = FORE200E_STATE_CONFIGURE;
817 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
819 struct platform_device *op = fore200e->bus_dev;
823 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
826 memcpy(&prom->mac_addr[4], prop, 4);
828 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
831 memcpy(&prom->mac_addr[2], prop, 4);
833 prom->serial_number = of_getintprop_default(op->dev.of_node,
835 prom->hw_revision = of_getintprop_default(op->dev.of_node,
841 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
843 struct platform_device *op = fore200e->bus_dev;
844 const struct linux_prom_registers *regs;
846 regs = of_get_property(op->dev.of_node, "reg", NULL);
848 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
849 (regs ? regs->which_io : 0), op->dev.of_node->name);
851 #endif /* CONFIG_SBUS */
855 fore200e_tx_irq(struct fore200e* fore200e)
857 struct host_txq* txq = &fore200e->host_txq;
858 struct host_txq_entry* entry;
860 struct fore200e_vc_map* vc_map;
862 if (fore200e->host_txq.txing == 0)
867 entry = &txq->host_entry[ txq->tail ];
869 if ((*entry->status & STATUS_COMPLETE) == 0) {
873 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
874 entry, txq->tail, entry->vc_map, entry->skb);
876 /* free copy of misaligned data */
879 /* remove DMA mapping */
880 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
883 vc_map = entry->vc_map;
885 /* vcc closed since the time the entry was submitted for tx? */
886 if ((vc_map->vcc == NULL) ||
887 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
889 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
890 fore200e->atm_dev->number);
892 dev_kfree_skb_any(entry->skb);
897 /* vcc closed then immediately re-opened? */
898 if (vc_map->incarn != entry->incarn) {
900 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
901 if the same vcc is immediately re-opened, those pending PDUs must
902 not be popped after the completion of their emission, as they refer
903 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
904 would be decremented by the size of the (unrelated) skb, possibly
905 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
906 we thus bind the tx entry to the current incarnation of the vcc
907 when the entry is submitted for tx. When the tx later completes,
908 if the incarnation number of the tx entry does not match the one
909 of the vcc, then this implies that the vcc has been closed then re-opened.
910 we thus just drop the skb here. */
912 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
913 fore200e->atm_dev->number);
915 dev_kfree_skb_any(entry->skb);
921 /* notify tx completion */
923 vcc->pop(vcc, entry->skb);
926 dev_kfree_skb_any(entry->skb);
929 /* race fixed by the above incarnation mechanism, but... */
930 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
931 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
934 /* check error condition */
935 if (*entry->status & STATUS_ERROR)
936 atomic_inc(&vcc->stats->tx_err);
938 atomic_inc(&vcc->stats->tx);
942 *entry->status = STATUS_FREE;
944 fore200e->host_txq.txing--;
946 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
951 #ifdef FORE200E_BSQ_DEBUG
952 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
954 struct buffer* buffer;
957 buffer = bsq->freebuf;
960 if (buffer->supplied) {
961 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
962 where, scheme, magn, buffer->index);
965 if (buffer->magn != magn) {
966 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
967 where, scheme, magn, buffer->index, buffer->magn);
970 if (buffer->scheme != scheme) {
971 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
972 where, scheme, magn, buffer->index, buffer->scheme);
975 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
976 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
977 where, scheme, magn, buffer->index);
981 buffer = buffer->next;
984 if (count != bsq->freebuf_count) {
985 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
986 where, scheme, magn, count, bsq->freebuf_count);
994 fore200e_supply(struct fore200e* fore200e)
998 struct host_bsq* bsq;
999 struct host_bsq_entry* entry;
1000 struct buffer* buffer;
1002 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1003 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1005 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1007 #ifdef FORE200E_BSQ_DEBUG
1008 bsq_audit(1, bsq, scheme, magn);
1010 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1012 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1013 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1015 entry = &bsq->host_entry[ bsq->head ];
1017 for (i = 0; i < RBD_BLK_SIZE; i++) {
1019 /* take the first buffer in the free buffer list */
1020 buffer = bsq->freebuf;
1022 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1023 scheme, magn, bsq->freebuf_count);
1026 bsq->freebuf = buffer->next;
1028 #ifdef FORE200E_BSQ_DEBUG
1029 if (buffer->supplied)
1030 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1031 scheme, magn, buffer->index);
1032 buffer->supplied = 1;
1034 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1035 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1038 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1040 /* decrease accordingly the number of free rx buffers */
1041 bsq->freebuf_count -= RBD_BLK_SIZE;
1043 *entry->status = STATUS_PENDING;
1044 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1052 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1054 struct sk_buff* skb;
1055 struct buffer* buffer;
1056 struct fore200e_vcc* fore200e_vcc;
1058 #ifdef FORE200E_52BYTE_AAL0_SDU
1059 u32 cell_header = 0;
1064 fore200e_vcc = FORE200E_VCC(vcc);
1065 ASSERT(fore200e_vcc);
1067 #ifdef FORE200E_52BYTE_AAL0_SDU
1068 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1070 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1071 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1072 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1073 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1074 rpd->atm_header.clp;
1079 /* compute total PDU length */
1080 for (i = 0; i < rpd->nseg; i++)
1081 pdu_len += rpd->rsd[ i ].length;
1083 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1085 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1087 atomic_inc(&vcc->stats->rx_drop);
1091 __net_timestamp(skb);
1093 #ifdef FORE200E_52BYTE_AAL0_SDU
1095 *((u32*)skb_put(skb, 4)) = cell_header;
1099 /* reassemble segments */
1100 for (i = 0; i < rpd->nseg; i++) {
1102 /* rebuild rx buffer address from rsd handle */
1103 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1105 /* Make device DMA transfer visible to CPU. */
1106 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1108 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1110 /* Now let the device get at it again. */
1111 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1114 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1116 if (pdu_len < fore200e_vcc->rx_min_pdu)
1117 fore200e_vcc->rx_min_pdu = pdu_len;
1118 if (pdu_len > fore200e_vcc->rx_max_pdu)
1119 fore200e_vcc->rx_max_pdu = pdu_len;
1120 fore200e_vcc->rx_pdu++;
1123 if (atm_charge(vcc, skb->truesize) == 0) {
1125 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1126 vcc->itf, vcc->vpi, vcc->vci);
1128 dev_kfree_skb_any(skb);
1130 atomic_inc(&vcc->stats->rx_drop);
1134 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1136 vcc->push(vcc, skb);
1137 atomic_inc(&vcc->stats->rx);
1139 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1146 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1148 struct host_bsq* bsq;
1149 struct buffer* buffer;
1152 for (i = 0; i < rpd->nseg; i++) {
1154 /* rebuild rx buffer address from rsd handle */
1155 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1157 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1159 #ifdef FORE200E_BSQ_DEBUG
1160 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1162 if (buffer->supplied == 0)
1163 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1164 buffer->scheme, buffer->magn, buffer->index);
1165 buffer->supplied = 0;
1168 /* re-insert the buffer into the free buffer list */
1169 buffer->next = bsq->freebuf;
1170 bsq->freebuf = buffer;
1172 /* then increment the number of free rx buffers */
1173 bsq->freebuf_count++;
1179 fore200e_rx_irq(struct fore200e* fore200e)
1181 struct host_rxq* rxq = &fore200e->host_rxq;
1182 struct host_rxq_entry* entry;
1183 struct atm_vcc* vcc;
1184 struct fore200e_vc_map* vc_map;
1188 entry = &rxq->host_entry[ rxq->head ];
1190 /* no more received PDUs */
1191 if ((*entry->status & STATUS_COMPLETE) == 0)
1194 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1196 if ((vc_map->vcc == NULL) ||
1197 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1199 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1200 fore200e->atm_dev->number,
1201 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1207 if ((*entry->status & STATUS_ERROR) == 0) {
1209 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1212 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1213 fore200e->atm_dev->number,
1214 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1215 atomic_inc(&vcc->stats->rx_err);
1219 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1221 fore200e_collect_rpd(fore200e, entry->rpd);
1223 /* rewrite the rpd address to ack the received PDU */
1224 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1225 *entry->status = STATUS_FREE;
1227 fore200e_supply(fore200e);
1232 #ifndef FORE200E_USE_TASKLET
1234 fore200e_irq(struct fore200e* fore200e)
1236 unsigned long flags;
1238 spin_lock_irqsave(&fore200e->q_lock, flags);
1239 fore200e_rx_irq(fore200e);
1240 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1242 spin_lock_irqsave(&fore200e->q_lock, flags);
1243 fore200e_tx_irq(fore200e);
1244 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1250 fore200e_interrupt(int irq, void* dev)
1252 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1254 if (fore200e->bus->irq_check(fore200e) == 0) {
1256 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1259 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1261 #ifdef FORE200E_USE_TASKLET
1262 tasklet_schedule(&fore200e->tx_tasklet);
1263 tasklet_schedule(&fore200e->rx_tasklet);
1265 fore200e_irq(fore200e);
1268 fore200e->bus->irq_ack(fore200e);
1273 #ifdef FORE200E_USE_TASKLET
1275 fore200e_tx_tasklet(unsigned long data)
1277 struct fore200e* fore200e = (struct fore200e*) data;
1278 unsigned long flags;
1280 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1282 spin_lock_irqsave(&fore200e->q_lock, flags);
1283 fore200e_tx_irq(fore200e);
1284 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1289 fore200e_rx_tasklet(unsigned long data)
1291 struct fore200e* fore200e = (struct fore200e*) data;
1292 unsigned long flags;
1294 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1296 spin_lock_irqsave(&fore200e->q_lock, flags);
1297 fore200e_rx_irq((struct fore200e*) data);
1298 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1304 fore200e_select_scheme(struct atm_vcc* vcc)
1306 /* fairly balance the VCs over (identical) buffer schemes */
1307 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1309 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1310 vcc->itf, vcc->vpi, vcc->vci, scheme);
1317 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1319 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1320 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1321 struct activate_opcode activ_opcode;
1322 struct deactivate_opcode deactiv_opcode;
1325 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1327 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1330 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1332 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1333 activ_opcode.aal = aal;
1334 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1335 activ_opcode.pad = 0;
1338 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1339 deactiv_opcode.pad = 0;
1342 vpvc.vci = vcc->vci;
1343 vpvc.vpi = vcc->vpi;
1345 *entry->status = STATUS_PENDING;
1349 #ifdef FORE200E_52BYTE_AAL0_SDU
1352 /* the MTU is not used by the cp, except in the case of AAL0 */
1353 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1354 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1355 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1358 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1359 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1362 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1364 *entry->status = STATUS_FREE;
1367 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1368 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1372 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1373 activate ? "open" : "clos");
1379 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1382 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1384 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1386 /* compute the data cells to idle cells ratio from the tx PCR */
1387 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1388 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1391 /* disable rate control */
1392 rate->data_cells = rate->idle_cells = 0;
1398 fore200e_open(struct atm_vcc *vcc)
1400 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1401 struct fore200e_vcc* fore200e_vcc;
1402 struct fore200e_vc_map* vc_map;
1403 unsigned long flags;
1405 short vpi = vcc->vpi;
1407 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1408 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1410 spin_lock_irqsave(&fore200e->q_lock, flags);
1412 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1415 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1417 printk(FORE200E "VC %d.%d.%d already in use\n",
1418 fore200e->atm_dev->number, vpi, vci);
1425 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1427 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1428 if (fore200e_vcc == NULL) {
1433 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1434 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1435 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1436 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1437 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1438 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1439 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1441 /* pseudo-CBR bandwidth requested? */
1442 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1444 mutex_lock(&fore200e->rate_mtx);
1445 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1446 mutex_unlock(&fore200e->rate_mtx);
1448 kfree(fore200e_vcc);
1453 /* reserve bandwidth */
1454 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1455 mutex_unlock(&fore200e->rate_mtx);
1458 vcc->itf = vcc->dev->number;
1460 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1461 set_bit(ATM_VF_ADDR, &vcc->flags);
1463 vcc->dev_data = fore200e_vcc;
1465 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1469 clear_bit(ATM_VF_ADDR, &vcc->flags);
1470 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1472 vcc->dev_data = NULL;
1474 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1476 kfree(fore200e_vcc);
1480 /* compute rate control parameters */
1481 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1483 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1484 set_bit(ATM_VF_HASQOS, &vcc->flags);
1486 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1487 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1488 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1489 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1492 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1493 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1494 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1496 /* new incarnation of the vcc */
1497 vc_map->incarn = ++fore200e->incarn_count;
1499 /* VC unusable before this flag is set */
1500 set_bit(ATM_VF_READY, &vcc->flags);
1507 fore200e_close(struct atm_vcc* vcc)
1509 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1510 struct fore200e_vcc* fore200e_vcc;
1511 struct fore200e_vc_map* vc_map;
1512 unsigned long flags;
1515 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1516 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1518 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1520 clear_bit(ATM_VF_READY, &vcc->flags);
1522 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1524 spin_lock_irqsave(&fore200e->q_lock, flags);
1526 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1528 /* the vc is no longer considered as "in use" by fore200e_open() */
1531 vcc->itf = vcc->vci = vcc->vpi = 0;
1533 fore200e_vcc = FORE200E_VCC(vcc);
1534 vcc->dev_data = NULL;
1536 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1538 /* release reserved bandwidth, if any */
1539 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1541 mutex_lock(&fore200e->rate_mtx);
1542 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1543 mutex_unlock(&fore200e->rate_mtx);
1545 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1548 clear_bit(ATM_VF_ADDR, &vcc->flags);
1549 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1551 ASSERT(fore200e_vcc);
1552 kfree(fore200e_vcc);
1557 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1559 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1560 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1561 struct fore200e_vc_map* vc_map;
1562 struct host_txq* txq = &fore200e->host_txq;
1563 struct host_txq_entry* entry;
1565 struct tpd_haddr tpd_haddr;
1566 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1568 int tx_len = skb->len;
1569 u32* cell_header = NULL;
1570 unsigned char* skb_data;
1572 unsigned char* data;
1573 unsigned long flags;
1576 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1578 ASSERT(fore200e_vcc);
1580 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1581 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1582 dev_kfree_skb_any(skb);
1586 #ifdef FORE200E_52BYTE_AAL0_SDU
1587 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1588 cell_header = (u32*) skb->data;
1589 skb_data = skb->data + 4; /* skip 4-byte cell header */
1590 skb_len = tx_len = skb->len - 4;
1592 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1597 skb_data = skb->data;
1601 if (((unsigned long)skb_data) & 0x3) {
1603 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1608 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1610 /* this simply NUKES the PCA board */
1611 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1613 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1617 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1623 dev_kfree_skb_any(skb);
1628 memcpy(data, skb_data, skb_len);
1629 if (skb_len < tx_len)
1630 memset(data + skb_len, 0x00, tx_len - skb_len);
1636 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1637 ASSERT(vc_map->vcc == vcc);
1641 spin_lock_irqsave(&fore200e->q_lock, flags);
1643 entry = &txq->host_entry[ txq->head ];
1645 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1647 /* try to free completed tx queue entries */
1648 fore200e_tx_irq(fore200e);
1650 if (*entry->status != STATUS_FREE) {
1652 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1654 /* retry once again? */
1660 atomic_inc(&vcc->stats->tx_err);
1663 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1664 fore200e->name, fore200e->cp_queues->heartbeat);
1669 dev_kfree_skb_any(skb);
1679 entry->incarn = vc_map->incarn;
1680 entry->vc_map = vc_map;
1682 entry->data = tx_copy ? data : NULL;
1685 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1686 tpd->tsd[ 0 ].length = tx_len;
1688 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1691 /* The dma_map call above implies a dma_sync so the device can use it,
1692 * thus no explicit dma_sync call is necessary here.
1695 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1696 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1697 tpd->tsd[0].length, skb_len);
1699 if (skb_len < fore200e_vcc->tx_min_pdu)
1700 fore200e_vcc->tx_min_pdu = skb_len;
1701 if (skb_len > fore200e_vcc->tx_max_pdu)
1702 fore200e_vcc->tx_max_pdu = skb_len;
1703 fore200e_vcc->tx_pdu++;
1705 /* set tx rate control information */
1706 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1707 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1710 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1711 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1712 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1713 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1714 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1717 /* set the ATM header, common to all cells conveying the PDU */
1718 tpd->atm_header.clp = 0;
1719 tpd->atm_header.plt = 0;
1720 tpd->atm_header.vci = vcc->vci;
1721 tpd->atm_header.vpi = vcc->vpi;
1722 tpd->atm_header.gfc = 0;
1725 tpd->spec.length = tx_len;
1727 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1730 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1732 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1734 *entry->status = STATUS_PENDING;
1735 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1737 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1744 fore200e_getstats(struct fore200e* fore200e)
1746 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1747 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1748 struct stats_opcode opcode;
1752 if (fore200e->stats == NULL) {
1753 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1754 if (fore200e->stats == NULL)
1758 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1759 sizeof(struct stats), DMA_FROM_DEVICE);
1761 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1763 opcode.opcode = OPCODE_GET_STATS;
1766 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1768 *entry->status = STATUS_PENDING;
1770 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1772 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1774 *entry->status = STATUS_FREE;
1776 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1779 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1788 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1790 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1792 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1793 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1800 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1802 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1804 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1805 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1811 #if 0 /* currently unused */
1813 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1815 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1816 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1817 struct oc3_opcode opcode;
1819 u32 oc3_regs_dma_addr;
1821 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1823 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1825 opcode.opcode = OPCODE_GET_OC3;
1830 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1832 *entry->status = STATUS_PENDING;
1834 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1836 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1838 *entry->status = STATUS_FREE;
1840 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1843 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1853 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1855 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1856 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1857 struct oc3_opcode opcode;
1860 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1862 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1864 opcode.opcode = OPCODE_SET_OC3;
1866 opcode.value = value;
1869 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1871 *entry->status = STATUS_PENDING;
1873 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1875 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1877 *entry->status = STATUS_FREE;
1880 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1889 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1891 u32 mct_value, mct_mask;
1894 if (!capable(CAP_NET_ADMIN))
1897 switch (loop_mode) {
1901 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1904 case ATM_LM_LOC_PHY:
1905 mct_value = mct_mask = SUNI_MCT_DLE;
1908 case ATM_LM_RMT_PHY:
1909 mct_value = mct_mask = SUNI_MCT_LLE;
1916 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1918 fore200e->loop_mode = loop_mode;
1925 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1927 struct sonet_stats tmp;
1929 if (fore200e_getstats(fore200e) < 0)
1932 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1933 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1934 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1935 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1936 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1937 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1938 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1939 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1940 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1941 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1942 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1943 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1944 be32_to_cpu(fore200e->stats->aal5.cells_received);
1947 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1954 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1956 struct fore200e* fore200e = FORE200E_DEV(dev);
1958 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1963 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1966 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1969 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1972 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1975 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1978 return -ENOSYS; /* not implemented */
1983 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1985 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1986 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1988 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1989 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1993 DPRINTK(2, "change_qos %d.%d.%d, "
1994 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1995 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1996 "available_cell_rate = %u",
1997 vcc->itf, vcc->vpi, vcc->vci,
1998 fore200e_traffic_class[ qos->txtp.traffic_class ],
1999 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
2000 fore200e_traffic_class[ qos->rxtp.traffic_class ],
2001 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2002 flags, fore200e->available_cell_rate);
2004 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2006 mutex_lock(&fore200e->rate_mtx);
2007 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2008 mutex_unlock(&fore200e->rate_mtx);
2012 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2013 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2015 mutex_unlock(&fore200e->rate_mtx);
2017 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2019 /* update rate control parameters */
2020 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2022 set_bit(ATM_VF_HASQOS, &vcc->flags);
2031 static int __devinit
2032 fore200e_irq_request(struct fore200e* fore200e)
2034 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
2036 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2037 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2041 printk(FORE200E "IRQ %s reserved for device %s\n",
2042 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2044 #ifdef FORE200E_USE_TASKLET
2045 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2046 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2049 fore200e->state = FORE200E_STATE_IRQ;
2054 static int __devinit
2055 fore200e_get_esi(struct fore200e* fore200e)
2057 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2063 ok = fore200e->bus->prom_read(fore200e, prom);
2069 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
2071 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2072 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
2074 for (i = 0; i < ESI_LEN; i++) {
2075 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2084 static int __devinit
2085 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2087 int scheme, magn, nbr, size, i;
2089 struct host_bsq* bsq;
2090 struct buffer* buffer;
2092 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2093 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2095 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2097 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2098 size = fore200e_rx_buf_size[ scheme ][ magn ];
2100 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2102 /* allocate the array of receive buffers */
2103 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2108 bsq->freebuf = NULL;
2110 for (i = 0; i < nbr; i++) {
2112 buffer[ i ].scheme = scheme;
2113 buffer[ i ].magn = magn;
2114 #ifdef FORE200E_BSQ_DEBUG
2115 buffer[ i ].index = i;
2116 buffer[ i ].supplied = 0;
2119 /* allocate the receive buffer body */
2120 if (fore200e_chunk_alloc(fore200e,
2121 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2122 DMA_FROM_DEVICE) < 0) {
2125 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2131 /* insert the buffer into the free buffer list */
2132 buffer[ i ].next = bsq->freebuf;
2133 bsq->freebuf = &buffer[ i ];
2135 /* all the buffers are free, initially */
2136 bsq->freebuf_count = nbr;
2138 #ifdef FORE200E_BSQ_DEBUG
2139 bsq_audit(3, bsq, scheme, magn);
2144 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2149 static int __devinit
2150 fore200e_init_bs_queue(struct fore200e* fore200e)
2152 int scheme, magn, i;
2154 struct host_bsq* bsq;
2155 struct cp_bsq_entry __iomem * cp_entry;
2157 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2158 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2160 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2162 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2164 /* allocate and align the array of status words */
2165 if (fore200e->bus->dma_chunk_alloc(fore200e,
2167 sizeof(enum status),
2169 fore200e->bus->status_alignment) < 0) {
2173 /* allocate and align the array of receive buffer descriptors */
2174 if (fore200e->bus->dma_chunk_alloc(fore200e,
2176 sizeof(struct rbd_block),
2178 fore200e->bus->descr_alignment) < 0) {
2180 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2184 /* get the base address of the cp resident buffer supply queue entries */
2185 cp_entry = fore200e->virt_base +
2186 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2188 /* fill the host resident and cp resident buffer supply queue entries */
2189 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2191 bsq->host_entry[ i ].status =
2192 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2193 bsq->host_entry[ i ].rbd_block =
2194 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2195 bsq->host_entry[ i ].rbd_block_dma =
2196 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2197 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2199 *bsq->host_entry[ i ].status = STATUS_FREE;
2201 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2202 &cp_entry[ i ].status_haddr);
2207 fore200e->state = FORE200E_STATE_INIT_BSQ;
2212 static int __devinit
2213 fore200e_init_rx_queue(struct fore200e* fore200e)
2215 struct host_rxq* rxq = &fore200e->host_rxq;
2216 struct cp_rxq_entry __iomem * cp_entry;
2219 DPRINTK(2, "receive queue is being initialized\n");
2221 /* allocate and align the array of status words */
2222 if (fore200e->bus->dma_chunk_alloc(fore200e,
2224 sizeof(enum status),
2226 fore200e->bus->status_alignment) < 0) {
2230 /* allocate and align the array of receive PDU descriptors */
2231 if (fore200e->bus->dma_chunk_alloc(fore200e,
2235 fore200e->bus->descr_alignment) < 0) {
2237 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2241 /* get the base address of the cp resident rx queue entries */
2242 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2244 /* fill the host resident and cp resident rx entries */
2245 for (i=0; i < QUEUE_SIZE_RX; i++) {
2247 rxq->host_entry[ i ].status =
2248 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2249 rxq->host_entry[ i ].rpd =
2250 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2251 rxq->host_entry[ i ].rpd_dma =
2252 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2253 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2255 *rxq->host_entry[ i ].status = STATUS_FREE;
2257 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2258 &cp_entry[ i ].status_haddr);
2260 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2261 &cp_entry[ i ].rpd_haddr);
2264 /* set the head entry of the queue */
2267 fore200e->state = FORE200E_STATE_INIT_RXQ;
2272 static int __devinit
2273 fore200e_init_tx_queue(struct fore200e* fore200e)
2275 struct host_txq* txq = &fore200e->host_txq;
2276 struct cp_txq_entry __iomem * cp_entry;
2279 DPRINTK(2, "transmit queue is being initialized\n");
2281 /* allocate and align the array of status words */
2282 if (fore200e->bus->dma_chunk_alloc(fore200e,
2284 sizeof(enum status),
2286 fore200e->bus->status_alignment) < 0) {
2290 /* allocate and align the array of transmit PDU descriptors */
2291 if (fore200e->bus->dma_chunk_alloc(fore200e,
2295 fore200e->bus->descr_alignment) < 0) {
2297 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2301 /* get the base address of the cp resident tx queue entries */
2302 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2304 /* fill the host resident and cp resident tx entries */
2305 for (i=0; i < QUEUE_SIZE_TX; i++) {
2307 txq->host_entry[ i ].status =
2308 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2309 txq->host_entry[ i ].tpd =
2310 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2311 txq->host_entry[ i ].tpd_dma =
2312 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2313 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2315 *txq->host_entry[ i ].status = STATUS_FREE;
2317 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2318 &cp_entry[ i ].status_haddr);
2320 /* although there is a one-to-one mapping of tx queue entries and tpds,
2321 we do not write here the DMA (physical) base address of each tpd into
2322 the related cp resident entry, because the cp relies on this write
2323 operation to detect that a new pdu has been submitted for tx */
2326 /* set the head and tail entries of the queue */
2330 fore200e->state = FORE200E_STATE_INIT_TXQ;
2335 static int __devinit
2336 fore200e_init_cmd_queue(struct fore200e* fore200e)
2338 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2339 struct cp_cmdq_entry __iomem * cp_entry;
2342 DPRINTK(2, "command queue is being initialized\n");
2344 /* allocate and align the array of status words */
2345 if (fore200e->bus->dma_chunk_alloc(fore200e,
2347 sizeof(enum status),
2349 fore200e->bus->status_alignment) < 0) {
2353 /* get the base address of the cp resident cmd queue entries */
2354 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2356 /* fill the host resident and cp resident cmd entries */
2357 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2359 cmdq->host_entry[ i ].status =
2360 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2361 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2363 *cmdq->host_entry[ i ].status = STATUS_FREE;
2365 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2366 &cp_entry[ i ].status_haddr);
2369 /* set the head entry of the queue */
2372 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2377 static void __devinit
2378 fore200e_param_bs_queue(struct fore200e* fore200e,
2379 enum buffer_scheme scheme, enum buffer_magn magn,
2380 int queue_length, int pool_size, int supply_blksize)
2382 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2384 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2385 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2386 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2387 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2391 static int __devinit
2392 fore200e_initialize(struct fore200e* fore200e)
2394 struct cp_queues __iomem * cpq;
2395 int ok, scheme, magn;
2397 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2399 mutex_init(&fore200e->rate_mtx);
2400 spin_lock_init(&fore200e->q_lock);
2402 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2404 /* enable cp to host interrupts */
2405 fore200e->bus->write(1, &cpq->imask);
2407 if (fore200e->bus->irq_enable)
2408 fore200e->bus->irq_enable(fore200e);
2410 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2412 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2413 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2414 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2416 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2417 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2419 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2420 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2421 fore200e_param_bs_queue(fore200e, scheme, magn,
2423 fore200e_rx_buf_nbr[ scheme ][ magn ],
2426 /* issue the initialize command */
2427 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2428 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2430 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2432 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2436 printk(FORE200E "device %s initialized\n", fore200e->name);
2438 fore200e->state = FORE200E_STATE_INITIALIZE;
2443 static void __devinit
2444 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2446 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2451 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2455 static int __devinit
2456 fore200e_monitor_getc(struct fore200e* fore200e)
2458 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2459 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2462 while (time_before(jiffies, timeout)) {
2464 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2466 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2468 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2470 printk("%c", c & 0xFF);
2480 static void __devinit
2481 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2485 /* the i960 monitor doesn't accept any new character if it has something to say */
2486 while (fore200e_monitor_getc(fore200e) >= 0);
2488 fore200e_monitor_putc(fore200e, *str++);
2491 while (fore200e_monitor_getc(fore200e) >= 0);
2494 #ifdef __LITTLE_ENDIAN
2495 #define FW_EXT ".bin"
2497 #define FW_EXT "_ecd.bin2"
2500 static int __devinit
2501 fore200e_load_and_start_fw(struct fore200e* fore200e)
2503 const struct firmware *firmware;
2504 struct device *device;
2505 struct fw_header *fw_header;
2506 const __le32 *fw_data;
2508 u32 __iomem *load_addr;
2512 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2513 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2515 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2516 device = &((struct platform_device *) fore200e->bus_dev)->dev;
2521 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2522 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2523 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2527 fw_data = (__le32 *) firmware->data;
2528 fw_size = firmware->size / sizeof(u32);
2529 fw_header = (struct fw_header *) firmware->data;
2530 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2532 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2533 fore200e->name, load_addr, fw_size);
2535 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2536 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2540 for (; fw_size--; fw_data++, load_addr++)
2541 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2543 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2545 #if defined(__sparc_v9__)
2546 /* reported to be required by SBA cards on some sparc64 hosts */
2550 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2551 fore200e_monitor_puts(fore200e, buf);
2553 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2554 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2558 printk(FORE200E "device %s firmware started\n", fore200e->name);
2560 fore200e->state = FORE200E_STATE_START_FW;
2564 release_firmware(firmware);
2569 static int __devinit
2570 fore200e_register(struct fore200e* fore200e, struct device *parent)
2572 struct atm_dev* atm_dev;
2574 DPRINTK(2, "device %s being registered\n", fore200e->name);
2576 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2578 if (atm_dev == NULL) {
2579 printk(FORE200E "unable to register device %s\n", fore200e->name);
2583 atm_dev->dev_data = fore200e;
2584 fore200e->atm_dev = atm_dev;
2586 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2587 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2589 fore200e->available_cell_rate = ATM_OC3_PCR;
2591 fore200e->state = FORE200E_STATE_REGISTER;
2596 static int __devinit
2597 fore200e_init(struct fore200e* fore200e, struct device *parent)
2599 if (fore200e_register(fore200e, parent) < 0)
2602 if (fore200e->bus->configure(fore200e) < 0)
2605 if (fore200e->bus->map(fore200e) < 0)
2608 if (fore200e_reset(fore200e, 1) < 0)
2611 if (fore200e_load_and_start_fw(fore200e) < 0)
2614 if (fore200e_initialize(fore200e) < 0)
2617 if (fore200e_init_cmd_queue(fore200e) < 0)
2620 if (fore200e_init_tx_queue(fore200e) < 0)
2623 if (fore200e_init_rx_queue(fore200e) < 0)
2626 if (fore200e_init_bs_queue(fore200e) < 0)
2629 if (fore200e_alloc_rx_buf(fore200e) < 0)
2632 if (fore200e_get_esi(fore200e) < 0)
2635 if (fore200e_irq_request(fore200e) < 0)
2638 fore200e_supply(fore200e);
2640 /* all done, board initialization is now complete */
2641 fore200e->state = FORE200E_STATE_COMPLETE;
2646 static int __devinit fore200e_sba_probe(struct platform_device *op,
2647 const struct of_device_id *match)
2649 const struct fore200e_bus *bus = match->data;
2650 struct fore200e *fore200e;
2651 static int index = 0;
2654 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2658 fore200e->bus = bus;
2659 fore200e->bus_dev = op;
2660 fore200e->irq = op->archdata.irqs[0];
2661 fore200e->phys_base = op->resource[0].start;
2663 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2665 err = fore200e_init(fore200e, &op->dev);
2667 fore200e_shutdown(fore200e);
2673 dev_set_drvdata(&op->dev, fore200e);
2678 static int __devexit fore200e_sba_remove(struct platform_device *op)
2680 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2682 fore200e_shutdown(fore200e);
2688 static const struct of_device_id fore200e_sba_match[] = {
2690 .name = SBA200E_PROM_NAME,
2691 .data = (void *) &fore200e_bus[1],
2695 MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2697 static struct of_platform_driver fore200e_sba_driver = {
2699 .name = "fore_200e",
2700 .owner = THIS_MODULE,
2701 .of_match_table = fore200e_sba_match,
2703 .probe = fore200e_sba_probe,
2704 .remove = __devexit_p(fore200e_sba_remove),
2709 static int __devinit
2710 fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2712 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2713 struct fore200e* fore200e;
2715 static int index = 0;
2717 if (pci_enable_device(pci_dev)) {
2722 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2723 if (fore200e == NULL) {
2728 fore200e->bus = bus;
2729 fore200e->bus_dev = pci_dev;
2730 fore200e->irq = pci_dev->irq;
2731 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2733 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2735 pci_set_master(pci_dev);
2737 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2738 fore200e->bus->model_name,
2739 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2741 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2743 err = fore200e_init(fore200e, &pci_dev->dev);
2745 fore200e_shutdown(fore200e);
2750 pci_set_drvdata(pci_dev, fore200e);
2758 pci_disable_device(pci_dev);
2763 static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev)
2765 struct fore200e *fore200e;
2767 fore200e = pci_get_drvdata(pci_dev);
2769 fore200e_shutdown(fore200e);
2771 pci_disable_device(pci_dev);
2775 static struct pci_device_id fore200e_pca_tbl[] = {
2776 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2777 0, 0, (unsigned long) &fore200e_bus[0] },
2781 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2783 static struct pci_driver fore200e_pca_driver = {
2784 .name = "fore_200e",
2785 .probe = fore200e_pca_detect,
2786 .remove = __devexit_p(fore200e_pca_remove_one),
2787 .id_table = fore200e_pca_tbl,
2791 static int __init fore200e_module_init(void)
2795 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2798 err = of_register_platform_driver(&fore200e_sba_driver);
2804 err = pci_register_driver(&fore200e_pca_driver);
2809 of_unregister_platform_driver(&fore200e_sba_driver);
2815 static void __exit fore200e_module_cleanup(void)
2818 pci_unregister_driver(&fore200e_pca_driver);
2821 of_unregister_platform_driver(&fore200e_sba_driver);
2826 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2828 struct fore200e* fore200e = FORE200E_DEV(dev);
2829 struct fore200e_vcc* fore200e_vcc;
2830 struct atm_vcc* vcc;
2831 int i, len, left = *pos;
2832 unsigned long flags;
2836 if (fore200e_getstats(fore200e) < 0)
2839 len = sprintf(page,"\n"
2841 " internal name:\t\t%s\n", fore200e->name);
2843 /* print bus-specific information */
2844 if (fore200e->bus->proc_read)
2845 len += fore200e->bus->proc_read(fore200e, page + len);
2847 len += sprintf(page + len,
2848 " interrupt line:\t\t%s\n"
2849 " physical base address:\t0x%p\n"
2850 " virtual base address:\t0x%p\n"
2851 " factory address (ESI):\t%pM\n"
2852 " board serial number:\t\t%d\n\n",
2853 fore200e_irq_itoa(fore200e->irq),
2854 (void*)fore200e->phys_base,
2855 fore200e->virt_base,
2857 fore200e->esi[4] * 256 + fore200e->esi[5]);
2863 return sprintf(page,
2864 " free small bufs, scheme 1:\t%d\n"
2865 " free large bufs, scheme 1:\t%d\n"
2866 " free small bufs, scheme 2:\t%d\n"
2867 " free large bufs, scheme 2:\t%d\n",
2868 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2869 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2870 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2871 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2874 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2876 len = sprintf(page,"\n\n"
2877 " cell processor:\n"
2878 " heartbeat state:\t\t");
2880 if (hb >> 16 != 0xDEAD)
2881 len += sprintf(page + len, "0x%08x\n", hb);
2883 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2889 static const char* media_name[] = {
2890 "unshielded twisted pair",
2891 "multimode optical fiber ST",
2892 "multimode optical fiber SC",
2893 "single-mode optical fiber ST",
2894 "single-mode optical fiber SC",
2898 static const char* oc3_mode[] = {
2900 "diagnostic loopback",
2905 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2906 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2907 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2908 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2911 if (media_index > 4)
2914 switch (fore200e->loop_mode) {
2915 case ATM_LM_NONE: oc3_index = 0;
2917 case ATM_LM_LOC_PHY: oc3_index = 1;
2919 case ATM_LM_RMT_PHY: oc3_index = 2;
2921 default: oc3_index = 3;
2924 return sprintf(page,
2925 " firmware release:\t\t%d.%d.%d\n"
2926 " monitor release:\t\t%d.%d\n"
2927 " media type:\t\t\t%s\n"
2928 " OC-3 revision:\t\t0x%x\n"
2929 " OC-3 mode:\t\t\t%s",
2930 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2931 mon960_release >> 16, mon960_release << 16 >> 16,
2932 media_name[ media_index ],
2934 oc3_mode[ oc3_index ]);
2938 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2940 return sprintf(page,
2943 " version number:\t\t%d\n"
2944 " boot status word:\t\t0x%08x\n",
2945 fore200e->bus->read(&cp_monitor->mon_version),
2946 fore200e->bus->read(&cp_monitor->bstat));
2950 return sprintf(page,
2952 " device statistics:\n"
2954 " crc_header_errors:\t\t%10u\n"
2955 " framing_errors:\t\t%10u\n",
2956 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2957 be32_to_cpu(fore200e->stats->phy.framing_errors));
2960 return sprintf(page, "\n"
2962 " section_bip8_errors:\t%10u\n"
2963 " path_bip8_errors:\t\t%10u\n"
2964 " line_bip24_errors:\t\t%10u\n"
2965 " line_febe_errors:\t\t%10u\n"
2966 " path_febe_errors:\t\t%10u\n"
2967 " corr_hcs_errors:\t\t%10u\n"
2968 " ucorr_hcs_errors:\t\t%10u\n",
2969 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2970 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2971 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2972 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2973 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2974 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2975 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2978 return sprintf(page,"\n"
2979 " ATM:\t\t\t\t cells\n"
2982 " vpi out of range:\t\t%10u\n"
2983 " vpi no conn:\t\t%10u\n"
2984 " vci out of range:\t\t%10u\n"
2985 " vci no conn:\t\t%10u\n",
2986 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2987 be32_to_cpu(fore200e->stats->atm.cells_received),
2988 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2989 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2990 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2991 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2994 return sprintf(page,"\n"
2995 " AAL0:\t\t\t cells\n"
2998 " dropped:\t\t\t%10u\n",
2999 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
3000 be32_to_cpu(fore200e->stats->aal0.cells_received),
3001 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
3004 return sprintf(page,"\n"
3006 " SAR sublayer:\t\t cells\n"
3009 " dropped:\t\t\t%10u\n"
3010 " CRC errors:\t\t%10u\n"
3011 " protocol errors:\t\t%10u\n\n"
3012 " CS sublayer:\t\t PDUs\n"
3015 " dropped:\t\t\t%10u\n"
3016 " protocol errors:\t\t%10u\n",
3017 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
3018 be32_to_cpu(fore200e->stats->aal34.cells_received),
3019 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
3020 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
3021 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
3022 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
3023 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
3024 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
3025 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
3028 return sprintf(page,"\n"
3030 " SAR sublayer:\t\t cells\n"
3033 " dropped:\t\t\t%10u\n"
3034 " congestions:\t\t%10u\n\n"
3035 " CS sublayer:\t\t PDUs\n"
3038 " dropped:\t\t\t%10u\n"
3039 " CRC errors:\t\t%10u\n"
3040 " protocol errors:\t\t%10u\n",
3041 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
3042 be32_to_cpu(fore200e->stats->aal5.cells_received),
3043 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
3044 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
3045 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
3046 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
3047 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
3048 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
3049 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
3052 return sprintf(page,"\n"
3053 " AUX:\t\t allocation failures\n"
3054 " small b1:\t\t\t%10u\n"
3055 " large b1:\t\t\t%10u\n"
3056 " small b2:\t\t\t%10u\n"
3057 " large b2:\t\t\t%10u\n"
3058 " RX PDUs:\t\t\t%10u\n"
3059 " TX PDUs:\t\t\t%10lu\n",
3060 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
3061 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
3062 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
3063 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
3064 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
3068 return sprintf(page,"\n"
3069 " receive carrier:\t\t\t%s\n",
3070 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3073 return sprintf(page,"\n"
3074 " VCCs:\n address VPI VCI AAL "
3075 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3078 for (i = 0; i < NBR_CONNECT; i++) {
3080 vcc = fore200e->vc_map[i].vcc;
3085 spin_lock_irqsave(&fore200e->q_lock, flags);
3087 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3089 fore200e_vcc = FORE200E_VCC(vcc);
3090 ASSERT(fore200e_vcc);
3093 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3094 (u32)(unsigned long)vcc,
3095 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3096 fore200e_vcc->tx_pdu,
3097 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3098 fore200e_vcc->tx_max_pdu,
3099 fore200e_vcc->rx_pdu,
3100 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3101 fore200e_vcc->rx_max_pdu);
3103 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3107 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3113 module_init(fore200e_module_init);
3114 module_exit(fore200e_module_cleanup);
3117 static const struct atmdev_ops fore200e_ops =
3119 .open = fore200e_open,
3120 .close = fore200e_close,
3121 .ioctl = fore200e_ioctl,
3122 .getsockopt = fore200e_getsockopt,
3123 .setsockopt = fore200e_setsockopt,
3124 .send = fore200e_send,
3125 .change_qos = fore200e_change_qos,
3126 .proc_read = fore200e_proc_read,
3127 .owner = THIS_MODULE
3131 static const struct fore200e_bus fore200e_bus[] = {
3133 { "PCA-200E", "pca200e", 32, 4, 32,
3136 fore200e_pca_dma_map,
3137 fore200e_pca_dma_unmap,
3138 fore200e_pca_dma_sync_for_cpu,
3139 fore200e_pca_dma_sync_for_device,
3140 fore200e_pca_dma_chunk_alloc,
3141 fore200e_pca_dma_chunk_free,
3142 fore200e_pca_configure,
3145 fore200e_pca_prom_read,
3148 fore200e_pca_irq_check,
3149 fore200e_pca_irq_ack,
3150 fore200e_pca_proc_read,
3154 { "SBA-200E", "sba200e", 32, 64, 32,
3157 fore200e_sba_dma_map,
3158 fore200e_sba_dma_unmap,
3159 fore200e_sba_dma_sync_for_cpu,
3160 fore200e_sba_dma_sync_for_device,
3161 fore200e_sba_dma_chunk_alloc,
3162 fore200e_sba_dma_chunk_free,
3163 fore200e_sba_configure,
3166 fore200e_sba_prom_read,
3168 fore200e_sba_irq_enable,
3169 fore200e_sba_irq_check,
3170 fore200e_sba_irq_ack,
3171 fore200e_sba_proc_read,
3177 MODULE_LICENSE("GPL");
3179 #ifdef __LITTLE_ENDIAN__
3180 MODULE_FIRMWARE("pca200e.bin");
3182 MODULE_FIRMWARE("pca200e_ecd.bin2");
3184 #endif /* CONFIG_PCI */
3186 MODULE_FIRMWARE("sba200e_ecd.bin2");