drivers/atm/idt77252.c

   1 /*******************************************************************
   2  *
   3  * Copyright (c) 2000 ATecoM GmbH
   4  *
   5  * The author may be reached at ecd@atecom.com.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  *
  12  * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
  13  * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  14  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  15  * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
  16  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17  * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  18  * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  19  * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  20  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  21  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22  *
  23  * You should have received a copy of the  GNU General Public License along
  24  * with this program; if not, write  to the Free Software Foundation, Inc.,
  25  * 675 Mass Ave, Cambridge, MA 02139, USA.
  26  *
  27  *******************************************************************/
  28
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/poison.h>
  32 #include <linux/skbuff.h>
  33 #include <linux/kernel.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/atmdev.h>
  37 #include <linux/atm.h>
  38 #include <linux/delay.h>
  39 #include <linux/init.h>
  40 #include <linux/bitops.h>
  41 #include <linux/wait.h>
  42 #include <linux/jiffies.h>
  43 #include <linux/mutex.h>
  44 #include <linux/slab.h>
  45
  46 #include <asm/io.h>
  47 #include <asm/uaccess.h>
  48 #include <asm/atomic.h>
  49 #include <asm/byteorder.h>
  50
  51 #ifdef CONFIG_ATM_IDT77252_USE_SUNI
  52 #include "suni.h"
  53 #endif /* CONFIG_ATM_IDT77252_USE_SUNI */
  54
  55
  56 #include "idt77252.h"
  57 #include "idt77252_tables.h"
  58
  59 static unsigned int vpibits = 1;
  60
  61
  62 #define ATM_IDT77252_SEND_IDLE 1
  63
  64
  65 /*
  66  * Debug HACKs.
  67  */
  68 #define DEBUG_MODULE 1
  69 #undef HAVE_EEPROM      /* does not work, yet. */
  70
  71 #ifdef CONFIG_ATM_IDT77252_DEBUG
  72 static unsigned long debug = DBG_GENERAL;
  73 #endif
  74
  75
  76 #define SAR_RX_DELAY    (SAR_CFG_RXINT_NODELAY)
  77
  78
  79 /*
  80  * SCQ Handling.
  81  */
  82 static struct scq_info *alloc_scq(struct idt77252_dev *, int);
  83 static void free_scq(struct idt77252_dev *, struct scq_info *);
  84 static int queue_skb(struct idt77252_dev *, struct vc_map *,
  85                      struct sk_buff *, int oam);
  86 static void drain_scq(struct idt77252_dev *, struct vc_map *);
  87 static unsigned long get_free_scd(struct idt77252_dev *, struct vc_map *);
  88 static void fill_scd(struct idt77252_dev *, struct scq_info *, int);
  89
  90 /*
  91  * FBQ Handling.
  92  */
  93 static int push_rx_skb(struct idt77252_dev *,
  94                        struct sk_buff *, int queue);
  95 static void recycle_rx_skb(struct idt77252_dev *, struct sk_buff *);
  96 static void flush_rx_pool(struct idt77252_dev *, struct rx_pool *);
  97 static void recycle_rx_pool_skb(struct idt77252_dev *,
  98                                 struct rx_pool *);
  99 static void add_rx_skb(struct idt77252_dev *, int queue,
 100                        unsigned int size, unsigned int count);
 101
 102 /*
 103  * RSQ Handling.
 104  */
 105 static int init_rsq(struct idt77252_dev *);
 106 static void deinit_rsq(struct idt77252_dev *);
 107 static void idt77252_rx(struct idt77252_dev *);
 108
 109 /*
 110  * TSQ handling.
 111  */
 112 static int init_tsq(struct idt77252_dev *);
 113 static void deinit_tsq(struct idt77252_dev *);
 114 static void idt77252_tx(struct idt77252_dev *);
 115
 116
 117 /*
 118  * ATM Interface.
 119  */
 120 static void idt77252_dev_close(struct atm_dev *dev);
 121 static int idt77252_open(struct atm_vcc *vcc);
 122 static void idt77252_close(struct atm_vcc *vcc);
 123 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb);
 124 static int idt77252_send_oam(struct atm_vcc *vcc, void *cell,
 125                              int flags);
 126 static void idt77252_phy_put(struct atm_dev *dev, unsigned char value,
 127                              unsigned long addr);
 128 static unsigned char idt77252_phy_get(struct atm_dev *dev, unsigned long addr);
 129 static int idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos,
 130                                int flags);
 131 static int idt77252_proc_read(struct atm_dev *dev, loff_t * pos,
 132                               char *page);
 133 static void idt77252_softint(struct work_struct *work);
 134
 135
 136 static struct atmdev_ops idt77252_ops =
 137 {
 138         .dev_close      = idt77252_dev_close,
 139         .open           = idt77252_open,
 140         .close          = idt77252_close,
 141         .send           = idt77252_send,
 142         .send_oam       = idt77252_send_oam,
 143         .phy_put        = idt77252_phy_put,
 144         .phy_get        = idt77252_phy_get,
 145         .change_qos     = idt77252_change_qos,
 146         .proc_read      = idt77252_proc_read,
 147         .owner          = THIS_MODULE
 148 };
 149
 150 static struct idt77252_dev *idt77252_chain = NULL;
 151 static unsigned int idt77252_sram_write_errors = 0;
 152
 153 /*****************************************************************************/
 154 /*                                                                           */
 155 /* I/O and Utility Bus                                                       */
 156 /*                                                                           */
 157 /*****************************************************************************/
 158
 159 static void
 160 waitfor_idle(struct idt77252_dev *card)
 161 {
 162         u32 stat;
 163
 164         stat = readl(SAR_REG_STAT);
 165         while (stat & SAR_STAT_CMDBZ)
 166                 stat = readl(SAR_REG_STAT);
 167 }
 168
 169 static u32
 170 read_sram(struct idt77252_dev *card, unsigned long addr)
 171 {
 172         unsigned long flags;
 173         u32 value;
 174
 175         spin_lock_irqsave(&card->cmd_lock, flags);
 176         writel(SAR_CMD_READ_SRAM | (addr << 2), SAR_REG_CMD);
 177         waitfor_idle(card);
 178         value = readl(SAR_REG_DR0);
 179         spin_unlock_irqrestore(&card->cmd_lock, flags);
 180         return value;
 181 }
 182
 183 static void
 184 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
 185 {
 186         unsigned long flags;
 187
 188         if ((idt77252_sram_write_errors == 0) &&
 189             (((addr > card->tst[0] + card->tst_size - 2) &&
 190               (addr < card->tst[0] + card->tst_size)) ||
 191              ((addr > card->tst[1] + card->tst_size - 2) &&
 192               (addr < card->tst[1] + card->tst_size)))) {
 193                 printk("%s: ERROR: TST JMP section at %08lx written: %08x\n",
 194                        card->name, addr, value);
 195         }
 196
 197         spin_lock_irqsave(&card->cmd_lock, flags);
 198         writel(value, SAR_REG_DR0);
 199         writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
 200         waitfor_idle(card);
 201         spin_unlock_irqrestore(&card->cmd_lock, flags);
 202 }
 203
 204 static u8
 205 read_utility(void *dev, unsigned long ubus_addr)
 206 {
 207         struct idt77252_dev *card = dev;
 208         unsigned long flags;
 209         u8 value;
 210
 211         if (!card) {
 212                 printk("Error: No such device.\n");
 213                 return -1;
 214         }
 215
 216         spin_lock_irqsave(&card->cmd_lock, flags);
 217         writel(SAR_CMD_READ_UTILITY + ubus_addr, SAR_REG_CMD);
 218         waitfor_idle(card);
 219         value = readl(SAR_REG_DR0);
 220         spin_unlock_irqrestore(&card->cmd_lock, flags);
 221         return value;
 222 }
 223
 224 static void
 225 write_utility(void *dev, unsigned long ubus_addr, u8 value)
 226 {
 227         struct idt77252_dev *card = dev;
 228         unsigned long flags;
 229
 230         if (!card) {
 231                 printk("Error: No such device.\n");
 232                 return;
 233         }
 234
 235         spin_lock_irqsave(&card->cmd_lock, flags);
 236         writel((u32) value, SAR_REG_DR0);
 237         writel(SAR_CMD_WRITE_UTILITY + ubus_addr, SAR_REG_CMD);
 238         waitfor_idle(card);
 239         spin_unlock_irqrestore(&card->cmd_lock, flags);
 240 }
 241
 242 #ifdef HAVE_EEPROM
 243 static u32 rdsrtab[] =
 244 {
 245         SAR_GP_EECS | SAR_GP_EESCLK,
 246         0,
 247         SAR_GP_EESCLK,                  /* 0 */
 248         0,
 249         SAR_GP_EESCLK,                  /* 0 */
 250         0,
 251         SAR_GP_EESCLK,                  /* 0 */
 252         0,
 253         SAR_GP_EESCLK,                  /* 0 */
 254         0,
 255         SAR_GP_EESCLK,                  /* 0 */
 256         SAR_GP_EEDO,
 257         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 258         0,
 259         SAR_GP_EESCLK,                  /* 0 */
 260         SAR_GP_EEDO,
 261         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 262 };
 263
 264 static u32 wrentab[] =
 265 {
 266         SAR_GP_EECS | SAR_GP_EESCLK,
 267         0,
 268         SAR_GP_EESCLK,                  /* 0 */
 269         0,
 270         SAR_GP_EESCLK,                  /* 0 */
 271         0,
 272         SAR_GP_EESCLK,                  /* 0 */
 273         0,
 274         SAR_GP_EESCLK,                  /* 0 */
 275         SAR_GP_EEDO,
 276         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 277         SAR_GP_EEDO,
 278         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 279         0,
 280         SAR_GP_EESCLK,                  /* 0 */
 281         0,
 282         SAR_GP_EESCLK                   /* 0 */
 283 };
 284
 285 static u32 rdtab[] =
 286 {
 287         SAR_GP_EECS | SAR_GP_EESCLK,
 288         0,
 289         SAR_GP_EESCLK,                  /* 0 */
 290         0,
 291         SAR_GP_EESCLK,                  /* 0 */
 292         0,
 293         SAR_GP_EESCLK,                  /* 0 */
 294         0,
 295         SAR_GP_EESCLK,                  /* 0 */
 296         0,
 297         SAR_GP_EESCLK,                  /* 0 */
 298         0,
 299         SAR_GP_EESCLK,                  /* 0 */
 300         SAR_GP_EEDO,
 301         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 302         SAR_GP_EEDO,
 303         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 304 };
 305
 306 static u32 wrtab[] =
 307 {
 308         SAR_GP_EECS | SAR_GP_EESCLK,
 309         0,
 310         SAR_GP_EESCLK,                  /* 0 */
 311         0,
 312         SAR_GP_EESCLK,                  /* 0 */
 313         0,
 314         SAR_GP_EESCLK,                  /* 0 */
 315         0,
 316         SAR_GP_EESCLK,                  /* 0 */
 317         0,
 318         SAR_GP_EESCLK,                  /* 0 */
 319         0,
 320         SAR_GP_EESCLK,                  /* 0 */
 321         SAR_GP_EEDO,
 322         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 323         0,
 324         SAR_GP_EESCLK                   /* 0 */
 325 };
 326
 327 static u32 clktab[] =
 328 {
 329         0,
 330         SAR_GP_EESCLK,
 331         0,
 332         SAR_GP_EESCLK,
 333         0,
 334         SAR_GP_EESCLK,
 335         0,
 336         SAR_GP_EESCLK,
 337         0,
 338         SAR_GP_EESCLK,
 339         0,
 340         SAR_GP_EESCLK,
 341         0,
 342         SAR_GP_EESCLK,
 343         0,
 344         SAR_GP_EESCLK,
 345         0
 346 };
 347
 348 static u32
 349 idt77252_read_gp(struct idt77252_dev *card)
 350 {
 351         u32 gp;
 352
 353         gp = readl(SAR_REG_GP);
 354 #if 0
 355         printk("RD: %s\n", gp & SAR_GP_EEDI ? "1" : "0");
 356 #endif
 357         return gp;
 358 }
 359
 360 static void
 361 idt77252_write_gp(struct idt77252_dev *card, u32 value)
 362 {
 363         unsigned long flags;
 364
 365 #if 0
 366         printk("WR: %s %s %s\n", value & SAR_GP_EECS ? "   " : "/CS",
 367                value & SAR_GP_EESCLK ? "HIGH" : "LOW ",
 368                value & SAR_GP_EEDO   ? "1" : "0");
 369 #endif
 370
 371         spin_lock_irqsave(&card->cmd_lock, flags);
 372         waitfor_idle(card);
 373         writel(value, SAR_REG_GP);
 374         spin_unlock_irqrestore(&card->cmd_lock, flags);
 375 }
 376
 377 static u8
 378 idt77252_eeprom_read_status(struct idt77252_dev *card)
 379 {
 380         u8 byte;
 381         u32 gp;
 382         int i, j;
 383
 384         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 385
 386         for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
 387                 idt77252_write_gp(card, gp | rdsrtab[i]);
 388                 udelay(5);
 389         }
 390         idt77252_write_gp(card, gp | SAR_GP_EECS);
 391         udelay(5);
 392
 393         byte = 0;
 394         for (i = 0, j = 0; i < 8; i++) {
 395                 byte <<= 1;
 396
 397                 idt77252_write_gp(card, gp | clktab[j++]);
 398                 udelay(5);
 399
 400                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 401
 402                 idt77252_write_gp(card, gp | clktab[j++]);
 403                 udelay(5);
 404         }
 405         idt77252_write_gp(card, gp | SAR_GP_EECS);
 406         udelay(5);
 407
 408         return byte;
 409 }
 410
 411 static u8
 412 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
 413 {
 414         u8 byte;
 415         u32 gp;
 416         int i, j;
 417
 418         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 419
 420         for (i = 0; i < ARRAY_SIZE(rdtab); i++) {
 421                 idt77252_write_gp(card, gp | rdtab[i]);
 422                 udelay(5);
 423         }
 424         idt77252_write_gp(card, gp | SAR_GP_EECS);
 425         udelay(5);
 426
 427         for (i = 0, j = 0; i < 8; i++) {
 428                 idt77252_write_gp(card, gp | clktab[j++] |
 429                                         (offset & 1 ? SAR_GP_EEDO : 0));
 430                 udelay(5);
 431
 432                 idt77252_write_gp(card, gp | clktab[j++] |
 433                                         (offset & 1 ? SAR_GP_EEDO : 0));
 434                 udelay(5);
 435
 436                 offset >>= 1;
 437         }
 438         idt77252_write_gp(card, gp | SAR_GP_EECS);
 439         udelay(5);
 440
 441         byte = 0;
 442         for (i = 0, j = 0; i < 8; i++) {
 443                 byte <<= 1;
 444
 445                 idt77252_write_gp(card, gp | clktab[j++]);
 446                 udelay(5);
 447
 448                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 449
 450                 idt77252_write_gp(card, gp | clktab[j++]);
 451                 udelay(5);
 452         }
 453         idt77252_write_gp(card, gp | SAR_GP_EECS);
 454         udelay(5);
 455
 456         return byte;
 457 }
 458
 459 static void
 460 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
 461 {
 462         u32 gp;
 463         int i, j;
 464
 465         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 466
 467         for (i = 0; i < ARRAY_SIZE(wrentab); i++) {
 468                 idt77252_write_gp(card, gp | wrentab[i]);
 469                 udelay(5);
 470         }
 471         idt77252_write_gp(card, gp | SAR_GP_EECS);
 472         udelay(5);
 473
 474         for (i = 0; i < ARRAY_SIZE(wrtab); i++) {
 475                 idt77252_write_gp(card, gp | wrtab[i]);
 476                 udelay(5);
 477         }
 478         idt77252_write_gp(card, gp | SAR_GP_EECS);
 479         udelay(5);
 480
 481         for (i = 0, j = 0; i < 8; i++) {
 482                 idt77252_write_gp(card, gp | clktab[j++] |
 483                                         (offset & 1 ? SAR_GP_EEDO : 0));
 484                 udelay(5);
 485
 486                 idt77252_write_gp(card, gp | clktab[j++] |
 487                                         (offset & 1 ? SAR_GP_EEDO : 0));
 488                 udelay(5);
 489
 490                 offset >>= 1;
 491         }
 492         idt77252_write_gp(card, gp | SAR_GP_EECS);
 493         udelay(5);
 494
 495         for (i = 0, j = 0; i < 8; i++) {
 496                 idt77252_write_gp(card, gp | clktab[j++] |
 497                                         (data & 1 ? SAR_GP_EEDO : 0));
 498                 udelay(5);
 499
 500                 idt77252_write_gp(card, gp | clktab[j++] |
 501                                         (data & 1 ? SAR_GP_EEDO : 0));
 502                 udelay(5);
 503
 504                 data >>= 1;
 505         }
 506         idt77252_write_gp(card, gp | SAR_GP_EECS);
 507         udelay(5);
 508 }
 509
 510 static void
 511 idt77252_eeprom_init(struct idt77252_dev *card)
 512 {
 513         u32 gp;
 514
 515         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 516
 517         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 518         udelay(5);
 519         idt77252_write_gp(card, gp | SAR_GP_EECS);
 520         udelay(5);
 521         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 522         udelay(5);
 523         idt77252_write_gp(card, gp | SAR_GP_EECS);
 524         udelay(5);
 525 }
 526 #endif /* HAVE_EEPROM */
 527
 528
 529 #ifdef CONFIG_ATM_IDT77252_DEBUG
 530 static void
 531 dump_tct(struct idt77252_dev *card, int index)
 532 {
 533         unsigned long tct;
 534         int i;
 535
 536         tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
 537
 538         printk("%s: TCT %x:", card->name, index);
 539         for (i = 0; i < 8; i++) {
 540                 printk(" %08x", read_sram(card, tct + i));
 541         }
 542         printk("\n");
 543 }
 544
 545 static void
 546 idt77252_tx_dump(struct idt77252_dev *card)
 547 {
 548         struct atm_vcc *vcc;
 549         struct vc_map *vc;
 550         int i;
 551
 552         printk("%s\n", __func__);
 553         for (i = 0; i < card->tct_size; i++) {
 554                 vc = card->vcs[i];
 555                 if (!vc)
 556                         continue;
 557
 558                 vcc = NULL;
 559                 if (vc->rx_vcc)
 560                         vcc = vc->rx_vcc;
 561                 else if (vc->tx_vcc)
 562                         vcc = vc->tx_vcc;
 563
 564                 if (!vcc)
 565                         continue;
 566
 567                 printk("%s: Connection %d:\n", card->name, vc->index);
 568                 dump_tct(card, vc->index);
 569         }
 570 }
 571 #endif
 572
 573
 574 /*****************************************************************************/
 575 /*                                                                           */
 576 /* SCQ Handling                                                              */
 577 /*                                                                           */
 578 /*****************************************************************************/
 579
 580 static int
 581 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
 582 {
 583         struct sb_pool *pool = &card->sbpool[queue];
 584         int index;
 585
 586         index = pool->index;
 587         while (pool->skb[index]) {
 588                 index = (index + 1) & FBQ_MASK;
 589                 if (index == pool->index)
 590                         return -ENOBUFS;
 591         }
 592
 593         pool->skb[index] = skb;
 594         IDT77252_PRV_POOL(skb) = POOL_HANDLE(queue, index);
 595
 596         pool->index = (index + 1) & FBQ_MASK;
 597         return 0;
 598 }
 599
 600 static void
 601 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
 602 {
 603         unsigned int queue, index;
 604         u32 handle;
 605
 606         handle = IDT77252_PRV_POOL(skb);
 607
 608         queue = POOL_QUEUE(handle);
 609         if (queue > 3)
 610                 return;
 611
 612         index = POOL_INDEX(handle);
 613         if (index > FBQ_SIZE - 1)
 614                 return;
 615
 616         card->sbpool[queue].skb[index] = NULL;
 617 }
 618
 619 static struct sk_buff *
 620 sb_pool_skb(struct idt77252_dev *card, u32 handle)
 621 {
 622         unsigned int queue, index;
 623
 624         queue = POOL_QUEUE(handle);
 625         if (queue > 3)
 626                 return NULL;
 627
 628         index = POOL_INDEX(handle);
 629         if (index > FBQ_SIZE - 1)
 630                 return NULL;
 631
 632         return card->sbpool[queue].skb[index];
 633 }
 634
 635 static struct scq_info *
 636 alloc_scq(struct idt77252_dev *card, int class)
 637 {
 638         struct scq_info *scq;
 639
 640         scq = kzalloc(sizeof(struct scq_info), GFP_KERNEL);
 641         if (!scq)
 642                 return NULL;
 643         scq->base = pci_alloc_consistent(card->pcidev, SCQ_SIZE,
 644                                          &scq->paddr);
 645         if (scq->base == NULL) {
 646                 kfree(scq);
 647                 return NULL;
 648         }
 649         memset(scq->base, 0, SCQ_SIZE);
 650
 651         scq->next = scq->base;
 652         scq->last = scq->base + (SCQ_ENTRIES - 1);
 653         atomic_set(&scq->used, 0);
 654
 655         spin_lock_init(&scq->lock);
 656         spin_lock_init(&scq->skblock);
 657
 658         skb_queue_head_init(&scq->transmit);
 659         skb_queue_head_init(&scq->pending);
 660
 661         TXPRINTK("idt77252: SCQ: base 0x%p, next 0x%p, last 0x%p, paddr %08llx\n",
 662                  scq->base, scq->next, scq->last, (unsigned long long)scq->paddr);
 663
 664         return scq;
 665 }
 666
 667 static void
 668 free_scq(struct idt77252_dev *card, struct scq_info *scq)
 669 {
 670         struct sk_buff *skb;
 671         struct atm_vcc *vcc;
 672
 673         pci_free_consistent(card->pcidev, SCQ_SIZE,
 674                             scq->base, scq->paddr);
 675
 676         while ((skb = skb_dequeue(&scq->transmit))) {
 677                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 678                                  skb->len, PCI_DMA_TODEVICE);
 679
 680                 vcc = ATM_SKB(skb)->vcc;
 681                 if (vcc->pop)
 682                         vcc->pop(vcc, skb);
 683                 else
 684                         dev_kfree_skb(skb);
 685         }
 686
 687         while ((skb = skb_dequeue(&scq->pending))) {
 688                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 689                                  skb->len, PCI_DMA_TODEVICE);
 690
 691                 vcc = ATM_SKB(skb)->vcc;
 692                 if (vcc->pop)
 693                         vcc->pop(vcc, skb);
 694                 else
 695                         dev_kfree_skb(skb);
 696         }
 697
 698         kfree(scq);
 699 }
 700
 701
 702 static int
 703 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
 704 {
 705         struct scq_info *scq = vc->scq;
 706         unsigned long flags;
 707         struct scqe *tbd;
 708         int entries;
 709
 710         TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
 711
 712         atomic_inc(&scq->used);
 713         entries = atomic_read(&scq->used);
 714         if (entries > (SCQ_ENTRIES - 1)) {
 715                 atomic_dec(&scq->used);
 716                 goto out;
 717         }
 718
 719         skb_queue_tail(&scq->transmit, skb);
 720
 721         spin_lock_irqsave(&vc->lock, flags);
 722         if (vc->estimator) {
 723                 struct atm_vcc *vcc = vc->tx_vcc;
 724                 struct sock *sk = sk_atm(vcc);
 725
 726                 vc->estimator->cells += (skb->len + 47) / 48;
 727                 if (atomic_read(&sk->sk_wmem_alloc) >
 728                     (sk->sk_sndbuf >> 1)) {
 729                         u32 cps = vc->estimator->maxcps;
 730
 731                         vc->estimator->cps = cps;
 732                         vc->estimator->avcps = cps << 5;
 733                         if (vc->lacr < vc->init_er) {
 734                                 vc->lacr = vc->init_er;
 735                                 writel(TCMDQ_LACR | (vc->lacr << 16) |
 736                                        vc->index, SAR_REG_TCMDQ);
 737                         }
 738                 }
 739         }
 740         spin_unlock_irqrestore(&vc->lock, flags);
 741
 742         tbd = &IDT77252_PRV_TBD(skb);
 743
 744         spin_lock_irqsave(&scq->lock, flags);
 745         scq->next->word_1 = cpu_to_le32(tbd->word_1 |
 746                                         SAR_TBD_TSIF | SAR_TBD_GTSI);
 747         scq->next->word_2 = cpu_to_le32(tbd->word_2);
 748         scq->next->word_3 = cpu_to_le32(tbd->word_3);
 749         scq->next->word_4 = cpu_to_le32(tbd->word_4);
 750
 751         if (scq->next == scq->last)
 752                 scq->next = scq->base;
 753         else
 754                 scq->next++;
 755
 756         write_sram(card, scq->scd,
 757                    scq->paddr +
 758                    (u32)((unsigned long)scq->next - (unsigned long)scq->base));
 759         spin_unlock_irqrestore(&scq->lock, flags);
 760
 761         scq->trans_start = jiffies;
 762
 763         if (test_and_clear_bit(VCF_IDLE, &vc->flags)) {
 764                 writel(TCMDQ_START_LACR | (vc->lacr << 16) | vc->index,
 765                        SAR_REG_TCMDQ);
 766         }
 767
 768         TXPRINTK("%d entries in SCQ used (push).\n", atomic_read(&scq->used));
 769
 770         XPRINTK("%s: SCQ (after push %2d) head = 0x%x, next = 0x%p.\n",
 771                 card->name, atomic_read(&scq->used),
 772                 read_sram(card, scq->scd + 1), scq->next);
 773
 774         return 0;
 775
 776 out:
 777         if (time_after(jiffies, scq->trans_start + HZ)) {
 778                 printk("%s: Error pushing TBD for %d.%d\n",
 779                        card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
 780 #ifdef CONFIG_ATM_IDT77252_DEBUG
 781                 idt77252_tx_dump(card);
 782 #endif
 783                 scq->trans_start = jiffies;
 784         }
 785
 786         return -ENOBUFS;
 787 }
 788
 789
 790 static void
 791 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
 792 {
 793         struct scq_info *scq = vc->scq;
 794         struct sk_buff *skb;
 795         struct atm_vcc *vcc;
 796
 797         TXPRINTK("%s: SCQ (before drain %2d) next = 0x%p.\n",
 798                  card->name, atomic_read(&scq->used), scq->next);
 799
 800         skb = skb_dequeue(&scq->transmit);
 801         if (skb) {
 802                 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
 803
 804                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 805                                  skb->len, PCI_DMA_TODEVICE);
 806
 807                 vcc = ATM_SKB(skb)->vcc;
 808
 809                 if (vcc->pop)
 810                         vcc->pop(vcc, skb);
 811                 else
 812                         dev_kfree_skb(skb);
 813
 814                 atomic_inc(&vcc->stats->tx);
 815         }
 816
 817         atomic_dec(&scq->used);
 818
 819         spin_lock(&scq->skblock);
 820         while ((skb = skb_dequeue(&scq->pending))) {
 821                 if (push_on_scq(card, vc, skb)) {
 822                         skb_queue_head(&vc->scq->pending, skb);
 823                         break;
 824                 }
 825         }
 826         spin_unlock(&scq->skblock);
 827 }
 828
 829 static int
 830 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
 831           struct sk_buff *skb, int oam)
 832 {
 833         struct atm_vcc *vcc;
 834         struct scqe *tbd;
 835         unsigned long flags;
 836         int error;
 837         int aal;
 838
 839         if (skb->len == 0) {
 840                 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
 841                 return -EINVAL;
 842         }
 843
 844         TXPRINTK("%s: Sending %d bytes of data.\n",
 845                  card->name, skb->len);
 846
 847         tbd = &IDT77252_PRV_TBD(skb);
 848         vcc = ATM_SKB(skb)->vcc;
 849
 850         IDT77252_PRV_PADDR(skb) = pci_map_single(card->pcidev, skb->data,
 851                                                  skb->len, PCI_DMA_TODEVICE);
 852
 853         error = -EINVAL;
 854
 855         if (oam) {
 856                 if (skb->len != 52)
 857                         goto errout;
 858
 859                 tbd->word_1 = SAR_TBD_OAM | ATM_CELL_PAYLOAD | SAR_TBD_EPDU;
 860                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 861                 tbd->word_3 = 0x00000000;
 862                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 863                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 864
 865                 if (test_bit(VCF_RSV, &vc->flags))
 866                         vc = card->vcs[0];
 867
 868                 goto done;
 869         }
 870
 871         if (test_bit(VCF_RSV, &vc->flags)) {
 872                 printk("%s: Trying to transmit on reserved VC\n", card->name);
 873                 goto errout;
 874         }
 875
 876         aal = vcc->qos.aal;
 877
 878         switch (aal) {
 879         case ATM_AAL0:
 880         case ATM_AAL34:
 881                 if (skb->len > 52)
 882                         goto errout;
 883
 884                 if (aal == ATM_AAL0)
 885                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL0 |
 886                                       ATM_CELL_PAYLOAD;
 887                 else
 888                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL34 |
 889                                       ATM_CELL_PAYLOAD;
 890
 891                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 892                 tbd->word_3 = 0x00000000;
 893                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 894                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 895                 break;
 896
 897         case ATM_AAL5:
 898                 tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL5 | skb->len;
 899                 tbd->word_2 = IDT77252_PRV_PADDR(skb);
 900                 tbd->word_3 = skb->len;
 901                 tbd->word_4 = (vcc->vpi << SAR_TBD_VPI_SHIFT) |
 902                               (vcc->vci << SAR_TBD_VCI_SHIFT);
 903                 break;
 904
 905         case ATM_AAL1:
 906         case ATM_AAL2:
 907         default:
 908                 printk("%s: Traffic type not supported.\n", card->name);
 909                 error = -EPROTONOSUPPORT;
 910                 goto errout;
 911         }
 912
 913 done:
 914         spin_lock_irqsave(&vc->scq->skblock, flags);
 915         skb_queue_tail(&vc->scq->pending, skb);
 916
 917         while ((skb = skb_dequeue(&vc->scq->pending))) {
 918                 if (push_on_scq(card, vc, skb)) {
 919                         skb_queue_head(&vc->scq->pending, skb);
 920                         break;
 921                 }
 922         }
 923         spin_unlock_irqrestore(&vc->scq->skblock, flags);
 924
 925         return 0;
 926
 927 errout:
 928         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
 929                          skb->len, PCI_DMA_TODEVICE);
 930         return error;
 931 }
 932
 933 static unsigned long
 934 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
 935 {
 936         int i;
 937
 938         for (i = 0; i < card->scd_size; i++) {
 939                 if (!card->scd2vc[i]) {
 940                         card->scd2vc[i] = vc;
 941                         vc->scd_index = i;
 942                         return card->scd_base + i * SAR_SRAM_SCD_SIZE;
 943                 }
 944         }
 945         return 0;
 946 }
 947
 948 static void
 949 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 950 {
 951         write_sram(card, scq->scd, scq->paddr);
 952         write_sram(card, scq->scd + 1, 0x00000000);
 953         write_sram(card, scq->scd + 2, 0xffffffff);
 954         write_sram(card, scq->scd + 3, 0x00000000);
 955 }
 956
 957 static void
 958 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 959 {
 960         return;
 961 }
 962
 963 /*****************************************************************************/
 964 /*                                                                           */
 965 /* RSQ Handling                                                              */
 966 /*                                                                           */
 967 /*****************************************************************************/
 968
 969 static int
 970 init_rsq(struct idt77252_dev *card)
 971 {
 972         struct rsq_entry *rsqe;
 973
 974         card->rsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
 975                                               &card->rsq.paddr);
 976         if (card->rsq.base == NULL) {
 977                 printk("%s: can't allocate RSQ.\n", card->name);
 978                 return -1;
 979         }
 980         memset(card->rsq.base, 0, RSQSIZE);
 981
 982         card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
 983         card->rsq.next = card->rsq.last;
 984         for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
 985                 rsqe->word_4 = 0;
 986
 987         writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
 988                SAR_REG_RSQH);
 989         writel(card->rsq.paddr, SAR_REG_RSQB);
 990
 991         IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
 992                 (unsigned long) card->rsq.base,
 993                 readl(SAR_REG_RSQB));
 994         IPRINTK("%s: RSQ head = 0x%x, base = 0x%x, tail = 0x%x.\n",
 995                 card->name,
 996                 readl(SAR_REG_RSQH),
 997                 readl(SAR_REG_RSQB),
 998                 readl(SAR_REG_RSQT));
 999
1000         return 0;
1001 }
1002
1003 static void
1004 deinit_rsq(struct idt77252_dev *card)
1005 {
1006         pci_free_consistent(card->pcidev, RSQSIZE,
1007                             card->rsq.base, card->rsq.paddr);
1008 }
1009
1010 static void
1011 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1012 {
1013         struct atm_vcc *vcc;
1014         struct sk_buff *skb;
1015         struct rx_pool *rpp;
1016         struct vc_map *vc;
1017         u32 header, vpi, vci;
1018         u32 stat;
1019         int i;
1020
1021         stat = le32_to_cpu(rsqe->word_4);
1022
1023         if (stat & SAR_RSQE_IDLE) {
1024                 RXPRINTK("%s: message about inactive connection.\n",
1025                          card->name);
1026                 return;
1027         }
1028
1029         skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1030         if (skb == NULL) {
1031                 printk("%s: NULL skb in %s, rsqe: %08x %08x %08x %08x\n",
1032                        card->name, __func__,
1033                        le32_to_cpu(rsqe->word_1), le32_to_cpu(rsqe->word_2),
1034                        le32_to_cpu(rsqe->word_3), le32_to_cpu(rsqe->word_4));
1035                 return;
1036         }
1037
1038         header = le32_to_cpu(rsqe->word_1);
1039         vpi = (header >> 16) & 0x00ff;
1040         vci = (header >>  0) & 0xffff;
1041
1042         RXPRINTK("%s: SDU for %d.%d received in buffer 0x%p (data 0x%p).\n",
1043                  card->name, vpi, vci, skb, skb->data);
1044
1045         if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1046                 printk("%s: SDU received for out-of-range vc %u.%u\n",
1047                        card->name, vpi, vci);
1048                 recycle_rx_skb(card, skb);
1049                 return;
1050         }
1051
1052         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1053         if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1054                 printk("%s: SDU received on non RX vc %u.%u\n",
1055                        card->name, vpi, vci);
1056                 recycle_rx_skb(card, skb);
1057                 return;
1058         }
1059
1060         vcc = vc->rx_vcc;
1061
1062         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(skb),
1063                                     skb_end_pointer(skb) - skb->data,
1064                                     PCI_DMA_FROMDEVICE);
1065
1066         if ((vcc->qos.aal == ATM_AAL0) ||
1067             (vcc->qos.aal == ATM_AAL34)) {
1068                 struct sk_buff *sb;
1069                 unsigned char *cell;
1070                 u32 aal0;
1071
1072                 cell = skb->data;
1073                 for (i = (stat & SAR_RSQE_CELLCNT); i; i--) {
1074                         if ((sb = dev_alloc_skb(64)) == NULL) {
1075                                 printk("%s: Can't allocate buffers for aal0.\n",
1076                                        card->name);
1077                                 atomic_add(i, &vcc->stats->rx_drop);
1078                                 break;
1079                         }
1080                         if (!atm_charge(vcc, sb->truesize)) {
1081                                 RXPRINTK("%s: atm_charge() dropped aal0 packets.\n",
1082                                          card->name);
1083                                 atomic_add(i - 1, &vcc->stats->rx_drop);
1084                                 dev_kfree_skb(sb);
1085                                 break;
1086                         }
1087                         aal0 = (vpi << ATM_HDR_VPI_SHIFT) |
1088                                (vci << ATM_HDR_VCI_SHIFT);
1089                         aal0 |= (stat & SAR_RSQE_EPDU) ? 0x00000002 : 0;
1090                         aal0 |= (stat & SAR_RSQE_CLP)  ? 0x00000001 : 0;
1091
1092                         *((u32 *) sb->data) = aal0;
1093                         skb_put(sb, sizeof(u32));
1094                         memcpy(skb_put(sb, ATM_CELL_PAYLOAD),
1095                                cell, ATM_CELL_PAYLOAD);
1096
1097                         ATM_SKB(sb)->vcc = vcc;
1098                         __net_timestamp(sb);
1099                         vcc->push(vcc, sb);
1100                         atomic_inc(&vcc->stats->rx);
1101
1102                         cell += ATM_CELL_PAYLOAD;
1103                 }
1104
1105                 recycle_rx_skb(card, skb);
1106                 return;
1107         }
1108         if (vcc->qos.aal != ATM_AAL5) {
1109                 printk("%s: Unexpected AAL type in dequeue_rx(): %d.\n",
1110                        card->name, vcc->qos.aal);
1111                 recycle_rx_skb(card, skb);
1112                 return;
1113         }
1114         skb->len = (stat & SAR_RSQE_CELLCNT) * ATM_CELL_PAYLOAD;
1115
1116         rpp = &vc->rcv.rx_pool;
1117
1118         __skb_queue_tail(&rpp->queue, skb);
1119         rpp->len += skb->len;
1120
1121         if (stat & SAR_RSQE_EPDU) {
1122                 unsigned char *l1l2;
1123                 unsigned int len;
1124
1125                 l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6);
1126
1127                 len = (l1l2[0] << 8) | l1l2[1];
1128                 len = len ? len : 0x10000;
1129
1130                 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1131
1132                 if ((len + 8 > rpp->len) || (len + (47 + 8) < rpp->len)) {
1133                         RXPRINTK("%s: AAL5 PDU size mismatch: %d != %d. "
1134                                  "(CDC: %08x)\n",
1135                                  card->name, len, rpp->len, readl(SAR_REG_CDC));
1136                         recycle_rx_pool_skb(card, rpp);
1137                         atomic_inc(&vcc->stats->rx_err);
1138                         return;
1139                 }
1140                 if (stat & SAR_RSQE_CRC) {
1141                         RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1142                         recycle_rx_pool_skb(card, rpp);
1143                         atomic_inc(&vcc->stats->rx_err);
1144                         return;
1145                 }
1146                 if (skb_queue_len(&rpp->queue) > 1) {
1147                         struct sk_buff *sb;
1148
1149                         skb = dev_alloc_skb(rpp->len);
1150                         if (!skb) {
1151                                 RXPRINTK("%s: Can't alloc RX skb.\n",
1152                                          card->name);
1153                                 recycle_rx_pool_skb(card, rpp);
1154                                 atomic_inc(&vcc->stats->rx_err);
1155                                 return;
1156                         }
1157                         if (!atm_charge(vcc, skb->truesize)) {
1158                                 recycle_rx_pool_skb(card, rpp);
1159                                 dev_kfree_skb(skb);
1160                                 return;
1161                         }
1162                         skb_queue_walk(&rpp->queue, sb)
1163                                 memcpy(skb_put(skb, sb->len),
1164                                        sb->data, sb->len);
1165
1166                         recycle_rx_pool_skb(card, rpp);
1167
1168                         skb_trim(skb, len);
1169                         ATM_SKB(skb)->vcc = vcc;
1170                         __net_timestamp(skb);
1171
1172                         vcc->push(vcc, skb);
1173                         atomic_inc(&vcc->stats->rx);
1174
1175                         return;
1176                 }
1177
1178                 flush_rx_pool(card, rpp);
1179
1180                 if (!atm_charge(vcc, skb->truesize)) {
1181                         recycle_rx_skb(card, skb);
1182                         return;
1183                 }
1184
1185                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1186                                  skb_end_pointer(skb) - skb->data,
1187                                  PCI_DMA_FROMDEVICE);
1188                 sb_pool_remove(card, skb);
1189
1190                 skb_trim(skb, len);
1191                 ATM_SKB(skb)->vcc = vcc;
1192                 __net_timestamp(skb);
1193
1194                 vcc->push(vcc, skb);
1195                 atomic_inc(&vcc->stats->rx);
1196
1197                 if (skb->truesize > SAR_FB_SIZE_3)
1198                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1199                 else if (skb->truesize > SAR_FB_SIZE_2)
1200                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1201                 else if (skb->truesize > SAR_FB_SIZE_1)
1202                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1203                 else
1204                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1205                 return;
1206         }
1207 }
1208
1209 static void
1210 idt77252_rx(struct idt77252_dev *card)
1211 {
1212         struct rsq_entry *rsqe;
1213
1214         if (card->rsq.next == card->rsq.last)
1215                 rsqe = card->rsq.base;
1216         else
1217                 rsqe = card->rsq.next + 1;
1218
1219         if (!(le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID)) {
1220                 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1221                 return;
1222         }
1223
1224         do {
1225                 dequeue_rx(card, rsqe);
1226                 rsqe->word_4 = 0;
1227                 card->rsq.next = rsqe;
1228                 if (card->rsq.next == card->rsq.last)
1229                         rsqe = card->rsq.base;
1230                 else
1231                         rsqe = card->rsq.next + 1;
1232         } while (le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID);
1233
1234         writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1235                SAR_REG_RSQH);
1236 }
1237
1238 static void
1239 idt77252_rx_raw(struct idt77252_dev *card)
1240 {
1241         struct sk_buff  *queue;
1242         u32             head, tail;
1243         struct atm_vcc  *vcc;
1244         struct vc_map   *vc;
1245         struct sk_buff  *sb;
1246
1247         if (card->raw_cell_head == NULL) {
1248                 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1249                 card->raw_cell_head = sb_pool_skb(card, handle);
1250         }
1251
1252         queue = card->raw_cell_head;
1253         if (!queue)
1254                 return;
1255
1256         head = IDT77252_PRV_PADDR(queue) + (queue->data - queue->head - 16);
1257         tail = readl(SAR_REG_RAWCT);
1258
1259         pci_dma_sync_single_for_cpu(card->pcidev, IDT77252_PRV_PADDR(queue),
1260                                     skb_end_pointer(queue) - queue->head - 16,
1261                                     PCI_DMA_FROMDEVICE);
1262
1263         while (head != tail) {
1264                 unsigned int vpi, vci, pti;
1265                 u32 header;
1266
1267                 header = le32_to_cpu(*(u32 *) &queue->data[0]);
1268
1269                 vpi = (header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1270                 vci = (header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1271                 pti = (header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1272
1273 #ifdef CONFIG_ATM_IDT77252_DEBUG
1274                 if (debug & DBG_RAW_CELL) {
1275                         int i;
1276
1277                         printk("%s: raw cell %x.%02x.%04x.%x.%x\n",
1278                                card->name, (header >> 28) & 0x000f,
1279                                (header >> 20) & 0x00ff,
1280                                (header >>  4) & 0xffff,
1281                                (header >>  1) & 0x0007,
1282                                (header >>  0) & 0x0001);
1283                         for (i = 16; i < 64; i++)
1284                                 printk(" %02x", queue->data[i]);
1285                         printk("\n");
1286                 }
1287 #endif
1288
1289                 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1290                         RPRINTK("%s: SDU received for out-of-range vc %u.%u\n",
1291                                 card->name, vpi, vci);
1292                         goto drop;
1293                 }
1294
1295                 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1296                 if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1297                         RPRINTK("%s: SDU received on non RX vc %u.%u\n",
1298                                 card->name, vpi, vci);
1299                         goto drop;
1300                 }
1301
1302                 vcc = vc->rx_vcc;
1303
1304                 if (vcc->qos.aal != ATM_AAL0) {
1305                         RPRINTK("%s: raw cell for non AAL0 vc %u.%u\n",
1306                                 card->name, vpi, vci);
1307                         atomic_inc(&vcc->stats->rx_drop);
1308                         goto drop;
1309                 }
1310
1311                 if ((sb = dev_alloc_skb(64)) == NULL) {
1312                         printk("%s: Can't allocate buffers for AAL0.\n",
1313                                card->name);
1314                         atomic_inc(&vcc->stats->rx_err);
1315                         goto drop;
1316                 }
1317
1318                 if (!atm_charge(vcc, sb->truesize)) {
1319                         RXPRINTK("%s: atm_charge() dropped AAL0 packets.\n",
1320                                  card->name);
1321                         dev_kfree_skb(sb);
1322                         goto drop;
1323                 }
1324
1325                 *((u32 *) sb->data) = header;
1326                 skb_put(sb, sizeof(u32));
1327                 memcpy(skb_put(sb, ATM_CELL_PAYLOAD), &(queue->data[16]),
1328                        ATM_CELL_PAYLOAD);
1329
1330                 ATM_SKB(sb)->vcc = vcc;
1331                 __net_timestamp(sb);
1332                 vcc->push(vcc, sb);
1333                 atomic_inc(&vcc->stats->rx);
1334
1335 drop:
1336                 skb_pull(queue, 64);
1337
1338                 head = IDT77252_PRV_PADDR(queue)
1339                                         + (queue->data - queue->head - 16);
1340
1341                 if (queue->len < 128) {
1342                         struct sk_buff *next;
1343                         u32 handle;
1344
1345                         head = le32_to_cpu(*(u32 *) &queue->data[0]);
1346                         handle = le32_to_cpu(*(u32 *) &queue->data[4]);
1347
1348                         next = sb_pool_skb(card, handle);
1349                         recycle_rx_skb(card, queue);
1350
1351                         if (next) {
1352                                 card->raw_cell_head = next;
1353                                 queue = card->raw_cell_head;
1354                                 pci_dma_sync_single_for_cpu(card->pcidev,
1355                                                             IDT77252_PRV_PADDR(queue),
1356                                                             (skb_end_pointer(queue) -
1357                                                              queue->data),
1358                                                             PCI_DMA_FROMDEVICE);
1359                         } else {
1360                                 card->raw_cell_head = NULL;
1361                                 printk("%s: raw cell queue overrun\n",
1362                                        card->name);
1363                                 break;
1364                         }
1365                 }
1366         }
1367 }
1368
1369
1370 /*****************************************************************************/
1371 /*                                                                           */
1372 /* TSQ Handling                                                              */
1373 /*                                                                           */
1374 /*****************************************************************************/
1375
1376 static int
1377 init_tsq(struct idt77252_dev *card)
1378 {
1379         struct tsq_entry *tsqe;
1380
1381         card->tsq.base = pci_alloc_consistent(card->pcidev, RSQSIZE,
1382                                               &card->tsq.paddr);
1383         if (card->tsq.base == NULL) {
1384                 printk("%s: can't allocate TSQ.\n", card->name);
1385                 return -1;
1386         }
1387         memset(card->tsq.base, 0, TSQSIZE);
1388
1389         card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1390         card->tsq.next = card->tsq.last;
1391         for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1392                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1393
1394         writel(card->tsq.paddr, SAR_REG_TSQB);
1395         writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1396                SAR_REG_TSQH);
1397
1398         return 0;
1399 }
1400
1401 static void
1402 deinit_tsq(struct idt77252_dev *card)
1403 {
1404         pci_free_consistent(card->pcidev, TSQSIZE,
1405                             card->tsq.base, card->tsq.paddr);
1406 }
1407
1408 static void
1409 idt77252_tx(struct idt77252_dev *card)
1410 {
1411         struct tsq_entry *tsqe;
1412         unsigned int vpi, vci;
1413         struct vc_map *vc;
1414         u32 conn, stat;
1415
1416         if (card->tsq.next == card->tsq.last)
1417                 tsqe = card->tsq.base;
1418         else
1419                 tsqe = card->tsq.next + 1;
1420
1421         TXPRINTK("idt77252_tx: tsq  %p: base %p, next %p, last %p\n", tsqe,
1422                  card->tsq.base, card->tsq.next, card->tsq.last);
1423         TXPRINTK("idt77252_tx: tsqb %08x, tsqt %08x, tsqh %08x, \n",
1424                  readl(SAR_REG_TSQB),
1425                  readl(SAR_REG_TSQT),
1426                  readl(SAR_REG_TSQH));
1427
1428         stat = le32_to_cpu(tsqe->word_2);
1429
1430         if (stat & SAR_TSQE_INVALID)
1431                 return;
1432
1433         do {
1434                 TXPRINTK("tsqe: 0x%p [0x%08x 0x%08x]\n", tsqe,
1435                          le32_to_cpu(tsqe->word_1),
1436                          le32_to_cpu(tsqe->word_2));
1437
1438                 switch (stat & SAR_TSQE_TYPE) {
1439                 case SAR_TSQE_TYPE_TIMER:
1440                         TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1441                         break;
1442
1443                 case SAR_TSQE_TYPE_IDLE:
1444
1445                         conn = le32_to_cpu(tsqe->word_1);
1446
1447                         if (SAR_TSQE_TAG(stat) == 0x10) {
1448 #ifdef  NOTDEF
1449                                 printk("%s: Connection %d halted.\n",
1450                                        card->name,
1451                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1452 #endif
1453                                 break;
1454                         }
1455
1456                         vc = card->vcs[conn & 0x1fff];
1457                         if (!vc) {
1458                                 printk("%s: could not find VC from conn %d\n",
1459                                        card->name, conn & 0x1fff);
1460                                 break;
1461                         }
1462
1463                         printk("%s: Connection %d IDLE.\n",
1464                                card->name, vc->index);
1465
1466                         set_bit(VCF_IDLE, &vc->flags);
1467                         break;
1468
1469                 case SAR_TSQE_TYPE_TSR:
1470
1471                         conn = le32_to_cpu(tsqe->word_1);
1472
1473                         vc = card->vcs[conn & 0x1fff];
1474                         if (!vc) {
1475                                 printk("%s: no VC at index %d\n",
1476                                        card->name,
1477                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1478                                 break;
1479                         }
1480
1481                         drain_scq(card, vc);
1482                         break;
1483
1484                 case SAR_TSQE_TYPE_TBD_COMP:
1485
1486                         conn = le32_to_cpu(tsqe->word_1);
1487
1488                         vpi = (conn >> SAR_TBD_VPI_SHIFT) & 0x00ff;
1489                         vci = (conn >> SAR_TBD_VCI_SHIFT) & 0xffff;
1490
1491                         if (vpi >= (1 << card->vpibits) ||
1492                             vci >= (1 << card->vcibits)) {
1493                                 printk("%s: TBD complete: "
1494                                        "out of range VPI.VCI %u.%u\n",
1495                                        card->name, vpi, vci);
1496                                 break;
1497                         }
1498
1499                         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1500                         if (!vc) {
1501                                 printk("%s: TBD complete: "
1502                                        "no VC at VPI.VCI %u.%u\n",
1503                                        card->name, vpi, vci);
1504                                 break;
1505                         }
1506
1507                         drain_scq(card, vc);
1508                         break;
1509                 }
1510
1511                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1512
1513                 card->tsq.next = tsqe;
1514                 if (card->tsq.next == card->tsq.last)
1515                         tsqe = card->tsq.base;
1516                 else
1517                         tsqe = card->tsq.next + 1;
1518
1519                 TXPRINTK("tsqe: %p: base %p, next %p, last %p\n", tsqe,
1520                          card->tsq.base, card->tsq.next, card->tsq.last);
1521
1522                 stat = le32_to_cpu(tsqe->word_2);
1523
1524         } while (!(stat & SAR_TSQE_INVALID));
1525
1526         writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1527                SAR_REG_TSQH);
1528
1529         XPRINTK("idt77252_tx-after writel%d: TSQ head = 0x%x, tail = 0x%x, next = 0x%p.\n",
1530                 card->index, readl(SAR_REG_TSQH),
1531                 readl(SAR_REG_TSQT), card->tsq.next);
1532 }
1533
1534
1535 static void
1536 tst_timer(unsigned long data)
1537 {
1538         struct idt77252_dev *card = (struct idt77252_dev *)data;
1539         unsigned long base, idle, jump;
1540         unsigned long flags;
1541         u32 pc;
1542         int e;
1543
1544         spin_lock_irqsave(&card->tst_lock, flags);
1545
1546         base = card->tst[card->tst_index];
1547         idle = card->tst[card->tst_index ^ 1];
1548
1549         if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1550                 jump = base + card->tst_size - 2;
1551
1552                 pc = readl(SAR_REG_NOW) >> 2;
1553                 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1554                         mod_timer(&card->tst_timer, jiffies + 1);
1555                         goto out;
1556                 }
1557
1558                 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1559
1560                 card->tst_index ^= 1;
1561                 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1562
1563                 base = card->tst[card->tst_index];
1564                 idle = card->tst[card->tst_index ^ 1];
1565
1566                 for (e = 0; e < card->tst_size - 2; e++) {
1567                         if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1568                                 write_sram(card, idle + e,
1569                                            card->soft_tst[e].tste & TSTE_MASK);
1570                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1571                         }
1572                 }
1573         }
1574
1575         if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1576
1577                 for (e = 0; e < card->tst_size - 2; e++) {
1578                         if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1579                                 write_sram(card, idle + e,
1580                                            card->soft_tst[e].tste & TSTE_MASK);
1581                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1582                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1583                         }
1584                 }
1585
1586                 jump = base + card->tst_size - 2;
1587
1588                 write_sram(card, jump, TSTE_OPC_NULL);
1589                 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1590
1591                 mod_timer(&card->tst_timer, jiffies + 1);
1592         }
1593
1594 out:
1595         spin_unlock_irqrestore(&card->tst_lock, flags);
1596 }
1597
1598 static int
1599 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1600            int n, unsigned int opc)
1601 {
1602         unsigned long cl, avail;
1603         unsigned long idle;
1604         int e, r;
1605         u32 data;
1606
1607         avail = card->tst_size - 2;
1608         for (e = 0; e < avail; e++) {
1609                 if (card->soft_tst[e].vc == NULL)
1610                         break;
1611         }
1612         if (e >= avail) {
1613                 printk("%s: No free TST entries found\n", card->name);
1614                 return -1;
1615         }
1616
1617         NPRINTK("%s: conn %d: first TST entry at %d.\n",
1618                 card->name, vc ? vc->index : -1, e);
1619
1620         r = n;
1621         cl = avail;
1622         data = opc & TSTE_OPC_MASK;
1623         if (vc && (opc != TSTE_OPC_NULL))
1624                 data = opc | vc->index;
1625
1626         idle = card->tst[card->tst_index ^ 1];
1627
1628         /*
1629          * Fill Soft TST.
1630          */
1631         while (r > 0) {
1632                 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1633                         if (vc)
1634                                 card->soft_tst[e].vc = vc;
1635                         else
1636                                 card->soft_tst[e].vc = (void *)-1;
1637
1638                         card->soft_tst[e].tste = data;
1639                         if (timer_pending(&card->tst_timer))
1640                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1641                         else {
1642                                 write_sram(card, idle + e, data);
1643                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1644                         }
1645
1646                         cl -= card->tst_size;
1647                         r--;
1648                 }
1649
1650                 if (++e == avail)
1651                         e = 0;
1652                 cl += n;
1653         }
1654
1655         return 0;
1656 }
1657
1658 static int
1659 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1660 {
1661         unsigned long flags;
1662         int res;
1663
1664         spin_lock_irqsave(&card->tst_lock, flags);
1665
1666         res = __fill_tst(card, vc, n, opc);
1667
1668         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1669         if (!timer_pending(&card->tst_timer))
1670                 mod_timer(&card->tst_timer, jiffies + 1);
1671
1672         spin_unlock_irqrestore(&card->tst_lock, flags);
1673         return res;
1674 }
1675
1676 static int
1677 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1678 {
1679         unsigned long idle;
1680         int e;
1681
1682         idle = card->tst[card->tst_index ^ 1];
1683
1684         for (e = 0; e < card->tst_size - 2; e++) {
1685                 if (card->soft_tst[e].vc == vc) {
1686                         card->soft_tst[e].vc = NULL;
1687
1688                         card->soft_tst[e].tste = TSTE_OPC_VAR;
1689                         if (timer_pending(&card->tst_timer))
1690                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1691                         else {
1692                                 write_sram(card, idle + e, TSTE_OPC_VAR);
1693                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1694                         }
1695                 }
1696         }
1697
1698         return 0;
1699 }
1700
1701 static int
1702 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1703 {
1704         unsigned long flags;
1705         int res;
1706
1707         spin_lock_irqsave(&card->tst_lock, flags);
1708
1709         res = __clear_tst(card, vc);
1710
1711         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1712         if (!timer_pending(&card->tst_timer))
1713                 mod_timer(&card->tst_timer, jiffies + 1);
1714
1715         spin_unlock_irqrestore(&card->tst_lock, flags);
1716         return res;
1717 }
1718
1719 static int
1720 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1721            int n, unsigned int opc)
1722 {
1723         unsigned long flags;
1724         int res;
1725
1726         spin_lock_irqsave(&card->tst_lock, flags);
1727
1728         __clear_tst(card, vc);
1729         res = __fill_tst(card, vc, n, opc);
1730
1731         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1732         if (!timer_pending(&card->tst_timer))
1733                 mod_timer(&card->tst_timer, jiffies + 1);
1734
1735         spin_unlock_irqrestore(&card->tst_lock, flags);
1736         return res;
1737 }
1738
1739
1740 static int
1741 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1742 {
1743         unsigned long tct;
1744
1745         tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1746
1747         switch (vc->class) {
1748         case SCHED_CBR:
1749                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1750                         card->name, tct, vc->scq->scd);
1751
1752                 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1753                 write_sram(card, tct + 1, 0);
1754                 write_sram(card, tct + 2, 0);
1755                 write_sram(card, tct + 3, 0);
1756                 write_sram(card, tct + 4, 0);
1757                 write_sram(card, tct + 5, 0);
1758                 write_sram(card, tct + 6, 0);
1759                 write_sram(card, tct + 7, 0);
1760                 break;
1761
1762         case SCHED_UBR:
1763                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1764                         card->name, tct, vc->scq->scd);
1765
1766                 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1767                 write_sram(card, tct + 1, 0);
1768                 write_sram(card, tct + 2, TCT_TSIF);
1769                 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1770                 write_sram(card, tct + 4, 0);
1771                 write_sram(card, tct + 5, vc->init_er);
1772                 write_sram(card, tct + 6, 0);
1773                 write_sram(card, tct + 7, TCT_FLAG_UBR);
1774                 break;
1775
1776         case SCHED_VBR:
1777         case SCHED_ABR:
1778         default:
1779                 return -ENOSYS;
1780         }
1781
1782         return 0;
1783 }
1784
1785 /*****************************************************************************/
1786 /*                                                                           */
1787 /* FBQ Handling                                                              */
1788 /*                                                                           */
1789 /*****************************************************************************/
1790
1791 static __inline__ int
1792 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1793 {
1794         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) & 0x0f;
1795 }
1796
1797 static __inline__ int
1798 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1799 {
1800         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) == 0x0f;
1801 }
1802
1803 static int
1804 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1805 {
1806         unsigned long flags;
1807         u32 handle;
1808         u32 addr;
1809
1810         skb->data = skb->head;
1811         skb_reset_tail_pointer(skb);
1812         skb->len = 0;
1813
1814         skb_reserve(skb, 16);
1815
1816         switch (queue) {
1817         case 0:
1818                 skb_put(skb, SAR_FB_SIZE_0);
1819                 break;
1820         case 1:
1821                 skb_put(skb, SAR_FB_SIZE_1);
1822                 break;
1823         case 2:
1824                 skb_put(skb, SAR_FB_SIZE_2);
1825                 break;
1826         case 3:
1827                 skb_put(skb, SAR_FB_SIZE_3);
1828                 break;
1829         default:
1830                 return -1;
1831         }
1832
1833         if (idt77252_fbq_full(card, queue))
1834                 return -1;
1835
1836         memset(&skb->data[(skb->len & ~(0x3f)) - 64], 0, 2 * sizeof(u32));
1837
1838         handle = IDT77252_PRV_POOL(skb);
1839         addr = IDT77252_PRV_PADDR(skb);
1840
1841         spin_lock_irqsave(&card->cmd_lock, flags);
1842         writel(handle, card->fbq[queue]);
1843         writel(addr, card->fbq[queue]);
1844         spin_unlock_irqrestore(&card->cmd_lock, flags);
1845
1846         return 0;
1847 }
1848
1849 static void
1850 add_rx_skb(struct idt77252_dev *card, int queue,
1851            unsigned int size, unsigned int count)
1852 {
1853         struct sk_buff *skb;
1854         dma_addr_t paddr;
1855         u32 handle;
1856
1857         while (count--) {
1858                 skb = dev_alloc_skb(size);
1859                 if (!skb)
1860                         return;
1861
1862                 if (sb_pool_add(card, skb, queue)) {
1863                         printk("%s: SB POOL full\n", __func__);
1864                         goto outfree;
1865                 }
1866
1867                 paddr = pci_map_single(card->pcidev, skb->data,
1868                                        skb_end_pointer(skb) - skb->data,
1869                                        PCI_DMA_FROMDEVICE);
1870                 IDT77252_PRV_PADDR(skb) = paddr;
1871
1872                 if (push_rx_skb(card, skb, queue)) {
1873                         printk("%s: FB QUEUE full\n", __func__);
1874                         goto outunmap;
1875                 }
1876         }
1877
1878         return;
1879
1880 outunmap:
1881         pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1882                          skb_end_pointer(skb) - skb->data, PCI_DMA_FROMDEVICE);
1883
1884         handle = IDT77252_PRV_POOL(skb);
1885         card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1886
1887 outfree:
1888         dev_kfree_skb(skb);
1889 }
1890
1891
1892 static void
1893 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1894 {
1895         u32 handle = IDT77252_PRV_POOL(skb);
1896         int err;
1897
1898         pci_dma_sync_single_for_device(card->pcidev, IDT77252_PRV_PADDR(skb),
1899                                        skb_end_pointer(skb) - skb->data,
1900                                        PCI_DMA_FROMDEVICE);
1901
1902         err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1903         if (err) {
1904                 pci_unmap_single(card->pcidev, IDT77252_PRV_PADDR(skb),
1905                                  skb_end_pointer(skb) - skb->data,
1906                                  PCI_DMA_FROMDEVICE);
1907                 sb_pool_remove(card, skb);
1908                 dev_kfree_skb(skb);
1909         }
1910 }
1911
1912 static void
1913 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1914 {
1915         skb_queue_head_init(&rpp->queue);
1916         rpp->len = 0;
1917 }
1918
1919 static void
1920 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1921 {
1922         struct sk_buff *skb, *tmp;
1923
1924         skb_queue_walk_safe(&rpp->queue, skb, tmp)
1925                 recycle_rx_skb(card, skb);
1926
1927         flush_rx_pool(card, rpp);
1928 }
1929
1930 /*****************************************************************************/
1931 /*                                                                           */
1932 /* ATM Interface                                                             */
1933 /*                                                                           */
1934 /*****************************************************************************/
1935
1936 static void
1937 idt77252_phy_put(struct atm_dev *dev, unsigned char value, unsigned long addr)
1938 {
1939         write_utility(dev->dev_data, 0x100 + (addr & 0x1ff), value);
1940 }
1941
1942 static unsigned char
1943 idt77252_phy_get(struct atm_dev *dev, unsigned long addr)
1944 {
1945         return read_utility(dev->dev_data, 0x100 + (addr & 0x1ff));
1946 }
1947
1948 static inline int
1949 idt77252_send_skb(struct atm_vcc *vcc, struct sk_buff *skb, int oam)
1950 {
1951         struct atm_dev *dev = vcc->dev;
1952         struct idt77252_dev *card = dev->dev_data;
1953         struct vc_map *vc = vcc->dev_data;
1954         int err;
1955
1956         if (vc == NULL) {
1957                 printk("%s: NULL connection in send().\n", card->name);
1958                 atomic_inc(&vcc->stats->tx_err);
1959                 dev_kfree_skb(skb);
1960                 return -EINVAL;
1961         }
1962         if (!test_bit(VCF_TX, &vc->flags)) {
1963                 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1964                 atomic_inc(&vcc->stats->tx_err);
1965                 dev_kfree_skb(skb);
1966                 return -EINVAL;
1967         }
1968
1969         switch (vcc->qos.aal) {
1970         case ATM_AAL0:
1971         case ATM_AAL1:
1972         case ATM_AAL5:
1973                 break;
1974         default:
1975                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1976                 atomic_inc(&vcc->stats->tx_err);
1977                 dev_kfree_skb(skb);
1978                 return -EINVAL;
1979         }
1980
1981         if (skb_shinfo(skb)->nr_frags != 0) {
1982                 printk("%s: No scatter-gather yet.\n", card->name);
1983                 atomic_inc(&vcc->stats->tx_err);
1984                 dev_kfree_skb(skb);
1985                 return -EINVAL;
1986         }
1987         ATM_SKB(skb)->vcc = vcc;
1988
1989         err = queue_skb(card, vc, skb, oam);
1990         if (err) {
1991                 atomic_inc(&vcc->stats->tx_err);
1992                 dev_kfree_skb(skb);
1993                 return err;
1994         }
1995
1996         return 0;
1997 }
1998
1999 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb)
2000 {
2001         return idt77252_send_skb(vcc, skb, 0);
2002 }
2003
2004 static int
2005 idt77252_send_oam(struct atm_vcc *vcc, void *cell, int flags)
2006 {
2007         struct atm_dev *dev = vcc->dev;
2008         struct idt77252_dev *card = dev->dev_data;
2009         struct sk_buff *skb;
2010
2011         skb = dev_alloc_skb(64);
2012         if (!skb) {
2013                 printk("%s: Out of memory in send_oam().\n", card->name);
2014                 atomic_inc(&vcc->stats->tx_err);
2015                 return -ENOMEM;
2016         }
2017         atomic_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc);
2018
2019         memcpy(skb_put(skb, 52), cell, 52);
2020
2021         return idt77252_send_skb(vcc, skb, 1);
2022 }
2023
2024 static __inline__ unsigned int
2025 idt77252_fls(unsigned int x)
2026 {
2027         int r = 1;
2028
2029         if (x == 0)
2030                 return 0;
2031         if (x & 0xffff0000) {
2032                 x >>= 16;
2033                 r += 16;
2034         }
2035         if (x & 0xff00) {
2036                 x >>= 8;
2037                 r += 8;
2038         }
2039         if (x & 0xf0) {
2040                 x >>= 4;
2041                 r += 4;
2042         }
2043         if (x & 0xc) {
2044                 x >>= 2;
2045                 r += 2;
2046         }
2047         if (x & 0x2)
2048                 r += 1;
2049         return r;
2050 }
2051
2052 static u16
2053 idt77252_int_to_atmfp(unsigned int rate)
2054 {
2055         u16 m, e;
2056
2057         if (rate == 0)
2058                 return 0;
2059         e = idt77252_fls(rate) - 1;
2060         if (e < 9)
2061                 m = (rate - (1 << e)) << (9 - e);
2062         else if (e == 9)
2063                 m = (rate - (1 << e));
2064         else /* e > 9 */
2065                 m = (rate - (1 << e)) >> (e - 9);
2066         return 0x4000 | (e << 9) | m;
2067 }
2068
2069 static u8
2070 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2071 {
2072         u16 afp;
2073
2074         afp = idt77252_int_to_atmfp(pcr < 0 ? -pcr : pcr);
2075         if (pcr < 0)
2076                 return rate_to_log[(afp >> 5) & 0x1ff];
2077         return rate_to_log[((afp >> 5) + 1) & 0x1ff];
2078 }
2079
2080 static void
2081 idt77252_est_timer(unsigned long data)
2082 {
2083         struct vc_map *vc = (struct vc_map *)data;
2084         struct idt77252_dev *card = vc->card;
2085         struct rate_estimator *est;
2086         unsigned long flags;
2087         u32 rate, cps;
2088         u64 ncells;
2089         u8 lacr;
2090
2091         spin_lock_irqsave(&vc->lock, flags);
2092         est = vc->estimator;
2093         if (!est)
2094                 goto out;
2095
2096         ncells = est->cells;
2097
2098         rate = ((u32)(ncells - est->last_cells)) << (7 - est->interval);
2099         est->last_cells = ncells;
2100         est->avcps += ((long)rate - (long)est->avcps) >> est->ewma_log;
2101         est->cps = (est->avcps + 0x1f) >> 5;
2102
2103         cps = est->cps;
2104         if (cps < (est->maxcps >> 4))
2105                 cps = est->maxcps >> 4;
2106
2107         lacr = idt77252_rate_logindex(card, cps);
2108         if (lacr > vc->max_er)
2109                 lacr = vc->max_er;
2110
2111         if (lacr != vc->lacr) {
2112                 vc->lacr = lacr;
2113                 writel(TCMDQ_LACR|(vc->lacr << 16)|vc->index, SAR_REG_TCMDQ);
2114         }
2115
2116         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2117         add_timer(&est->timer);
2118
2119 out:
2120         spin_unlock_irqrestore(&vc->lock, flags);
2121 }
2122
2123 static struct rate_estimator *
2124 idt77252_init_est(struct vc_map *vc, int pcr)
2125 {
2126         struct rate_estimator *est;
2127
2128         est = kzalloc(sizeof(struct rate_estimator), GFP_KERNEL);
2129         if (!est)
2130                 return NULL;
2131         est->maxcps = pcr < 0 ? -pcr : pcr;
2132         est->cps = est->maxcps;
2133         est->avcps = est->cps << 5;
2134
2135         est->interval = 2;              /* XXX: make this configurable */
2136         est->ewma_log = 2;              /* XXX: make this configurable */
2137         init_timer(&est->timer);
2138         est->timer.data = (unsigned long)vc;
2139         est->timer.function = idt77252_est_timer;
2140
2141         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2142         add_timer(&est->timer);
2143
2144         return est;
2145 }
2146
2147 static int
2148 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2149                   struct atm_vcc *vcc, struct atm_qos *qos)
2150 {
2151         int tst_free, tst_used, tst_entries;
2152         unsigned long tmpl, modl;
2153         int tcr, tcra;
2154
2155         if ((qos->txtp.max_pcr == 0) &&
2156             (qos->txtp.pcr == 0) && (qos->txtp.min_pcr == 0)) {
2157                 printk("%s: trying to open a CBR VC with cell rate = 0\n",
2158                        card->name);
2159                 return -EINVAL;
2160         }
2161
2162         tst_used = 0;
2163         tst_free = card->tst_free;
2164         if (test_bit(VCF_TX, &vc->flags))
2165                 tst_used = vc->ntste;
2166         tst_free += tst_used;
2167
2168         tcr = atm_pcr_goal(&qos->txtp);
2169         tcra = tcr >= 0 ? tcr : -tcr;
2170
2171         TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2172
2173         tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2174         modl = tmpl % (unsigned long)card->utopia_pcr;
2175
2176         tst_entries = (int) (tmpl / card->utopia_pcr);
2177         if (tcr > 0) {
2178                 if (modl > 0)
2179                         tst_entries++;
2180         } else if (tcr == 0) {
2181                 tst_entries = tst_free - SAR_TST_RESERVED;
2182                 if (tst_entries <= 0) {
2183                         printk("%s: no CBR bandwidth free.\n", card->name);
2184                         return -ENOSR;
2185                 }
2186         }
2187
2188         if (tst_entries == 0) {
2189                 printk("%s: selected CBR bandwidth < granularity.\n",
2190                        card->name);
2191                 return -EINVAL;
2192         }
2193
2194         if (tst_entries > (tst_free - SAR_TST_RESERVED)) {
2195                 printk("%s: not enough CBR bandwidth free.\n", card->name);
2196                 return -ENOSR;
2197         }
2198
2199         vc->ntste = tst_entries;
2200
2201         card->tst_free = tst_free - tst_entries;
2202         if (test_bit(VCF_TX, &vc->flags)) {
2203                 if (tst_used == tst_entries)
2204                         return 0;
2205
2206                 OPRINTK("%s: modify %d -> %d entries in TST.\n",
2207                         card->name, tst_used, tst_entries);
2208                 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2209                 return 0;
2210         }
2211
2212         OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2213         fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2214         return 0;
2215 }
2216
2217 static int
2218 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2219                   struct atm_vcc *vcc, struct atm_qos *qos)
2220 {
2221         unsigned long flags;
2222         int tcr;
2223
2224         spin_lock_irqsave(&vc->lock, flags);
2225         if (vc->estimator) {
2226                 del_timer(&vc->estimator->timer);
2227                 kfree(vc->estimator);
2228                 vc->estimator = NULL;
2229         }
2230         spin_unlock_irqrestore(&vc->lock, flags);
2231
2232         tcr = atm_pcr_goal(&qos->txtp);
2233         if (tcr == 0)
2234                 tcr = card->link_pcr;
2235
2236         vc->estimator = idt77252_init_est(vc, tcr);
2237
2238         vc->class = SCHED_UBR;
2239         vc->init_er = idt77252_rate_logindex(card, tcr);
2240         vc->lacr = vc->init_er;
2241         if (tcr < 0)
2242                 vc->max_er = vc->init_er;
2243         else
2244                 vc->max_er = 0xff;
2245
2246         return 0;
2247 }
2248
2249 static int
2250 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2251                  struct atm_vcc *vcc, struct atm_qos *qos)
2252 {
2253         int error;
2254
2255         if (test_bit(VCF_TX, &vc->flags))
2256                 return -EBUSY;
2257
2258         switch (qos->txtp.traffic_class) {
2259                 case ATM_CBR:
2260                         vc->class = SCHED_CBR;
2261                         break;
2262
2263                 case ATM_UBR:
2264                         vc->class = SCHED_UBR;
2265                         break;
2266
2267                 case ATM_VBR:
2268                 case ATM_ABR:
2269                 default:
2270                         return -EPROTONOSUPPORT;
2271         }
2272
2273         vc->scq = alloc_scq(card, vc->class);
2274         if (!vc->scq) {
2275                 printk("%s: can't get SCQ.\n", card->name);
2276                 return -ENOMEM;
2277         }
2278
2279         vc->scq->scd = get_free_scd(card, vc);
2280         if (vc->scq->scd == 0) {
2281                 printk("%s: no SCD available.\n", card->name);
2282                 free_scq(card, vc->scq);
2283                 return -ENOMEM;
2284         }
2285
2286         fill_scd(card, vc->scq, vc->class);
2287
2288         if (set_tct(card, vc)) {
2289                 printk("%s: class %d not supported.\n",
2290                        card->name, qos->txtp.traffic_class);
2291
2292                 card->scd2vc[vc->scd_index] = NULL;
2293                 free_scq(card, vc->scq);
2294                 return -EPROTONOSUPPORT;
2295         }
2296
2297         switch (vc->class) {
2298                 case SCHED_CBR:
2299                         error = idt77252_init_cbr(card, vc, vcc, qos);
2300                         if (error) {
2301                                 card->scd2vc[vc->scd_index] = NULL;
2302                                 free_scq(card, vc->scq);
2303                                 return error;
2304                         }
2305
2306                         clear_bit(VCF_IDLE, &vc->flags);
2307                         writel(TCMDQ_START | vc->index, SAR_REG_TCMDQ);
2308                         break;
2309
2310                 case SCHED_UBR:
2311                         error = idt77252_init_ubr(card, vc, vcc, qos);
2312                         if (error) {
2313                                 card->scd2vc[vc->scd_index] = NULL;
2314                                 free_scq(card, vc->scq);
2315                                 return error;
2316                         }
2317
2318                         set_bit(VCF_IDLE, &vc->flags);
2319                         break;
2320         }
2321
2322         vc->tx_vcc = vcc;
2323         set_bit(VCF_TX, &vc->flags);
2324         return 0;
2325 }
2326
2327 static int
2328 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2329                  struct atm_vcc *vcc, struct atm_qos *qos)
2330 {
2331         unsigned long flags;
2332         unsigned long addr;
2333         u32 rcte = 0;
2334
2335         if (test_bit(VCF_RX, &vc->flags))
2336                 return -EBUSY;
2337
2338         vc->rx_vcc = vcc;
2339         set_bit(VCF_RX, &vc->flags);
2340
2341         if ((vcc->vci == 3) || (vcc->vci == 4))
2342                 return 0;
2343
2344         flush_rx_pool(card, &vc->rcv.rx_pool);
2345
2346         rcte |= SAR_RCTE_CONNECTOPEN;
2347         rcte |= SAR_RCTE_RAWCELLINTEN;
2348
2349         switch (qos->aal) {
2350                 case ATM_AAL0:
2351                         rcte |= SAR_RCTE_RCQ;
2352                         break;
2353                 case ATM_AAL1:
2354                         rcte |= SAR_RCTE_OAM; /* Let SAR drop Video */
2355                         break;
2356                 case ATM_AAL34:
2357                         rcte |= SAR_RCTE_AAL34;
2358                         break;
2359                 case ATM_AAL5:
2360                         rcte |= SAR_RCTE_AAL5;
2361                         break;
2362                 default:
2363                         rcte |= SAR_RCTE_RCQ;
2364                         break;
2365         }
2366
2367         if (qos->aal != ATM_AAL5)
2368                 rcte |= SAR_RCTE_FBP_1;
2369         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_2)
2370                 rcte |= SAR_RCTE_FBP_3;
2371         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_1)
2372                 rcte |= SAR_RCTE_FBP_2;
2373         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_0)
2374                 rcte |= SAR_RCTE_FBP_1;
2375         else
2376                 rcte |= SAR_RCTE_FBP_01;
2377
2378         addr = card->rct_base + (vc->index << 2);
2379
2380         OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2381         write_sram(card, addr, rcte);
2382
2383         spin_lock_irqsave(&card->cmd_lock, flags);
2384         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2), SAR_REG_CMD);
2385         waitfor_idle(card);
2386         spin_unlock_irqrestore(&card->cmd_lock, flags);
2387
2388         return 0;
2389 }
2390
2391 static int
2392 idt77252_open(struct atm_vcc *vcc)
2393 {
2394         struct atm_dev *dev = vcc->dev;
2395         struct idt77252_dev *card = dev->dev_data;
2396         struct vc_map *vc;
2397         unsigned int index;
2398         unsigned int inuse;
2399         int error;
2400         int vci = vcc->vci;
2401         short vpi = vcc->vpi;
2402
2403         if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC)
2404                 return 0;
2405
2406         if (vpi >= (1 << card->vpibits)) {
2407                 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2408                 return -EINVAL;
2409         }
2410
2411         if (vci >= (1 << card->vcibits)) {
2412                 printk("%s: unsupported VCI: %d\n", card->name, vci);
2413                 return -EINVAL;
2414         }
2415
2416         set_bit(ATM_VF_ADDR, &vcc->flags);
2417
2418         mutex_lock(&card->mutex);
2419
2420         OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2421
2422         switch (vcc->qos.aal) {
2423         case ATM_AAL0:
2424         case ATM_AAL1:
2425         case ATM_AAL5:
2426                 break;
2427         default:
2428                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2429                 mutex_unlock(&card->mutex);
2430                 return -EPROTONOSUPPORT;
2431         }
2432
2433         index = VPCI2VC(card, vpi, vci);
2434         if (!card->vcs[index]) {
2435                 card->vcs[index] = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2436                 if (!card->vcs[index]) {
2437                         printk("%s: can't alloc vc in open()\n", card->name);
2438                         mutex_unlock(&card->mutex);
2439                         return -ENOMEM;
2440                 }
2441                 card->vcs[index]->card = card;
2442                 card->vcs[index]->index = index;
2443
2444                 spin_lock_init(&card->vcs[index]->lock);
2445         }
2446         vc = card->vcs[index];
2447
2448         vcc->dev_data = vc;
2449
2450         IPRINTK("%s: idt77252_open: vc = %d (%d.%d) %s/%s (max RX SDU: %u)\n",
2451                 card->name, vc->index, vcc->vpi, vcc->vci,
2452                 vcc->qos.rxtp.traffic_class != ATM_NONE ? "rx" : "--",
2453                 vcc->qos.txtp.traffic_class != ATM_NONE ? "tx" : "--",
2454                 vcc->qos.rxtp.max_sdu);
2455
2456         inuse = 0;
2457         if (vcc->qos.txtp.traffic_class != ATM_NONE &&
2458             test_bit(VCF_TX, &vc->flags))
2459                 inuse = 1;
2460         if (vcc->qos.rxtp.traffic_class != ATM_NONE &&
2461             test_bit(VCF_RX, &vc->flags))
2462                 inuse += 2;
2463
2464         if (inuse) {
2465                 printk("%s: %s vci already in use.\n", card->name,
2466                        inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
2467                 mutex_unlock(&card->mutex);
2468                 return -EADDRINUSE;
2469         }
2470
2471         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2472                 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2473                 if (error) {
2474                         mutex_unlock(&card->mutex);
2475                         return error;
2476                 }
2477         }
2478
2479         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2480                 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2481                 if (error) {
2482                         mutex_unlock(&card->mutex);
2483                         return error;
2484                 }
2485         }
2486
2487         set_bit(ATM_VF_READY, &vcc->flags);
2488
2489         mutex_unlock(&card->mutex);
2490         return 0;
2491 }
2492
2493 static void
2494 idt77252_close(struct atm_vcc *vcc)
2495 {
2496         struct atm_dev *dev = vcc->dev;
2497         struct idt77252_dev *card = dev->dev_data;
2498         struct vc_map *vc = vcc->dev_data;
2499         unsigned long flags;
2500         unsigned long addr;
2501         unsigned long timeout;
2502
2503         mutex_lock(&card->mutex);
2504
2505         IPRINTK("%s: idt77252_close: vc = %d (%d.%d)\n",
2506                 card->name, vc->index, vcc->vpi, vcc->vci);
2507
2508         clear_bit(ATM_VF_READY, &vcc->flags);
2509
2510         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2511
2512                 spin_lock_irqsave(&vc->lock, flags);
2513                 clear_bit(VCF_RX, &vc->flags);
2514                 vc->rx_vcc = NULL;
2515                 spin_unlock_irqrestore(&vc->lock, flags);
2516
2517                 if ((vcc->vci == 3) || (vcc->vci == 4))
2518                         goto done;
2519
2520                 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2521
2522                 spin_lock_irqsave(&card->cmd_lock, flags);
2523                 writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2), SAR_REG_CMD);
2524                 waitfor_idle(card);
2525                 spin_unlock_irqrestore(&card->cmd_lock, flags);
2526
2527                 if (skb_queue_len(&vc->rcv.rx_pool.queue) != 0) {
2528                         DPRINTK("%s: closing a VC with pending rx buffers.\n",
2529                                 card->name);
2530
2531                         recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2532                 }
2533         }
2534
2535 done:
2536         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2537
2538                 spin_lock_irqsave(&vc->lock, flags);
2539                 clear_bit(VCF_TX, &vc->flags);
2540                 clear_bit(VCF_IDLE, &vc->flags);
2541                 clear_bit(VCF_RSV, &vc->flags);
2542                 vc->tx_vcc = NULL;
2543
2544                 if (vc->estimator) {
2545                         del_timer(&vc->estimator->timer);
2546                         kfree(vc->estimator);
2547                         vc->estimator = NULL;
2548                 }
2549                 spin_unlock_irqrestore(&vc->lock, flags);
2550
2551                 timeout = 5 * 1000;
2552                 while (atomic_read(&vc->scq->used) > 0) {
2553                         timeout = msleep_interruptible(timeout);
2554                         if (!timeout)
2555                                 break;
2556                 }
2557                 if (!timeout)
2558                         printk("%s: SCQ drain timeout: %u used\n",
2559                                card->name, atomic_read(&vc->scq->used));
2560
2561                 writel(TCMDQ_HALT | vc->index, SAR_REG_TCMDQ);
2562                 clear_scd(card, vc->scq, vc->class);
2563
2564                 if (vc->class == SCHED_CBR) {
2565                         clear_tst(card, vc);
2566                         card->tst_free += vc->ntste;
2567                         vc->ntste = 0;
2568                 }
2569
2570                 card->scd2vc[vc->scd_index] = NULL;
2571                 free_scq(card, vc->scq);
2572         }
2573
2574         mutex_unlock(&card->mutex);
2575 }
2576
2577 static int
2578 idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags)
2579 {
2580         struct atm_dev *dev = vcc->dev;
2581         struct idt77252_dev *card = dev->dev_data;
2582         struct vc_map *vc = vcc->dev_data;
2583         int error = 0;
2584
2585         mutex_lock(&card->mutex);
2586
2587         if (qos->txtp.traffic_class != ATM_NONE) {
2588                 if (!test_bit(VCF_TX, &vc->flags)) {
2589                         error = idt77252_init_tx(card, vc, vcc, qos);
2590                         if (error)
2591                                 goto out;
2592                 } else {
2593                         switch (qos->txtp.traffic_class) {
2594                         case ATM_CBR:
2595                                 error = idt77252_init_cbr(card, vc, vcc, qos);
2596                                 if (error)
2597                                         goto out;
2598                                 break;
2599
2600                         case ATM_UBR:
2601                                 error = idt77252_init_ubr(card, vc, vcc, qos);
2602                                 if (error)
2603                                         goto out;
2604
2605                                 if (!test_bit(VCF_IDLE, &vc->flags)) {
2606                                         writel(TCMDQ_LACR | (vc->lacr << 16) |
2607                                                vc->index, SAR_REG_TCMDQ);
2608                                 }
2609                                 break;
2610
2611                         case ATM_VBR:
2612                         case ATM_ABR:
2613                                 error = -EOPNOTSUPP;
2614                                 goto out;
2615                         }
2616                 }
2617         }
2618
2619         if ((qos->rxtp.traffic_class != ATM_NONE) &&
2620             !test_bit(VCF_RX, &vc->flags)) {
2621                 error = idt77252_init_rx(card, vc, vcc, qos);
2622                 if (error)
2623                         goto out;
2624         }
2625
2626         memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2627
2628         set_bit(ATM_VF_HASQOS, &vcc->flags);
2629
2630 out:
2631         mutex_unlock(&card->mutex);
2632         return error;
2633 }
2634
2635 static int
2636 idt77252_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2637 {
2638         struct idt77252_dev *card = dev->dev_data;
2639         int i, left;
2640
2641         left = (int) *pos;
2642         if (!left--)
2643                 return sprintf(page, "IDT77252 Interrupts:\n");
2644         if (!left--)
2645                 return sprintf(page, "TSIF:  %lu\n", card->irqstat[15]);
2646         if (!left--)
2647                 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2648         if (!left--)
2649                 return sprintf(page, "TSQF:  %lu\n", card->irqstat[12]);
2650         if (!left--)
2651                 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2652         if (!left--)
2653                 return sprintf(page, "PHYI:  %lu\n", card->irqstat[10]);
2654         if (!left--)
2655                 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2656         if (!left--)
2657                 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2658         if (!left--)
2659                 return sprintf(page, "RSQF:  %lu\n", card->irqstat[6]);
2660         if (!left--)
2661                 return sprintf(page, "EPDU:  %lu\n", card->irqstat[5]);
2662         if (!left--)
2663                 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2664         if (!left--)
2665                 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2666         if (!left--)
2667                 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2668         if (!left--)
2669                 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2670         if (!left--)
2671                 return sprintf(page, "IDT77252 Transmit Connection Table:\n");
2672
2673         for (i = 0; i < card->tct_size; i++) {
2674                 unsigned long tct;
2675                 struct atm_vcc *vcc;
2676                 struct vc_map *vc;
2677                 char *p;
2678
2679                 vc = card->vcs[i];
2680                 if (!vc)
2681                         continue;
2682
2683                 vcc = NULL;
2684                 if (vc->tx_vcc)
2685                         vcc = vc->tx_vcc;
2686                 if (!vcc)
2687                         continue;
2688                 if (left--)
2689                         continue;
2690
2691                 p = page;
2692                 p += sprintf(p, "  %4u: %u.%u: ", i, vcc->vpi, vcc->vci);
2693                 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2694
2695                 for (i = 0; i < 8; i++)
2696                         p += sprintf(p, " %08x", read_sram(card, tct + i));
2697                 p += sprintf(p, "\n");
2698                 return p - page;
2699         }
2700         return 0;
2701 }
2702
2703 /*****************************************************************************/
2704 /*                                                                           */
2705 /* Interrupt handler                                                         */
2706 /*                                                                           */
2707 /*****************************************************************************/
2708
2709 static void
2710 idt77252_collect_stat(struct idt77252_dev *card)
2711 {
2712         u32 cdc, vpec, icc;
2713
2714         cdc = readl(SAR_REG_CDC);
2715         vpec = readl(SAR_REG_VPEC);
2716         icc = readl(SAR_REG_ICC);
2717
2718 #ifdef  NOTDEF
2719         printk("%s:", card->name);
2720
2721         if (cdc & 0x7f0000) {
2722                 char *s = "";
2723
2724                 printk(" [");
2725                 if (cdc & (1 << 22)) {
2726                         printk("%sRM ID", s);
2727                         s = " | ";
2728                 }
2729                 if (cdc & (1 << 21)) {
2730                         printk("%sCON TAB", s);
2731                         s = " | ";
2732                 }
2733                 if (cdc & (1 << 20)) {
2734                         printk("%sNO FB", s);
2735                         s = " | ";
2736                 }
2737                 if (cdc & (1 << 19)) {
2738                         printk("%sOAM CRC", s);
2739                         s = " | ";
2740                 }
2741                 if (cdc & (1 << 18)) {
2742                         printk("%sRM CRC", s);
2743                         s = " | ";
2744                 }
2745                 if (cdc & (1 << 17)) {
2746                         printk("%sRM FIFO", s);
2747                         s = " | ";
2748                 }
2749                 if (cdc & (1 << 16)) {
2750                         printk("%sRX FIFO", s);
2751                         s = " | ";
2752                 }
2753                 printk("]");
2754         }
2755
2756         printk(" CDC %04x, VPEC %04x, ICC: %04x\n",
2757                cdc & 0xffff, vpec & 0xffff, icc & 0xffff);
2758 #endif
2759 }
2760
2761 static irqreturn_t
2762 idt77252_interrupt(int irq, void *dev_id)
2763 {
2764         struct idt77252_dev *card = dev_id;
2765         u32 stat;
2766
2767         stat = readl(SAR_REG_STAT) & 0xffff;
2768         if (!stat)      /* no interrupt for us */
2769                 return IRQ_NONE;
2770
2771         if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2772                 printk("%s: Re-entering irq_handler()\n", card->name);
2773                 goto out;
2774         }
2775
2776         writel(stat, SAR_REG_STAT);     /* reset interrupt */
2777
2778         if (stat & SAR_STAT_TSIF) {     /* entry written to TSQ  */
2779                 INTPRINTK("%s: TSIF\n", card->name);
2780                 card->irqstat[15]++;
2781                 idt77252_tx(card);
2782         }
2783         if (stat & SAR_STAT_TXICP) {    /* Incomplete CS-PDU has  */
2784                 INTPRINTK("%s: TXICP\n", card->name);
2785                 card->irqstat[14]++;
2786 #ifdef CONFIG_ATM_IDT77252_DEBUG
2787                 idt77252_tx_dump(card);
2788 #endif
2789         }
2790         if (stat & SAR_STAT_TSQF) {     /* TSQ 7/8 full           */
2791                 INTPRINTK("%s: TSQF\n", card->name);
2792                 card->irqstat[12]++;
2793                 idt77252_tx(card);
2794         }
2795         if (stat & SAR_STAT_TMROF) {    /* Timer overflow         */
2796                 INTPRINTK("%s: TMROF\n", card->name);
2797                 card->irqstat[11]++;
2798                 idt77252_collect_stat(card);
2799         }
2800
2801         if (stat & SAR_STAT_EPDU) {     /* Got complete CS-PDU    */
2802                 INTPRINTK("%s: EPDU\n", card->name);
2803                 card->irqstat[5]++;
2804                 idt77252_rx(card);
2805         }
2806         if (stat & SAR_STAT_RSQAF) {    /* RSQ is 7/8 full        */
2807                 INTPRINTK("%s: RSQAF\n", card->name);
2808                 card->irqstat[1]++;
2809                 idt77252_rx(card);
2810         }
2811         if (stat & SAR_STAT_RSQF) {     /* RSQ is full            */
2812                 INTPRINTK("%s: RSQF\n", card->name);
2813                 card->irqstat[6]++;
2814                 idt77252_rx(card);
2815         }
2816         if (stat & SAR_STAT_RAWCF) {    /* Raw cell received      */
2817                 INTPRINTK("%s: RAWCF\n", card->name);
2818                 card->irqstat[4]++;
2819                 idt77252_rx_raw(card);
2820         }
2821
2822         if (stat & SAR_STAT_PHYI) {     /* PHY device interrupt   */
2823                 INTPRINTK("%s: PHYI", card->name);
2824                 card->irqstat[10]++;
2825                 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2826                         card->atmdev->phy->interrupt(card->atmdev);
2827         }
2828
2829         if (stat & (SAR_STAT_FBQ0A | SAR_STAT_FBQ1A |
2830                     SAR_STAT_FBQ2A | SAR_STAT_FBQ3A)) {
2831
2832                 writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
2833
2834                 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2835
2836                 if (stat & SAR_STAT_FBQ0A)
2837                         card->irqstat[2]++;
2838                 if (stat & SAR_STAT_FBQ1A)
2839                         card->irqstat[3]++;
2840                 if (stat & SAR_STAT_FBQ2A)
2841                         card->irqstat[7]++;
2842                 if (stat & SAR_STAT_FBQ3A)
2843                         card->irqstat[8]++;
2844
2845                 schedule_work(&card->tqueue);
2846         }
2847
2848 out:
2849         clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2850         return IRQ_HANDLED;
2851 }
2852
2853 static void
2854 idt77252_softint(struct work_struct *work)
2855 {
2856         struct idt77252_dev *card =
2857                 container_of(work, struct idt77252_dev, tqueue);
2858         u32 stat;
2859         int done;
2860
2861         for (done = 1; ; done = 1) {
2862                 stat = readl(SAR_REG_STAT) >> 16;
2863
2864                 if ((stat & 0x0f) < SAR_FBQ0_HIGH) {
2865                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2866                         done = 0;
2867                 }
2868
2869                 stat >>= 4;
2870                 if ((stat & 0x0f) < SAR_FBQ1_HIGH) {
2871                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2872                         done = 0;
2873                 }
2874
2875                 stat >>= 4;
2876                 if ((stat & 0x0f) < SAR_FBQ2_HIGH) {
2877                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2878                         done = 0;
2879                 }
2880
2881                 stat >>= 4;
2882                 if ((stat & 0x0f) < SAR_FBQ3_HIGH) {
2883                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2884                         done = 0;
2885                 }
2886
2887                 if (done)
2888                         break;
2889         }
2890
2891         writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
2892 }
2893
2894
2895 static int
2896 open_card_oam(struct idt77252_dev *card)
2897 {
2898         unsigned long flags;
2899         unsigned long addr;
2900         struct vc_map *vc;
2901         int vpi, vci;
2902         int index;
2903         u32 rcte;
2904
2905         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2906                 for (vci = 3; vci < 5; vci++) {
2907                         index = VPCI2VC(card, vpi, vci);
2908
2909                         vc = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2910                         if (!vc) {
2911                                 printk("%s: can't alloc vc\n", card->name);
2912                                 return -ENOMEM;
2913                         }
2914                         vc->index = index;
2915                         card->vcs[index] = vc;
2916
2917                         flush_rx_pool(card, &vc->rcv.rx_pool);
2918
2919                         rcte = SAR_RCTE_CONNECTOPEN |
2920                                SAR_RCTE_RAWCELLINTEN |
2921                                SAR_RCTE_RCQ |
2922                                SAR_RCTE_FBP_1;
2923
2924                         addr = card->rct_base + (vc->index << 2);
2925                         write_sram(card, addr, rcte);
2926
2927                         spin_lock_irqsave(&card->cmd_lock, flags);
2928                         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2),
2929                                SAR_REG_CMD);
2930                         waitfor_idle(card);
2931                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2932                 }
2933         }
2934
2935         return 0;
2936 }
2937
2938 static void
2939 close_card_oam(struct idt77252_dev *card)
2940 {
2941         unsigned long flags;
2942         unsigned long addr;
2943         struct vc_map *vc;
2944         int vpi, vci;
2945         int index;
2946
2947         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2948                 for (vci = 3; vci < 5; vci++) {
2949                         index = VPCI2VC(card, vpi, vci);
2950                         vc = card->vcs[index];
2951
2952                         addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2953
2954                         spin_lock_irqsave(&card->cmd_lock, flags);
2955                         writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2),
2956                                SAR_REG_CMD);
2957                         waitfor_idle(card);
2958                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2959
2960                         if (skb_queue_len(&vc->rcv.rx_pool.queue) != 0) {
2961                                 DPRINTK("%s: closing a VC "
2962                                         "with pending rx buffers.\n",
2963                                         card->name);
2964
2965                                 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2966                         }
2967                 }
2968         }
2969 }
2970
2971 static int
2972 open_card_ubr0(struct idt77252_dev *card)
2973 {
2974         struct vc_map *vc;
2975
2976         vc = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2977         if (!vc) {
2978                 printk("%s: can't alloc vc\n", card->name);
2979                 return -ENOMEM;
2980         }
2981         card->vcs[0] = vc;
2982         vc->class = SCHED_UBR0;
2983
2984         vc->scq = alloc_scq(card, vc->class);
2985         if (!vc->scq) {
2986                 printk("%s: can't get SCQ.\n", card->name);
2987                 return -ENOMEM;
2988         }
2989
2990         card->scd2vc[0] = vc;
2991         vc->scd_index = 0;
2992         vc->scq->scd = card->scd_base;
2993
2994         fill_scd(card, vc->scq, vc->class);
2995
2996         write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
2997         write_sram(card, card->tct_base + 1, 0);
2998         write_sram(card, card->tct_base + 2, 0);
2999         write_sram(card, card->tct_base + 3, 0);
3000         write_sram(card, card->tct_base + 4, 0);
3001         write_sram(card, card->tct_base + 5, 0);
3002         write_sram(card, card->tct_base + 6, 0);
3003         write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
3004
3005         clear_bit(VCF_IDLE, &vc->flags);
3006         writel(TCMDQ_START | 0, SAR_REG_TCMDQ);
3007         return 0;
3008 }
3009
3010 static int
3011 idt77252_dev_open(struct idt77252_dev *card)
3012 {
3013         u32 conf;
3014
3015         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3016                 printk("%s: SAR not yet initialized.\n", card->name);
3017                 return -1;
3018         }
3019
3020         conf = SAR_CFG_RXPTH|   /* enable receive path                  */
3021             SAR_RX_DELAY |      /* interrupt on complete PDU            */
3022             SAR_CFG_RAWIE |     /* interrupt enable on raw cells        */
3023             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full         */
3024             SAR_CFG_TMOIE |     /* interrupt on timer overflow          */
3025             SAR_CFG_FBIE |      /* interrupt on low free buffers        */
3026             SAR_CFG_TXEN |      /* transmit operation enable            */
3027             SAR_CFG_TXINT |     /* interrupt on transmit status         */
3028             SAR_CFG_TXUIE |     /* interrupt on transmit underrun       */
3029             SAR_CFG_TXSFI |     /* interrupt on TSQ almost full         */
3030             SAR_CFG_PHYIE       /* enable PHY interrupts                */
3031             ;
3032
3033 #ifdef CONFIG_ATM_IDT77252_RCV_ALL
3034         /* Test RAW cell receive. */
3035         conf |= SAR_CFG_VPECA;
3036 #endif
3037
3038         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3039
3040         if (open_card_oam(card)) {
3041                 printk("%s: Error initializing OAM.\n", card->name);
3042                 return -1;
3043         }
3044
3045         if (open_card_ubr0(card)) {
3046                 printk("%s: Error initializing UBR0.\n", card->name);
3047                 return -1;
3048         }
3049
3050         IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3051         return 0;
3052 }
3053
3054 static void idt77252_dev_close(struct atm_dev *dev)
3055 {
3056         struct idt77252_dev *card = dev->dev_data;
3057         u32 conf;
3058
3059         close_card_oam(card);
3060
3061         conf = SAR_CFG_RXPTH |  /* enable receive path           */
3062             SAR_RX_DELAY |      /* interrupt on complete PDU     */
3063             SAR_CFG_RAWIE |     /* interrupt enable on raw cells */
3064             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full  */
3065             SAR_CFG_TMOIE |     /* interrupt on timer overflow   */
3066             SAR_CFG_FBIE |      /* interrupt on low free buffers */
3067             SAR_CFG_TXEN |      /* transmit operation enable     */
3068             SAR_CFG_TXINT |     /* interrupt on transmit status  */
3069             SAR_CFG_TXUIE |     /* interrupt on xmit underrun    */
3070             SAR_CFG_TXSFI       /* interrupt on TSQ almost full  */
3071             ;
3072
3073         writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
3074
3075         DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3076 }
3077
3078
3079 /*****************************************************************************/
3080 /*                                                                           */
3081 /* Initialisation and Deinitialization of IDT77252                           */
3082 /*                                                                           */
3083 /*****************************************************************************/
3084
3085
3086 static void
3087 deinit_card(struct idt77252_dev *card)
3088 {
3089         struct sk_buff *skb;
3090         int i, j;
3091
3092         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3093                 printk("%s: SAR not yet initialized.\n", card->name);
3094                 return;
3095         }
3096         DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3097
3098         writel(0, SAR_REG_CFG);
3099
3100         if (card->atmdev)
3101                 atm_dev_deregister(card->atmdev);
3102
3103         for (i = 0; i < 4; i++) {
3104                 for (j = 0; j < FBQ_SIZE; j++) {
3105                         skb = card->sbpool[i].skb[j];
3106                         if (skb) {
3107                                 pci_unmap_single(card->pcidev,
3108                                                  IDT77252_PRV_PADDR(skb),
3109                                                  (skb_end_pointer(skb) -
3110                                                   skb->data),
3111                                                  PCI_DMA_FROMDEVICE);
3112                                 card->sbpool[i].skb[j] = NULL;
3113                                 dev_kfree_skb(skb);
3114                         }
3115                 }
3116         }
3117
3118         vfree(card->soft_tst);
3119
3120         vfree(card->scd2vc);
3121
3122         vfree(card->vcs);
3123
3124         if (card->raw_cell_hnd) {
3125                 pci_free_consistent(card->pcidev, 2 * sizeof(u32),
3126                                     card->raw_cell_hnd, card->raw_cell_paddr);
3127         }
3128
3129         if (card->rsq.base) {
3130                 DIPRINTK("%s: Release RSQ ...\n", card->name);
3131                 deinit_rsq(card);
3132         }
3133
3134         if (card->tsq.base) {
3135                 DIPRINTK("%s: Release TSQ ...\n", card->name);
3136                 deinit_tsq(card);
3137         }
3138
3139         DIPRINTK("idt77252: Release IRQ.\n");
3140         free_irq(card->pcidev->irq, card);
3141
3142         for (i = 0; i < 4; i++) {
3143                 if (card->fbq[i])
3144                         iounmap(card->fbq[i]);
3145         }
3146
3147         if (card->membase)
3148                 iounmap(card->membase);
3149
3150         clear_bit(IDT77252_BIT_INIT, &card->flags);
3151         DIPRINTK("%s: Card deinitialized.\n", card->name);
3152 }
3153
3154
3155 static void __devinit
3156 init_sram(struct idt77252_dev *card)
3157 {
3158         int i;
3159
3160         for (i = 0; i < card->sramsize; i += 4)
3161                 write_sram(card, (i >> 2), 0);
3162
3163         /* set SRAM layout for THIS card */
3164         if (card->sramsize == (512 * 1024)) {
3165                 card->tct_base = SAR_SRAM_TCT_128_BASE;
3166                 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3167                     / SAR_SRAM_TCT_SIZE;
3168                 card->rct_base = SAR_SRAM_RCT_128_BASE;
3169                 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3170                     / SAR_SRAM_RCT_SIZE;
3171                 card->rt_base = SAR_SRAM_RT_128_BASE;
3172                 card->scd_base = SAR_SRAM_SCD_128_BASE;
3173                 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3174                     / SAR_SRAM_SCD_SIZE;
3175                 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3176                 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3177                 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3178                 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3179                 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3180                 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3181                 card->fifo_size = SAR_RXFD_SIZE_32K;
3182         } else {
3183                 card->tct_base = SAR_SRAM_TCT_32_BASE;
3184                 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3185                     / SAR_SRAM_TCT_SIZE;
3186                 card->rct_base = SAR_SRAM_RCT_32_BASE;
3187                 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3188                     / SAR_SRAM_RCT_SIZE;
3189                 card->rt_base = SAR_SRAM_RT_32_BASE;
3190                 card->scd_base = SAR_SRAM_SCD_32_BASE;
3191                 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3192                     / SAR_SRAM_SCD_SIZE;
3193                 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3194                 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3195                 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3196                 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3197                 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3198                 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3199                 card->fifo_size = SAR_RXFD_SIZE_4K;
3200         }
3201
3202         /* Initialize TCT */
3203         for (i = 0; i < card->tct_size; i++) {
3204                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3205                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3206                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3207                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3208                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3209                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3210                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3211                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3212         }
3213
3214         /* Initialize RCT */
3215         for (i = 0; i < card->rct_size; i++) {
3216                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3217                                     (u32) SAR_RCTE_RAWCELLINTEN);
3218                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3219                                     (u32) 0);
3220                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3221                                     (u32) 0);
3222                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3223                                     (u32) 0xffffffff);
3224         }
3225
3226         writel((SAR_FBQ0_LOW << 28) | 0x00000000 | 0x00000000 |
3227                (SAR_FB_SIZE_0 / 48), SAR_REG_FBQS0);
3228         writel((SAR_FBQ1_LOW << 28) | 0x00000000 | 0x00000000 |
3229                (SAR_FB_SIZE_1 / 48), SAR_REG_FBQS1);
3230         writel((SAR_FBQ2_LOW << 28) | 0x00000000 | 0x00000000 |
3231                (SAR_FB_SIZE_2 / 48), SAR_REG_FBQS2);
3232         writel((SAR_FBQ3_LOW << 28) | 0x00000000 | 0x00000000 |
3233                (SAR_FB_SIZE_3 / 48), SAR_REG_FBQS3);
3234
3235         /* Initialize rate table  */
3236         for (i = 0; i < 256; i++) {
3237                 write_sram(card, card->rt_base + i, log_to_rate[i]);
3238         }
3239
3240         for (i = 0; i < 128; i++) {
3241                 unsigned int tmp;
3242
3243                 tmp  = rate_to_log[(i << 2) + 0] << 0;
3244                 tmp |= rate_to_log[(i << 2) + 1] << 8;
3245                 tmp |= rate_to_log[(i << 2) + 2] << 16;
3246                 tmp |= rate_to_log[(i << 2) + 3] << 24;
3247                 write_sram(card, card->rt_base + 256 + i, tmp);
3248         }
3249
3250 #if 0 /* Fill RDF and AIR tables. */
3251         for (i = 0; i < 128; i++) {
3252                 unsigned int tmp;
3253
3254                 tmp = RDF[0][(i << 1) + 0] << 16;
3255                 tmp |= RDF[0][(i << 1) + 1] << 0;
3256                 write_sram(card, card->rt_base + 512 + i, tmp);
3257         }
3258
3259         for (i = 0; i < 128; i++) {
3260                 unsigned int tmp;
3261
3262                 tmp = AIR[0][(i << 1) + 0] << 16;
3263                 tmp |= AIR[0][(i << 1) + 1] << 0;
3264                 write_sram(card, card->rt_base + 640 + i, tmp);
3265         }
3266 #endif
3267
3268         IPRINTK("%s: initialize rate table ...\n", card->name);
3269         writel(card->rt_base << 2, SAR_REG_RTBL);
3270
3271         /* Initialize TSTs */
3272         IPRINTK("%s: initialize TST ...\n", card->name);
3273         card->tst_free = card->tst_size - 2;    /* last two are jumps */
3274
3275         for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3276                 write_sram(card, i, TSTE_OPC_VAR);
3277         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3278         idt77252_sram_write_errors = 1;
3279         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3280         idt77252_sram_write_errors = 0;
3281         for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3282                 write_sram(card, i, TSTE_OPC_VAR);
3283         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3284         idt77252_sram_write_errors = 1;
3285         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3286         idt77252_sram_write_errors = 0;
3287
3288         card->tst_index = 0;
3289         writel(card->tst[0] << 2, SAR_REG_TSTB);
3290
3291         /* Initialize ABRSTD and Receive FIFO */
3292         IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3293         writel(card->abrst_size | (card->abrst_base << 2),
3294                SAR_REG_ABRSTD);
3295
3296         IPRINTK("%s: initialize receive fifo ...\n", card->name);
3297         writel(card->fifo_size | (card->fifo_base << 2),
3298                SAR_REG_RXFD);
3299
3300         IPRINTK("%s: SRAM initialization complete.\n", card->name);
3301 }
3302
3303 static int __devinit
3304 init_card(struct atm_dev *dev)
3305 {
3306         struct idt77252_dev *card = dev->dev_data;
3307         struct pci_dev *pcidev = card->pcidev;
3308         unsigned long tmpl, modl;
3309         unsigned int linkrate, rsvdcr;
3310         unsigned int tst_entries;
3311         struct net_device *tmp;
3312         char tname[10];
3313
3314         u32 size;
3315         u_char pci_byte;
3316         u32 conf;
3317         int i, k;
3318
3319         if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3320                 printk("Error: SAR already initialized.\n");
3321                 return -1;
3322         }
3323
3324 /*****************************************************************/
3325 /*   P C I   C O N F I G U R A T I O N                           */
3326 /*****************************************************************/
3327
3328         /* Set PCI Retry-Timeout and TRDY timeout */
3329         IPRINTK("%s: Checking PCI retries.\n", card->name);
3330         if (pci_read_config_byte(pcidev, 0x40, &pci_byte) != 0) {
3331                 printk("%s: can't read PCI retry timeout.\n", card->name);
3332                 deinit_card(card);
3333                 return -1;
3334         }
3335         if (pci_byte != 0) {
3336                 IPRINTK("%s: PCI retry timeout: %d, set to 0.\n",
3337                         card->name, pci_byte);
3338                 if (pci_write_config_byte(pcidev, 0x40, 0) != 0) {
3339                         printk("%s: can't set PCI retry timeout.\n",
3340                                card->name);
3341                         deinit_card(card);
3342                         return -1;
3343                 }
3344         }
3345         IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3346         if (pci_read_config_byte(pcidev, 0x41, &pci_byte) != 0) {
3347                 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3348                 deinit_card(card);
3349                 return -1;
3350         }
3351         if (pci_byte != 0) {
3352                 IPRINTK("%s: PCI TRDY timeout: %d, set to 0.\n",
3353                         card->name, pci_byte);
3354                 if (pci_write_config_byte(pcidev, 0x41, 0) != 0) {
3355                         printk("%s: can't set PCI TRDY timeout.\n", card->name);
3356                         deinit_card(card);
3357                         return -1;
3358                 }
3359         }
3360         /* Reset Timer register */
3361         if (readl(SAR_REG_STAT) & SAR_STAT_TMROF) {
3362                 printk("%s: resetting timer overflow.\n", card->name);
3363                 writel(SAR_STAT_TMROF, SAR_REG_STAT);
3364         }
3365         IPRINTK("%s: Request IRQ ... ", card->name);
3366         if (request_irq(pcidev->irq, idt77252_interrupt, IRQF_SHARED,
3367                         card->name, card) != 0) {
3368                 printk("%s: can't allocate IRQ.\n", card->name);
3369                 deinit_card(card);
3370                 return -1;
3371         }
3372         IPRINTK("got %d.\n", pcidev->irq);
3373
3374 /*****************************************************************/
3375 /*   C H E C K   A N D   I N I T   S R A M                       */
3376 /*****************************************************************/
3377
3378         IPRINTK("%s: Initializing SRAM\n", card->name);
3379
3380         /* preset size of connecton table, so that init_sram() knows about it */
3381         conf =  SAR_CFG_TX_FIFO_SIZE_9 |        /* Use maximum fifo size */
3382                 SAR_CFG_RXSTQ_SIZE_8k |         /* Receive Status Queue is 8k */
3383                 SAR_CFG_IDLE_CLP |              /* Set CLP on idle cells */
3384 #ifndef ATM_IDT77252_SEND_IDLE
3385                 SAR_CFG_NO_IDLE |               /* Do not send idle cells */
3386 #endif
3387                 0;
3388
3389         if (card->sramsize == (512 * 1024))
3390                 conf |= SAR_CFG_CNTBL_1k;
3391         else
3392                 conf |= SAR_CFG_CNTBL_512;
3393
3394         switch (vpibits) {
3395         case 0:
3396                 conf |= SAR_CFG_VPVCS_0;
3397                 break;
3398         default:
3399         case 1:
3400                 conf |= SAR_CFG_VPVCS_1;
3401                 break;
3402         case 2:
3403                 conf |= SAR_CFG_VPVCS_2;
3404                 break;
3405         case 8:
3406                 conf |= SAR_CFG_VPVCS_8;
3407                 break;
3408         }
3409
3410         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3411
3412         init_sram(card);
3413
3414 /********************************************************************/
3415 /*  A L L O C   R A M   A N D   S E T   V A R I O U S   T H I N G S */
3416 /********************************************************************/
3417         /* Initialize TSQ */
3418         if (0 != init_tsq(card)) {
3419                 deinit_card(card);
3420                 return -1;
3421         }
3422         /* Initialize RSQ */
3423         if (0 != init_rsq(card)) {
3424                 deinit_card(card);
3425                 return -1;
3426         }
3427
3428         card->vpibits = vpibits;
3429         if (card->sramsize == (512 * 1024)) {
3430                 card->vcibits = 10 - card->vpibits;
3431         } else {
3432                 card->vcibits = 9 - card->vpibits;
3433         }
3434
3435         card->vcimask = 0;
3436         for (k = 0, i = 1; k < card->vcibits; k++) {
3437                 card->vcimask |= i;
3438                 i <<= 1;
3439         }
3440
3441         IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3442         writel(0, SAR_REG_VPM);
3443
3444         /* Little Endian Order   */
3445         writel(0, SAR_REG_GP);
3446
3447         /* Initialize RAW Cell Handle Register  */
3448         card->raw_cell_hnd = pci_alloc_consistent(card->pcidev, 2 * sizeof(u32),
3449                                                   &card->raw_cell_paddr);
3450         if (!card->raw_cell_hnd) {
3451                 printk("%s: memory allocation failure.\n", card->name);
3452                 deinit_card(card);
3453                 return -1;
3454         }
3455         memset(card->raw_cell_hnd, 0, 2 * sizeof(u32));
3456         writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3457         IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3458                 card->raw_cell_hnd);
3459
3460         size = sizeof(struct vc_map *) * card->tct_size;
3461         IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3462         if (NULL == (card->vcs = vmalloc(size))) {
3463                 printk("%s: memory allocation failure.\n", card->name);
3464                 deinit_card(card);
3465                 return -1;
3466         }
3467         memset(card->vcs, 0, size);
3468
3469         size = sizeof(struct vc_map *) * card->scd_size;
3470         IPRINTK("%s: allocate %d byte for SCD to VC mapping.\n",
3471                 card->name, size);
3472         if (NULL == (card->scd2vc = vmalloc(size))) {
3473                 printk("%s: memory allocation failure.\n", card->name);
3474                 deinit_card(card);
3475                 return -1;
3476         }
3477         memset(card->scd2vc, 0, size);
3478
3479         size = sizeof(struct tst_info) * (card->tst_size - 2);
3480         IPRINTK("%s: allocate %d byte for TST to VC mapping.\n",
3481                 card->name, size);
3482         if (NULL == (card->soft_tst = vmalloc(size))) {
3483                 printk("%s: memory allocation failure.\n", card->name);
3484                 deinit_card(card);
3485                 return -1;
3486         }
3487         for (i = 0; i < card->tst_size - 2; i++) {
3488                 card->soft_tst[i].tste = TSTE_OPC_VAR;
3489                 card->soft_tst[i].vc = NULL;
3490         }
3491
3492         if (dev->phy == NULL) {
3493                 printk("%s: No LT device defined.\n", card->name);
3494                 deinit_card(card);
3495                 return -1;
3496         }
3497         if (dev->phy->ioctl == NULL) {
3498                 printk("%s: LT had no IOCTL funtion defined.\n", card->name);
3499                 deinit_card(card);
3500                 return -1;
3501         }
3502
3503 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3504         /*
3505          * this is a jhs hack to get around special functionality in the
3506          * phy driver for the atecom hardware; the functionality doesn't
3507          * exist in the linux atm suni driver
3508          *
3509          * it isn't the right way to do things, but as the guy from NIST
3510          * said, talking about their measurement of the fine structure
3511          * constant, "it's good enough for government work."
3512          */
3513         linkrate = 149760000;
3514 #endif
3515
3516         card->link_pcr = (linkrate / 8 / 53);
3517         printk("%s: Linkrate on ATM line : %u bit/s, %u cell/s.\n",
3518                card->name, linkrate, card->link_pcr);
3519
3520 #ifdef ATM_IDT77252_SEND_IDLE
3521         card->utopia_pcr = card->link_pcr;
3522 #else
3523         card->utopia_pcr = (160000000 / 8 / 54);
3524 #endif
3525
3526         rsvdcr = 0;
3527         if (card->utopia_pcr > card->link_pcr)
3528                 rsvdcr = card->utopia_pcr - card->link_pcr;
3529
3530         tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3531         modl = tmpl % (unsigned long)card->utopia_pcr;
3532         tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3533         if (modl)
3534                 tst_entries++;
3535         card->tst_free -= tst_entries;
3536         fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3537
3538 #ifdef HAVE_EEPROM
3539         idt77252_eeprom_init(card);
3540         printk("%s: EEPROM: %02x:", card->name,
3541                 idt77252_eeprom_read_status(card));
3542
3543         for (i = 0; i < 0x80; i++) {
3544                 printk(" %02x",
3545                 idt77252_eeprom_read_byte(card, i)
3546                 );
3547         }
3548         printk("\n");
3549 #endif /* HAVE_EEPROM */
3550
3551         /*
3552          * XXX: <hack>
3553          */
3554         sprintf(tname, "eth%d", card->index);
3555         tmp = dev_get_by_name(&init_net, tname);        /* jhs: was "tmp = dev_get(tname);" */
3556         if (tmp) {
3557                 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3558
3559                 printk("%s: ESI %pM\n", card->name, card->atmdev->esi);
3560         }
3561         /*
3562          * XXX: </hack>
3563          */
3564
3565         /* Set Maximum Deficit Count for now. */
3566         writel(0xffff, SAR_REG_MDFCT);
3567
3568         set_bit(IDT77252_BIT_INIT, &card->flags);
3569
3570         XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3571         return 0;
3572 }
3573
3574
3575 /*****************************************************************************/
3576 /*                                                                           */
3577 /* Probing of IDT77252 ABR SAR                                               */
3578 /*                                                                           */
3579 /*****************************************************************************/
3580
3581
3582 static int __devinit
3583 idt77252_preset(struct idt77252_dev *card)
3584 {
3585         u16 pci_command;
3586
3587 /*****************************************************************/
3588 /*   P C I   C O N F I G U R A T I O N                           */
3589 /*****************************************************************/
3590
3591         XPRINTK("%s: Enable PCI master and memory access for SAR.\n",
3592                 card->name);
3593         if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3594                 printk("%s: can't read PCI_COMMAND.\n", card->name);
3595                 deinit_card(card);
3596                 return -1;
3597         }
3598         if (!(pci_command & PCI_COMMAND_IO)) {
3599                 printk("%s: PCI_COMMAND: %04x (???)\n",
3600                        card->name, pci_command);
3601                 deinit_card(card);
3602                 return (-1);
3603         }
3604         pci_command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
3605         if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3606                 printk("%s: can't write PCI_COMMAND.\n", card->name);
3607                 deinit_card(card);
3608                 return -1;
3609         }
3610 /*****************************************************************/
3611 /*   G E N E R I C   R E S E T                                   */
3612 /*****************************************************************/
3613
3614         /* Software reset */
3615         writel(SAR_CFG_SWRST, SAR_REG_CFG);
3616         mdelay(1);
3617         writel(0, SAR_REG_CFG);
3618
3619         IPRINTK("%s: Software resetted.\n", card->name);
3620         return 0;
3621 }
3622
3623
3624 static unsigned long __devinit
3625 probe_sram(struct idt77252_dev *card)
3626 {
3627         u32 data, addr;
3628
3629         writel(0, SAR_REG_DR0);
3630         writel(SAR_CMD_WRITE_SRAM | (0 << 2), SAR_REG_CMD);
3631
3632         for (addr = 0x4000; addr < 0x80000; addr += 0x4000) {
3633                 writel(ATM_POISON, SAR_REG_DR0);
3634                 writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
3635
3636                 writel(SAR_CMD_READ_SRAM | (0 << 2), SAR_REG_CMD);
3637                 data = readl(SAR_REG_DR0);
3638
3639                 if (data != 0)
3640                         break;
3641         }
3642
3643         return addr * sizeof(u32);
3644 }
3645
3646 static int __devinit
3647 idt77252_init_one(struct pci_dev *pcidev, const struct pci_device_id *id)
3648 {
3649         static struct idt77252_dev **last = &idt77252_chain;
3650         static int index = 0;
3651
3652         unsigned long membase, srambase;
3653         struct idt77252_dev *card;
3654         struct atm_dev *dev;
3655         int i, err;
3656
3657
3658         if ((err = pci_enable_device(pcidev))) {
3659                 printk("idt77252: can't enable PCI device at %s\n", pci_name(pcidev));
3660                 return err;
3661         }
3662
3663         card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3664         if (!card) {
3665                 printk("idt77252-%d: can't allocate private data\n", index);
3666                 err = -ENOMEM;
3667                 goto err_out_disable_pdev;
3668         }
3669         card->revision = pcidev->revision;
3670         card->index = index;
3671         card->pcidev = pcidev;
3672         sprintf(card->name, "idt77252-%d", card->index);
3673
3674         INIT_WORK(&card->tqueue, idt77252_softint);
3675
3676         membase = pci_resource_start(pcidev, 1);
3677         srambase = pci_resource_start(pcidev, 2);
3678
3679         mutex_init(&card->mutex);
3680         spin_lock_init(&card->cmd_lock);
3681         spin_lock_init(&card->tst_lock);
3682
3683         init_timer(&card->tst_timer);
3684         card->tst_timer.data = (unsigned long)card;
3685         card->tst_timer.function = tst_timer;
3686
3687         /* Do the I/O remapping... */
3688         card->membase = ioremap(membase, 1024);
3689         if (!card->membase) {
3690                 printk("%s: can't ioremap() membase\n", card->name);
3691                 err = -EIO;
3692                 goto err_out_free_card;
3693         }
3694
3695         if (idt77252_preset(card)) {
3696                 printk("%s: preset failed\n", card->name);
3697                 err = -EIO;
3698                 goto err_out_iounmap;
3699         }
3700
3701         dev = atm_dev_register("idt77252", &idt77252_ops, -1, NULL);
3702         if (!dev) {
3703                 printk("%s: can't register atm device\n", card->name);
3704                 err = -EIO;
3705                 goto err_out_iounmap;
3706         }
3707         dev->dev_data = card;
3708         card->atmdev = dev;
3709
3710 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3711         suni_init(dev);
3712         if (!dev->phy) {
3713                 printk("%s: can't init SUNI\n", card->name);
3714                 err = -EIO;
3715                 goto err_out_deinit_card;
3716         }
3717 #endif  /* CONFIG_ATM_IDT77252_USE_SUNI */
3718
3719         card->sramsize = probe_sram(card);
3720
3721         for (i = 0; i < 4; i++) {
3722                 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3723                 if (!card->fbq[i]) {
3724                         printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3725                         err = -EIO;
3726                         goto err_out_deinit_card;
3727                 }
3728         }
3729
3730         printk("%s: ABR SAR (Rev %c): MEM %08lx SRAM %08lx [%u KB]\n",
3731                card->name, ((card->revision > 1) && (card->revision < 25)) ?
3732                'A' + card->revision - 1 : '?', membase, srambase,
3733                card->sramsize / 1024);
3734
3735         if (init_card(dev)) {
3736                 printk("%s: init_card failed\n", card->name);
3737                 err = -EIO;
3738                 goto err_out_deinit_card;
3739         }
3740
3741         dev->ci_range.vpi_bits = card->vpibits;
3742         dev->ci_range.vci_bits = card->vcibits;
3743         dev->link_rate = card->link_pcr;
3744
3745         if (dev->phy->start)
3746                 dev->phy->start(dev);
3747
3748         if (idt77252_dev_open(card)) {
3749                 printk("%s: dev_open failed\n", card->name);
3750                 err = -EIO;
3751                 goto err_out_stop;
3752         }
3753
3754         *last = card;
3755         last = &card->next;
3756         index++;
3757
3758         return 0;
3759
3760 err_out_stop:
3761         if (dev->phy->stop)
3762                 dev->phy->stop(dev);
3763
3764 err_out_deinit_card:
3765         deinit_card(card);
3766
3767 err_out_iounmap:
3768         iounmap(card->membase);
3769
3770 err_out_free_card:
3771         kfree(card);
3772
3773 err_out_disable_pdev:
3774         pci_disable_device(pcidev);
3775         return err;
3776 }
3777
3778 static struct pci_device_id idt77252_pci_tbl[] =
3779 {
3780         { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77252), 0 },
3781         { 0, }
3782 };
3783
3784 MODULE_DEVICE_TABLE(pci, idt77252_pci_tbl);
3785
3786 static struct pci_driver idt77252_driver = {
3787         .name           = "idt77252",
3788         .id_table       = idt77252_pci_tbl,
3789         .probe          = idt77252_init_one,
3790 };
3791
3792 static int __init idt77252_init(void)
3793 {
3794         struct sk_buff *skb;
3795
3796         printk("%s: at %p\n", __func__, idt77252_init);
3797
3798         if (sizeof(skb->cb) < sizeof(struct atm_skb_data) +
3799                               sizeof(struct idt77252_skb_prv)) {
3800                 printk(KERN_ERR "%s: skb->cb is too small (%lu < %lu)\n",
3801                        __func__, (unsigned long) sizeof(skb->cb),
3802                        (unsigned long) sizeof(struct atm_skb_data) +
3803                                        sizeof(struct idt77252_skb_prv));
3804                 return -EIO;
3805         }
3806
3807         return pci_register_driver(&idt77252_driver);
3808 }
3809
3810 static void __exit idt77252_exit(void)
3811 {
3812         struct idt77252_dev *card;
3813         struct atm_dev *dev;
3814
3815         pci_unregister_driver(&idt77252_driver);
3816
3817         while (idt77252_chain) {
3818                 card = idt77252_chain;
3819                 dev = card->atmdev;
3820                 idt77252_chain = card->next;
3821
3822                 if (dev->phy->stop)
3823                         dev->phy->stop(dev);
3824                 deinit_card(card);
3825                 pci_disable_device(card->pcidev);
3826                 kfree(card);
3827         }
3828
3829         DIPRINTK("idt77252: finished cleanup-module().\n");
3830 }
3831
3832 module_init(idt77252_init);
3833 module_exit(idt77252_exit);
3834
3835 MODULE_LICENSE("GPL");
3836
3837 module_param(vpibits, uint, 0);
3838 MODULE_PARM_DESC(vpibits, "number of VPI bits supported (0, 1, or 2)");
3839 #ifdef CONFIG_ATM_IDT77252_DEBUG
3840 module_param(debug, ulong, 0644);
3841 MODULE_PARM_DESC(debug,   "debug bitmap, see drivers/atm/idt77252.h");
3842 #endif
3843
3844 MODULE_AUTHOR("Eddie C. Dost <ecd@atecom.com>");
3845 MODULE_DESCRIPTION("IDT77252 ABR SAR Driver");