2 * Register map access API - MMIO support
4 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/clk.h>
20 #include <linux/err.h>
22 #include <linux/module.h>
23 #include <linux/regmap.h>
24 #include <linux/slab.h>
26 struct regmap_mmio_context {
34 static inline void regmap_mmio_regsize_check(size_t reg_size)
49 static int regmap_mmio_regbits_check(size_t reg_bits)
64 static int regmap_mmio_get_min_stride(size_t val_bits)
70 /* The core treats 0 as 1 */
91 static inline void regmap_mmio_count_check(size_t count, u32 offset)
93 BUG_ON(count <= offset);
96 static inline unsigned int
97 regmap_mmio_get_offset(const void *reg, size_t reg_size)
115 static int regmap_mmio_gather_write(void *context,
116 const void *reg, size_t reg_size,
117 const void *val, size_t val_size)
119 struct regmap_mmio_context *ctx = context;
123 regmap_mmio_regsize_check(reg_size);
125 if (!IS_ERR(ctx->clk)) {
126 ret = clk_enable(ctx->clk);
131 offset = regmap_mmio_get_offset(reg, reg_size);
134 switch (ctx->val_bytes) {
136 writeb(*(u8 *)val, ctx->regs + offset);
139 writew(*(u16 *)val, ctx->regs + offset);
142 writel(*(u32 *)val, ctx->regs + offset);
146 writeq(*(u64 *)val, ctx->regs + offset);
150 /* Should be caught by regmap_mmio_check_config */
153 val_size -= ctx->val_bytes;
154 val += ctx->val_bytes;
155 offset += ctx->val_bytes;
158 if (!IS_ERR(ctx->clk))
159 clk_disable(ctx->clk);
164 static int regmap_mmio_write(void *context, const void *data, size_t count)
166 struct regmap_mmio_context *ctx = context;
167 unsigned int offset = ctx->reg_bytes + ctx->pad_bytes;
169 regmap_mmio_count_check(count, offset);
171 return regmap_mmio_gather_write(context, data, ctx->reg_bytes,
172 data + offset, count - offset);
175 static int regmap_mmio_read(void *context,
176 const void *reg, size_t reg_size,
177 void *val, size_t val_size)
179 struct regmap_mmio_context *ctx = context;
183 regmap_mmio_regsize_check(reg_size);
185 if (!IS_ERR(ctx->clk)) {
186 ret = clk_enable(ctx->clk);
191 offset = regmap_mmio_get_offset(reg, reg_size);
194 switch (ctx->val_bytes) {
196 *(u8 *)val = readb(ctx->regs + offset);
199 *(u16 *)val = readw(ctx->regs + offset);
202 *(u32 *)val = readl(ctx->regs + offset);
206 *(u64 *)val = readq(ctx->regs + offset);
210 /* Should be caught by regmap_mmio_check_config */
213 val_size -= ctx->val_bytes;
214 val += ctx->val_bytes;
215 offset += ctx->val_bytes;
218 if (!IS_ERR(ctx->clk))
219 clk_disable(ctx->clk);
224 static void regmap_mmio_free_context(void *context)
226 struct regmap_mmio_context *ctx = context;
228 if (!IS_ERR(ctx->clk)) {
229 clk_unprepare(ctx->clk);
235 static struct regmap_bus regmap_mmio = {
237 .write = regmap_mmio_write,
238 .gather_write = regmap_mmio_gather_write,
239 .read = regmap_mmio_read,
240 .free_context = regmap_mmio_free_context,
241 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
242 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
245 static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
248 const struct regmap_config *config)
250 struct regmap_mmio_context *ctx;
254 ret = regmap_mmio_regbits_check(config->reg_bits);
258 if (config->pad_bits)
259 return ERR_PTR(-EINVAL);
261 min_stride = regmap_mmio_get_min_stride(config->val_bits);
263 return ERR_PTR(min_stride);
265 if (config->reg_stride < min_stride)
266 return ERR_PTR(-EINVAL);
268 switch (config->reg_format_endian) {
269 case REGMAP_ENDIAN_DEFAULT:
270 case REGMAP_ENDIAN_NATIVE:
273 return ERR_PTR(-EINVAL);
276 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
278 return ERR_PTR(-ENOMEM);
281 ctx->val_bytes = config->val_bits / 8;
282 ctx->reg_bytes = config->reg_bits / 8;
283 ctx->pad_bytes = config->pad_bits / 8;
284 ctx->clk = ERR_PTR(-ENODEV);
289 ctx->clk = clk_get(dev, clk_id);
290 if (IS_ERR(ctx->clk)) {
291 ret = PTR_ERR(ctx->clk);
295 ret = clk_prepare(ctx->clk);
309 struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
311 const struct regmap_config *config,
312 struct lock_class_key *lock_key,
313 const char *lock_name)
315 struct regmap_mmio_context *ctx;
317 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
319 return ERR_CAST(ctx);
321 return __regmap_init(dev, ®map_mmio, ctx, config,
322 lock_key, lock_name);
324 EXPORT_SYMBOL_GPL(__regmap_init_mmio_clk);
326 struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
329 const struct regmap_config *config,
330 struct lock_class_key *lock_key,
331 const char *lock_name)
333 struct regmap_mmio_context *ctx;
335 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
337 return ERR_CAST(ctx);
339 return __devm_regmap_init(dev, ®map_mmio, ctx, config,
340 lock_key, lock_name);
342 EXPORT_SYMBOL_GPL(__devm_regmap_init_mmio_clk);
344 MODULE_LICENSE("GPL v2");