2 * Register map access API
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
19 #include <linux/rbtree.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
23 #define CREATE_TRACE_POINTS
29 * Sometimes for failures during very early init the trace
30 * infrastructure isn't available early enough to be used. For this
31 * sort of problem defining LOG_DEVICE will add printks for basic
32 * register I/O on a specific device.
36 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
37 unsigned int mask, unsigned int val,
38 bool *change, bool force_write);
40 static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 static int _regmap_bus_read(void *context, unsigned int reg,
44 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 static int _regmap_bus_raw_write(void *context, unsigned int reg,
51 bool regmap_reg_in_ranges(unsigned int reg,
52 const struct regmap_range *ranges,
55 const struct regmap_range *r;
58 for (i = 0, r = ranges; i < nranges; i++, r++)
59 if (regmap_reg_in_range(reg, r))
63 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
66 const struct regmap_access_table *table)
68 /* Check "no ranges" first */
69 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
72 /* In case zero "yes ranges" are supplied, any reg is OK */
73 if (!table->n_yes_ranges)
76 return regmap_reg_in_ranges(reg, table->yes_ranges,
79 EXPORT_SYMBOL_GPL(regmap_check_range_table);
81 bool regmap_writeable(struct regmap *map, unsigned int reg)
83 if (map->max_register && reg > map->max_register)
86 if (map->writeable_reg)
87 return map->writeable_reg(map->dev, reg);
90 return regmap_check_range_table(map, reg, map->wr_table);
95 bool regmap_readable(struct regmap *map, unsigned int reg)
100 if (map->max_register && reg > map->max_register)
103 if (map->format.format_write)
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
110 return regmap_check_range_table(map, reg, map->rd_table);
115 bool regmap_volatile(struct regmap *map, unsigned int reg)
117 if (!map->format.format_write && !regmap_readable(map, reg))
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
123 if (map->volatile_table)
124 return regmap_check_range_table(map, reg, map->volatile_table);
132 bool regmap_precious(struct regmap *map, unsigned int reg)
134 if (!regmap_readable(map, reg))
137 if (map->precious_reg)
138 return map->precious_reg(map->dev, reg);
140 if (map->precious_table)
141 return regmap_check_range_table(map, reg, map->precious_table);
146 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
151 for (i = 0; i < num; i++)
152 if (!regmap_volatile(map, reg + i))
158 static void regmap_format_2_6_write(struct regmap *map,
159 unsigned int reg, unsigned int val)
161 u8 *out = map->work_buf;
163 *out = (reg << 6) | val;
166 static void regmap_format_4_12_write(struct regmap *map,
167 unsigned int reg, unsigned int val)
169 __be16 *out = map->work_buf;
170 *out = cpu_to_be16((reg << 12) | val);
173 static void regmap_format_7_9_write(struct regmap *map,
174 unsigned int reg, unsigned int val)
176 __be16 *out = map->work_buf;
177 *out = cpu_to_be16((reg << 9) | val);
180 static void regmap_format_10_14_write(struct regmap *map,
181 unsigned int reg, unsigned int val)
183 u8 *out = map->work_buf;
186 out[1] = (val >> 8) | (reg << 6);
190 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
197 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
201 b[0] = cpu_to_be16(val << shift);
204 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
208 b[0] = cpu_to_le16(val << shift);
211 static void regmap_format_16_native(void *buf, unsigned int val,
214 *(u16 *)buf = val << shift;
217 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
228 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
232 b[0] = cpu_to_be32(val << shift);
235 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
239 b[0] = cpu_to_le32(val << shift);
242 static void regmap_format_32_native(void *buf, unsigned int val,
245 *(u32 *)buf = val << shift;
249 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
253 b[0] = cpu_to_be64((u64)val << shift);
256 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
260 b[0] = cpu_to_le64((u64)val << shift);
263 static void regmap_format_64_native(void *buf, unsigned int val,
266 *(u64 *)buf = (u64)val << shift;
270 static void regmap_parse_inplace_noop(void *buf)
274 static unsigned int regmap_parse_8(const void *buf)
281 static unsigned int regmap_parse_16_be(const void *buf)
283 const __be16 *b = buf;
285 return be16_to_cpu(b[0]);
288 static unsigned int regmap_parse_16_le(const void *buf)
290 const __le16 *b = buf;
292 return le16_to_cpu(b[0]);
295 static void regmap_parse_16_be_inplace(void *buf)
299 b[0] = be16_to_cpu(b[0]);
302 static void regmap_parse_16_le_inplace(void *buf)
306 b[0] = le16_to_cpu(b[0]);
309 static unsigned int regmap_parse_16_native(const void *buf)
314 static unsigned int regmap_parse_24(const void *buf)
317 unsigned int ret = b[2];
318 ret |= ((unsigned int)b[1]) << 8;
319 ret |= ((unsigned int)b[0]) << 16;
324 static unsigned int regmap_parse_32_be(const void *buf)
326 const __be32 *b = buf;
328 return be32_to_cpu(b[0]);
331 static unsigned int regmap_parse_32_le(const void *buf)
333 const __le32 *b = buf;
335 return le32_to_cpu(b[0]);
338 static void regmap_parse_32_be_inplace(void *buf)
342 b[0] = be32_to_cpu(b[0]);
345 static void regmap_parse_32_le_inplace(void *buf)
349 b[0] = le32_to_cpu(b[0]);
352 static unsigned int regmap_parse_32_native(const void *buf)
358 static unsigned int regmap_parse_64_be(const void *buf)
360 const __be64 *b = buf;
362 return be64_to_cpu(b[0]);
365 static unsigned int regmap_parse_64_le(const void *buf)
367 const __le64 *b = buf;
369 return le64_to_cpu(b[0]);
372 static void regmap_parse_64_be_inplace(void *buf)
376 b[0] = be64_to_cpu(b[0]);
379 static void regmap_parse_64_le_inplace(void *buf)
383 b[0] = le64_to_cpu(b[0]);
386 static unsigned int regmap_parse_64_native(const void *buf)
392 static void regmap_lock_mutex(void *__map)
394 struct regmap *map = __map;
395 mutex_lock(&map->mutex);
398 static void regmap_unlock_mutex(void *__map)
400 struct regmap *map = __map;
401 mutex_unlock(&map->mutex);
404 static void regmap_lock_spinlock(void *__map)
405 __acquires(&map->spinlock)
407 struct regmap *map = __map;
410 spin_lock_irqsave(&map->spinlock, flags);
411 map->spinlock_flags = flags;
414 static void regmap_unlock_spinlock(void *__map)
415 __releases(&map->spinlock)
417 struct regmap *map = __map;
418 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
421 static void dev_get_regmap_release(struct device *dev, void *res)
424 * We don't actually have anything to do here; the goal here
425 * is not to manage the regmap but to provide a simple way to
426 * get the regmap back given a struct device.
430 static bool _regmap_range_add(struct regmap *map,
431 struct regmap_range_node *data)
433 struct rb_root *root = &map->range_tree;
434 struct rb_node **new = &(root->rb_node), *parent = NULL;
437 struct regmap_range_node *this =
438 container_of(*new, struct regmap_range_node, node);
441 if (data->range_max < this->range_min)
442 new = &((*new)->rb_left);
443 else if (data->range_min > this->range_max)
444 new = &((*new)->rb_right);
449 rb_link_node(&data->node, parent, new);
450 rb_insert_color(&data->node, root);
455 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
458 struct rb_node *node = map->range_tree.rb_node;
461 struct regmap_range_node *this =
462 container_of(node, struct regmap_range_node, node);
464 if (reg < this->range_min)
465 node = node->rb_left;
466 else if (reg > this->range_max)
467 node = node->rb_right;
475 static void regmap_range_exit(struct regmap *map)
477 struct rb_node *next;
478 struct regmap_range_node *range_node;
480 next = rb_first(&map->range_tree);
482 range_node = rb_entry(next, struct regmap_range_node, node);
483 next = rb_next(&range_node->node);
484 rb_erase(&range_node->node, &map->range_tree);
488 kfree(map->selector_work_buf);
491 int regmap_attach_dev(struct device *dev, struct regmap *map,
492 const struct regmap_config *config)
498 regmap_debugfs_init(map, config->name);
500 /* Add a devres resource for dev_get_regmap() */
501 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
503 regmap_debugfs_exit(map);
511 EXPORT_SYMBOL_GPL(regmap_attach_dev);
513 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
514 const struct regmap_config *config)
516 enum regmap_endian endian;
518 /* Retrieve the endianness specification from the regmap config */
519 endian = config->reg_format_endian;
521 /* If the regmap config specified a non-default value, use that */
522 if (endian != REGMAP_ENDIAN_DEFAULT)
525 /* Retrieve the endianness specification from the bus config */
526 if (bus && bus->reg_format_endian_default)
527 endian = bus->reg_format_endian_default;
529 /* If the bus specified a non-default value, use that */
530 if (endian != REGMAP_ENDIAN_DEFAULT)
533 /* Use this if no other value was found */
534 return REGMAP_ENDIAN_BIG;
537 enum regmap_endian regmap_get_val_endian(struct device *dev,
538 const struct regmap_bus *bus,
539 const struct regmap_config *config)
541 struct device_node *np;
542 enum regmap_endian endian;
544 /* Retrieve the endianness specification from the regmap config */
545 endian = config->val_format_endian;
547 /* If the regmap config specified a non-default value, use that */
548 if (endian != REGMAP_ENDIAN_DEFAULT)
551 /* If the dev and dev->of_node exist try to get endianness from DT */
552 if (dev && dev->of_node) {
555 /* Parse the device's DT node for an endianness specification */
556 if (of_property_read_bool(np, "big-endian"))
557 endian = REGMAP_ENDIAN_BIG;
558 else if (of_property_read_bool(np, "little-endian"))
559 endian = REGMAP_ENDIAN_LITTLE;
561 /* If the endianness was specified in DT, use that */
562 if (endian != REGMAP_ENDIAN_DEFAULT)
566 /* Retrieve the endianness specification from the bus config */
567 if (bus && bus->val_format_endian_default)
568 endian = bus->val_format_endian_default;
570 /* If the bus specified a non-default value, use that */
571 if (endian != REGMAP_ENDIAN_DEFAULT)
574 /* Use this if no other value was found */
575 return REGMAP_ENDIAN_BIG;
577 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
579 struct regmap *__regmap_init(struct device *dev,
580 const struct regmap_bus *bus,
582 const struct regmap_config *config,
583 struct lock_class_key *lock_key,
584 const char *lock_name)
588 enum regmap_endian reg_endian, val_endian;
594 map = kzalloc(sizeof(*map), GFP_KERNEL);
600 if (config->lock && config->unlock) {
601 map->lock = config->lock;
602 map->unlock = config->unlock;
603 map->lock_arg = config->lock_arg;
605 if ((bus && bus->fast_io) ||
607 spin_lock_init(&map->spinlock);
608 map->lock = regmap_lock_spinlock;
609 map->unlock = regmap_unlock_spinlock;
610 lockdep_set_class_and_name(&map->spinlock,
611 lock_key, lock_name);
613 mutex_init(&map->mutex);
614 map->lock = regmap_lock_mutex;
615 map->unlock = regmap_unlock_mutex;
616 lockdep_set_class_and_name(&map->mutex,
617 lock_key, lock_name);
623 * When we write in fast-paths with regmap_bulk_write() don't allocate
624 * scratch buffers with sleeping allocations.
626 if ((bus && bus->fast_io) || config->fast_io)
627 map->alloc_flags = GFP_ATOMIC;
629 map->alloc_flags = GFP_KERNEL;
631 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
632 map->format.pad_bytes = config->pad_bits / 8;
633 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
634 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
635 config->val_bits + config->pad_bits, 8);
636 map->reg_shift = config->pad_bits % 8;
637 if (config->reg_stride)
638 map->reg_stride = config->reg_stride;
641 map->use_single_read = config->use_single_rw || !bus || !bus->read;
642 map->use_single_write = config->use_single_rw || !bus || !bus->write;
643 map->can_multi_write = config->can_multi_write && bus && bus->write;
645 map->max_raw_read = bus->max_raw_read;
646 map->max_raw_write = bus->max_raw_write;
650 map->bus_context = bus_context;
651 map->max_register = config->max_register;
652 map->wr_table = config->wr_table;
653 map->rd_table = config->rd_table;
654 map->volatile_table = config->volatile_table;
655 map->precious_table = config->precious_table;
656 map->writeable_reg = config->writeable_reg;
657 map->readable_reg = config->readable_reg;
658 map->volatile_reg = config->volatile_reg;
659 map->precious_reg = config->precious_reg;
660 map->cache_type = config->cache_type;
661 map->name = config->name;
663 spin_lock_init(&map->async_lock);
664 INIT_LIST_HEAD(&map->async_list);
665 INIT_LIST_HEAD(&map->async_free);
666 init_waitqueue_head(&map->async_waitq);
668 if (config->read_flag_mask || config->write_flag_mask) {
669 map->read_flag_mask = config->read_flag_mask;
670 map->write_flag_mask = config->write_flag_mask;
672 map->read_flag_mask = bus->read_flag_mask;
676 map->reg_read = config->reg_read;
677 map->reg_write = config->reg_write;
679 map->defer_caching = false;
680 goto skip_format_initialization;
681 } else if (!bus->read || !bus->write) {
682 map->reg_read = _regmap_bus_reg_read;
683 map->reg_write = _regmap_bus_reg_write;
685 map->defer_caching = false;
686 goto skip_format_initialization;
688 map->reg_read = _regmap_bus_read;
689 map->reg_update_bits = bus->reg_update_bits;
692 reg_endian = regmap_get_reg_endian(bus, config);
693 val_endian = regmap_get_val_endian(dev, bus, config);
695 switch (config->reg_bits + map->reg_shift) {
697 switch (config->val_bits) {
699 map->format.format_write = regmap_format_2_6_write;
707 switch (config->val_bits) {
709 map->format.format_write = regmap_format_4_12_write;
717 switch (config->val_bits) {
719 map->format.format_write = regmap_format_7_9_write;
727 switch (config->val_bits) {
729 map->format.format_write = regmap_format_10_14_write;
737 map->format.format_reg = regmap_format_8;
741 switch (reg_endian) {
742 case REGMAP_ENDIAN_BIG:
743 map->format.format_reg = regmap_format_16_be;
745 case REGMAP_ENDIAN_NATIVE:
746 map->format.format_reg = regmap_format_16_native;
754 if (reg_endian != REGMAP_ENDIAN_BIG)
756 map->format.format_reg = regmap_format_24;
760 switch (reg_endian) {
761 case REGMAP_ENDIAN_BIG:
762 map->format.format_reg = regmap_format_32_be;
764 case REGMAP_ENDIAN_NATIVE:
765 map->format.format_reg = regmap_format_32_native;
774 switch (reg_endian) {
775 case REGMAP_ENDIAN_BIG:
776 map->format.format_reg = regmap_format_64_be;
778 case REGMAP_ENDIAN_NATIVE:
779 map->format.format_reg = regmap_format_64_native;
791 if (val_endian == REGMAP_ENDIAN_NATIVE)
792 map->format.parse_inplace = regmap_parse_inplace_noop;
794 switch (config->val_bits) {
796 map->format.format_val = regmap_format_8;
797 map->format.parse_val = regmap_parse_8;
798 map->format.parse_inplace = regmap_parse_inplace_noop;
801 switch (val_endian) {
802 case REGMAP_ENDIAN_BIG:
803 map->format.format_val = regmap_format_16_be;
804 map->format.parse_val = regmap_parse_16_be;
805 map->format.parse_inplace = regmap_parse_16_be_inplace;
807 case REGMAP_ENDIAN_LITTLE:
808 map->format.format_val = regmap_format_16_le;
809 map->format.parse_val = regmap_parse_16_le;
810 map->format.parse_inplace = regmap_parse_16_le_inplace;
812 case REGMAP_ENDIAN_NATIVE:
813 map->format.format_val = regmap_format_16_native;
814 map->format.parse_val = regmap_parse_16_native;
821 if (val_endian != REGMAP_ENDIAN_BIG)
823 map->format.format_val = regmap_format_24;
824 map->format.parse_val = regmap_parse_24;
827 switch (val_endian) {
828 case REGMAP_ENDIAN_BIG:
829 map->format.format_val = regmap_format_32_be;
830 map->format.parse_val = regmap_parse_32_be;
831 map->format.parse_inplace = regmap_parse_32_be_inplace;
833 case REGMAP_ENDIAN_LITTLE:
834 map->format.format_val = regmap_format_32_le;
835 map->format.parse_val = regmap_parse_32_le;
836 map->format.parse_inplace = regmap_parse_32_le_inplace;
838 case REGMAP_ENDIAN_NATIVE:
839 map->format.format_val = regmap_format_32_native;
840 map->format.parse_val = regmap_parse_32_native;
848 switch (val_endian) {
849 case REGMAP_ENDIAN_BIG:
850 map->format.format_val = regmap_format_64_be;
851 map->format.parse_val = regmap_parse_64_be;
852 map->format.parse_inplace = regmap_parse_64_be_inplace;
854 case REGMAP_ENDIAN_LITTLE:
855 map->format.format_val = regmap_format_64_le;
856 map->format.parse_val = regmap_parse_64_le;
857 map->format.parse_inplace = regmap_parse_64_le_inplace;
859 case REGMAP_ENDIAN_NATIVE:
860 map->format.format_val = regmap_format_64_native;
861 map->format.parse_val = regmap_parse_64_native;
870 if (map->format.format_write) {
871 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
872 (val_endian != REGMAP_ENDIAN_BIG))
874 map->use_single_write = true;
877 if (!map->format.format_write &&
878 !(map->format.format_reg && map->format.format_val))
881 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
882 if (map->work_buf == NULL) {
887 if (map->format.format_write) {
888 map->defer_caching = false;
889 map->reg_write = _regmap_bus_formatted_write;
890 } else if (map->format.format_val) {
891 map->defer_caching = true;
892 map->reg_write = _regmap_bus_raw_write;
895 skip_format_initialization:
897 map->range_tree = RB_ROOT;
898 for (i = 0; i < config->num_ranges; i++) {
899 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
900 struct regmap_range_node *new;
903 if (range_cfg->range_max < range_cfg->range_min) {
904 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
905 range_cfg->range_max, range_cfg->range_min);
909 if (range_cfg->range_max > map->max_register) {
910 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
911 range_cfg->range_max, map->max_register);
915 if (range_cfg->selector_reg > map->max_register) {
917 "Invalid range %d: selector out of map\n", i);
921 if (range_cfg->window_len == 0) {
922 dev_err(map->dev, "Invalid range %d: window_len 0\n",
927 /* Make sure, that this register range has no selector
928 or data window within its boundary */
929 for (j = 0; j < config->num_ranges; j++) {
930 unsigned sel_reg = config->ranges[j].selector_reg;
931 unsigned win_min = config->ranges[j].window_start;
932 unsigned win_max = win_min +
933 config->ranges[j].window_len - 1;
935 /* Allow data window inside its own virtual range */
939 if (range_cfg->range_min <= sel_reg &&
940 sel_reg <= range_cfg->range_max) {
942 "Range %d: selector for %d in window\n",
947 if (!(win_max < range_cfg->range_min ||
948 win_min > range_cfg->range_max)) {
950 "Range %d: window for %d in window\n",
956 new = kzalloc(sizeof(*new), GFP_KERNEL);
963 new->name = range_cfg->name;
964 new->range_min = range_cfg->range_min;
965 new->range_max = range_cfg->range_max;
966 new->selector_reg = range_cfg->selector_reg;
967 new->selector_mask = range_cfg->selector_mask;
968 new->selector_shift = range_cfg->selector_shift;
969 new->window_start = range_cfg->window_start;
970 new->window_len = range_cfg->window_len;
972 if (!_regmap_range_add(map, new)) {
973 dev_err(map->dev, "Failed to add range %d\n", i);
978 if (map->selector_work_buf == NULL) {
979 map->selector_work_buf =
980 kzalloc(map->format.buf_size, GFP_KERNEL);
981 if (map->selector_work_buf == NULL) {
988 ret = regcache_init(map, config);
993 ret = regmap_attach_dev(dev, map, config);
1003 regmap_range_exit(map);
1004 kfree(map->work_buf);
1008 return ERR_PTR(ret);
1010 EXPORT_SYMBOL_GPL(__regmap_init);
1012 static void devm_regmap_release(struct device *dev, void *res)
1014 regmap_exit(*(struct regmap **)res);
1017 struct regmap *__devm_regmap_init(struct device *dev,
1018 const struct regmap_bus *bus,
1020 const struct regmap_config *config,
1021 struct lock_class_key *lock_key,
1022 const char *lock_name)
1024 struct regmap **ptr, *regmap;
1026 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1028 return ERR_PTR(-ENOMEM);
1030 regmap = __regmap_init(dev, bus, bus_context, config,
1031 lock_key, lock_name);
1032 if (!IS_ERR(regmap)) {
1034 devres_add(dev, ptr);
1041 EXPORT_SYMBOL_GPL(__devm_regmap_init);
1043 static void regmap_field_init(struct regmap_field *rm_field,
1044 struct regmap *regmap, struct reg_field reg_field)
1046 rm_field->regmap = regmap;
1047 rm_field->reg = reg_field.reg;
1048 rm_field->shift = reg_field.lsb;
1049 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1050 rm_field->id_size = reg_field.id_size;
1051 rm_field->id_offset = reg_field.id_offset;
1055 * devm_regmap_field_alloc(): Allocate and initialise a register field
1056 * in a register map.
1058 * @dev: Device that will be interacted with
1059 * @regmap: regmap bank in which this register field is located.
1060 * @reg_field: Register field with in the bank.
1062 * The return value will be an ERR_PTR() on error or a valid pointer
1063 * to a struct regmap_field. The regmap_field will be automatically freed
1064 * by the device management code.
1066 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1067 struct regmap *regmap, struct reg_field reg_field)
1069 struct regmap_field *rm_field = devm_kzalloc(dev,
1070 sizeof(*rm_field), GFP_KERNEL);
1072 return ERR_PTR(-ENOMEM);
1074 regmap_field_init(rm_field, regmap, reg_field);
1079 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1082 * devm_regmap_field_free(): Free register field allocated using
1083 * devm_regmap_field_alloc. Usally drivers need not call this function,
1084 * as the memory allocated via devm will be freed as per device-driver
1087 * @dev: Device that will be interacted with
1088 * @field: regmap field which should be freed.
1090 void devm_regmap_field_free(struct device *dev,
1091 struct regmap_field *field)
1093 devm_kfree(dev, field);
1095 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1098 * regmap_field_alloc(): Allocate and initialise a register field
1099 * in a register map.
1101 * @regmap: regmap bank in which this register field is located.
1102 * @reg_field: Register field with in the bank.
1104 * The return value will be an ERR_PTR() on error or a valid pointer
1105 * to a struct regmap_field. The regmap_field should be freed by the
1106 * user once its finished working with it using regmap_field_free().
1108 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1109 struct reg_field reg_field)
1111 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1114 return ERR_PTR(-ENOMEM);
1116 regmap_field_init(rm_field, regmap, reg_field);
1120 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1123 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1125 * @field: regmap field which should be freed.
1127 void regmap_field_free(struct regmap_field *field)
1131 EXPORT_SYMBOL_GPL(regmap_field_free);
1134 * regmap_reinit_cache(): Reinitialise the current register cache
1136 * @map: Register map to operate on.
1137 * @config: New configuration. Only the cache data will be used.
1139 * Discard any existing register cache for the map and initialize a
1140 * new cache. This can be used to restore the cache to defaults or to
1141 * update the cache configuration to reflect runtime discovery of the
1144 * No explicit locking is done here, the user needs to ensure that
1145 * this function will not race with other calls to regmap.
1147 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1150 regmap_debugfs_exit(map);
1152 map->max_register = config->max_register;
1153 map->writeable_reg = config->writeable_reg;
1154 map->readable_reg = config->readable_reg;
1155 map->volatile_reg = config->volatile_reg;
1156 map->precious_reg = config->precious_reg;
1157 map->cache_type = config->cache_type;
1159 regmap_debugfs_init(map, config->name);
1161 map->cache_bypass = false;
1162 map->cache_only = false;
1164 return regcache_init(map, config);
1166 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1169 * regmap_exit(): Free a previously allocated register map
1171 void regmap_exit(struct regmap *map)
1173 struct regmap_async *async;
1176 regmap_debugfs_exit(map);
1177 regmap_range_exit(map);
1178 if (map->bus && map->bus->free_context)
1179 map->bus->free_context(map->bus_context);
1180 kfree(map->work_buf);
1181 while (!list_empty(&map->async_free)) {
1182 async = list_first_entry_or_null(&map->async_free,
1183 struct regmap_async,
1185 list_del(&async->list);
1186 kfree(async->work_buf);
1191 EXPORT_SYMBOL_GPL(regmap_exit);
1193 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1195 struct regmap **r = res;
1201 /* If the user didn't specify a name match any */
1203 return (*r)->name == data;
1209 * dev_get_regmap(): Obtain the regmap (if any) for a device
1211 * @dev: Device to retrieve the map for
1212 * @name: Optional name for the register map, usually NULL.
1214 * Returns the regmap for the device if one is present, or NULL. If
1215 * name is specified then it must match the name specified when
1216 * registering the device, if it is NULL then the first regmap found
1217 * will be used. Devices with multiple register maps are very rare,
1218 * generic code should normally not need to specify a name.
1220 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1222 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1223 dev_get_regmap_match, (void *)name);
1229 EXPORT_SYMBOL_GPL(dev_get_regmap);
1232 * regmap_get_device(): Obtain the device from a regmap
1234 * @map: Register map to operate on.
1236 * Returns the underlying device that the regmap has been created for.
1238 struct device *regmap_get_device(struct regmap *map)
1242 EXPORT_SYMBOL_GPL(regmap_get_device);
1244 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1245 struct regmap_range_node *range,
1246 unsigned int val_num)
1248 void *orig_work_buf;
1249 unsigned int win_offset;
1250 unsigned int win_page;
1254 win_offset = (*reg - range->range_min) % range->window_len;
1255 win_page = (*reg - range->range_min) / range->window_len;
1258 /* Bulk write shouldn't cross range boundary */
1259 if (*reg + val_num - 1 > range->range_max)
1262 /* ... or single page boundary */
1263 if (val_num > range->window_len - win_offset)
1267 /* It is possible to have selector register inside data window.
1268 In that case, selector register is located on every page and
1269 it needs no page switching, when accessed alone. */
1271 range->window_start + win_offset != range->selector_reg) {
1272 /* Use separate work_buf during page switching */
1273 orig_work_buf = map->work_buf;
1274 map->work_buf = map->selector_work_buf;
1276 ret = _regmap_update_bits(map, range->selector_reg,
1277 range->selector_mask,
1278 win_page << range->selector_shift,
1281 map->work_buf = orig_work_buf;
1287 *reg = range->window_start + win_offset;
1292 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1293 const void *val, size_t val_len)
1295 struct regmap_range_node *range;
1296 unsigned long flags;
1297 u8 *u8 = map->work_buf;
1298 void *work_val = map->work_buf + map->format.reg_bytes +
1299 map->format.pad_bytes;
1301 int ret = -ENOTSUPP;
1307 /* Check for unwritable registers before we start */
1308 if (map->writeable_reg)
1309 for (i = 0; i < val_len / map->format.val_bytes; i++)
1310 if (!map->writeable_reg(map->dev,
1311 reg + (i * map->reg_stride)))
1314 if (!map->cache_bypass && map->format.parse_val) {
1316 int val_bytes = map->format.val_bytes;
1317 for (i = 0; i < val_len / val_bytes; i++) {
1318 ival = map->format.parse_val(val + (i * val_bytes));
1319 ret = regcache_write(map, reg + (i * map->reg_stride),
1323 "Error in caching of register: %x ret: %d\n",
1328 if (map->cache_only) {
1329 map->cache_dirty = true;
1334 range = _regmap_range_lookup(map, reg);
1336 int val_num = val_len / map->format.val_bytes;
1337 int win_offset = (reg - range->range_min) % range->window_len;
1338 int win_residue = range->window_len - win_offset;
1340 /* If the write goes beyond the end of the window split it */
1341 while (val_num > win_residue) {
1342 dev_dbg(map->dev, "Writing window %d/%zu\n",
1343 win_residue, val_len / map->format.val_bytes);
1344 ret = _regmap_raw_write(map, reg, val, win_residue *
1345 map->format.val_bytes);
1350 val_num -= win_residue;
1351 val += win_residue * map->format.val_bytes;
1352 val_len -= win_residue * map->format.val_bytes;
1354 win_offset = (reg - range->range_min) %
1356 win_residue = range->window_len - win_offset;
1359 ret = _regmap_select_page(map, ®, range, val_num);
1364 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1366 u8[0] |= map->write_flag_mask;
1369 * Essentially all I/O mechanisms will be faster with a single
1370 * buffer to write. Since register syncs often generate raw
1371 * writes of single registers optimise that case.
1373 if (val != work_val && val_len == map->format.val_bytes) {
1374 memcpy(work_val, val, map->format.val_bytes);
1378 if (map->async && map->bus->async_write) {
1379 struct regmap_async *async;
1381 trace_regmap_async_write_start(map, reg, val_len);
1383 spin_lock_irqsave(&map->async_lock, flags);
1384 async = list_first_entry_or_null(&map->async_free,
1385 struct regmap_async,
1388 list_del(&async->list);
1389 spin_unlock_irqrestore(&map->async_lock, flags);
1392 async = map->bus->async_alloc();
1396 async->work_buf = kzalloc(map->format.buf_size,
1397 GFP_KERNEL | GFP_DMA);
1398 if (!async->work_buf) {
1406 /* If the caller supplied the value we can use it safely. */
1407 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1408 map->format.reg_bytes + map->format.val_bytes);
1410 spin_lock_irqsave(&map->async_lock, flags);
1411 list_add_tail(&async->list, &map->async_list);
1412 spin_unlock_irqrestore(&map->async_lock, flags);
1414 if (val != work_val)
1415 ret = map->bus->async_write(map->bus_context,
1417 map->format.reg_bytes +
1418 map->format.pad_bytes,
1419 val, val_len, async);
1421 ret = map->bus->async_write(map->bus_context,
1423 map->format.reg_bytes +
1424 map->format.pad_bytes +
1425 val_len, NULL, 0, async);
1428 dev_err(map->dev, "Failed to schedule write: %d\n",
1431 spin_lock_irqsave(&map->async_lock, flags);
1432 list_move(&async->list, &map->async_free);
1433 spin_unlock_irqrestore(&map->async_lock, flags);
1439 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1441 /* If we're doing a single register write we can probably just
1442 * send the work_buf directly, otherwise try to do a gather
1445 if (val == work_val)
1446 ret = map->bus->write(map->bus_context, map->work_buf,
1447 map->format.reg_bytes +
1448 map->format.pad_bytes +
1450 else if (map->bus->gather_write)
1451 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1452 map->format.reg_bytes +
1453 map->format.pad_bytes,
1456 /* If that didn't work fall back on linearising by hand. */
1457 if (ret == -ENOTSUPP) {
1458 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1459 buf = kzalloc(len, GFP_KERNEL);
1463 memcpy(buf, map->work_buf, map->format.reg_bytes);
1464 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1466 ret = map->bus->write(map->bus_context, buf, len);
1471 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1477 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1479 * @map: Map to check.
1481 bool regmap_can_raw_write(struct regmap *map)
1483 return map->bus && map->bus->write && map->format.format_val &&
1484 map->format.format_reg;
1486 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1489 * regmap_get_raw_read_max - Get the maximum size we can read
1491 * @map: Map to check.
1493 size_t regmap_get_raw_read_max(struct regmap *map)
1495 return map->max_raw_read;
1497 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1500 * regmap_get_raw_write_max - Get the maximum size we can read
1502 * @map: Map to check.
1504 size_t regmap_get_raw_write_max(struct regmap *map)
1506 return map->max_raw_write;
1508 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1510 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1514 struct regmap_range_node *range;
1515 struct regmap *map = context;
1517 WARN_ON(!map->bus || !map->format.format_write);
1519 range = _regmap_range_lookup(map, reg);
1521 ret = _regmap_select_page(map, ®, range, 1);
1526 map->format.format_write(map, reg, val);
1528 trace_regmap_hw_write_start(map, reg, 1);
1530 ret = map->bus->write(map->bus_context, map->work_buf,
1531 map->format.buf_size);
1533 trace_regmap_hw_write_done(map, reg, 1);
1538 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1541 struct regmap *map = context;
1543 return map->bus->reg_write(map->bus_context, reg, val);
1546 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1549 struct regmap *map = context;
1551 WARN_ON(!map->bus || !map->format.format_val);
1553 map->format.format_val(map->work_buf + map->format.reg_bytes
1554 + map->format.pad_bytes, val, 0);
1555 return _regmap_raw_write(map, reg,
1557 map->format.reg_bytes +
1558 map->format.pad_bytes,
1559 map->format.val_bytes);
1562 static inline void *_regmap_map_get_context(struct regmap *map)
1564 return (map->bus) ? map : map->bus_context;
1567 int _regmap_write(struct regmap *map, unsigned int reg,
1571 void *context = _regmap_map_get_context(map);
1573 if (!regmap_writeable(map, reg))
1576 if (!map->cache_bypass && !map->defer_caching) {
1577 ret = regcache_write(map, reg, val);
1580 if (map->cache_only) {
1581 map->cache_dirty = true;
1587 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1588 dev_info(map->dev, "%x <= %x\n", reg, val);
1591 trace_regmap_reg_write(map, reg, val);
1593 return map->reg_write(context, reg, val);
1597 * regmap_write(): Write a value to a single register
1599 * @map: Register map to write to
1600 * @reg: Register to write to
1601 * @val: Value to be written
1603 * A value of zero will be returned on success, a negative errno will
1604 * be returned in error cases.
1606 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1610 if (!IS_ALIGNED(reg, map->reg_stride))
1613 map->lock(map->lock_arg);
1615 ret = _regmap_write(map, reg, val);
1617 map->unlock(map->lock_arg);
1621 EXPORT_SYMBOL_GPL(regmap_write);
1624 * regmap_write_async(): Write a value to a single register asynchronously
1626 * @map: Register map to write to
1627 * @reg: Register to write to
1628 * @val: Value to be written
1630 * A value of zero will be returned on success, a negative errno will
1631 * be returned in error cases.
1633 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1637 if (!IS_ALIGNED(reg, map->reg_stride))
1640 map->lock(map->lock_arg);
1644 ret = _regmap_write(map, reg, val);
1648 map->unlock(map->lock_arg);
1652 EXPORT_SYMBOL_GPL(regmap_write_async);
1655 * regmap_raw_write(): Write raw values to one or more registers
1657 * @map: Register map to write to
1658 * @reg: Initial register to write to
1659 * @val: Block of data to be written, laid out for direct transmission to the
1661 * @val_len: Length of data pointed to by val.
1663 * This function is intended to be used for things like firmware
1664 * download where a large block of data needs to be transferred to the
1665 * device. No formatting will be done on the data provided.
1667 * A value of zero will be returned on success, a negative errno will
1668 * be returned in error cases.
1670 int regmap_raw_write(struct regmap *map, unsigned int reg,
1671 const void *val, size_t val_len)
1675 if (!regmap_can_raw_write(map))
1677 if (val_len % map->format.val_bytes)
1679 if (map->max_raw_write && map->max_raw_write > val_len)
1682 map->lock(map->lock_arg);
1684 ret = _regmap_raw_write(map, reg, val, val_len);
1686 map->unlock(map->lock_arg);
1690 EXPORT_SYMBOL_GPL(regmap_raw_write);
1693 * regmap_field_write(): Write a value to a single register field
1695 * @field: Register field to write to
1696 * @val: Value to be written
1698 * A value of zero will be returned on success, a negative errno will
1699 * be returned in error cases.
1701 int regmap_field_write(struct regmap_field *field, unsigned int val)
1703 return regmap_update_bits(field->regmap, field->reg,
1704 field->mask, val << field->shift);
1706 EXPORT_SYMBOL_GPL(regmap_field_write);
1709 * regmap_field_update_bits(): Perform a read/modify/write cycle
1710 * on the register field
1712 * @field: Register field to write to
1713 * @mask: Bitmask to change
1714 * @val: Value to be written
1716 * A value of zero will be returned on success, a negative errno will
1717 * be returned in error cases.
1719 int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1721 mask = (mask << field->shift) & field->mask;
1723 return regmap_update_bits(field->regmap, field->reg,
1724 mask, val << field->shift);
1726 EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1729 * regmap_fields_write(): Write a value to a single register field with port ID
1731 * @field: Register field to write to
1733 * @val: Value to be written
1735 * A value of zero will be returned on success, a negative errno will
1736 * be returned in error cases.
1738 int regmap_fields_write(struct regmap_field *field, unsigned int id,
1741 if (id >= field->id_size)
1744 return regmap_update_bits(field->regmap,
1745 field->reg + (field->id_offset * id),
1746 field->mask, val << field->shift);
1748 EXPORT_SYMBOL_GPL(regmap_fields_write);
1750 int regmap_fields_force_write(struct regmap_field *field, unsigned int id,
1753 if (id >= field->id_size)
1756 return regmap_write_bits(field->regmap,
1757 field->reg + (field->id_offset * id),
1758 field->mask, val << field->shift);
1760 EXPORT_SYMBOL_GPL(regmap_fields_force_write);
1763 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1764 * on the register field
1766 * @field: Register field to write to
1768 * @mask: Bitmask to change
1769 * @val: Value to be written
1771 * A value of zero will be returned on success, a negative errno will
1772 * be returned in error cases.
1774 int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1775 unsigned int mask, unsigned int val)
1777 if (id >= field->id_size)
1780 mask = (mask << field->shift) & field->mask;
1782 return regmap_update_bits(field->regmap,
1783 field->reg + (field->id_offset * id),
1784 mask, val << field->shift);
1786 EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1789 * regmap_bulk_write(): Write multiple registers to the device
1791 * @map: Register map to write to
1792 * @reg: First register to be write from
1793 * @val: Block of data to be written, in native register size for device
1794 * @val_count: Number of registers to write
1796 * This function is intended to be used for writing a large block of
1797 * data to the device either in single transfer or multiple transfer.
1799 * A value of zero will be returned on success, a negative errno will
1800 * be returned in error cases.
1802 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1806 size_t val_bytes = map->format.val_bytes;
1807 size_t total_size = val_bytes * val_count;
1809 if (map->bus && !map->format.parse_inplace)
1811 if (!IS_ALIGNED(reg, map->reg_stride))
1815 * Some devices don't support bulk write, for
1816 * them we have a series of single write operations in the first two if
1819 * The first if block is used for memory mapped io. It does not allow
1820 * val_bytes of 3 for example.
1821 * The second one is used for busses which do not have this limitation
1822 * and can write arbitrary value lengths.
1825 map->lock(map->lock_arg);
1826 for (i = 0; i < val_count; i++) {
1829 switch (val_bytes) {
1831 ival = *(u8 *)(val + (i * val_bytes));
1834 ival = *(u16 *)(val + (i * val_bytes));
1837 ival = *(u32 *)(val + (i * val_bytes));
1841 ival = *(u64 *)(val + (i * val_bytes));
1849 ret = _regmap_write(map, reg + (i * map->reg_stride),
1855 map->unlock(map->lock_arg);
1856 } else if (map->use_single_write ||
1857 (map->max_raw_write && map->max_raw_write < total_size)) {
1858 int chunk_stride = map->reg_stride;
1859 size_t chunk_size = val_bytes;
1860 size_t chunk_count = val_count;
1862 if (!map->use_single_write) {
1863 chunk_size = map->max_raw_write;
1864 if (chunk_size % val_bytes)
1865 chunk_size -= chunk_size % val_bytes;
1866 chunk_count = total_size / chunk_size;
1867 chunk_stride *= chunk_size / val_bytes;
1870 map->lock(map->lock_arg);
1871 /* Write as many bytes as possible with chunk_size */
1872 for (i = 0; i < chunk_count; i++) {
1873 ret = _regmap_raw_write(map,
1874 reg + (i * chunk_stride),
1875 val + (i * chunk_size),
1881 /* Write remaining bytes */
1882 if (!ret && chunk_size * i < total_size) {
1883 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1884 val + (i * chunk_size),
1885 total_size - i * chunk_size);
1887 map->unlock(map->lock_arg);
1894 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1896 dev_err(map->dev, "Error in memory allocation\n");
1899 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1900 map->format.parse_inplace(wval + i);
1902 map->lock(map->lock_arg);
1903 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1904 map->unlock(map->lock_arg);
1910 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1913 * _regmap_raw_multi_reg_write()
1915 * the (register,newvalue) pairs in regs have not been formatted, but
1916 * they are all in the same page and have been changed to being page
1917 * relative. The page register has been written if that was necessary.
1919 static int _regmap_raw_multi_reg_write(struct regmap *map,
1920 const struct reg_sequence *regs,
1927 size_t val_bytes = map->format.val_bytes;
1928 size_t reg_bytes = map->format.reg_bytes;
1929 size_t pad_bytes = map->format.pad_bytes;
1930 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1931 size_t len = pair_size * num_regs;
1936 buf = kzalloc(len, GFP_KERNEL);
1940 /* We have to linearise by hand. */
1944 for (i = 0; i < num_regs; i++) {
1945 unsigned int reg = regs[i].reg;
1946 unsigned int val = regs[i].def;
1947 trace_regmap_hw_write_start(map, reg, 1);
1948 map->format.format_reg(u8, reg, map->reg_shift);
1949 u8 += reg_bytes + pad_bytes;
1950 map->format.format_val(u8, val, 0);
1954 *u8 |= map->write_flag_mask;
1956 ret = map->bus->write(map->bus_context, buf, len);
1960 for (i = 0; i < num_regs; i++) {
1961 int reg = regs[i].reg;
1962 trace_regmap_hw_write_done(map, reg, 1);
1967 static unsigned int _regmap_register_page(struct regmap *map,
1969 struct regmap_range_node *range)
1971 unsigned int win_page = (reg - range->range_min) / range->window_len;
1976 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1977 struct reg_sequence *regs,
1982 struct reg_sequence *base;
1983 unsigned int this_page = 0;
1984 unsigned int page_change = 0;
1986 * the set of registers are not neccessarily in order, but
1987 * since the order of write must be preserved this algorithm
1988 * chops the set each time the page changes. This also applies
1989 * if there is a delay required at any point in the sequence.
1992 for (i = 0, n = 0; i < num_regs; i++, n++) {
1993 unsigned int reg = regs[i].reg;
1994 struct regmap_range_node *range;
1996 range = _regmap_range_lookup(map, reg);
1998 unsigned int win_page = _regmap_register_page(map, reg,
2002 this_page = win_page;
2003 if (win_page != this_page) {
2004 this_page = win_page;
2009 /* If we have both a page change and a delay make sure to
2010 * write the regs and apply the delay before we change the
2014 if (page_change || regs[i].delay_us) {
2016 /* For situations where the first write requires
2017 * a delay we need to make sure we don't call
2018 * raw_multi_reg_write with n=0
2019 * This can't occur with page breaks as we
2020 * never write on the first iteration
2022 if (regs[i].delay_us && i == 0)
2025 ret = _regmap_raw_multi_reg_write(map, base, n);
2029 if (regs[i].delay_us)
2030 udelay(regs[i].delay_us);
2036 ret = _regmap_select_page(map,
2049 return _regmap_raw_multi_reg_write(map, base, n);
2053 static int _regmap_multi_reg_write(struct regmap *map,
2054 const struct reg_sequence *regs,
2060 if (!map->can_multi_write) {
2061 for (i = 0; i < num_regs; i++) {
2062 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2066 if (regs[i].delay_us)
2067 udelay(regs[i].delay_us);
2072 if (!map->format.parse_inplace)
2075 if (map->writeable_reg)
2076 for (i = 0; i < num_regs; i++) {
2077 int reg = regs[i].reg;
2078 if (!map->writeable_reg(map->dev, reg))
2080 if (!IS_ALIGNED(reg, map->reg_stride))
2084 if (!map->cache_bypass) {
2085 for (i = 0; i < num_regs; i++) {
2086 unsigned int val = regs[i].def;
2087 unsigned int reg = regs[i].reg;
2088 ret = regcache_write(map, reg, val);
2091 "Error in caching of register: %x ret: %d\n",
2096 if (map->cache_only) {
2097 map->cache_dirty = true;
2104 for (i = 0; i < num_regs; i++) {
2105 unsigned int reg = regs[i].reg;
2106 struct regmap_range_node *range;
2108 /* Coalesce all the writes between a page break or a delay
2111 range = _regmap_range_lookup(map, reg);
2112 if (range || regs[i].delay_us) {
2113 size_t len = sizeof(struct reg_sequence)*num_regs;
2114 struct reg_sequence *base = kmemdup(regs, len,
2118 ret = _regmap_range_multi_paged_reg_write(map, base,
2125 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2129 * regmap_multi_reg_write(): Write multiple registers to the device
2131 * where the set of register,value pairs are supplied in any order,
2132 * possibly not all in a single range.
2134 * @map: Register map to write to
2135 * @regs: Array of structures containing register,value to be written
2136 * @num_regs: Number of registers to write
2138 * The 'normal' block write mode will send ultimately send data on the
2139 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2140 * addressed. However, this alternative block multi write mode will send
2141 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2142 * must of course support the mode.
2144 * A value of zero will be returned on success, a negative errno will be
2145 * returned in error cases.
2147 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2152 map->lock(map->lock_arg);
2154 ret = _regmap_multi_reg_write(map, regs, num_regs);
2156 map->unlock(map->lock_arg);
2160 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2163 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2164 * device but not the cache
2166 * where the set of register are supplied in any order
2168 * @map: Register map to write to
2169 * @regs: Array of structures containing register,value to be written
2170 * @num_regs: Number of registers to write
2172 * This function is intended to be used for writing a large block of data
2173 * atomically to the device in single transfer for those I2C client devices
2174 * that implement this alternative block write mode.
2176 * A value of zero will be returned on success, a negative errno will
2177 * be returned in error cases.
2179 int regmap_multi_reg_write_bypassed(struct regmap *map,
2180 const struct reg_sequence *regs,
2186 map->lock(map->lock_arg);
2188 bypass = map->cache_bypass;
2189 map->cache_bypass = true;
2191 ret = _regmap_multi_reg_write(map, regs, num_regs);
2193 map->cache_bypass = bypass;
2195 map->unlock(map->lock_arg);
2199 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2202 * regmap_raw_write_async(): Write raw values to one or more registers
2205 * @map: Register map to write to
2206 * @reg: Initial register to write to
2207 * @val: Block of data to be written, laid out for direct transmission to the
2208 * device. Must be valid until regmap_async_complete() is called.
2209 * @val_len: Length of data pointed to by val.
2211 * This function is intended to be used for things like firmware
2212 * download where a large block of data needs to be transferred to the
2213 * device. No formatting will be done on the data provided.
2215 * If supported by the underlying bus the write will be scheduled
2216 * asynchronously, helping maximise I/O speed on higher speed buses
2217 * like SPI. regmap_async_complete() can be called to ensure that all
2218 * asynchrnous writes have been completed.
2220 * A value of zero will be returned on success, a negative errno will
2221 * be returned in error cases.
2223 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2224 const void *val, size_t val_len)
2228 if (val_len % map->format.val_bytes)
2230 if (!IS_ALIGNED(reg, map->reg_stride))
2233 map->lock(map->lock_arg);
2237 ret = _regmap_raw_write(map, reg, val, val_len);
2241 map->unlock(map->lock_arg);
2245 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2247 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2248 unsigned int val_len)
2250 struct regmap_range_node *range;
2251 u8 *u8 = map->work_buf;
2256 range = _regmap_range_lookup(map, reg);
2258 ret = _regmap_select_page(map, ®, range,
2259 val_len / map->format.val_bytes);
2264 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2267 * Some buses or devices flag reads by setting the high bits in the
2268 * register address; since it's always the high bits for all
2269 * current formats we can do this here rather than in
2270 * formatting. This may break if we get interesting formats.
2272 u8[0] |= map->read_flag_mask;
2274 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2276 ret = map->bus->read(map->bus_context, map->work_buf,
2277 map->format.reg_bytes + map->format.pad_bytes,
2280 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2285 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2288 struct regmap *map = context;
2290 return map->bus->reg_read(map->bus_context, reg, val);
2293 static int _regmap_bus_read(void *context, unsigned int reg,
2297 struct regmap *map = context;
2299 if (!map->format.parse_val)
2302 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2304 *val = map->format.parse_val(map->work_buf);
2309 static int _regmap_read(struct regmap *map, unsigned int reg,
2313 void *context = _regmap_map_get_context(map);
2315 if (!map->cache_bypass) {
2316 ret = regcache_read(map, reg, val);
2321 if (map->cache_only)
2324 if (!regmap_readable(map, reg))
2327 ret = map->reg_read(context, reg, val);
2330 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2331 dev_info(map->dev, "%x => %x\n", reg, *val);
2334 trace_regmap_reg_read(map, reg, *val);
2336 if (!map->cache_bypass)
2337 regcache_write(map, reg, *val);
2344 * regmap_read(): Read a value from a single register
2346 * @map: Register map to read from
2347 * @reg: Register to be read from
2348 * @val: Pointer to store read value
2350 * A value of zero will be returned on success, a negative errno will
2351 * be returned in error cases.
2353 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2357 if (!IS_ALIGNED(reg, map->reg_stride))
2360 map->lock(map->lock_arg);
2362 ret = _regmap_read(map, reg, val);
2364 map->unlock(map->lock_arg);
2368 EXPORT_SYMBOL_GPL(regmap_read);
2371 * regmap_raw_read(): Read raw data from the device
2373 * @map: Register map to read from
2374 * @reg: First register to be read from
2375 * @val: Pointer to store read value
2376 * @val_len: Size of data to read
2378 * A value of zero will be returned on success, a negative errno will
2379 * be returned in error cases.
2381 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2384 size_t val_bytes = map->format.val_bytes;
2385 size_t val_count = val_len / val_bytes;
2391 if (val_len % map->format.val_bytes)
2393 if (!IS_ALIGNED(reg, map->reg_stride))
2398 map->lock(map->lock_arg);
2400 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2401 map->cache_type == REGCACHE_NONE) {
2402 if (!map->bus->read) {
2406 if (map->max_raw_read && map->max_raw_read < val_len) {
2411 /* Physical block read if there's no cache involved */
2412 ret = _regmap_raw_read(map, reg, val, val_len);
2415 /* Otherwise go word by word for the cache; should be low
2416 * cost as we expect to hit the cache.
2418 for (i = 0; i < val_count; i++) {
2419 ret = _regmap_read(map, reg + (i * map->reg_stride),
2424 map->format.format_val(val + (i * val_bytes), v, 0);
2429 map->unlock(map->lock_arg);
2433 EXPORT_SYMBOL_GPL(regmap_raw_read);
2436 * regmap_field_read(): Read a value to a single register field
2438 * @field: Register field to read from
2439 * @val: Pointer to store read value
2441 * A value of zero will be returned on success, a negative errno will
2442 * be returned in error cases.
2444 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2447 unsigned int reg_val;
2448 ret = regmap_read(field->regmap, field->reg, ®_val);
2452 reg_val &= field->mask;
2453 reg_val >>= field->shift;
2458 EXPORT_SYMBOL_GPL(regmap_field_read);
2461 * regmap_fields_read(): Read a value to a single register field with port ID
2463 * @field: Register field to read from
2465 * @val: Pointer to store read value
2467 * A value of zero will be returned on success, a negative errno will
2468 * be returned in error cases.
2470 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2474 unsigned int reg_val;
2476 if (id >= field->id_size)
2479 ret = regmap_read(field->regmap,
2480 field->reg + (field->id_offset * id),
2485 reg_val &= field->mask;
2486 reg_val >>= field->shift;
2491 EXPORT_SYMBOL_GPL(regmap_fields_read);
2494 * regmap_bulk_read(): Read multiple registers from the device
2496 * @map: Register map to read from
2497 * @reg: First register to be read from
2498 * @val: Pointer to store read value, in native register size for device
2499 * @val_count: Number of registers to read
2501 * A value of zero will be returned on success, a negative errno will
2502 * be returned in error cases.
2504 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2508 size_t val_bytes = map->format.val_bytes;
2509 bool vol = regmap_volatile_range(map, reg, val_count);
2511 if (!IS_ALIGNED(reg, map->reg_stride))
2514 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2516 * Some devices does not support bulk read, for
2517 * them we have a series of single read operations.
2519 size_t total_size = val_bytes * val_count;
2521 if (!map->use_single_read &&
2522 (!map->max_raw_read || map->max_raw_read > total_size)) {
2523 ret = regmap_raw_read(map, reg, val,
2524 val_bytes * val_count);
2529 * Some devices do not support bulk read or do not
2530 * support large bulk reads, for them we have a series
2531 * of read operations.
2533 int chunk_stride = map->reg_stride;
2534 size_t chunk_size = val_bytes;
2535 size_t chunk_count = val_count;
2537 if (!map->use_single_read) {
2538 chunk_size = map->max_raw_read;
2539 if (chunk_size % val_bytes)
2540 chunk_size -= chunk_size % val_bytes;
2541 chunk_count = total_size / chunk_size;
2542 chunk_stride *= chunk_size / val_bytes;
2545 /* Read bytes that fit into a multiple of chunk_size */
2546 for (i = 0; i < chunk_count; i++) {
2547 ret = regmap_raw_read(map,
2548 reg + (i * chunk_stride),
2549 val + (i * chunk_size),
2555 /* Read remaining bytes */
2556 if (chunk_size * i < total_size) {
2557 ret = regmap_raw_read(map,
2558 reg + (i * chunk_stride),
2559 val + (i * chunk_size),
2560 total_size - i * chunk_size);
2566 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2567 map->format.parse_inplace(val + i);
2569 for (i = 0; i < val_count; i++) {
2571 ret = regmap_read(map, reg + (i * map->reg_stride),
2576 if (map->format.format_val) {
2577 map->format.format_val(val + (i * val_bytes), ival, 0);
2579 /* Devices providing read and write
2580 * operations can use the bulk I/O
2581 * functions if they define a val_bytes,
2582 * we assume that the values are native
2592 switch (map->format.val_bytes) {
2616 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2618 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2619 unsigned int mask, unsigned int val,
2620 bool *change, bool force_write)
2623 unsigned int tmp, orig;
2628 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2629 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2630 if (ret == 0 && change)
2633 ret = _regmap_read(map, reg, &orig);
2640 if (force_write || (tmp != orig)) {
2641 ret = _regmap_write(map, reg, tmp);
2642 if (ret == 0 && change)
2651 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2653 * @map: Register map to update
2654 * @reg: Register to update
2655 * @mask: Bitmask to change
2656 * @val: New value for bitmask
2658 * Returns zero for success, a negative number on error.
2660 int regmap_update_bits(struct regmap *map, unsigned int reg,
2661 unsigned int mask, unsigned int val)
2665 map->lock(map->lock_arg);
2666 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
2667 map->unlock(map->lock_arg);
2671 EXPORT_SYMBOL_GPL(regmap_update_bits);
2674 * regmap_write_bits: Perform a read/modify/write cycle on the register map
2676 * @map: Register map to update
2677 * @reg: Register to update
2678 * @mask: Bitmask to change
2679 * @val: New value for bitmask
2681 * Returns zero for success, a negative number on error.
2683 int regmap_write_bits(struct regmap *map, unsigned int reg,
2684 unsigned int mask, unsigned int val)
2688 map->lock(map->lock_arg);
2689 ret = _regmap_update_bits(map, reg, mask, val, NULL, true);
2690 map->unlock(map->lock_arg);
2694 EXPORT_SYMBOL_GPL(regmap_write_bits);
2697 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2698 * map asynchronously
2700 * @map: Register map to update
2701 * @reg: Register to update
2702 * @mask: Bitmask to change
2703 * @val: New value for bitmask
2705 * With most buses the read must be done synchronously so this is most
2706 * useful for devices with a cache which do not need to interact with
2707 * the hardware to determine the current register value.
2709 * Returns zero for success, a negative number on error.
2711 int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2712 unsigned int mask, unsigned int val)
2716 map->lock(map->lock_arg);
2720 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
2724 map->unlock(map->lock_arg);
2728 EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2731 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2732 * register map and report if updated
2734 * @map: Register map to update
2735 * @reg: Register to update
2736 * @mask: Bitmask to change
2737 * @val: New value for bitmask
2738 * @change: Boolean indicating if a write was done
2740 * Returns zero for success, a negative number on error.
2742 int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2743 unsigned int mask, unsigned int val,
2748 map->lock(map->lock_arg);
2749 ret = _regmap_update_bits(map, reg, mask, val, change, false);
2750 map->unlock(map->lock_arg);
2753 EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2756 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2757 * register map asynchronously and report if
2760 * @map: Register map to update
2761 * @reg: Register to update
2762 * @mask: Bitmask to change
2763 * @val: New value for bitmask
2764 * @change: Boolean indicating if a write was done
2766 * With most buses the read must be done synchronously so this is most
2767 * useful for devices with a cache which do not need to interact with
2768 * the hardware to determine the current register value.
2770 * Returns zero for success, a negative number on error.
2772 int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2773 unsigned int mask, unsigned int val,
2778 map->lock(map->lock_arg);
2782 ret = _regmap_update_bits(map, reg, mask, val, change, false);
2786 map->unlock(map->lock_arg);
2790 EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2792 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2794 struct regmap *map = async->map;
2797 trace_regmap_async_io_complete(map);
2799 spin_lock(&map->async_lock);
2800 list_move(&async->list, &map->async_free);
2801 wake = list_empty(&map->async_list);
2804 map->async_ret = ret;
2806 spin_unlock(&map->async_lock);
2809 wake_up(&map->async_waitq);
2811 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2813 static int regmap_async_is_done(struct regmap *map)
2815 unsigned long flags;
2818 spin_lock_irqsave(&map->async_lock, flags);
2819 ret = list_empty(&map->async_list);
2820 spin_unlock_irqrestore(&map->async_lock, flags);
2826 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2828 * @map: Map to operate on.
2830 * Blocks until any pending asynchronous I/O has completed. Returns
2831 * an error code for any failed I/O operations.
2833 int regmap_async_complete(struct regmap *map)
2835 unsigned long flags;
2838 /* Nothing to do with no async support */
2839 if (!map->bus || !map->bus->async_write)
2842 trace_regmap_async_complete_start(map);
2844 wait_event(map->async_waitq, regmap_async_is_done(map));
2846 spin_lock_irqsave(&map->async_lock, flags);
2847 ret = map->async_ret;
2849 spin_unlock_irqrestore(&map->async_lock, flags);
2851 trace_regmap_async_complete_done(map);
2855 EXPORT_SYMBOL_GPL(regmap_async_complete);
2858 * regmap_register_patch: Register and apply register updates to be applied
2859 * on device initialistion
2861 * @map: Register map to apply updates to.
2862 * @regs: Values to update.
2863 * @num_regs: Number of entries in regs.
2865 * Register a set of register updates to be applied to the device
2866 * whenever the device registers are synchronised with the cache and
2867 * apply them immediately. Typically this is used to apply
2868 * corrections to be applied to the device defaults on startup, such
2869 * as the updates some vendors provide to undocumented registers.
2871 * The caller must ensure that this function cannot be called
2872 * concurrently with either itself or regcache_sync().
2874 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2877 struct reg_sequence *p;
2881 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2885 p = krealloc(map->patch,
2886 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2889 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2891 map->patch_regs += num_regs;
2896 map->lock(map->lock_arg);
2898 bypass = map->cache_bypass;
2900 map->cache_bypass = true;
2903 ret = _regmap_multi_reg_write(map, regs, num_regs);
2906 map->cache_bypass = bypass;
2908 map->unlock(map->lock_arg);
2910 regmap_async_complete(map);
2914 EXPORT_SYMBOL_GPL(regmap_register_patch);
2917 * regmap_get_val_bytes(): Report the size of a register value
2919 * Report the size of a register value, mainly intended to for use by
2920 * generic infrastructure built on top of regmap.
2922 int regmap_get_val_bytes(struct regmap *map)
2924 if (map->format.format_write)
2927 return map->format.val_bytes;
2929 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2932 * regmap_get_max_register(): Report the max register value
2934 * Report the max register value, mainly intended to for use by
2935 * generic infrastructure built on top of regmap.
2937 int regmap_get_max_register(struct regmap *map)
2939 return map->max_register ? map->max_register : -EINVAL;
2941 EXPORT_SYMBOL_GPL(regmap_get_max_register);
2944 * regmap_get_reg_stride(): Report the register address stride
2946 * Report the register address stride, mainly intended to for use by
2947 * generic infrastructure built on top of regmap.
2949 int regmap_get_reg_stride(struct regmap *map)
2951 return map->reg_stride;
2953 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2955 int regmap_parse_val(struct regmap *map, const void *buf,
2958 if (!map->format.parse_val)
2961 *val = map->format.parse_val(buf);
2965 EXPORT_SYMBOL_GPL(regmap_parse_val);
2967 static int __init regmap_initcall(void)
2969 regmap_debugfs_initcall();
2973 postcore_initcall(regmap_initcall);