2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_MINORS (1U << MINORBITS)
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
62 static unsigned char shutdown_timeout = 5;
63 module_param(shutdown_timeout, byte, 0644);
64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
66 static int nvme_major;
67 module_param(nvme_major, int, 0);
69 static int nvme_char_major;
70 module_param(nvme_char_major, int, 0);
72 static int use_threaded_interrupts;
73 module_param(use_threaded_interrupts, int, 0);
75 static bool use_cmb_sqes = true;
76 module_param(use_cmb_sqes, bool, 0644);
77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
79 static DEFINE_SPINLOCK(dev_list_lock);
80 static LIST_HEAD(dev_list);
81 static struct task_struct *nvme_thread;
82 static struct workqueue_struct *nvme_workq;
83 static wait_queue_head_t nvme_kthread_wait;
85 static struct class *nvme_class;
87 static int __nvme_reset(struct nvme_dev *dev);
88 static int nvme_reset(struct nvme_dev *dev);
89 static int nvme_process_cq(struct nvme_queue *nvmeq);
90 static void nvme_dead_ctrl(struct nvme_dev *dev);
92 struct async_cmd_info {
93 struct kthread_work work;
94 struct kthread_worker *worker;
102 * An NVM Express queue. Each device has at least two (one for admin
103 * commands and one for I/O commands).
106 struct device *q_dmadev;
107 struct nvme_dev *dev;
108 char irqname[24]; /* nvme4294967295-65535\0 */
110 struct nvme_command *sq_cmds;
111 struct nvme_command __iomem *sq_cmds_io;
112 volatile struct nvme_completion *cqes;
113 struct blk_mq_tags **tags;
114 dma_addr_t sq_dma_addr;
115 dma_addr_t cq_dma_addr;
125 struct async_cmd_info cmdinfo;
129 * Check we didin't inadvertently grow the command struct
131 static inline void _nvme_check_size(void)
133 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
141 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
142 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
143 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
144 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
147 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
148 struct nvme_completion *);
150 struct nvme_cmd_info {
151 nvme_completion_fn fn;
154 struct nvme_queue *nvmeq;
155 struct nvme_iod iod[0];
159 * Max size of iod being embedded in the request payload
161 #define NVME_INT_PAGES 2
162 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
163 #define NVME_INT_MASK 0x01
166 * Will slightly overestimate the number of pages needed. This is OK
167 * as it only leads to a small amount of wasted memory for the lifetime of
170 static int nvme_npages(unsigned size, struct nvme_dev *dev)
172 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
173 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
176 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
178 unsigned int ret = sizeof(struct nvme_cmd_info);
180 ret += sizeof(struct nvme_iod);
181 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
182 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
187 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
188 unsigned int hctx_idx)
190 struct nvme_dev *dev = data;
191 struct nvme_queue *nvmeq = dev->queues[0];
193 WARN_ON(hctx_idx != 0);
194 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
195 WARN_ON(nvmeq->tags);
197 hctx->driver_data = nvmeq;
198 nvmeq->tags = &dev->admin_tagset.tags[0];
202 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
204 struct nvme_queue *nvmeq = hctx->driver_data;
209 static int nvme_admin_init_request(void *data, struct request *req,
210 unsigned int hctx_idx, unsigned int rq_idx,
211 unsigned int numa_node)
213 struct nvme_dev *dev = data;
214 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
215 struct nvme_queue *nvmeq = dev->queues[0];
222 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
223 unsigned int hctx_idx)
225 struct nvme_dev *dev = data;
226 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
229 nvmeq->tags = &dev->tagset.tags[hctx_idx];
231 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
232 hctx->driver_data = nvmeq;
236 static int nvme_init_request(void *data, struct request *req,
237 unsigned int hctx_idx, unsigned int rq_idx,
238 unsigned int numa_node)
240 struct nvme_dev *dev = data;
241 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
242 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
249 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
250 nvme_completion_fn handler)
255 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
258 static void *iod_get_private(struct nvme_iod *iod)
260 return (void *) (iod->private & ~0x1UL);
264 * If bit 0 is set, the iod is embedded in the request payload.
266 static bool iod_should_kfree(struct nvme_iod *iod)
268 return (iod->private & NVME_INT_MASK) == 0;
271 /* Special values must be less than 0x1000 */
272 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
273 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
274 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
275 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
277 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
278 struct nvme_completion *cqe)
280 if (ctx == CMD_CTX_CANCELLED)
282 if (ctx == CMD_CTX_COMPLETED) {
283 dev_warn(nvmeq->q_dmadev,
284 "completed id %d twice on queue %d\n",
285 cqe->command_id, le16_to_cpup(&cqe->sq_id));
288 if (ctx == CMD_CTX_INVALID) {
289 dev_warn(nvmeq->q_dmadev,
290 "invalid id %d completed on queue %d\n",
291 cqe->command_id, le16_to_cpup(&cqe->sq_id));
294 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
297 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
304 cmd->fn = special_completion;
305 cmd->ctx = CMD_CTX_CANCELLED;
309 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
310 struct nvme_completion *cqe)
312 u32 result = le32_to_cpup(&cqe->result);
313 u16 status = le16_to_cpup(&cqe->status) >> 1;
315 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
316 ++nvmeq->dev->event_limit;
317 if (status != NVME_SC_SUCCESS)
320 switch (result & 0xff07) {
321 case NVME_AER_NOTICE_NS_CHANGED:
322 dev_info(nvmeq->q_dmadev, "rescanning\n");
323 schedule_work(&nvmeq->dev->scan_work);
325 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
329 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
330 struct nvme_completion *cqe)
332 struct request *req = ctx;
334 u16 status = le16_to_cpup(&cqe->status) >> 1;
335 u32 result = le32_to_cpup(&cqe->result);
337 blk_mq_free_request(req);
339 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
340 ++nvmeq->dev->abort_limit;
343 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
344 struct nvme_completion *cqe)
346 struct async_cmd_info *cmdinfo = ctx;
347 cmdinfo->result = le32_to_cpup(&cqe->result);
348 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
349 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
350 blk_mq_free_request(cmdinfo->req);
353 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
356 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
358 return blk_mq_rq_to_pdu(req);
362 * Called with local interrupts disabled and the q_lock held. May not sleep.
364 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
365 nvme_completion_fn *fn)
367 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
369 if (tag >= nvmeq->q_depth) {
370 *fn = special_completion;
371 return CMD_CTX_INVALID;
376 cmd->fn = special_completion;
377 cmd->ctx = CMD_CTX_COMPLETED;
382 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
383 * @nvmeq: The queue to use
384 * @cmd: The command to send
386 * Safe to use from interrupt context
388 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
389 struct nvme_command *cmd)
391 u16 tail = nvmeq->sq_tail;
393 if (nvmeq->sq_cmds_io)
394 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
396 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
398 if (++tail == nvmeq->q_depth)
400 writel(tail, nvmeq->q_db);
401 nvmeq->sq_tail = tail;
404 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
407 spin_lock_irqsave(&nvmeq->q_lock, flags);
408 __nvme_submit_cmd(nvmeq, cmd);
409 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
412 static __le64 **iod_list(struct nvme_iod *iod)
414 return ((void *)iod) + iod->offset;
417 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
418 unsigned nseg, unsigned long private)
420 iod->private = private;
421 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
423 iod->length = nbytes;
427 static struct nvme_iod *
428 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
429 unsigned long priv, gfp_t gfp)
431 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
432 sizeof(__le64 *) * nvme_npages(bytes, dev) +
433 sizeof(struct scatterlist) * nseg, gfp);
436 iod_init(iod, bytes, nseg, priv);
441 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
444 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
445 sizeof(struct nvme_dsm_range);
446 struct nvme_iod *iod;
448 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
449 size <= NVME_INT_BYTES(dev)) {
450 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
453 iod_init(iod, size, rq->nr_phys_segments,
454 (unsigned long) rq | NVME_INT_MASK);
458 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
459 (unsigned long) rq, gfp);
462 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
464 const int last_prp = dev->page_size / 8 - 1;
466 __le64 **list = iod_list(iod);
467 dma_addr_t prp_dma = iod->first_dma;
469 if (iod->npages == 0)
470 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
471 for (i = 0; i < iod->npages; i++) {
472 __le64 *prp_list = list[i];
473 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
474 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
475 prp_dma = next_prp_dma;
478 if (iod_should_kfree(iod))
482 static int nvme_error_status(u16 status)
484 switch (status & 0x7ff) {
485 case NVME_SC_SUCCESS:
487 case NVME_SC_CAP_EXCEEDED:
494 #ifdef CONFIG_BLK_DEV_INTEGRITY
495 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
497 if (be32_to_cpu(pi->ref_tag) == v)
498 pi->ref_tag = cpu_to_be32(p);
501 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
503 if (be32_to_cpu(pi->ref_tag) == p)
504 pi->ref_tag = cpu_to_be32(v);
508 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
510 * The virtual start sector is the one that was originally submitted by the
511 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
512 * start sector may be different. Remap protection information to match the
513 * physical LBA on writes, and back to the original seed on reads.
515 * Type 0 and 3 do not have a ref tag, so no remapping required.
517 static void nvme_dif_remap(struct request *req,
518 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
520 struct nvme_ns *ns = req->rq_disk->private_data;
521 struct bio_integrity_payload *bip;
522 struct t10_pi_tuple *pi;
524 u32 i, nlb, ts, phys, virt;
526 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
529 bip = bio_integrity(req->bio);
533 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
536 virt = bip_get_seed(bip);
537 phys = nvme_block_nr(ns, blk_rq_pos(req));
538 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
539 ts = ns->disk->integrity->tuple_size;
541 for (i = 0; i < nlb; i++, virt++, phys++) {
542 pi = (struct t10_pi_tuple *)p;
543 dif_swap(phys, virt, pi);
549 static int nvme_noop_verify(struct blk_integrity_iter *iter)
554 static int nvme_noop_generate(struct blk_integrity_iter *iter)
559 struct blk_integrity nvme_meta_noop = {
560 .name = "NVME_META_NOOP",
561 .generate_fn = nvme_noop_generate,
562 .verify_fn = nvme_noop_verify,
565 static void nvme_init_integrity(struct nvme_ns *ns)
567 struct blk_integrity integrity;
569 switch (ns->pi_type) {
570 case NVME_NS_DPS_PI_TYPE3:
571 integrity = t10_pi_type3_crc;
573 case NVME_NS_DPS_PI_TYPE1:
574 case NVME_NS_DPS_PI_TYPE2:
575 integrity = t10_pi_type1_crc;
578 integrity = nvme_meta_noop;
581 integrity.tuple_size = ns->ms;
582 blk_integrity_register(ns->disk, &integrity);
583 blk_queue_max_integrity_segments(ns->queue, 1);
585 #else /* CONFIG_BLK_DEV_INTEGRITY */
586 static void nvme_dif_remap(struct request *req,
587 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
590 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
593 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
596 static void nvme_init_integrity(struct nvme_ns *ns)
601 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
602 struct nvme_completion *cqe)
604 struct nvme_iod *iod = ctx;
605 struct request *req = iod_get_private(iod);
606 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
608 u16 status = le16_to_cpup(&cqe->status) >> 1;
610 if (unlikely(status)) {
611 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
612 && (jiffies - req->start_time) < req->timeout) {
615 blk_mq_requeue_request(req);
616 spin_lock_irqsave(req->q->queue_lock, flags);
617 if (!blk_queue_stopped(req->q))
618 blk_mq_kick_requeue_list(req->q);
619 spin_unlock_irqrestore(req->q->queue_lock, flags);
623 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
624 if (cmd_rq->ctx == CMD_CTX_CANCELLED)
627 status = nvme_error_status(status);
631 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
632 u32 result = le32_to_cpup(&cqe->result);
633 req->special = (void *)(uintptr_t)result;
637 dev_warn(nvmeq->dev->dev,
638 "completing aborted command with status:%04x\n",
642 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
643 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
644 if (blk_integrity_rq(req)) {
645 if (!rq_data_dir(req))
646 nvme_dif_remap(req, nvme_dif_complete);
647 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
648 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
651 nvme_free_iod(nvmeq->dev, iod);
653 blk_mq_complete_request(req, status);
656 /* length is in bytes. gfp flags indicates whether we may sleep. */
657 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
658 int total_len, gfp_t gfp)
660 struct dma_pool *pool;
661 int length = total_len;
662 struct scatterlist *sg = iod->sg;
663 int dma_len = sg_dma_len(sg);
664 u64 dma_addr = sg_dma_address(sg);
665 u32 page_size = dev->page_size;
666 int offset = dma_addr & (page_size - 1);
668 __le64 **list = iod_list(iod);
672 length -= (page_size - offset);
676 dma_len -= (page_size - offset);
678 dma_addr += (page_size - offset);
681 dma_addr = sg_dma_address(sg);
682 dma_len = sg_dma_len(sg);
685 if (length <= page_size) {
686 iod->first_dma = dma_addr;
690 nprps = DIV_ROUND_UP(length, page_size);
691 if (nprps <= (256 / 8)) {
692 pool = dev->prp_small_pool;
695 pool = dev->prp_page_pool;
699 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
701 iod->first_dma = dma_addr;
703 return (total_len - length) + page_size;
706 iod->first_dma = prp_dma;
709 if (i == page_size >> 3) {
710 __le64 *old_prp_list = prp_list;
711 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
713 return total_len - length;
714 list[iod->npages++] = prp_list;
715 prp_list[0] = old_prp_list[i - 1];
716 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
719 prp_list[i++] = cpu_to_le64(dma_addr);
720 dma_len -= page_size;
721 dma_addr += page_size;
729 dma_addr = sg_dma_address(sg);
730 dma_len = sg_dma_len(sg);
736 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
737 struct nvme_iod *iod)
739 struct nvme_command cmnd;
741 memcpy(&cmnd, req->cmd, sizeof(cmnd));
742 cmnd.rw.command_id = req->tag;
743 if (req->nr_phys_segments) {
744 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
745 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
748 __nvme_submit_cmd(nvmeq, &cmnd);
752 * We reuse the small pool to allocate the 16-byte range here as it is not
753 * worth having a special pool for these or additional cases to handle freeing
756 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
757 struct request *req, struct nvme_iod *iod)
759 struct nvme_dsm_range *range =
760 (struct nvme_dsm_range *)iod_list(iod)[0];
761 struct nvme_command cmnd;
763 range->cattr = cpu_to_le32(0);
764 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
765 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
767 memset(&cmnd, 0, sizeof(cmnd));
768 cmnd.dsm.opcode = nvme_cmd_dsm;
769 cmnd.dsm.command_id = req->tag;
770 cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
771 cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
773 cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
775 __nvme_submit_cmd(nvmeq, &cmnd);
778 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
781 struct nvme_command cmnd;
783 memset(&cmnd, 0, sizeof(cmnd));
784 cmnd.common.opcode = nvme_cmd_flush;
785 cmnd.common.command_id = cmdid;
786 cmnd.common.nsid = cpu_to_le32(ns->ns_id);
788 __nvme_submit_cmd(nvmeq, &cmnd);
791 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
794 struct request *req = iod_get_private(iod);
795 struct nvme_command cmnd;
799 if (req->cmd_flags & REQ_FUA)
800 control |= NVME_RW_FUA;
801 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
802 control |= NVME_RW_LR;
804 if (req->cmd_flags & REQ_RAHEAD)
805 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
807 memset(&cmnd, 0, sizeof(cmnd));
808 cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
809 cmnd.rw.command_id = req->tag;
810 cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
811 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
812 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
813 cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
814 cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
817 switch (ns->pi_type) {
818 case NVME_NS_DPS_PI_TYPE3:
819 control |= NVME_RW_PRINFO_PRCHK_GUARD;
821 case NVME_NS_DPS_PI_TYPE1:
822 case NVME_NS_DPS_PI_TYPE2:
823 control |= NVME_RW_PRINFO_PRCHK_GUARD |
824 NVME_RW_PRINFO_PRCHK_REF;
825 cmnd.rw.reftag = cpu_to_le32(
826 nvme_block_nr(ns, blk_rq_pos(req)));
829 if (blk_integrity_rq(req))
831 cpu_to_le64(sg_dma_address(iod->meta_sg));
833 control |= NVME_RW_PRINFO_PRACT;
836 cmnd.rw.control = cpu_to_le16(control);
837 cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
839 __nvme_submit_cmd(nvmeq, &cmnd);
845 * NOTE: ns is NULL when called on the admin queue.
847 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
848 const struct blk_mq_queue_data *bd)
850 struct nvme_ns *ns = hctx->queue->queuedata;
851 struct nvme_queue *nvmeq = hctx->driver_data;
852 struct nvme_dev *dev = nvmeq->dev;
853 struct request *req = bd->rq;
854 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
855 struct nvme_iod *iod;
856 enum dma_data_direction dma_dir;
859 * If formated with metadata, require the block layer provide a buffer
860 * unless this namespace is formated such that the metadata can be
861 * stripped/generated by the controller with PRACT=1.
863 if (ns && ns->ms && !blk_integrity_rq(req)) {
864 if (!(ns->pi_type && ns->ms == 8) &&
865 req->cmd_type != REQ_TYPE_DRV_PRIV) {
866 blk_mq_complete_request(req, -EFAULT);
867 return BLK_MQ_RQ_QUEUE_OK;
871 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
873 return BLK_MQ_RQ_QUEUE_BUSY;
875 if (req->cmd_flags & REQ_DISCARD) {
878 * We reuse the small pool to allocate the 16-byte range here
879 * as it is not worth having a special pool for these or
880 * additional cases to handle freeing the iod.
882 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
886 iod_list(iod)[0] = (__le64 *)range;
888 } else if (req->nr_phys_segments) {
889 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
891 sg_init_table(iod->sg, req->nr_phys_segments);
892 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
896 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
899 if (blk_rq_bytes(req) !=
900 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
901 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
904 if (blk_integrity_rq(req)) {
905 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
908 sg_init_table(iod->meta_sg, 1);
909 if (blk_rq_map_integrity_sg(
910 req->q, req->bio, iod->meta_sg) != 1)
913 if (rq_data_dir(req))
914 nvme_dif_remap(req, nvme_dif_prep);
916 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
921 nvme_set_info(cmd, iod, req_completion);
922 spin_lock_irq(&nvmeq->q_lock);
923 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
924 nvme_submit_priv(nvmeq, req, iod);
925 else if (req->cmd_flags & REQ_DISCARD)
926 nvme_submit_discard(nvmeq, ns, req, iod);
927 else if (req->cmd_flags & REQ_FLUSH)
928 nvme_submit_flush(nvmeq, ns, req->tag);
930 nvme_submit_iod(nvmeq, iod, ns);
932 nvme_process_cq(nvmeq);
933 spin_unlock_irq(&nvmeq->q_lock);
934 return BLK_MQ_RQ_QUEUE_OK;
937 nvme_free_iod(dev, iod);
938 return BLK_MQ_RQ_QUEUE_ERROR;
940 nvme_free_iod(dev, iod);
941 return BLK_MQ_RQ_QUEUE_BUSY;
944 static int nvme_process_cq(struct nvme_queue *nvmeq)
948 head = nvmeq->cq_head;
949 phase = nvmeq->cq_phase;
953 nvme_completion_fn fn;
954 struct nvme_completion cqe = nvmeq->cqes[head];
955 if ((le16_to_cpu(cqe.status) & 1) != phase)
957 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
958 if (++head == nvmeq->q_depth) {
962 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
963 fn(nvmeq, ctx, &cqe);
966 /* If the controller ignores the cq head doorbell and continuously
967 * writes to the queue, it is theoretically possible to wrap around
968 * the queue twice and mistakenly return IRQ_NONE. Linux only
969 * requires that 0.1% of your interrupts are handled, so this isn't
972 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
975 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
976 nvmeq->cq_head = head;
977 nvmeq->cq_phase = phase;
983 static irqreturn_t nvme_irq(int irq, void *data)
986 struct nvme_queue *nvmeq = data;
987 spin_lock(&nvmeq->q_lock);
988 nvme_process_cq(nvmeq);
989 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
991 spin_unlock(&nvmeq->q_lock);
995 static irqreturn_t nvme_irq_check(int irq, void *data)
997 struct nvme_queue *nvmeq = data;
998 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
999 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1001 return IRQ_WAKE_THREAD;
1005 * Returns 0 on success. If the result is negative, it's a Linux error code;
1006 * if the result is positive, it's an NVM Express status code
1008 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1009 void *buffer, void __user *ubuffer, unsigned bufflen,
1010 u32 *result, unsigned timeout)
1012 bool write = cmd->common.opcode & 1;
1013 struct bio *bio = NULL;
1014 struct request *req;
1017 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1019 return PTR_ERR(req);
1021 req->cmd_type = REQ_TYPE_DRV_PRIV;
1022 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1023 req->__data_len = 0;
1024 req->__sector = (sector_t) -1;
1025 req->bio = req->biotail = NULL;
1027 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1029 req->cmd = (unsigned char *)cmd;
1030 req->cmd_len = sizeof(struct nvme_command);
1031 req->special = (void *)0;
1033 if (buffer && bufflen) {
1034 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1037 } else if (ubuffer && bufflen) {
1038 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1044 blk_execute_rq(req->q, NULL, req, 0);
1046 blk_rq_unmap_user(bio);
1048 *result = (u32)(uintptr_t)req->special;
1051 blk_mq_free_request(req);
1055 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1056 void *buffer, unsigned bufflen)
1058 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1061 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1063 struct nvme_queue *nvmeq = dev->queues[0];
1064 struct nvme_command c;
1065 struct nvme_cmd_info *cmd_info;
1066 struct request *req;
1068 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1070 return PTR_ERR(req);
1072 req->cmd_flags |= REQ_NO_TIMEOUT;
1073 cmd_info = blk_mq_rq_to_pdu(req);
1074 nvme_set_info(cmd_info, NULL, async_req_completion);
1076 memset(&c, 0, sizeof(c));
1077 c.common.opcode = nvme_admin_async_event;
1078 c.common.command_id = req->tag;
1080 blk_mq_free_request(req);
1081 __nvme_submit_cmd(nvmeq, &c);
1085 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1086 struct nvme_command *cmd,
1087 struct async_cmd_info *cmdinfo, unsigned timeout)
1089 struct nvme_queue *nvmeq = dev->queues[0];
1090 struct request *req;
1091 struct nvme_cmd_info *cmd_rq;
1093 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1095 return PTR_ERR(req);
1097 req->timeout = timeout;
1098 cmd_rq = blk_mq_rq_to_pdu(req);
1100 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1101 cmdinfo->status = -EINTR;
1103 cmd->common.command_id = req->tag;
1105 nvme_submit_cmd(nvmeq, cmd);
1109 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1111 struct nvme_command c;
1113 memset(&c, 0, sizeof(c));
1114 c.delete_queue.opcode = opcode;
1115 c.delete_queue.qid = cpu_to_le16(id);
1117 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1120 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1121 struct nvme_queue *nvmeq)
1123 struct nvme_command c;
1124 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1127 * Note: we (ab)use the fact the the prp fields survive if no data
1128 * is attached to the request.
1130 memset(&c, 0, sizeof(c));
1131 c.create_cq.opcode = nvme_admin_create_cq;
1132 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1133 c.create_cq.cqid = cpu_to_le16(qid);
1134 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1135 c.create_cq.cq_flags = cpu_to_le16(flags);
1136 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1138 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1141 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1142 struct nvme_queue *nvmeq)
1144 struct nvme_command c;
1145 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1148 * Note: we (ab)use the fact the the prp fields survive if no data
1149 * is attached to the request.
1151 memset(&c, 0, sizeof(c));
1152 c.create_sq.opcode = nvme_admin_create_sq;
1153 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1154 c.create_sq.sqid = cpu_to_le16(qid);
1155 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1156 c.create_sq.sq_flags = cpu_to_le16(flags);
1157 c.create_sq.cqid = cpu_to_le16(qid);
1159 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1162 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1164 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1167 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1169 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1172 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1174 struct nvme_command c = { };
1177 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1178 c.identify.opcode = nvme_admin_identify;
1179 c.identify.cns = cpu_to_le32(1);
1181 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1185 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1186 sizeof(struct nvme_id_ctrl));
1192 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1193 struct nvme_id_ns **id)
1195 struct nvme_command c = { };
1198 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1199 c.identify.opcode = nvme_admin_identify,
1200 c.identify.nsid = cpu_to_le32(nsid),
1202 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1206 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1207 sizeof(struct nvme_id_ns));
1213 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1214 dma_addr_t dma_addr, u32 *result)
1216 struct nvme_command c;
1218 memset(&c, 0, sizeof(c));
1219 c.features.opcode = nvme_admin_get_features;
1220 c.features.nsid = cpu_to_le32(nsid);
1221 c.features.prp1 = cpu_to_le64(dma_addr);
1222 c.features.fid = cpu_to_le32(fid);
1224 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1228 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1229 dma_addr_t dma_addr, u32 *result)
1231 struct nvme_command c;
1233 memset(&c, 0, sizeof(c));
1234 c.features.opcode = nvme_admin_set_features;
1235 c.features.prp1 = cpu_to_le64(dma_addr);
1236 c.features.fid = cpu_to_le32(fid);
1237 c.features.dword11 = cpu_to_le32(dword11);
1239 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1243 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1245 struct nvme_command c = { };
1248 c.common.opcode = nvme_admin_get_log_page,
1249 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1250 c.common.cdw10[0] = cpu_to_le32(
1251 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1254 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1258 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1259 sizeof(struct nvme_smart_log));
1266 * nvme_abort_req - Attempt aborting a request
1268 * Schedule controller reset if the command was already aborted once before and
1269 * still hasn't been returned to the driver, or if this is the admin queue.
1271 static void nvme_abort_req(struct request *req)
1273 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1274 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1275 struct nvme_dev *dev = nvmeq->dev;
1276 struct request *abort_req;
1277 struct nvme_cmd_info *abort_cmd;
1278 struct nvme_command cmd;
1280 if (!nvmeq->qid || cmd_rq->aborted) {
1281 spin_lock(&dev_list_lock);
1282 if (!__nvme_reset(dev)) {
1284 "I/O %d QID %d timeout, reset controller\n",
1285 req->tag, nvmeq->qid);
1287 spin_unlock(&dev_list_lock);
1291 if (!dev->abort_limit)
1294 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1296 if (IS_ERR(abort_req))
1299 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1300 nvme_set_info(abort_cmd, abort_req, abort_completion);
1302 memset(&cmd, 0, sizeof(cmd));
1303 cmd.abort.opcode = nvme_admin_abort_cmd;
1304 cmd.abort.cid = req->tag;
1305 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1306 cmd.abort.command_id = abort_req->tag;
1309 cmd_rq->aborted = 1;
1311 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1313 nvme_submit_cmd(dev->queues[0], &cmd);
1316 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1318 struct nvme_queue *nvmeq = data;
1320 nvme_completion_fn fn;
1321 struct nvme_cmd_info *cmd;
1322 struct nvme_completion cqe;
1324 if (!blk_mq_request_started(req))
1327 cmd = blk_mq_rq_to_pdu(req);
1329 if (cmd->ctx == CMD_CTX_CANCELLED)
1332 if (blk_queue_dying(req->q))
1333 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1335 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1338 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1339 req->tag, nvmeq->qid);
1340 ctx = cancel_cmd_info(cmd, &fn);
1341 fn(nvmeq, ctx, &cqe);
1344 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1346 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1347 struct nvme_queue *nvmeq = cmd->nvmeq;
1349 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1351 spin_lock_irq(&nvmeq->q_lock);
1352 nvme_abort_req(req);
1353 spin_unlock_irq(&nvmeq->q_lock);
1356 * The aborted req will be completed on receiving the abort req.
1357 * We enable the timer again. If hit twice, it'll cause a device reset,
1358 * as the device then is in a faulty state.
1360 return BLK_EH_RESET_TIMER;
1363 static void nvme_free_queue(struct nvme_queue *nvmeq)
1365 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1366 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1368 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1369 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1373 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1377 for (i = dev->queue_count - 1; i >= lowest; i--) {
1378 struct nvme_queue *nvmeq = dev->queues[i];
1380 dev->queues[i] = NULL;
1381 nvme_free_queue(nvmeq);
1386 * nvme_suspend_queue - put queue into suspended state
1387 * @nvmeq - queue to suspend
1389 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1393 spin_lock_irq(&nvmeq->q_lock);
1394 if (nvmeq->cq_vector == -1) {
1395 spin_unlock_irq(&nvmeq->q_lock);
1398 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1399 nvmeq->dev->online_queues--;
1400 nvmeq->cq_vector = -1;
1401 spin_unlock_irq(&nvmeq->q_lock);
1403 if (!nvmeq->qid && nvmeq->dev->admin_q)
1404 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1406 irq_set_affinity_hint(vector, NULL);
1407 free_irq(vector, nvmeq);
1412 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1414 spin_lock_irq(&nvmeq->q_lock);
1415 if (nvmeq->tags && *nvmeq->tags)
1416 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1417 spin_unlock_irq(&nvmeq->q_lock);
1420 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1422 struct nvme_queue *nvmeq = dev->queues[qid];
1426 if (nvme_suspend_queue(nvmeq))
1429 /* Don't tell the adapter to delete the admin queue.
1430 * Don't tell a removed adapter to delete IO queues. */
1431 if (qid && readl(&dev->bar->csts) != -1) {
1432 adapter_delete_sq(dev, qid);
1433 adapter_delete_cq(dev, qid);
1436 spin_lock_irq(&nvmeq->q_lock);
1437 nvme_process_cq(nvmeq);
1438 spin_unlock_irq(&nvmeq->q_lock);
1441 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1444 int q_depth = dev->q_depth;
1445 unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1447 if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1448 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1449 mem_per_q = round_down(mem_per_q, dev->page_size);
1450 q_depth = div_u64(mem_per_q, entry_size);
1453 * Ensure the reduced q_depth is above some threshold where it
1454 * would be better to map queues in system memory with the
1464 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1467 if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1468 unsigned offset = (qid - 1) *
1469 roundup(SQ_SIZE(depth), dev->page_size);
1470 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1471 nvmeq->sq_cmds_io = dev->cmb + offset;
1473 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1474 &nvmeq->sq_dma_addr, GFP_KERNEL);
1475 if (!nvmeq->sq_cmds)
1482 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1485 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1489 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1490 &nvmeq->cq_dma_addr, GFP_KERNEL);
1494 if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1497 nvmeq->q_dmadev = dev->dev;
1499 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1500 dev->instance, qid);
1501 spin_lock_init(&nvmeq->q_lock);
1503 nvmeq->cq_phase = 1;
1504 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1505 nvmeq->q_depth = depth;
1507 nvmeq->cq_vector = -1;
1508 dev->queues[qid] = nvmeq;
1510 /* make sure queue descriptor is set before queue count, for kthread */
1517 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1518 nvmeq->cq_dma_addr);
1524 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1527 if (use_threaded_interrupts)
1528 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1529 nvme_irq_check, nvme_irq, IRQF_SHARED,
1531 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1532 IRQF_SHARED, name, nvmeq);
1535 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1537 struct nvme_dev *dev = nvmeq->dev;
1539 spin_lock_irq(&nvmeq->q_lock);
1542 nvmeq->cq_phase = 1;
1543 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1544 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1545 dev->online_queues++;
1546 spin_unlock_irq(&nvmeq->q_lock);
1549 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1551 struct nvme_dev *dev = nvmeq->dev;
1554 nvmeq->cq_vector = qid - 1;
1555 result = adapter_alloc_cq(dev, qid, nvmeq);
1559 result = adapter_alloc_sq(dev, qid, nvmeq);
1563 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1567 nvme_init_queue(nvmeq, qid);
1571 adapter_delete_sq(dev, qid);
1573 adapter_delete_cq(dev, qid);
1577 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1579 unsigned long timeout;
1580 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1582 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1584 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1586 if (fatal_signal_pending(current))
1588 if (time_after(jiffies, timeout)) {
1590 "Device not ready; aborting %s\n", enabled ?
1591 "initialisation" : "reset");
1600 * If the device has been passed off to us in an enabled state, just clear
1601 * the enabled bit. The spec says we should set the 'shutdown notification
1602 * bits', but doing so may cause the device to complete commands to the
1603 * admin queue ... and we don't know what memory that might be pointing at!
1605 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1607 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1608 dev->ctrl_config &= ~NVME_CC_ENABLE;
1609 writel(dev->ctrl_config, &dev->bar->cc);
1611 return nvme_wait_ready(dev, cap, false);
1614 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1616 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1617 dev->ctrl_config |= NVME_CC_ENABLE;
1618 writel(dev->ctrl_config, &dev->bar->cc);
1620 return nvme_wait_ready(dev, cap, true);
1623 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1625 unsigned long timeout;
1627 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1628 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1630 writel(dev->ctrl_config, &dev->bar->cc);
1632 timeout = SHUTDOWN_TIMEOUT + jiffies;
1633 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1634 NVME_CSTS_SHST_CMPLT) {
1636 if (fatal_signal_pending(current))
1638 if (time_after(jiffies, timeout)) {
1640 "Device shutdown incomplete; abort shutdown\n");
1648 static struct blk_mq_ops nvme_mq_admin_ops = {
1649 .queue_rq = nvme_queue_rq,
1650 .map_queue = blk_mq_map_queue,
1651 .init_hctx = nvme_admin_init_hctx,
1652 .exit_hctx = nvme_admin_exit_hctx,
1653 .init_request = nvme_admin_init_request,
1654 .timeout = nvme_timeout,
1657 static struct blk_mq_ops nvme_mq_ops = {
1658 .queue_rq = nvme_queue_rq,
1659 .map_queue = blk_mq_map_queue,
1660 .init_hctx = nvme_init_hctx,
1661 .init_request = nvme_init_request,
1662 .timeout = nvme_timeout,
1665 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1667 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1668 blk_cleanup_queue(dev->admin_q);
1669 blk_mq_free_tag_set(&dev->admin_tagset);
1673 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1675 if (!dev->admin_q) {
1676 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1677 dev->admin_tagset.nr_hw_queues = 1;
1678 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1679 dev->admin_tagset.reserved_tags = 1;
1680 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1681 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1682 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1683 dev->admin_tagset.driver_data = dev;
1685 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1688 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1689 if (IS_ERR(dev->admin_q)) {
1690 blk_mq_free_tag_set(&dev->admin_tagset);
1693 if (!blk_get_queue(dev->admin_q)) {
1694 nvme_dev_remove_admin(dev);
1695 dev->admin_q = NULL;
1699 blk_mq_unfreeze_queue(dev->admin_q);
1704 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1708 u64 cap = readq(&dev->bar->cap);
1709 struct nvme_queue *nvmeq;
1710 unsigned page_shift = PAGE_SHIFT;
1711 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1712 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1714 if (page_shift < dev_page_min) {
1716 "Minimum device page size (%u) too large for "
1717 "host (%u)\n", 1 << dev_page_min,
1721 if (page_shift > dev_page_max) {
1723 "Device maximum page size (%u) smaller than "
1724 "host (%u); enabling work-around\n",
1725 1 << dev_page_max, 1 << page_shift);
1726 page_shift = dev_page_max;
1729 dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1730 NVME_CAP_NSSRC(cap) : 0;
1732 if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1733 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1735 result = nvme_disable_ctrl(dev, cap);
1739 nvmeq = dev->queues[0];
1741 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1746 aqa = nvmeq->q_depth - 1;
1749 dev->page_size = 1 << page_shift;
1751 dev->ctrl_config = NVME_CC_CSS_NVM;
1752 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1753 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1754 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1756 writel(aqa, &dev->bar->aqa);
1757 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1758 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1760 result = nvme_enable_ctrl(dev, cap);
1764 nvmeq->cq_vector = 0;
1765 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1767 nvmeq->cq_vector = -1;
1774 nvme_free_queues(dev, 0);
1778 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1780 struct nvme_dev *dev = ns->dev;
1781 struct nvme_user_io io;
1782 struct nvme_command c;
1783 unsigned length, meta_len;
1785 dma_addr_t meta_dma = 0;
1787 void __user *metadata;
1789 if (copy_from_user(&io, uio, sizeof(io)))
1792 switch (io.opcode) {
1793 case nvme_cmd_write:
1795 case nvme_cmd_compare:
1801 length = (io.nblocks + 1) << ns->lba_shift;
1802 meta_len = (io.nblocks + 1) * ns->ms;
1803 metadata = (void __user *)(unsigned long)io.metadata;
1804 write = io.opcode & 1;
1811 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1814 meta = dma_alloc_coherent(dev->dev, meta_len,
1815 &meta_dma, GFP_KERNEL);
1822 if (copy_from_user(meta, metadata, meta_len)) {
1829 memset(&c, 0, sizeof(c));
1830 c.rw.opcode = io.opcode;
1831 c.rw.flags = io.flags;
1832 c.rw.nsid = cpu_to_le32(ns->ns_id);
1833 c.rw.slba = cpu_to_le64(io.slba);
1834 c.rw.length = cpu_to_le16(io.nblocks);
1835 c.rw.control = cpu_to_le16(io.control);
1836 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1837 c.rw.reftag = cpu_to_le32(io.reftag);
1838 c.rw.apptag = cpu_to_le16(io.apptag);
1839 c.rw.appmask = cpu_to_le16(io.appmask);
1840 c.rw.metadata = cpu_to_le64(meta_dma);
1842 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1843 (void __user *)io.addr, length, NULL, 0);
1846 if (status == NVME_SC_SUCCESS && !write) {
1847 if (copy_to_user(metadata, meta, meta_len))
1850 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1855 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1856 struct nvme_passthru_cmd __user *ucmd)
1858 struct nvme_passthru_cmd cmd;
1859 struct nvme_command c;
1860 unsigned timeout = 0;
1863 if (!capable(CAP_SYS_ADMIN))
1865 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1868 memset(&c, 0, sizeof(c));
1869 c.common.opcode = cmd.opcode;
1870 c.common.flags = cmd.flags;
1871 c.common.nsid = cpu_to_le32(cmd.nsid);
1872 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1873 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1874 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1875 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1876 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1877 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1878 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1879 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1882 timeout = msecs_to_jiffies(cmd.timeout_ms);
1884 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1885 NULL, (void __user *)cmd.addr, cmd.data_len,
1886 &cmd.result, timeout);
1888 if (put_user(cmd.result, &ucmd->result))
1895 static int nvme_subsys_reset(struct nvme_dev *dev)
1897 if (!dev->subsystem)
1900 writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1904 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1907 struct nvme_ns *ns = bdev->bd_disk->private_data;
1911 force_successful_syscall_return();
1913 case NVME_IOCTL_ADMIN_CMD:
1914 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1915 case NVME_IOCTL_IO_CMD:
1916 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1917 case NVME_IOCTL_SUBMIT_IO:
1918 return nvme_submit_io(ns, (void __user *)arg);
1919 case SG_GET_VERSION_NUM:
1920 return nvme_sg_get_version_num((void __user *)arg);
1922 return nvme_sg_io(ns, (void __user *)arg);
1928 #ifdef CONFIG_COMPAT
1929 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1930 unsigned int cmd, unsigned long arg)
1934 return -ENOIOCTLCMD;
1936 return nvme_ioctl(bdev, mode, cmd, arg);
1939 #define nvme_compat_ioctl NULL
1942 static void nvme_free_dev(struct kref *kref);
1943 static void nvme_free_ns(struct kref *kref)
1945 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1947 spin_lock(&dev_list_lock);
1948 ns->disk->private_data = NULL;
1949 spin_unlock(&dev_list_lock);
1951 kref_put(&ns->dev->kref, nvme_free_dev);
1956 static int nvme_open(struct block_device *bdev, fmode_t mode)
1961 spin_lock(&dev_list_lock);
1962 ns = bdev->bd_disk->private_data;
1965 else if (!kref_get_unless_zero(&ns->kref))
1967 spin_unlock(&dev_list_lock);
1972 static void nvme_release(struct gendisk *disk, fmode_t mode)
1974 struct nvme_ns *ns = disk->private_data;
1975 kref_put(&ns->kref, nvme_free_ns);
1978 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1980 /* some standard values */
1981 geo->heads = 1 << 6;
1982 geo->sectors = 1 << 5;
1983 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1987 static void nvme_config_discard(struct nvme_ns *ns)
1989 u32 logical_block_size = queue_logical_block_size(ns->queue);
1990 ns->queue->limits.discard_zeroes_data = 0;
1991 ns->queue->limits.discard_alignment = logical_block_size;
1992 ns->queue->limits.discard_granularity = logical_block_size;
1993 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1994 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1997 static int nvme_revalidate_disk(struct gendisk *disk)
1999 struct nvme_ns *ns = disk->private_data;
2000 struct nvme_dev *dev = ns->dev;
2001 struct nvme_id_ns *id;
2006 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2007 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2008 dev->instance, ns->ns_id);
2011 if (id->ncap == 0) {
2017 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2018 ns->lba_shift = id->lbaf[lbaf].ds;
2019 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2020 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2023 * If identify namespace failed, use default 512 byte block size so
2024 * block layer can use before failing read/write for 0 capacity.
2026 if (ns->lba_shift == 0)
2028 bs = 1 << ns->lba_shift;
2030 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2031 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2032 id->dps & NVME_NS_DPS_PI_MASK : 0;
2034 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2036 bs != queue_logical_block_size(disk->queue) ||
2037 (ns->ms && ns->ext)))
2038 blk_integrity_unregister(disk);
2040 ns->pi_type = pi_type;
2041 blk_queue_logical_block_size(ns->queue, bs);
2043 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2045 nvme_init_integrity(ns);
2047 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2048 set_capacity(disk, 0);
2050 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2052 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2053 nvme_config_discard(ns);
2059 static const struct block_device_operations nvme_fops = {
2060 .owner = THIS_MODULE,
2061 .ioctl = nvme_ioctl,
2062 .compat_ioctl = nvme_compat_ioctl,
2064 .release = nvme_release,
2065 .getgeo = nvme_getgeo,
2066 .revalidate_disk= nvme_revalidate_disk,
2069 static int nvme_kthread(void *data)
2071 struct nvme_dev *dev, *next;
2073 while (!kthread_should_stop()) {
2074 set_current_state(TASK_INTERRUPTIBLE);
2075 spin_lock(&dev_list_lock);
2076 list_for_each_entry_safe(dev, next, &dev_list, node) {
2078 u32 csts = readl(&dev->bar->csts);
2080 if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2081 csts & NVME_CSTS_CFS) {
2082 if (!__nvme_reset(dev)) {
2084 "Failed status: %x, reset controller\n",
2085 readl(&dev->bar->csts));
2089 for (i = 0; i < dev->queue_count; i++) {
2090 struct nvme_queue *nvmeq = dev->queues[i];
2093 spin_lock_irq(&nvmeq->q_lock);
2094 nvme_process_cq(nvmeq);
2096 while ((i == 0) && (dev->event_limit > 0)) {
2097 if (nvme_submit_async_admin_req(dev))
2101 spin_unlock_irq(&nvmeq->q_lock);
2104 spin_unlock(&dev_list_lock);
2105 schedule_timeout(round_jiffies_relative(HZ));
2110 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2113 struct gendisk *disk;
2114 int node = dev_to_node(dev->dev);
2116 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2120 ns->queue = blk_mq_init_queue(&dev->tagset);
2121 if (IS_ERR(ns->queue))
2123 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2124 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2126 ns->queue->queuedata = ns;
2128 disk = alloc_disk_node(0, node);
2130 goto out_free_queue;
2132 kref_init(&ns->kref);
2135 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2136 list_add_tail(&ns->list, &dev->namespaces);
2138 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2139 if (dev->max_hw_sectors) {
2140 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2141 blk_queue_max_segments(ns->queue,
2142 ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2144 if (dev->stripe_size)
2145 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2146 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2147 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2148 blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2150 disk->major = nvme_major;
2151 disk->first_minor = 0;
2152 disk->fops = &nvme_fops;
2153 disk->private_data = ns;
2154 disk->queue = ns->queue;
2155 disk->driverfs_dev = dev->device;
2156 disk->flags = GENHD_FL_EXT_DEVT;
2157 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2160 * Initialize capacity to 0 until we establish the namespace format and
2161 * setup integrity extentions if necessary. The revalidate_disk after
2162 * add_disk allows the driver to register with integrity if the format
2165 set_capacity(disk, 0);
2166 if (nvme_revalidate_disk(ns->disk))
2169 kref_get(&dev->kref);
2172 struct block_device *bd = bdget_disk(ns->disk, 0);
2175 if (blkdev_get(bd, FMODE_READ, NULL)) {
2179 blkdev_reread_part(bd);
2180 blkdev_put(bd, FMODE_READ);
2185 list_del(&ns->list);
2187 blk_cleanup_queue(ns->queue);
2192 static void nvme_create_io_queues(struct nvme_dev *dev)
2196 for (i = dev->queue_count; i <= dev->max_qid; i++)
2197 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2200 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2201 if (nvme_create_queue(dev->queues[i], i))
2205 static int set_queue_count(struct nvme_dev *dev, int count)
2209 u32 q_count = (count - 1) | ((count - 1) << 16);
2211 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2216 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2219 return min(result & 0xffff, result >> 16) + 1;
2222 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2224 u64 szu, size, offset;
2226 resource_size_t bar_size;
2227 struct pci_dev *pdev = to_pci_dev(dev->dev);
2229 dma_addr_t dma_addr;
2234 dev->cmbsz = readl(&dev->bar->cmbsz);
2235 if (!(NVME_CMB_SZ(dev->cmbsz)))
2238 cmbloc = readl(&dev->bar->cmbloc);
2240 szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2241 size = szu * NVME_CMB_SZ(dev->cmbsz);
2242 offset = szu * NVME_CMB_OFST(cmbloc);
2243 bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2245 if (offset > bar_size)
2249 * Controllers may support a CMB size larger than their BAR,
2250 * for example, due to being behind a bridge. Reduce the CMB to
2251 * the reported size of the BAR
2253 if (size > bar_size - offset)
2254 size = bar_size - offset;
2256 dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2257 cmb = ioremap_wc(dma_addr, size);
2261 dev->cmb_dma_addr = dma_addr;
2262 dev->cmb_size = size;
2266 static inline void nvme_release_cmb(struct nvme_dev *dev)
2274 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2276 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2279 static int nvme_setup_io_queues(struct nvme_dev *dev)
2281 struct nvme_queue *adminq = dev->queues[0];
2282 struct pci_dev *pdev = to_pci_dev(dev->dev);
2283 int result, i, vecs, nr_io_queues, size;
2285 nr_io_queues = num_possible_cpus();
2286 result = set_queue_count(dev, nr_io_queues);
2289 if (result < nr_io_queues)
2290 nr_io_queues = result;
2292 if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2293 result = nvme_cmb_qdepth(dev, nr_io_queues,
2294 sizeof(struct nvme_command));
2296 dev->q_depth = result;
2298 nvme_release_cmb(dev);
2301 size = db_bar_size(dev, nr_io_queues);
2305 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2308 if (!--nr_io_queues)
2310 size = db_bar_size(dev, nr_io_queues);
2312 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2313 adminq->q_db = dev->dbs;
2316 /* Deregister the admin queue's interrupt */
2317 free_irq(dev->entry[0].vector, adminq);
2320 * If we enable msix early due to not intx, disable it again before
2321 * setting up the full range we need.
2324 pci_disable_msix(pdev);
2326 for (i = 0; i < nr_io_queues; i++)
2327 dev->entry[i].entry = i;
2328 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2330 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2334 for (i = 0; i < vecs; i++)
2335 dev->entry[i].vector = i + pdev->irq;
2340 * Should investigate if there's a performance win from allocating
2341 * more queues than interrupt vectors; it might allow the submission
2342 * path to scale better, even if the receive path is limited by the
2343 * number of interrupts.
2345 nr_io_queues = vecs;
2346 dev->max_qid = nr_io_queues;
2348 result = queue_request_irq(dev, adminq, adminq->irqname);
2350 adminq->cq_vector = -1;
2354 /* Free previously allocated queues that are no longer usable */
2355 nvme_free_queues(dev, nr_io_queues + 1);
2356 nvme_create_io_queues(dev);
2361 nvme_free_queues(dev, 1);
2365 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2367 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2368 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2370 return nsa->ns_id - nsb->ns_id;
2373 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2377 list_for_each_entry(ns, &dev->namespaces, list) {
2378 if (ns->ns_id == nsid)
2380 if (ns->ns_id > nsid)
2386 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2388 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2389 dev->online_queues < 2);
2392 static void nvme_ns_remove(struct nvme_ns *ns)
2394 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2397 blk_set_queue_dying(ns->queue);
2398 if (ns->disk->flags & GENHD_FL_UP) {
2399 if (blk_get_integrity(ns->disk))
2400 blk_integrity_unregister(ns->disk);
2401 del_gendisk(ns->disk);
2403 if (kill || !blk_queue_dying(ns->queue)) {
2404 blk_mq_abort_requeue_list(ns->queue);
2405 blk_cleanup_queue(ns->queue);
2407 list_del_init(&ns->list);
2408 kref_put(&ns->kref, nvme_free_ns);
2411 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2413 struct nvme_ns *ns, *next;
2416 for (i = 1; i <= nn; i++) {
2417 ns = nvme_find_ns(dev, i);
2419 if (revalidate_disk(ns->disk))
2422 nvme_alloc_ns(dev, i);
2424 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2428 list_sort(NULL, &dev->namespaces, ns_cmp);
2431 static void nvme_set_irq_hints(struct nvme_dev *dev)
2433 struct nvme_queue *nvmeq;
2436 for (i = 0; i < dev->online_queues; i++) {
2437 nvmeq = dev->queues[i];
2439 if (!nvmeq->tags || !(*nvmeq->tags))
2442 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2443 blk_mq_tags_cpumask(*nvmeq->tags));
2447 static void nvme_dev_scan(struct work_struct *work)
2449 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2450 struct nvme_id_ctrl *ctrl;
2452 if (!dev->tagset.tags)
2454 if (nvme_identify_ctrl(dev, &ctrl))
2456 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2458 nvme_set_irq_hints(dev);
2462 * Return: error value if an error occurred setting up the queues or calling
2463 * Identify Device. 0 if these succeeded, even if adding some of the
2464 * namespaces failed. At the moment, these failures are silent. TBD which
2465 * failures should be reported.
2467 static int nvme_dev_add(struct nvme_dev *dev)
2469 struct pci_dev *pdev = to_pci_dev(dev->dev);
2471 struct nvme_id_ctrl *ctrl;
2472 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2474 res = nvme_identify_ctrl(dev, &ctrl);
2476 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2480 dev->oncs = le16_to_cpup(&ctrl->oncs);
2481 dev->abort_limit = ctrl->acl + 1;
2482 dev->vwc = ctrl->vwc;
2483 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2484 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2485 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2487 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2488 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2489 (pdev->device == 0x0953) && ctrl->vs[3]) {
2490 unsigned int max_hw_sectors;
2492 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2493 max_hw_sectors = dev->stripe_size >> (shift - 9);
2494 if (dev->max_hw_sectors) {
2495 dev->max_hw_sectors = min(max_hw_sectors,
2496 dev->max_hw_sectors);
2498 dev->max_hw_sectors = max_hw_sectors;
2502 if (!dev->tagset.tags) {
2503 dev->tagset.ops = &nvme_mq_ops;
2504 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2505 dev->tagset.timeout = NVME_IO_TIMEOUT;
2506 dev->tagset.numa_node = dev_to_node(dev->dev);
2507 dev->tagset.queue_depth =
2508 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2509 dev->tagset.cmd_size = nvme_cmd_size(dev);
2510 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2511 dev->tagset.driver_data = dev;
2513 if (blk_mq_alloc_tag_set(&dev->tagset))
2516 schedule_work(&dev->scan_work);
2520 static int nvme_dev_map(struct nvme_dev *dev)
2523 int bars, result = -ENOMEM;
2524 struct pci_dev *pdev = to_pci_dev(dev->dev);
2526 if (pci_enable_device_mem(pdev))
2529 dev->entry[0].vector = pdev->irq;
2530 pci_set_master(pdev);
2531 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2535 if (pci_request_selected_regions(pdev, bars, "nvme"))
2538 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2539 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2542 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2546 if (readl(&dev->bar->csts) == -1) {
2552 * Some devices don't advertse INTx interrupts, pre-enable a single
2553 * MSIX vec for setup. We'll adjust this later.
2556 result = pci_enable_msix(pdev, dev->entry, 1);
2561 cap = readq(&dev->bar->cap);
2562 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2563 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2564 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2565 if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2566 dev->cmb = nvme_map_cmb(dev);
2574 pci_release_regions(pdev);
2576 pci_disable_device(pdev);
2580 static void nvme_dev_unmap(struct nvme_dev *dev)
2582 struct pci_dev *pdev = to_pci_dev(dev->dev);
2584 if (pdev->msi_enabled)
2585 pci_disable_msi(pdev);
2586 else if (pdev->msix_enabled)
2587 pci_disable_msix(pdev);
2592 pci_release_regions(pdev);
2595 if (pci_is_enabled(pdev))
2596 pci_disable_device(pdev);
2599 struct nvme_delq_ctx {
2600 struct task_struct *waiter;
2601 struct kthread_worker *worker;
2605 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2607 dq->waiter = current;
2611 set_current_state(TASK_KILLABLE);
2612 if (!atomic_read(&dq->refcount))
2614 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2615 fatal_signal_pending(current)) {
2617 * Disable the controller first since we can't trust it
2618 * at this point, but leave the admin queue enabled
2619 * until all queue deletion requests are flushed.
2620 * FIXME: This may take a while if there are more h/w
2621 * queues than admin tags.
2623 set_current_state(TASK_RUNNING);
2624 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2625 nvme_clear_queue(dev->queues[0]);
2626 flush_kthread_worker(dq->worker);
2627 nvme_disable_queue(dev, 0);
2631 set_current_state(TASK_RUNNING);
2634 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2636 atomic_dec(&dq->refcount);
2638 wake_up_process(dq->waiter);
2641 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2643 atomic_inc(&dq->refcount);
2647 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2649 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2653 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2654 kthread_work_func_t fn)
2656 struct nvme_command c;
2658 memset(&c, 0, sizeof(c));
2659 c.delete_queue.opcode = opcode;
2660 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2662 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2663 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2667 static void nvme_del_cq_work_handler(struct kthread_work *work)
2669 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2671 nvme_del_queue_end(nvmeq);
2674 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2676 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2677 nvme_del_cq_work_handler);
2680 static void nvme_del_sq_work_handler(struct kthread_work *work)
2682 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2684 int status = nvmeq->cmdinfo.status;
2687 status = nvme_delete_cq(nvmeq);
2689 nvme_del_queue_end(nvmeq);
2692 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2694 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2695 nvme_del_sq_work_handler);
2698 static void nvme_del_queue_start(struct kthread_work *work)
2700 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2702 if (nvme_delete_sq(nvmeq))
2703 nvme_del_queue_end(nvmeq);
2706 static void nvme_disable_io_queues(struct nvme_dev *dev)
2709 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2710 struct nvme_delq_ctx dq;
2711 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2712 &worker, "nvme%d", dev->instance);
2714 if (IS_ERR(kworker_task)) {
2716 "Failed to create queue del task\n");
2717 for (i = dev->queue_count - 1; i > 0; i--)
2718 nvme_disable_queue(dev, i);
2723 atomic_set(&dq.refcount, 0);
2724 dq.worker = &worker;
2725 for (i = dev->queue_count - 1; i > 0; i--) {
2726 struct nvme_queue *nvmeq = dev->queues[i];
2728 if (nvme_suspend_queue(nvmeq))
2730 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2731 nvmeq->cmdinfo.worker = dq.worker;
2732 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2733 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2735 nvme_wait_dq(&dq, dev);
2736 kthread_stop(kworker_task);
2740 * Remove the node from the device list and check
2741 * for whether or not we need to stop the nvme_thread.
2743 static void nvme_dev_list_remove(struct nvme_dev *dev)
2745 struct task_struct *tmp = NULL;
2747 spin_lock(&dev_list_lock);
2748 list_del_init(&dev->node);
2749 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2753 spin_unlock(&dev_list_lock);
2759 static void nvme_freeze_queues(struct nvme_dev *dev)
2763 list_for_each_entry(ns, &dev->namespaces, list) {
2764 blk_mq_freeze_queue_start(ns->queue);
2766 spin_lock_irq(ns->queue->queue_lock);
2767 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2768 spin_unlock_irq(ns->queue->queue_lock);
2770 blk_mq_cancel_requeue_work(ns->queue);
2771 blk_mq_stop_hw_queues(ns->queue);
2775 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2779 list_for_each_entry(ns, &dev->namespaces, list) {
2780 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2781 blk_mq_unfreeze_queue(ns->queue);
2782 blk_mq_start_stopped_hw_queues(ns->queue, true);
2783 blk_mq_kick_requeue_list(ns->queue);
2787 static void nvme_dev_shutdown(struct nvme_dev *dev)
2792 nvme_dev_list_remove(dev);
2795 nvme_freeze_queues(dev);
2796 csts = readl(&dev->bar->csts);
2798 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2799 for (i = dev->queue_count - 1; i >= 0; i--) {
2800 struct nvme_queue *nvmeq = dev->queues[i];
2801 nvme_suspend_queue(nvmeq);
2804 nvme_disable_io_queues(dev);
2805 nvme_shutdown_ctrl(dev);
2806 nvme_disable_queue(dev, 0);
2808 nvme_dev_unmap(dev);
2810 for (i = dev->queue_count - 1; i >= 0; i--)
2811 nvme_clear_queue(dev->queues[i]);
2814 static void nvme_dev_remove(struct nvme_dev *dev)
2816 struct nvme_ns *ns, *next;
2818 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2822 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2824 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2825 PAGE_SIZE, PAGE_SIZE, 0);
2826 if (!dev->prp_page_pool)
2829 /* Optimisation for I/Os between 4k and 128k */
2830 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2832 if (!dev->prp_small_pool) {
2833 dma_pool_destroy(dev->prp_page_pool);
2839 static void nvme_release_prp_pools(struct nvme_dev *dev)
2841 dma_pool_destroy(dev->prp_page_pool);
2842 dma_pool_destroy(dev->prp_small_pool);
2845 static DEFINE_IDA(nvme_instance_ida);
2847 static int nvme_set_instance(struct nvme_dev *dev)
2849 int instance, error;
2852 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2855 spin_lock(&dev_list_lock);
2856 error = ida_get_new(&nvme_instance_ida, &instance);
2857 spin_unlock(&dev_list_lock);
2858 } while (error == -EAGAIN);
2863 dev->instance = instance;
2867 static void nvme_release_instance(struct nvme_dev *dev)
2869 spin_lock(&dev_list_lock);
2870 ida_remove(&nvme_instance_ida, dev->instance);
2871 spin_unlock(&dev_list_lock);
2874 static void nvme_free_dev(struct kref *kref)
2876 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2878 put_device(dev->dev);
2879 put_device(dev->device);
2880 nvme_release_instance(dev);
2881 if (dev->tagset.tags)
2882 blk_mq_free_tag_set(&dev->tagset);
2884 blk_put_queue(dev->admin_q);
2890 static int nvme_dev_open(struct inode *inode, struct file *f)
2892 struct nvme_dev *dev;
2893 int instance = iminor(inode);
2896 spin_lock(&dev_list_lock);
2897 list_for_each_entry(dev, &dev_list, node) {
2898 if (dev->instance == instance) {
2899 if (!dev->admin_q) {
2903 if (!kref_get_unless_zero(&dev->kref))
2905 f->private_data = dev;
2910 spin_unlock(&dev_list_lock);
2915 static int nvme_dev_release(struct inode *inode, struct file *f)
2917 struct nvme_dev *dev = f->private_data;
2918 kref_put(&dev->kref, nvme_free_dev);
2922 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2924 struct nvme_dev *dev = f->private_data;
2928 case NVME_IOCTL_ADMIN_CMD:
2929 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2930 case NVME_IOCTL_IO_CMD:
2931 if (list_empty(&dev->namespaces))
2933 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2934 return nvme_user_cmd(dev, ns, (void __user *)arg);
2935 case NVME_IOCTL_RESET:
2936 dev_warn(dev->dev, "resetting controller\n");
2937 return nvme_reset(dev);
2938 case NVME_IOCTL_SUBSYS_RESET:
2939 return nvme_subsys_reset(dev);
2945 static const struct file_operations nvme_dev_fops = {
2946 .owner = THIS_MODULE,
2947 .open = nvme_dev_open,
2948 .release = nvme_dev_release,
2949 .unlocked_ioctl = nvme_dev_ioctl,
2950 .compat_ioctl = nvme_dev_ioctl,
2953 static void nvme_probe_work(struct work_struct *work)
2955 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2956 bool start_thread = false;
2959 result = nvme_dev_map(dev);
2963 result = nvme_configure_admin_queue(dev);
2967 spin_lock(&dev_list_lock);
2968 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2969 start_thread = true;
2972 list_add(&dev->node, &dev_list);
2973 spin_unlock(&dev_list_lock);
2976 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2977 wake_up_all(&nvme_kthread_wait);
2979 wait_event_killable(nvme_kthread_wait, nvme_thread);
2981 if (IS_ERR_OR_NULL(nvme_thread)) {
2982 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2986 nvme_init_queue(dev->queues[0], 0);
2987 result = nvme_alloc_admin_tags(dev);
2991 result = nvme_setup_io_queues(dev);
2995 dev->event_limit = 1;
2997 if (dev->online_queues < 2) {
2998 dev_warn(dev->dev, "IO queues not created\n");
2999 nvme_free_queues(dev, 1);
3000 nvme_dev_remove(dev);
3002 nvme_unfreeze_queues(dev);
3009 nvme_dev_remove_admin(dev);
3010 blk_put_queue(dev->admin_q);
3011 dev->admin_q = NULL;
3012 dev->queues[0]->tags = NULL;
3014 nvme_disable_queue(dev, 0);
3015 nvme_dev_list_remove(dev);
3017 nvme_dev_unmap(dev);
3019 if (!work_busy(&dev->reset_work))
3020 nvme_dead_ctrl(dev);
3023 static int nvme_remove_dead_ctrl(void *arg)
3025 struct nvme_dev *dev = (struct nvme_dev *)arg;
3026 struct pci_dev *pdev = to_pci_dev(dev->dev);
3028 if (pci_get_drvdata(pdev))
3029 pci_stop_and_remove_bus_device_locked(pdev);
3030 kref_put(&dev->kref, nvme_free_dev);
3034 static void nvme_dead_ctrl(struct nvme_dev *dev)
3036 dev_warn(dev->dev, "Device failed to resume\n");
3037 kref_get(&dev->kref);
3038 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3041 "Failed to start controller remove task\n");
3042 kref_put(&dev->kref, nvme_free_dev);
3046 static void nvme_reset_work(struct work_struct *ws)
3048 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3049 bool in_probe = work_busy(&dev->probe_work);
3051 nvme_dev_shutdown(dev);
3053 /* Synchronize with device probe so that work will see failure status
3054 * and exit gracefully without trying to schedule another reset */
3055 flush_work(&dev->probe_work);
3057 /* Fail this device if reset occured during probe to avoid
3058 * infinite initialization loops. */
3060 nvme_dead_ctrl(dev);
3063 /* Schedule device resume asynchronously so the reset work is available
3064 * to cleanup errors that may occur during reinitialization */
3065 schedule_work(&dev->probe_work);
3068 static int __nvme_reset(struct nvme_dev *dev)
3070 if (work_pending(&dev->reset_work))
3072 list_del_init(&dev->node);
3073 queue_work(nvme_workq, &dev->reset_work);
3077 static int nvme_reset(struct nvme_dev *dev)
3081 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3084 spin_lock(&dev_list_lock);
3085 ret = __nvme_reset(dev);
3086 spin_unlock(&dev_list_lock);
3089 flush_work(&dev->reset_work);
3090 flush_work(&dev->probe_work);
3097 static ssize_t nvme_sysfs_reset(struct device *dev,
3098 struct device_attribute *attr, const char *buf,
3101 struct nvme_dev *ndev = dev_get_drvdata(dev);
3104 ret = nvme_reset(ndev);
3110 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3112 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3114 int node, result = -ENOMEM;
3115 struct nvme_dev *dev;
3117 node = dev_to_node(&pdev->dev);
3118 if (node == NUMA_NO_NODE)
3119 set_dev_node(&pdev->dev, 0);
3121 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3124 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3128 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3133 INIT_LIST_HEAD(&dev->namespaces);
3134 INIT_WORK(&dev->reset_work, nvme_reset_work);
3135 dev->dev = get_device(&pdev->dev);
3136 pci_set_drvdata(pdev, dev);
3137 result = nvme_set_instance(dev);
3141 result = nvme_setup_prp_pools(dev);
3145 kref_init(&dev->kref);
3146 dev->device = device_create(nvme_class, &pdev->dev,
3147 MKDEV(nvme_char_major, dev->instance),
3148 dev, "nvme%d", dev->instance);
3149 if (IS_ERR(dev->device)) {
3150 result = PTR_ERR(dev->device);
3153 get_device(dev->device);
3154 dev_set_drvdata(dev->device, dev);
3156 result = device_create_file(dev->device, &dev_attr_reset_controller);
3160 INIT_LIST_HEAD(&dev->node);
3161 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3162 INIT_WORK(&dev->probe_work, nvme_probe_work);
3163 schedule_work(&dev->probe_work);
3167 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3168 put_device(dev->device);
3170 nvme_release_prp_pools(dev);
3172 nvme_release_instance(dev);
3174 put_device(dev->dev);
3182 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3184 struct nvme_dev *dev = pci_get_drvdata(pdev);
3187 nvme_dev_shutdown(dev);
3189 schedule_work(&dev->probe_work);
3192 static void nvme_shutdown(struct pci_dev *pdev)
3194 struct nvme_dev *dev = pci_get_drvdata(pdev);
3195 nvme_dev_shutdown(dev);
3198 static void nvme_remove(struct pci_dev *pdev)
3200 struct nvme_dev *dev = pci_get_drvdata(pdev);
3202 spin_lock(&dev_list_lock);
3203 list_del_init(&dev->node);
3204 spin_unlock(&dev_list_lock);
3206 pci_set_drvdata(pdev, NULL);
3207 flush_work(&dev->probe_work);
3208 flush_work(&dev->reset_work);
3209 flush_work(&dev->scan_work);
3210 device_remove_file(dev->device, &dev_attr_reset_controller);
3211 nvme_dev_remove(dev);
3212 nvme_dev_shutdown(dev);
3213 nvme_dev_remove_admin(dev);
3214 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3215 nvme_free_queues(dev, 0);
3216 nvme_release_cmb(dev);
3217 nvme_release_prp_pools(dev);
3218 kref_put(&dev->kref, nvme_free_dev);
3221 /* These functions are yet to be implemented */
3222 #define nvme_error_detected NULL
3223 #define nvme_dump_registers NULL
3224 #define nvme_link_reset NULL
3225 #define nvme_slot_reset NULL
3226 #define nvme_error_resume NULL
3228 #ifdef CONFIG_PM_SLEEP
3229 static int nvme_suspend(struct device *dev)
3231 struct pci_dev *pdev = to_pci_dev(dev);
3232 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3234 nvme_dev_shutdown(ndev);
3238 static int nvme_resume(struct device *dev)
3240 struct pci_dev *pdev = to_pci_dev(dev);
3241 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3243 schedule_work(&ndev->probe_work);
3248 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3250 static const struct pci_error_handlers nvme_err_handler = {
3251 .error_detected = nvme_error_detected,
3252 .mmio_enabled = nvme_dump_registers,
3253 .link_reset = nvme_link_reset,
3254 .slot_reset = nvme_slot_reset,
3255 .resume = nvme_error_resume,
3256 .reset_notify = nvme_reset_notify,
3259 /* Move to pci_ids.h later */
3260 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3262 static const struct pci_device_id nvme_id_table[] = {
3263 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3266 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3268 static struct pci_driver nvme_driver = {
3270 .id_table = nvme_id_table,
3271 .probe = nvme_probe,
3272 .remove = nvme_remove,
3273 .shutdown = nvme_shutdown,
3275 .pm = &nvme_dev_pm_ops,
3277 .err_handler = &nvme_err_handler,
3280 static int __init nvme_init(void)
3284 init_waitqueue_head(&nvme_kthread_wait);
3286 nvme_workq = create_singlethread_workqueue("nvme");
3290 result = register_blkdev(nvme_major, "nvme");
3293 else if (result > 0)
3294 nvme_major = result;
3296 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3299 goto unregister_blkdev;
3300 else if (result > 0)
3301 nvme_char_major = result;
3303 nvme_class = class_create(THIS_MODULE, "nvme");
3304 if (IS_ERR(nvme_class)) {
3305 result = PTR_ERR(nvme_class);
3306 goto unregister_chrdev;
3309 result = pci_register_driver(&nvme_driver);
3315 class_destroy(nvme_class);
3317 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3319 unregister_blkdev(nvme_major, "nvme");
3321 destroy_workqueue(nvme_workq);
3325 static void __exit nvme_exit(void)
3327 pci_unregister_driver(&nvme_driver);
3328 unregister_blkdev(nvme_major, "nvme");
3329 destroy_workqueue(nvme_workq);
3330 class_destroy(nvme_class);
3331 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3332 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3336 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3337 MODULE_LICENSE("GPL");
3338 MODULE_VERSION("1.0");
3339 module_init(nvme_init);
3340 module_exit(nvme_exit);