2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
47 #define NVME_MINORS (1U << MINORBITS)
48 #define NVME_Q_DEPTH 1024
49 #define NVME_AQ_DEPTH 256
50 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
51 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
52 #define ADMIN_TIMEOUT (admin_timeout * HZ)
53 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
55 static unsigned char admin_timeout = 60;
56 module_param(admin_timeout, byte, 0644);
57 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
59 unsigned char nvme_io_timeout = 30;
60 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
61 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
63 static unsigned char shutdown_timeout = 5;
64 module_param(shutdown_timeout, byte, 0644);
65 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
67 static int nvme_major;
68 module_param(nvme_major, int, 0);
70 static int nvme_char_major;
71 module_param(nvme_char_major, int, 0);
73 static int use_threaded_interrupts;
74 module_param(use_threaded_interrupts, int, 0);
76 static bool use_cmb_sqes = true;
77 module_param(use_cmb_sqes, bool, 0644);
78 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
80 static DEFINE_SPINLOCK(dev_list_lock);
81 static LIST_HEAD(dev_list);
82 static struct task_struct *nvme_thread;
83 static struct workqueue_struct *nvme_workq;
84 static wait_queue_head_t nvme_kthread_wait;
86 static struct class *nvme_class;
88 static int __nvme_reset(struct nvme_dev *dev);
89 static int nvme_reset(struct nvme_dev *dev);
90 static int nvme_process_cq(struct nvme_queue *nvmeq);
91 static void nvme_dead_ctrl(struct nvme_dev *dev);
93 struct async_cmd_info {
94 struct kthread_work work;
95 struct kthread_worker *worker;
103 * An NVM Express queue. Each device has at least two (one for admin
104 * commands and one for I/O commands).
107 struct device *q_dmadev;
108 struct nvme_dev *dev;
109 char irqname[24]; /* nvme4294967295-65535\0 */
111 struct nvme_command *sq_cmds;
112 struct nvme_command __iomem *sq_cmds_io;
113 volatile struct nvme_completion *cqes;
114 struct blk_mq_tags **tags;
115 dma_addr_t sq_dma_addr;
116 dma_addr_t cq_dma_addr;
126 struct async_cmd_info cmdinfo;
130 * Check we didin't inadvertently grow the command struct
132 static inline void _nvme_check_size(void)
134 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
141 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
142 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
143 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
144 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
145 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
148 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
149 struct nvme_completion *);
151 struct nvme_cmd_info {
152 nvme_completion_fn fn;
155 struct nvme_queue *nvmeq;
156 struct nvme_iod iod[0];
160 * Max size of iod being embedded in the request payload
162 #define NVME_INT_PAGES 2
163 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
164 #define NVME_INT_MASK 0x01
167 * Will slightly overestimate the number of pages needed. This is OK
168 * as it only leads to a small amount of wasted memory for the lifetime of
171 static int nvme_npages(unsigned size, struct nvme_dev *dev)
173 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
174 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
177 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
179 unsigned int ret = sizeof(struct nvme_cmd_info);
181 ret += sizeof(struct nvme_iod);
182 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
183 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
188 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
189 unsigned int hctx_idx)
191 struct nvme_dev *dev = data;
192 struct nvme_queue *nvmeq = dev->queues[0];
194 WARN_ON(hctx_idx != 0);
195 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
196 WARN_ON(nvmeq->tags);
198 hctx->driver_data = nvmeq;
199 nvmeq->tags = &dev->admin_tagset.tags[0];
203 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
205 struct nvme_queue *nvmeq = hctx->driver_data;
210 static int nvme_admin_init_request(void *data, struct request *req,
211 unsigned int hctx_idx, unsigned int rq_idx,
212 unsigned int numa_node)
214 struct nvme_dev *dev = data;
215 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
216 struct nvme_queue *nvmeq = dev->queues[0];
223 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
224 unsigned int hctx_idx)
226 struct nvme_dev *dev = data;
227 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
230 nvmeq->tags = &dev->tagset.tags[hctx_idx];
232 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
233 hctx->driver_data = nvmeq;
237 static int nvme_init_request(void *data, struct request *req,
238 unsigned int hctx_idx, unsigned int rq_idx,
239 unsigned int numa_node)
241 struct nvme_dev *dev = data;
242 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
243 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
250 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
251 nvme_completion_fn handler)
256 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
259 static void *iod_get_private(struct nvme_iod *iod)
261 return (void *) (iod->private & ~0x1UL);
265 * If bit 0 is set, the iod is embedded in the request payload.
267 static bool iod_should_kfree(struct nvme_iod *iod)
269 return (iod->private & NVME_INT_MASK) == 0;
272 /* Special values must be less than 0x1000 */
273 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
274 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
275 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
276 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
278 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
279 struct nvme_completion *cqe)
281 if (ctx == CMD_CTX_CANCELLED)
283 if (ctx == CMD_CTX_COMPLETED) {
284 dev_warn(nvmeq->q_dmadev,
285 "completed id %d twice on queue %d\n",
286 cqe->command_id, le16_to_cpup(&cqe->sq_id));
289 if (ctx == CMD_CTX_INVALID) {
290 dev_warn(nvmeq->q_dmadev,
291 "invalid id %d completed on queue %d\n",
292 cqe->command_id, le16_to_cpup(&cqe->sq_id));
295 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
298 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
305 cmd->fn = special_completion;
306 cmd->ctx = CMD_CTX_CANCELLED;
310 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
311 struct nvme_completion *cqe)
313 u32 result = le32_to_cpup(&cqe->result);
314 u16 status = le16_to_cpup(&cqe->status) >> 1;
316 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
317 ++nvmeq->dev->event_limit;
318 if (status != NVME_SC_SUCCESS)
321 switch (result & 0xff07) {
322 case NVME_AER_NOTICE_NS_CHANGED:
323 dev_info(nvmeq->q_dmadev, "rescanning\n");
324 schedule_work(&nvmeq->dev->scan_work);
326 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
330 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
331 struct nvme_completion *cqe)
333 struct request *req = ctx;
335 u16 status = le16_to_cpup(&cqe->status) >> 1;
336 u32 result = le32_to_cpup(&cqe->result);
338 blk_mq_free_request(req);
340 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
341 ++nvmeq->dev->abort_limit;
344 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
345 struct nvme_completion *cqe)
347 struct async_cmd_info *cmdinfo = ctx;
348 cmdinfo->result = le32_to_cpup(&cqe->result);
349 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
350 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
351 blk_mq_free_request(cmdinfo->req);
354 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
357 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
359 return blk_mq_rq_to_pdu(req);
363 * Called with local interrupts disabled and the q_lock held. May not sleep.
365 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
366 nvme_completion_fn *fn)
368 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
370 if (tag >= nvmeq->q_depth) {
371 *fn = special_completion;
372 return CMD_CTX_INVALID;
377 cmd->fn = special_completion;
378 cmd->ctx = CMD_CTX_COMPLETED;
383 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
384 * @nvmeq: The queue to use
385 * @cmd: The command to send
387 * Safe to use from interrupt context
389 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
390 struct nvme_command *cmd)
392 u16 tail = nvmeq->sq_tail;
394 if (nvmeq->sq_cmds_io)
395 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
397 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
399 if (++tail == nvmeq->q_depth)
401 writel(tail, nvmeq->q_db);
402 nvmeq->sq_tail = tail;
405 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
408 spin_lock_irqsave(&nvmeq->q_lock, flags);
409 __nvme_submit_cmd(nvmeq, cmd);
410 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
413 static __le64 **iod_list(struct nvme_iod *iod)
415 return ((void *)iod) + iod->offset;
418 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
419 unsigned nseg, unsigned long private)
421 iod->private = private;
422 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
424 iod->length = nbytes;
428 static struct nvme_iod *
429 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
430 unsigned long priv, gfp_t gfp)
432 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
433 sizeof(__le64 *) * nvme_npages(bytes, dev) +
434 sizeof(struct scatterlist) * nseg, gfp);
437 iod_init(iod, bytes, nseg, priv);
442 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
445 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
446 sizeof(struct nvme_dsm_range);
447 struct nvme_iod *iod;
449 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
450 size <= NVME_INT_BYTES(dev)) {
451 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
454 iod_init(iod, size, rq->nr_phys_segments,
455 (unsigned long) rq | NVME_INT_MASK);
459 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
460 (unsigned long) rq, gfp);
463 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
465 const int last_prp = dev->page_size / 8 - 1;
467 __le64 **list = iod_list(iod);
468 dma_addr_t prp_dma = iod->first_dma;
470 if (iod->npages == 0)
471 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
472 for (i = 0; i < iod->npages; i++) {
473 __le64 *prp_list = list[i];
474 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
475 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
476 prp_dma = next_prp_dma;
479 if (iod_should_kfree(iod))
483 static int nvme_error_status(u16 status)
485 switch (status & 0x7ff) {
486 case NVME_SC_SUCCESS:
488 case NVME_SC_CAP_EXCEEDED:
495 #ifdef CONFIG_BLK_DEV_INTEGRITY
496 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
498 if (be32_to_cpu(pi->ref_tag) == v)
499 pi->ref_tag = cpu_to_be32(p);
502 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
504 if (be32_to_cpu(pi->ref_tag) == p)
505 pi->ref_tag = cpu_to_be32(v);
509 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
511 * The virtual start sector is the one that was originally submitted by the
512 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
513 * start sector may be different. Remap protection information to match the
514 * physical LBA on writes, and back to the original seed on reads.
516 * Type 0 and 3 do not have a ref tag, so no remapping required.
518 static void nvme_dif_remap(struct request *req,
519 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
521 struct nvme_ns *ns = req->rq_disk->private_data;
522 struct bio_integrity_payload *bip;
523 struct t10_pi_tuple *pi;
525 u32 i, nlb, ts, phys, virt;
527 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
530 bip = bio_integrity(req->bio);
534 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
537 virt = bip_get_seed(bip);
538 phys = nvme_block_nr(ns, blk_rq_pos(req));
539 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
540 ts = ns->disk->integrity->tuple_size;
542 for (i = 0; i < nlb; i++, virt++, phys++) {
543 pi = (struct t10_pi_tuple *)p;
544 dif_swap(phys, virt, pi);
550 static int nvme_noop_verify(struct blk_integrity_iter *iter)
555 static int nvme_noop_generate(struct blk_integrity_iter *iter)
560 struct blk_integrity nvme_meta_noop = {
561 .name = "NVME_META_NOOP",
562 .generate_fn = nvme_noop_generate,
563 .verify_fn = nvme_noop_verify,
566 static void nvme_init_integrity(struct nvme_ns *ns)
568 struct blk_integrity integrity;
570 switch (ns->pi_type) {
571 case NVME_NS_DPS_PI_TYPE3:
572 integrity = t10_pi_type3_crc;
574 case NVME_NS_DPS_PI_TYPE1:
575 case NVME_NS_DPS_PI_TYPE2:
576 integrity = t10_pi_type1_crc;
579 integrity = nvme_meta_noop;
582 integrity.tuple_size = ns->ms;
583 blk_integrity_register(ns->disk, &integrity);
584 blk_queue_max_integrity_segments(ns->queue, 1);
586 #else /* CONFIG_BLK_DEV_INTEGRITY */
587 static void nvme_dif_remap(struct request *req,
588 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
591 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
594 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
597 static void nvme_init_integrity(struct nvme_ns *ns)
602 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
603 struct nvme_completion *cqe)
605 struct nvme_iod *iod = ctx;
606 struct request *req = iod_get_private(iod);
607 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
609 u16 status = le16_to_cpup(&cqe->status) >> 1;
611 if (unlikely(status)) {
612 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
613 && (jiffies - req->start_time) < req->timeout) {
616 blk_mq_requeue_request(req);
617 spin_lock_irqsave(req->q->queue_lock, flags);
618 if (!blk_queue_stopped(req->q))
619 blk_mq_kick_requeue_list(req->q);
620 spin_unlock_irqrestore(req->q->queue_lock, flags);
624 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
625 if (cmd_rq->ctx == CMD_CTX_CANCELLED)
628 status = nvme_error_status(status);
632 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
633 u32 result = le32_to_cpup(&cqe->result);
634 req->special = (void *)(uintptr_t)result;
638 dev_warn(nvmeq->dev->dev,
639 "completing aborted command with status:%04x\n",
643 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
644 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
645 if (blk_integrity_rq(req)) {
646 if (!rq_data_dir(req))
647 nvme_dif_remap(req, nvme_dif_complete);
648 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
649 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
652 nvme_free_iod(nvmeq->dev, iod);
654 blk_mq_complete_request(req, status);
657 /* length is in bytes. gfp flags indicates whether we may sleep. */
658 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
659 int total_len, gfp_t gfp)
661 struct dma_pool *pool;
662 int length = total_len;
663 struct scatterlist *sg = iod->sg;
664 int dma_len = sg_dma_len(sg);
665 u64 dma_addr = sg_dma_address(sg);
666 u32 page_size = dev->page_size;
667 int offset = dma_addr & (page_size - 1);
669 __le64 **list = iod_list(iod);
673 length -= (page_size - offset);
677 dma_len -= (page_size - offset);
679 dma_addr += (page_size - offset);
682 dma_addr = sg_dma_address(sg);
683 dma_len = sg_dma_len(sg);
686 if (length <= page_size) {
687 iod->first_dma = dma_addr;
691 nprps = DIV_ROUND_UP(length, page_size);
692 if (nprps <= (256 / 8)) {
693 pool = dev->prp_small_pool;
696 pool = dev->prp_page_pool;
700 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
702 iod->first_dma = dma_addr;
704 return (total_len - length) + page_size;
707 iod->first_dma = prp_dma;
710 if (i == page_size >> 3) {
711 __le64 *old_prp_list = prp_list;
712 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
714 return total_len - length;
715 list[iod->npages++] = prp_list;
716 prp_list[0] = old_prp_list[i - 1];
717 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
720 prp_list[i++] = cpu_to_le64(dma_addr);
721 dma_len -= page_size;
722 dma_addr += page_size;
730 dma_addr = sg_dma_address(sg);
731 dma_len = sg_dma_len(sg);
737 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
738 struct nvme_iod *iod)
740 struct nvme_command cmnd;
742 memcpy(&cmnd, req->cmd, sizeof(cmnd));
743 cmnd.rw.command_id = req->tag;
744 if (req->nr_phys_segments) {
745 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
746 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
749 __nvme_submit_cmd(nvmeq, &cmnd);
753 * We reuse the small pool to allocate the 16-byte range here as it is not
754 * worth having a special pool for these or additional cases to handle freeing
757 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
758 struct request *req, struct nvme_iod *iod)
760 struct nvme_dsm_range *range =
761 (struct nvme_dsm_range *)iod_list(iod)[0];
762 struct nvme_command cmnd;
764 range->cattr = cpu_to_le32(0);
765 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
766 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
768 memset(&cmnd, 0, sizeof(cmnd));
769 cmnd.dsm.opcode = nvme_cmd_dsm;
770 cmnd.dsm.command_id = req->tag;
771 cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
772 cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
774 cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
776 __nvme_submit_cmd(nvmeq, &cmnd);
779 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
782 struct nvme_command cmnd;
784 memset(&cmnd, 0, sizeof(cmnd));
785 cmnd.common.opcode = nvme_cmd_flush;
786 cmnd.common.command_id = cmdid;
787 cmnd.common.nsid = cpu_to_le32(ns->ns_id);
789 __nvme_submit_cmd(nvmeq, &cmnd);
792 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
795 struct request *req = iod_get_private(iod);
796 struct nvme_command cmnd;
800 if (req->cmd_flags & REQ_FUA)
801 control |= NVME_RW_FUA;
802 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
803 control |= NVME_RW_LR;
805 if (req->cmd_flags & REQ_RAHEAD)
806 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
808 memset(&cmnd, 0, sizeof(cmnd));
809 cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
810 cmnd.rw.command_id = req->tag;
811 cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
812 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
813 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
814 cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
815 cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
818 switch (ns->pi_type) {
819 case NVME_NS_DPS_PI_TYPE3:
820 control |= NVME_RW_PRINFO_PRCHK_GUARD;
822 case NVME_NS_DPS_PI_TYPE1:
823 case NVME_NS_DPS_PI_TYPE2:
824 control |= NVME_RW_PRINFO_PRCHK_GUARD |
825 NVME_RW_PRINFO_PRCHK_REF;
826 cmnd.rw.reftag = cpu_to_le32(
827 nvme_block_nr(ns, blk_rq_pos(req)));
830 if (blk_integrity_rq(req))
832 cpu_to_le64(sg_dma_address(iod->meta_sg));
834 control |= NVME_RW_PRINFO_PRACT;
837 cmnd.rw.control = cpu_to_le16(control);
838 cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
840 __nvme_submit_cmd(nvmeq, &cmnd);
846 * NOTE: ns is NULL when called on the admin queue.
848 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
849 const struct blk_mq_queue_data *bd)
851 struct nvme_ns *ns = hctx->queue->queuedata;
852 struct nvme_queue *nvmeq = hctx->driver_data;
853 struct nvme_dev *dev = nvmeq->dev;
854 struct request *req = bd->rq;
855 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
856 struct nvme_iod *iod;
857 enum dma_data_direction dma_dir;
860 * If formated with metadata, require the block layer provide a buffer
861 * unless this namespace is formated such that the metadata can be
862 * stripped/generated by the controller with PRACT=1.
864 if (ns && ns->ms && !blk_integrity_rq(req)) {
865 if (!(ns->pi_type && ns->ms == 8) &&
866 req->cmd_type != REQ_TYPE_DRV_PRIV) {
867 blk_mq_complete_request(req, -EFAULT);
868 return BLK_MQ_RQ_QUEUE_OK;
872 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
874 return BLK_MQ_RQ_QUEUE_BUSY;
876 if (req->cmd_flags & REQ_DISCARD) {
879 * We reuse the small pool to allocate the 16-byte range here
880 * as it is not worth having a special pool for these or
881 * additional cases to handle freeing the iod.
883 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
887 iod_list(iod)[0] = (__le64 *)range;
889 } else if (req->nr_phys_segments) {
890 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
892 sg_init_table(iod->sg, req->nr_phys_segments);
893 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
897 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
900 if (blk_rq_bytes(req) !=
901 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
902 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
905 if (blk_integrity_rq(req)) {
906 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
909 sg_init_table(iod->meta_sg, 1);
910 if (blk_rq_map_integrity_sg(
911 req->q, req->bio, iod->meta_sg) != 1)
914 if (rq_data_dir(req))
915 nvme_dif_remap(req, nvme_dif_prep);
917 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
922 nvme_set_info(cmd, iod, req_completion);
923 spin_lock_irq(&nvmeq->q_lock);
924 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
925 nvme_submit_priv(nvmeq, req, iod);
926 else if (req->cmd_flags & REQ_DISCARD)
927 nvme_submit_discard(nvmeq, ns, req, iod);
928 else if (req->cmd_flags & REQ_FLUSH)
929 nvme_submit_flush(nvmeq, ns, req->tag);
931 nvme_submit_iod(nvmeq, iod, ns);
933 nvme_process_cq(nvmeq);
934 spin_unlock_irq(&nvmeq->q_lock);
935 return BLK_MQ_RQ_QUEUE_OK;
938 nvme_free_iod(dev, iod);
939 return BLK_MQ_RQ_QUEUE_ERROR;
941 nvme_free_iod(dev, iod);
942 return BLK_MQ_RQ_QUEUE_BUSY;
945 static int nvme_process_cq(struct nvme_queue *nvmeq)
949 head = nvmeq->cq_head;
950 phase = nvmeq->cq_phase;
954 nvme_completion_fn fn;
955 struct nvme_completion cqe = nvmeq->cqes[head];
956 if ((le16_to_cpu(cqe.status) & 1) != phase)
958 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
959 if (++head == nvmeq->q_depth) {
963 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
964 fn(nvmeq, ctx, &cqe);
967 /* If the controller ignores the cq head doorbell and continuously
968 * writes to the queue, it is theoretically possible to wrap around
969 * the queue twice and mistakenly return IRQ_NONE. Linux only
970 * requires that 0.1% of your interrupts are handled, so this isn't
973 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
976 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
977 nvmeq->cq_head = head;
978 nvmeq->cq_phase = phase;
984 static irqreturn_t nvme_irq(int irq, void *data)
987 struct nvme_queue *nvmeq = data;
988 spin_lock(&nvmeq->q_lock);
989 nvme_process_cq(nvmeq);
990 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
992 spin_unlock(&nvmeq->q_lock);
996 static irqreturn_t nvme_irq_check(int irq, void *data)
998 struct nvme_queue *nvmeq = data;
999 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
1000 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1002 return IRQ_WAKE_THREAD;
1006 * Returns 0 on success. If the result is negative, it's a Linux error code;
1007 * if the result is positive, it's an NVM Express status code
1009 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1010 void *buffer, void __user *ubuffer, unsigned bufflen,
1011 u32 *result, unsigned timeout)
1013 bool write = cmd->common.opcode & 1;
1014 struct bio *bio = NULL;
1015 struct request *req;
1018 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1020 return PTR_ERR(req);
1022 req->cmd_type = REQ_TYPE_DRV_PRIV;
1023 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1024 req->__data_len = 0;
1025 req->__sector = (sector_t) -1;
1026 req->bio = req->biotail = NULL;
1028 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1030 req->cmd = (unsigned char *)cmd;
1031 req->cmd_len = sizeof(struct nvme_command);
1032 req->special = (void *)0;
1034 if (buffer && bufflen) {
1035 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1038 } else if (ubuffer && bufflen) {
1039 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1045 blk_execute_rq(req->q, NULL, req, 0);
1047 blk_rq_unmap_user(bio);
1049 *result = (u32)(uintptr_t)req->special;
1052 blk_mq_free_request(req);
1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1057 void *buffer, unsigned bufflen)
1059 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1062 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1064 struct nvme_queue *nvmeq = dev->queues[0];
1065 struct nvme_command c;
1066 struct nvme_cmd_info *cmd_info;
1067 struct request *req;
1069 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1071 return PTR_ERR(req);
1073 req->cmd_flags |= REQ_NO_TIMEOUT;
1074 cmd_info = blk_mq_rq_to_pdu(req);
1075 nvme_set_info(cmd_info, NULL, async_req_completion);
1077 memset(&c, 0, sizeof(c));
1078 c.common.opcode = nvme_admin_async_event;
1079 c.common.command_id = req->tag;
1081 blk_mq_free_request(req);
1082 __nvme_submit_cmd(nvmeq, &c);
1086 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1087 struct nvme_command *cmd,
1088 struct async_cmd_info *cmdinfo, unsigned timeout)
1090 struct nvme_queue *nvmeq = dev->queues[0];
1091 struct request *req;
1092 struct nvme_cmd_info *cmd_rq;
1094 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1096 return PTR_ERR(req);
1098 req->timeout = timeout;
1099 cmd_rq = blk_mq_rq_to_pdu(req);
1101 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1102 cmdinfo->status = -EINTR;
1104 cmd->common.command_id = req->tag;
1106 nvme_submit_cmd(nvmeq, cmd);
1110 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1112 struct nvme_command c;
1114 memset(&c, 0, sizeof(c));
1115 c.delete_queue.opcode = opcode;
1116 c.delete_queue.qid = cpu_to_le16(id);
1118 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1121 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1122 struct nvme_queue *nvmeq)
1124 struct nvme_command c;
1125 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1128 * Note: we (ab)use the fact the the prp fields survive if no data
1129 * is attached to the request.
1131 memset(&c, 0, sizeof(c));
1132 c.create_cq.opcode = nvme_admin_create_cq;
1133 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1134 c.create_cq.cqid = cpu_to_le16(qid);
1135 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1136 c.create_cq.cq_flags = cpu_to_le16(flags);
1137 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1139 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1142 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1143 struct nvme_queue *nvmeq)
1145 struct nvme_command c;
1146 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1149 * Note: we (ab)use the fact the the prp fields survive if no data
1150 * is attached to the request.
1152 memset(&c, 0, sizeof(c));
1153 c.create_sq.opcode = nvme_admin_create_sq;
1154 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1155 c.create_sq.sqid = cpu_to_le16(qid);
1156 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1157 c.create_sq.sq_flags = cpu_to_le16(flags);
1158 c.create_sq.cqid = cpu_to_le16(qid);
1160 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1163 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1165 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1168 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1170 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1173 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1175 struct nvme_command c = { };
1178 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1179 c.identify.opcode = nvme_admin_identify;
1180 c.identify.cns = cpu_to_le32(1);
1182 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1186 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1187 sizeof(struct nvme_id_ctrl));
1193 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1194 struct nvme_id_ns **id)
1196 struct nvme_command c = { };
1199 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1200 c.identify.opcode = nvme_admin_identify,
1201 c.identify.nsid = cpu_to_le32(nsid),
1203 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1207 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1208 sizeof(struct nvme_id_ns));
1214 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1215 dma_addr_t dma_addr, u32 *result)
1217 struct nvme_command c;
1219 memset(&c, 0, sizeof(c));
1220 c.features.opcode = nvme_admin_get_features;
1221 c.features.nsid = cpu_to_le32(nsid);
1222 c.features.prp1 = cpu_to_le64(dma_addr);
1223 c.features.fid = cpu_to_le32(fid);
1225 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1229 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1230 dma_addr_t dma_addr, u32 *result)
1232 struct nvme_command c;
1234 memset(&c, 0, sizeof(c));
1235 c.features.opcode = nvme_admin_set_features;
1236 c.features.prp1 = cpu_to_le64(dma_addr);
1237 c.features.fid = cpu_to_le32(fid);
1238 c.features.dword11 = cpu_to_le32(dword11);
1240 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1244 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1246 struct nvme_command c = { };
1249 c.common.opcode = nvme_admin_get_log_page,
1250 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1251 c.common.cdw10[0] = cpu_to_le32(
1252 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1255 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1259 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1260 sizeof(struct nvme_smart_log));
1267 * nvme_abort_req - Attempt aborting a request
1269 * Schedule controller reset if the command was already aborted once before and
1270 * still hasn't been returned to the driver, or if this is the admin queue.
1272 static void nvme_abort_req(struct request *req)
1274 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1275 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1276 struct nvme_dev *dev = nvmeq->dev;
1277 struct request *abort_req;
1278 struct nvme_cmd_info *abort_cmd;
1279 struct nvme_command cmd;
1281 if (!nvmeq->qid || cmd_rq->aborted) {
1282 spin_lock(&dev_list_lock);
1283 if (!__nvme_reset(dev)) {
1285 "I/O %d QID %d timeout, reset controller\n",
1286 req->tag, nvmeq->qid);
1288 spin_unlock(&dev_list_lock);
1292 if (!dev->abort_limit)
1295 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1297 if (IS_ERR(abort_req))
1300 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1301 nvme_set_info(abort_cmd, abort_req, abort_completion);
1303 memset(&cmd, 0, sizeof(cmd));
1304 cmd.abort.opcode = nvme_admin_abort_cmd;
1305 cmd.abort.cid = req->tag;
1306 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1307 cmd.abort.command_id = abort_req->tag;
1310 cmd_rq->aborted = 1;
1312 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1314 nvme_submit_cmd(dev->queues[0], &cmd);
1317 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1319 struct nvme_queue *nvmeq = data;
1321 nvme_completion_fn fn;
1322 struct nvme_cmd_info *cmd;
1323 struct nvme_completion cqe;
1325 if (!blk_mq_request_started(req))
1328 cmd = blk_mq_rq_to_pdu(req);
1330 if (cmd->ctx == CMD_CTX_CANCELLED)
1333 if (blk_queue_dying(req->q))
1334 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1336 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1339 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1340 req->tag, nvmeq->qid);
1341 ctx = cancel_cmd_info(cmd, &fn);
1342 fn(nvmeq, ctx, &cqe);
1345 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1347 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1348 struct nvme_queue *nvmeq = cmd->nvmeq;
1350 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1352 spin_lock_irq(&nvmeq->q_lock);
1353 nvme_abort_req(req);
1354 spin_unlock_irq(&nvmeq->q_lock);
1357 * The aborted req will be completed on receiving the abort req.
1358 * We enable the timer again. If hit twice, it'll cause a device reset,
1359 * as the device then is in a faulty state.
1361 return BLK_EH_RESET_TIMER;
1364 static void nvme_free_queue(struct nvme_queue *nvmeq)
1366 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1367 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1369 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1370 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1374 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1378 for (i = dev->queue_count - 1; i >= lowest; i--) {
1379 struct nvme_queue *nvmeq = dev->queues[i];
1381 dev->queues[i] = NULL;
1382 nvme_free_queue(nvmeq);
1387 * nvme_suspend_queue - put queue into suspended state
1388 * @nvmeq - queue to suspend
1390 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1394 spin_lock_irq(&nvmeq->q_lock);
1395 if (nvmeq->cq_vector == -1) {
1396 spin_unlock_irq(&nvmeq->q_lock);
1399 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1400 nvmeq->dev->online_queues--;
1401 nvmeq->cq_vector = -1;
1402 spin_unlock_irq(&nvmeq->q_lock);
1404 if (!nvmeq->qid && nvmeq->dev->admin_q)
1405 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1407 irq_set_affinity_hint(vector, NULL);
1408 free_irq(vector, nvmeq);
1413 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1415 spin_lock_irq(&nvmeq->q_lock);
1416 if (nvmeq->tags && *nvmeq->tags)
1417 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1418 spin_unlock_irq(&nvmeq->q_lock);
1421 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1423 struct nvme_queue *nvmeq = dev->queues[qid];
1427 if (nvme_suspend_queue(nvmeq))
1430 /* Don't tell the adapter to delete the admin queue.
1431 * Don't tell a removed adapter to delete IO queues. */
1432 if (qid && readl(&dev->bar->csts) != -1) {
1433 adapter_delete_sq(dev, qid);
1434 adapter_delete_cq(dev, qid);
1437 spin_lock_irq(&nvmeq->q_lock);
1438 nvme_process_cq(nvmeq);
1439 spin_unlock_irq(&nvmeq->q_lock);
1442 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1445 int q_depth = dev->q_depth;
1446 unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1448 if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1449 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1450 mem_per_q = round_down(mem_per_q, dev->page_size);
1451 q_depth = div_u64(mem_per_q, entry_size);
1454 * Ensure the reduced q_depth is above some threshold where it
1455 * would be better to map queues in system memory with the
1465 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1468 if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1469 unsigned offset = (qid - 1) *
1470 roundup(SQ_SIZE(depth), dev->page_size);
1471 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1472 nvmeq->sq_cmds_io = dev->cmb + offset;
1474 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1475 &nvmeq->sq_dma_addr, GFP_KERNEL);
1476 if (!nvmeq->sq_cmds)
1483 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1486 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1490 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1491 &nvmeq->cq_dma_addr, GFP_KERNEL);
1495 if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1498 nvmeq->q_dmadev = dev->dev;
1500 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1501 dev->instance, qid);
1502 spin_lock_init(&nvmeq->q_lock);
1504 nvmeq->cq_phase = 1;
1505 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1506 nvmeq->q_depth = depth;
1508 nvmeq->cq_vector = -1;
1509 dev->queues[qid] = nvmeq;
1511 /* make sure queue descriptor is set before queue count, for kthread */
1518 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1519 nvmeq->cq_dma_addr);
1525 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1528 if (use_threaded_interrupts)
1529 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1530 nvme_irq_check, nvme_irq, IRQF_SHARED,
1532 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1533 IRQF_SHARED, name, nvmeq);
1536 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1538 struct nvme_dev *dev = nvmeq->dev;
1540 spin_lock_irq(&nvmeq->q_lock);
1543 nvmeq->cq_phase = 1;
1544 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1545 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1546 dev->online_queues++;
1547 spin_unlock_irq(&nvmeq->q_lock);
1550 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1552 struct nvme_dev *dev = nvmeq->dev;
1555 nvmeq->cq_vector = qid - 1;
1556 result = adapter_alloc_cq(dev, qid, nvmeq);
1560 result = adapter_alloc_sq(dev, qid, nvmeq);
1564 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1568 nvme_init_queue(nvmeq, qid);
1572 adapter_delete_sq(dev, qid);
1574 adapter_delete_cq(dev, qid);
1578 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1580 unsigned long timeout;
1581 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1583 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1585 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1587 if (fatal_signal_pending(current))
1589 if (time_after(jiffies, timeout)) {
1591 "Device not ready; aborting %s\n", enabled ?
1592 "initialisation" : "reset");
1601 * If the device has been passed off to us in an enabled state, just clear
1602 * the enabled bit. The spec says we should set the 'shutdown notification
1603 * bits', but doing so may cause the device to complete commands to the
1604 * admin queue ... and we don't know what memory that might be pointing at!
1606 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1608 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1609 dev->ctrl_config &= ~NVME_CC_ENABLE;
1610 writel(dev->ctrl_config, &dev->bar->cc);
1612 return nvme_wait_ready(dev, cap, false);
1615 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1617 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1618 dev->ctrl_config |= NVME_CC_ENABLE;
1619 writel(dev->ctrl_config, &dev->bar->cc);
1621 return nvme_wait_ready(dev, cap, true);
1624 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1626 unsigned long timeout;
1628 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1629 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1631 writel(dev->ctrl_config, &dev->bar->cc);
1633 timeout = SHUTDOWN_TIMEOUT + jiffies;
1634 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1635 NVME_CSTS_SHST_CMPLT) {
1637 if (fatal_signal_pending(current))
1639 if (time_after(jiffies, timeout)) {
1641 "Device shutdown incomplete; abort shutdown\n");
1649 static struct blk_mq_ops nvme_mq_admin_ops = {
1650 .queue_rq = nvme_queue_rq,
1651 .map_queue = blk_mq_map_queue,
1652 .init_hctx = nvme_admin_init_hctx,
1653 .exit_hctx = nvme_admin_exit_hctx,
1654 .init_request = nvme_admin_init_request,
1655 .timeout = nvme_timeout,
1658 static struct blk_mq_ops nvme_mq_ops = {
1659 .queue_rq = nvme_queue_rq,
1660 .map_queue = blk_mq_map_queue,
1661 .init_hctx = nvme_init_hctx,
1662 .init_request = nvme_init_request,
1663 .timeout = nvme_timeout,
1666 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1668 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1669 blk_cleanup_queue(dev->admin_q);
1670 blk_mq_free_tag_set(&dev->admin_tagset);
1674 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1676 if (!dev->admin_q) {
1677 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1678 dev->admin_tagset.nr_hw_queues = 1;
1679 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1680 dev->admin_tagset.reserved_tags = 1;
1681 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1682 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1683 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1684 dev->admin_tagset.driver_data = dev;
1686 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1689 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1690 if (IS_ERR(dev->admin_q)) {
1691 blk_mq_free_tag_set(&dev->admin_tagset);
1694 if (!blk_get_queue(dev->admin_q)) {
1695 nvme_dev_remove_admin(dev);
1696 dev->admin_q = NULL;
1700 blk_mq_unfreeze_queue(dev->admin_q);
1705 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1709 u64 cap = readq(&dev->bar->cap);
1710 struct nvme_queue *nvmeq;
1711 unsigned page_shift = PAGE_SHIFT;
1712 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1713 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1715 if (page_shift < dev_page_min) {
1717 "Minimum device page size (%u) too large for "
1718 "host (%u)\n", 1 << dev_page_min,
1722 if (page_shift > dev_page_max) {
1724 "Device maximum page size (%u) smaller than "
1725 "host (%u); enabling work-around\n",
1726 1 << dev_page_max, 1 << page_shift);
1727 page_shift = dev_page_max;
1730 dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1731 NVME_CAP_NSSRC(cap) : 0;
1733 if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1734 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1736 result = nvme_disable_ctrl(dev, cap);
1740 nvmeq = dev->queues[0];
1742 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1747 aqa = nvmeq->q_depth - 1;
1750 dev->page_size = 1 << page_shift;
1752 dev->ctrl_config = NVME_CC_CSS_NVM;
1753 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1754 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1755 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1757 writel(aqa, &dev->bar->aqa);
1758 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1759 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1761 result = nvme_enable_ctrl(dev, cap);
1765 nvmeq->cq_vector = 0;
1766 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1768 nvmeq->cq_vector = -1;
1775 nvme_free_queues(dev, 0);
1779 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1781 struct nvme_dev *dev = ns->dev;
1782 struct nvme_user_io io;
1783 struct nvme_command c;
1784 unsigned length, meta_len;
1786 dma_addr_t meta_dma = 0;
1788 void __user *metadata;
1790 if (copy_from_user(&io, uio, sizeof(io)))
1793 switch (io.opcode) {
1794 case nvme_cmd_write:
1796 case nvme_cmd_compare:
1802 length = (io.nblocks + 1) << ns->lba_shift;
1803 meta_len = (io.nblocks + 1) * ns->ms;
1804 metadata = (void __user *)(unsigned long)io.metadata;
1805 write = io.opcode & 1;
1812 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1815 meta = dma_alloc_coherent(dev->dev, meta_len,
1816 &meta_dma, GFP_KERNEL);
1823 if (copy_from_user(meta, metadata, meta_len)) {
1830 memset(&c, 0, sizeof(c));
1831 c.rw.opcode = io.opcode;
1832 c.rw.flags = io.flags;
1833 c.rw.nsid = cpu_to_le32(ns->ns_id);
1834 c.rw.slba = cpu_to_le64(io.slba);
1835 c.rw.length = cpu_to_le16(io.nblocks);
1836 c.rw.control = cpu_to_le16(io.control);
1837 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1838 c.rw.reftag = cpu_to_le32(io.reftag);
1839 c.rw.apptag = cpu_to_le16(io.apptag);
1840 c.rw.appmask = cpu_to_le16(io.appmask);
1841 c.rw.metadata = cpu_to_le64(meta_dma);
1843 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1844 (void __user *)io.addr, length, NULL, 0);
1847 if (status == NVME_SC_SUCCESS && !write) {
1848 if (copy_to_user(metadata, meta, meta_len))
1851 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1856 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1857 struct nvme_passthru_cmd __user *ucmd)
1859 struct nvme_passthru_cmd cmd;
1860 struct nvme_command c;
1861 unsigned timeout = 0;
1864 if (!capable(CAP_SYS_ADMIN))
1866 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1869 memset(&c, 0, sizeof(c));
1870 c.common.opcode = cmd.opcode;
1871 c.common.flags = cmd.flags;
1872 c.common.nsid = cpu_to_le32(cmd.nsid);
1873 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1874 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1875 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1876 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1877 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1878 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1879 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1880 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1883 timeout = msecs_to_jiffies(cmd.timeout_ms);
1885 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1886 NULL, (void __user *)cmd.addr, cmd.data_len,
1887 &cmd.result, timeout);
1889 if (put_user(cmd.result, &ucmd->result))
1896 static int nvme_subsys_reset(struct nvme_dev *dev)
1898 if (!dev->subsystem)
1901 writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1905 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1908 struct nvme_ns *ns = bdev->bd_disk->private_data;
1912 force_successful_syscall_return();
1914 case NVME_IOCTL_ADMIN_CMD:
1915 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1916 case NVME_IOCTL_IO_CMD:
1917 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1918 case NVME_IOCTL_SUBMIT_IO:
1919 return nvme_submit_io(ns, (void __user *)arg);
1920 case SG_GET_VERSION_NUM:
1921 return nvme_sg_get_version_num((void __user *)arg);
1923 return nvme_sg_io(ns, (void __user *)arg);
1929 #ifdef CONFIG_COMPAT
1930 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1931 unsigned int cmd, unsigned long arg)
1935 return -ENOIOCTLCMD;
1937 return nvme_ioctl(bdev, mode, cmd, arg);
1940 #define nvme_compat_ioctl NULL
1943 static void nvme_free_dev(struct kref *kref);
1944 static void nvme_free_ns(struct kref *kref)
1946 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1948 spin_lock(&dev_list_lock);
1949 ns->disk->private_data = NULL;
1950 spin_unlock(&dev_list_lock);
1952 kref_put(&ns->dev->kref, nvme_free_dev);
1957 static int nvme_open(struct block_device *bdev, fmode_t mode)
1962 spin_lock(&dev_list_lock);
1963 ns = bdev->bd_disk->private_data;
1966 else if (!kref_get_unless_zero(&ns->kref))
1968 spin_unlock(&dev_list_lock);
1973 static void nvme_release(struct gendisk *disk, fmode_t mode)
1975 struct nvme_ns *ns = disk->private_data;
1976 kref_put(&ns->kref, nvme_free_ns);
1979 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1981 /* some standard values */
1982 geo->heads = 1 << 6;
1983 geo->sectors = 1 << 5;
1984 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1988 static void nvme_config_discard(struct nvme_ns *ns)
1990 u32 logical_block_size = queue_logical_block_size(ns->queue);
1991 ns->queue->limits.discard_zeroes_data = 0;
1992 ns->queue->limits.discard_alignment = logical_block_size;
1993 ns->queue->limits.discard_granularity = logical_block_size;
1994 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1995 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1998 static int nvme_revalidate_disk(struct gendisk *disk)
2000 struct nvme_ns *ns = disk->private_data;
2001 struct nvme_dev *dev = ns->dev;
2002 struct nvme_id_ns *id;
2007 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2008 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2009 dev->instance, ns->ns_id);
2012 if (id->ncap == 0) {
2018 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2019 ns->lba_shift = id->lbaf[lbaf].ds;
2020 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2021 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2024 * If identify namespace failed, use default 512 byte block size so
2025 * block layer can use before failing read/write for 0 capacity.
2027 if (ns->lba_shift == 0)
2029 bs = 1 << ns->lba_shift;
2031 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2032 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2033 id->dps & NVME_NS_DPS_PI_MASK : 0;
2035 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2037 bs != queue_logical_block_size(disk->queue) ||
2038 (ns->ms && ns->ext)))
2039 blk_integrity_unregister(disk);
2041 ns->pi_type = pi_type;
2042 blk_queue_logical_block_size(ns->queue, bs);
2044 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2046 nvme_init_integrity(ns);
2048 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2049 set_capacity(disk, 0);
2051 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2053 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2054 nvme_config_discard(ns);
2060 static const struct block_device_operations nvme_fops = {
2061 .owner = THIS_MODULE,
2062 .ioctl = nvme_ioctl,
2063 .compat_ioctl = nvme_compat_ioctl,
2065 .release = nvme_release,
2066 .getgeo = nvme_getgeo,
2067 .revalidate_disk= nvme_revalidate_disk,
2070 static int nvme_kthread(void *data)
2072 struct nvme_dev *dev, *next;
2074 while (!kthread_should_stop()) {
2075 set_current_state(TASK_INTERRUPTIBLE);
2076 spin_lock(&dev_list_lock);
2077 list_for_each_entry_safe(dev, next, &dev_list, node) {
2079 u32 csts = readl(&dev->bar->csts);
2081 if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2082 csts & NVME_CSTS_CFS) {
2083 if (!__nvme_reset(dev)) {
2085 "Failed status: %x, reset controller\n",
2086 readl(&dev->bar->csts));
2090 for (i = 0; i < dev->queue_count; i++) {
2091 struct nvme_queue *nvmeq = dev->queues[i];
2094 spin_lock_irq(&nvmeq->q_lock);
2095 nvme_process_cq(nvmeq);
2097 while ((i == 0) && (dev->event_limit > 0)) {
2098 if (nvme_submit_async_admin_req(dev))
2102 spin_unlock_irq(&nvmeq->q_lock);
2105 spin_unlock(&dev_list_lock);
2106 schedule_timeout(round_jiffies_relative(HZ));
2111 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2114 struct gendisk *disk;
2115 int node = dev_to_node(dev->dev);
2117 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2121 ns->queue = blk_mq_init_queue(&dev->tagset);
2122 if (IS_ERR(ns->queue))
2124 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2125 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2127 ns->queue->queuedata = ns;
2129 disk = alloc_disk_node(0, node);
2131 goto out_free_queue;
2133 kref_init(&ns->kref);
2136 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2137 list_add_tail(&ns->list, &dev->namespaces);
2139 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2140 if (dev->max_hw_sectors) {
2141 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2142 blk_queue_max_segments(ns->queue,
2143 ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2145 if (dev->stripe_size)
2146 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2147 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2148 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2149 blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2151 disk->major = nvme_major;
2152 disk->first_minor = 0;
2153 disk->fops = &nvme_fops;
2154 disk->private_data = ns;
2155 disk->queue = ns->queue;
2156 disk->driverfs_dev = dev->device;
2157 disk->flags = GENHD_FL_EXT_DEVT;
2158 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2161 * Initialize capacity to 0 until we establish the namespace format and
2162 * setup integrity extentions if necessary. The revalidate_disk after
2163 * add_disk allows the driver to register with integrity if the format
2166 set_capacity(disk, 0);
2167 if (nvme_revalidate_disk(ns->disk))
2170 kref_get(&dev->kref);
2173 struct block_device *bd = bdget_disk(ns->disk, 0);
2176 if (blkdev_get(bd, FMODE_READ, NULL)) {
2180 blkdev_reread_part(bd);
2181 blkdev_put(bd, FMODE_READ);
2186 list_del(&ns->list);
2188 blk_cleanup_queue(ns->queue);
2194 * Create I/O queues. Failing to create an I/O queue is not an issue,
2195 * we can continue with less than the desired amount of queues, and
2196 * even a controller without I/O queues an still be used to issue
2197 * admin commands. This might be useful to upgrade a buggy firmware
2200 static void nvme_create_io_queues(struct nvme_dev *dev)
2204 for (i = dev->queue_count; i <= dev->max_qid; i++)
2205 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2208 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2209 if (nvme_create_queue(dev->queues[i], i)) {
2210 nvme_free_queues(dev, i);
2215 static int set_queue_count(struct nvme_dev *dev, int count)
2219 u32 q_count = (count - 1) | ((count - 1) << 16);
2221 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2226 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2229 return min(result & 0xffff, result >> 16) + 1;
2232 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2234 u64 szu, size, offset;
2236 resource_size_t bar_size;
2237 struct pci_dev *pdev = to_pci_dev(dev->dev);
2239 dma_addr_t dma_addr;
2244 dev->cmbsz = readl(&dev->bar->cmbsz);
2245 if (!(NVME_CMB_SZ(dev->cmbsz)))
2248 cmbloc = readl(&dev->bar->cmbloc);
2250 szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2251 size = szu * NVME_CMB_SZ(dev->cmbsz);
2252 offset = szu * NVME_CMB_OFST(cmbloc);
2253 bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2255 if (offset > bar_size)
2259 * Controllers may support a CMB size larger than their BAR,
2260 * for example, due to being behind a bridge. Reduce the CMB to
2261 * the reported size of the BAR
2263 if (size > bar_size - offset)
2264 size = bar_size - offset;
2266 dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2267 cmb = ioremap_wc(dma_addr, size);
2271 dev->cmb_dma_addr = dma_addr;
2272 dev->cmb_size = size;
2276 static inline void nvme_release_cmb(struct nvme_dev *dev)
2284 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2286 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2289 static int nvme_setup_io_queues(struct nvme_dev *dev)
2291 struct nvme_queue *adminq = dev->queues[0];
2292 struct pci_dev *pdev = to_pci_dev(dev->dev);
2293 int result, i, vecs, nr_io_queues, size;
2295 nr_io_queues = num_possible_cpus();
2296 result = set_queue_count(dev, nr_io_queues);
2299 if (result < nr_io_queues)
2300 nr_io_queues = result;
2302 if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2303 result = nvme_cmb_qdepth(dev, nr_io_queues,
2304 sizeof(struct nvme_command));
2306 dev->q_depth = result;
2308 nvme_release_cmb(dev);
2311 size = db_bar_size(dev, nr_io_queues);
2315 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2318 if (!--nr_io_queues)
2320 size = db_bar_size(dev, nr_io_queues);
2322 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2323 adminq->q_db = dev->dbs;
2326 /* Deregister the admin queue's interrupt */
2327 free_irq(dev->entry[0].vector, adminq);
2330 * If we enable msix early due to not intx, disable it again before
2331 * setting up the full range we need.
2334 pci_disable_msix(pdev);
2336 for (i = 0; i < nr_io_queues; i++)
2337 dev->entry[i].entry = i;
2338 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2340 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2344 for (i = 0; i < vecs; i++)
2345 dev->entry[i].vector = i + pdev->irq;
2350 * Should investigate if there's a performance win from allocating
2351 * more queues than interrupt vectors; it might allow the submission
2352 * path to scale better, even if the receive path is limited by the
2353 * number of interrupts.
2355 nr_io_queues = vecs;
2356 dev->max_qid = nr_io_queues;
2358 result = queue_request_irq(dev, adminq, adminq->irqname);
2360 adminq->cq_vector = -1;
2364 /* Free previously allocated queues that are no longer usable */
2365 nvme_free_queues(dev, nr_io_queues + 1);
2366 nvme_create_io_queues(dev);
2371 nvme_free_queues(dev, 1);
2375 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2377 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2378 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2380 return nsa->ns_id - nsb->ns_id;
2383 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2387 list_for_each_entry(ns, &dev->namespaces, list) {
2388 if (ns->ns_id == nsid)
2390 if (ns->ns_id > nsid)
2396 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2398 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2399 dev->online_queues < 2);
2402 static void nvme_ns_remove(struct nvme_ns *ns)
2404 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2407 blk_set_queue_dying(ns->queue);
2408 if (ns->disk->flags & GENHD_FL_UP) {
2409 if (blk_get_integrity(ns->disk))
2410 blk_integrity_unregister(ns->disk);
2411 del_gendisk(ns->disk);
2413 if (kill || !blk_queue_dying(ns->queue)) {
2414 blk_mq_abort_requeue_list(ns->queue);
2415 blk_cleanup_queue(ns->queue);
2417 list_del_init(&ns->list);
2418 kref_put(&ns->kref, nvme_free_ns);
2421 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2423 struct nvme_ns *ns, *next;
2426 for (i = 1; i <= nn; i++) {
2427 ns = nvme_find_ns(dev, i);
2429 if (revalidate_disk(ns->disk))
2432 nvme_alloc_ns(dev, i);
2434 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2438 list_sort(NULL, &dev->namespaces, ns_cmp);
2441 static void nvme_set_irq_hints(struct nvme_dev *dev)
2443 struct nvme_queue *nvmeq;
2446 for (i = 0; i < dev->online_queues; i++) {
2447 nvmeq = dev->queues[i];
2449 if (!nvmeq->tags || !(*nvmeq->tags))
2452 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2453 blk_mq_tags_cpumask(*nvmeq->tags));
2457 static void nvme_dev_scan(struct work_struct *work)
2459 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2460 struct nvme_id_ctrl *ctrl;
2462 if (!dev->tagset.tags)
2464 if (nvme_identify_ctrl(dev, &ctrl))
2466 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2468 nvme_set_irq_hints(dev);
2472 * Return: error value if an error occurred setting up the queues or calling
2473 * Identify Device. 0 if these succeeded, even if adding some of the
2474 * namespaces failed. At the moment, these failures are silent. TBD which
2475 * failures should be reported.
2477 static int nvme_dev_add(struct nvme_dev *dev)
2479 struct pci_dev *pdev = to_pci_dev(dev->dev);
2481 struct nvme_id_ctrl *ctrl;
2482 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2484 res = nvme_identify_ctrl(dev, &ctrl);
2486 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2490 dev->oncs = le16_to_cpup(&ctrl->oncs);
2491 dev->abort_limit = ctrl->acl + 1;
2492 dev->vwc = ctrl->vwc;
2493 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2494 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2495 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2497 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2498 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2499 (pdev->device == 0x0953) && ctrl->vs[3]) {
2500 unsigned int max_hw_sectors;
2502 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2503 max_hw_sectors = dev->stripe_size >> (shift - 9);
2504 if (dev->max_hw_sectors) {
2505 dev->max_hw_sectors = min(max_hw_sectors,
2506 dev->max_hw_sectors);
2508 dev->max_hw_sectors = max_hw_sectors;
2512 if (!dev->tagset.tags) {
2513 dev->tagset.ops = &nvme_mq_ops;
2514 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2515 dev->tagset.timeout = NVME_IO_TIMEOUT;
2516 dev->tagset.numa_node = dev_to_node(dev->dev);
2517 dev->tagset.queue_depth =
2518 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2519 dev->tagset.cmd_size = nvme_cmd_size(dev);
2520 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2521 dev->tagset.driver_data = dev;
2523 if (blk_mq_alloc_tag_set(&dev->tagset))
2526 schedule_work(&dev->scan_work);
2530 static int nvme_dev_map(struct nvme_dev *dev)
2533 int bars, result = -ENOMEM;
2534 struct pci_dev *pdev = to_pci_dev(dev->dev);
2536 if (pci_enable_device_mem(pdev))
2539 dev->entry[0].vector = pdev->irq;
2540 pci_set_master(pdev);
2541 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2545 if (pci_request_selected_regions(pdev, bars, "nvme"))
2548 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2549 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2552 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2556 if (readl(&dev->bar->csts) == -1) {
2562 * Some devices don't advertse INTx interrupts, pre-enable a single
2563 * MSIX vec for setup. We'll adjust this later.
2566 result = pci_enable_msix(pdev, dev->entry, 1);
2571 cap = readq(&dev->bar->cap);
2572 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2573 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2574 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2575 if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2576 dev->cmb = nvme_map_cmb(dev);
2584 pci_release_regions(pdev);
2586 pci_disable_device(pdev);
2590 static void nvme_dev_unmap(struct nvme_dev *dev)
2592 struct pci_dev *pdev = to_pci_dev(dev->dev);
2594 if (pdev->msi_enabled)
2595 pci_disable_msi(pdev);
2596 else if (pdev->msix_enabled)
2597 pci_disable_msix(pdev);
2602 pci_release_regions(pdev);
2605 if (pci_is_enabled(pdev))
2606 pci_disable_device(pdev);
2609 struct nvme_delq_ctx {
2610 struct task_struct *waiter;
2611 struct kthread_worker *worker;
2615 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2617 dq->waiter = current;
2621 set_current_state(TASK_KILLABLE);
2622 if (!atomic_read(&dq->refcount))
2624 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2625 fatal_signal_pending(current)) {
2627 * Disable the controller first since we can't trust it
2628 * at this point, but leave the admin queue enabled
2629 * until all queue deletion requests are flushed.
2630 * FIXME: This may take a while if there are more h/w
2631 * queues than admin tags.
2633 set_current_state(TASK_RUNNING);
2634 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2635 nvme_clear_queue(dev->queues[0]);
2636 flush_kthread_worker(dq->worker);
2637 nvme_disable_queue(dev, 0);
2641 set_current_state(TASK_RUNNING);
2644 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2646 atomic_dec(&dq->refcount);
2648 wake_up_process(dq->waiter);
2651 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2653 atomic_inc(&dq->refcount);
2657 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2659 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2663 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2664 kthread_work_func_t fn)
2666 struct nvme_command c;
2668 memset(&c, 0, sizeof(c));
2669 c.delete_queue.opcode = opcode;
2670 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2672 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2673 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2677 static void nvme_del_cq_work_handler(struct kthread_work *work)
2679 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2681 nvme_del_queue_end(nvmeq);
2684 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2686 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2687 nvme_del_cq_work_handler);
2690 static void nvme_del_sq_work_handler(struct kthread_work *work)
2692 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2694 int status = nvmeq->cmdinfo.status;
2697 status = nvme_delete_cq(nvmeq);
2699 nvme_del_queue_end(nvmeq);
2702 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2704 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2705 nvme_del_sq_work_handler);
2708 static void nvme_del_queue_start(struct kthread_work *work)
2710 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2712 if (nvme_delete_sq(nvmeq))
2713 nvme_del_queue_end(nvmeq);
2716 static void nvme_disable_io_queues(struct nvme_dev *dev)
2719 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2720 struct nvme_delq_ctx dq;
2721 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2722 &worker, "nvme%d", dev->instance);
2724 if (IS_ERR(kworker_task)) {
2726 "Failed to create queue del task\n");
2727 for (i = dev->queue_count - 1; i > 0; i--)
2728 nvme_disable_queue(dev, i);
2733 atomic_set(&dq.refcount, 0);
2734 dq.worker = &worker;
2735 for (i = dev->queue_count - 1; i > 0; i--) {
2736 struct nvme_queue *nvmeq = dev->queues[i];
2738 if (nvme_suspend_queue(nvmeq))
2740 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2741 nvmeq->cmdinfo.worker = dq.worker;
2742 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2743 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2745 nvme_wait_dq(&dq, dev);
2746 kthread_stop(kworker_task);
2750 * Remove the node from the device list and check
2751 * for whether or not we need to stop the nvme_thread.
2753 static void nvme_dev_list_remove(struct nvme_dev *dev)
2755 struct task_struct *tmp = NULL;
2757 spin_lock(&dev_list_lock);
2758 list_del_init(&dev->node);
2759 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2763 spin_unlock(&dev_list_lock);
2769 static void nvme_freeze_queues(struct nvme_dev *dev)
2773 list_for_each_entry(ns, &dev->namespaces, list) {
2774 blk_mq_freeze_queue_start(ns->queue);
2776 spin_lock_irq(ns->queue->queue_lock);
2777 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2778 spin_unlock_irq(ns->queue->queue_lock);
2780 blk_mq_cancel_requeue_work(ns->queue);
2781 blk_mq_stop_hw_queues(ns->queue);
2785 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2789 list_for_each_entry(ns, &dev->namespaces, list) {
2790 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2791 blk_mq_unfreeze_queue(ns->queue);
2792 blk_mq_start_stopped_hw_queues(ns->queue, true);
2793 blk_mq_kick_requeue_list(ns->queue);
2797 static void nvme_dev_shutdown(struct nvme_dev *dev)
2802 nvme_dev_list_remove(dev);
2805 nvme_freeze_queues(dev);
2806 csts = readl(&dev->bar->csts);
2808 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2809 for (i = dev->queue_count - 1; i >= 0; i--) {
2810 struct nvme_queue *nvmeq = dev->queues[i];
2811 nvme_suspend_queue(nvmeq);
2814 nvme_disable_io_queues(dev);
2815 nvme_shutdown_ctrl(dev);
2816 nvme_disable_queue(dev, 0);
2818 nvme_dev_unmap(dev);
2820 for (i = dev->queue_count - 1; i >= 0; i--)
2821 nvme_clear_queue(dev->queues[i]);
2824 static void nvme_dev_remove(struct nvme_dev *dev)
2826 struct nvme_ns *ns, *next;
2828 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2832 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2834 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2835 PAGE_SIZE, PAGE_SIZE, 0);
2836 if (!dev->prp_page_pool)
2839 /* Optimisation for I/Os between 4k and 128k */
2840 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2842 if (!dev->prp_small_pool) {
2843 dma_pool_destroy(dev->prp_page_pool);
2849 static void nvme_release_prp_pools(struct nvme_dev *dev)
2851 dma_pool_destroy(dev->prp_page_pool);
2852 dma_pool_destroy(dev->prp_small_pool);
2855 static DEFINE_IDA(nvme_instance_ida);
2857 static int nvme_set_instance(struct nvme_dev *dev)
2859 int instance, error;
2862 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2865 spin_lock(&dev_list_lock);
2866 error = ida_get_new(&nvme_instance_ida, &instance);
2867 spin_unlock(&dev_list_lock);
2868 } while (error == -EAGAIN);
2873 dev->instance = instance;
2877 static void nvme_release_instance(struct nvme_dev *dev)
2879 spin_lock(&dev_list_lock);
2880 ida_remove(&nvme_instance_ida, dev->instance);
2881 spin_unlock(&dev_list_lock);
2884 static void nvme_free_dev(struct kref *kref)
2886 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2888 put_device(dev->dev);
2889 put_device(dev->device);
2890 nvme_release_instance(dev);
2891 if (dev->tagset.tags)
2892 blk_mq_free_tag_set(&dev->tagset);
2894 blk_put_queue(dev->admin_q);
2900 static int nvme_dev_open(struct inode *inode, struct file *f)
2902 struct nvme_dev *dev;
2903 int instance = iminor(inode);
2906 spin_lock(&dev_list_lock);
2907 list_for_each_entry(dev, &dev_list, node) {
2908 if (dev->instance == instance) {
2909 if (!dev->admin_q) {
2913 if (!kref_get_unless_zero(&dev->kref))
2915 f->private_data = dev;
2920 spin_unlock(&dev_list_lock);
2925 static int nvme_dev_release(struct inode *inode, struct file *f)
2927 struct nvme_dev *dev = f->private_data;
2928 kref_put(&dev->kref, nvme_free_dev);
2932 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2934 struct nvme_dev *dev = f->private_data;
2938 case NVME_IOCTL_ADMIN_CMD:
2939 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2940 case NVME_IOCTL_IO_CMD:
2941 if (list_empty(&dev->namespaces))
2943 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2944 return nvme_user_cmd(dev, ns, (void __user *)arg);
2945 case NVME_IOCTL_RESET:
2946 dev_warn(dev->dev, "resetting controller\n");
2947 return nvme_reset(dev);
2948 case NVME_IOCTL_SUBSYS_RESET:
2949 return nvme_subsys_reset(dev);
2955 static const struct file_operations nvme_dev_fops = {
2956 .owner = THIS_MODULE,
2957 .open = nvme_dev_open,
2958 .release = nvme_dev_release,
2959 .unlocked_ioctl = nvme_dev_ioctl,
2960 .compat_ioctl = nvme_dev_ioctl,
2963 static void nvme_probe_work(struct work_struct *work)
2965 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2966 bool start_thread = false;
2969 result = nvme_dev_map(dev);
2973 result = nvme_configure_admin_queue(dev);
2977 spin_lock(&dev_list_lock);
2978 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2979 start_thread = true;
2982 list_add(&dev->node, &dev_list);
2983 spin_unlock(&dev_list_lock);
2986 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2987 wake_up_all(&nvme_kthread_wait);
2989 wait_event_killable(nvme_kthread_wait, nvme_thread);
2991 if (IS_ERR_OR_NULL(nvme_thread)) {
2992 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2996 nvme_init_queue(dev->queues[0], 0);
2997 result = nvme_alloc_admin_tags(dev);
3001 result = nvme_setup_io_queues(dev);
3005 dev->event_limit = 1;
3008 * Keep the controller around but remove all namespaces if we don't have
3009 * any working I/O queue.
3011 if (dev->online_queues < 2) {
3012 dev_warn(dev->dev, "IO queues not created\n");
3013 nvme_dev_remove(dev);
3015 nvme_unfreeze_queues(dev);
3022 nvme_dev_remove_admin(dev);
3023 blk_put_queue(dev->admin_q);
3024 dev->admin_q = NULL;
3025 dev->queues[0]->tags = NULL;
3027 nvme_disable_queue(dev, 0);
3028 nvme_dev_list_remove(dev);
3030 nvme_dev_unmap(dev);
3032 if (!work_busy(&dev->reset_work))
3033 nvme_dead_ctrl(dev);
3036 static int nvme_remove_dead_ctrl(void *arg)
3038 struct nvme_dev *dev = (struct nvme_dev *)arg;
3039 struct pci_dev *pdev = to_pci_dev(dev->dev);
3041 if (pci_get_drvdata(pdev))
3042 pci_stop_and_remove_bus_device_locked(pdev);
3043 kref_put(&dev->kref, nvme_free_dev);
3047 static void nvme_dead_ctrl(struct nvme_dev *dev)
3049 dev_warn(dev->dev, "Device failed to resume\n");
3050 kref_get(&dev->kref);
3051 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3054 "Failed to start controller remove task\n");
3055 kref_put(&dev->kref, nvme_free_dev);
3059 static void nvme_reset_work(struct work_struct *ws)
3061 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3062 bool in_probe = work_busy(&dev->probe_work);
3064 nvme_dev_shutdown(dev);
3066 /* Synchronize with device probe so that work will see failure status
3067 * and exit gracefully without trying to schedule another reset */
3068 flush_work(&dev->probe_work);
3070 /* Fail this device if reset occured during probe to avoid
3071 * infinite initialization loops. */
3073 nvme_dead_ctrl(dev);
3076 /* Schedule device resume asynchronously so the reset work is available
3077 * to cleanup errors that may occur during reinitialization */
3078 schedule_work(&dev->probe_work);
3081 static int __nvme_reset(struct nvme_dev *dev)
3083 if (work_pending(&dev->reset_work))
3085 list_del_init(&dev->node);
3086 queue_work(nvme_workq, &dev->reset_work);
3090 static int nvme_reset(struct nvme_dev *dev)
3094 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3097 spin_lock(&dev_list_lock);
3098 ret = __nvme_reset(dev);
3099 spin_unlock(&dev_list_lock);
3102 flush_work(&dev->reset_work);
3103 flush_work(&dev->probe_work);
3110 static ssize_t nvme_sysfs_reset(struct device *dev,
3111 struct device_attribute *attr, const char *buf,
3114 struct nvme_dev *ndev = dev_get_drvdata(dev);
3117 ret = nvme_reset(ndev);
3123 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3125 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3127 int node, result = -ENOMEM;
3128 struct nvme_dev *dev;
3130 node = dev_to_node(&pdev->dev);
3131 if (node == NUMA_NO_NODE)
3132 set_dev_node(&pdev->dev, 0);
3134 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3137 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3141 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3146 INIT_LIST_HEAD(&dev->namespaces);
3147 INIT_WORK(&dev->reset_work, nvme_reset_work);
3148 dev->dev = get_device(&pdev->dev);
3149 pci_set_drvdata(pdev, dev);
3150 result = nvme_set_instance(dev);
3154 result = nvme_setup_prp_pools(dev);
3158 kref_init(&dev->kref);
3159 dev->device = device_create(nvme_class, &pdev->dev,
3160 MKDEV(nvme_char_major, dev->instance),
3161 dev, "nvme%d", dev->instance);
3162 if (IS_ERR(dev->device)) {
3163 result = PTR_ERR(dev->device);
3166 get_device(dev->device);
3167 dev_set_drvdata(dev->device, dev);
3169 result = device_create_file(dev->device, &dev_attr_reset_controller);
3173 INIT_LIST_HEAD(&dev->node);
3174 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3175 INIT_WORK(&dev->probe_work, nvme_probe_work);
3176 schedule_work(&dev->probe_work);
3180 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3181 put_device(dev->device);
3183 nvme_release_prp_pools(dev);
3185 nvme_release_instance(dev);
3187 put_device(dev->dev);
3195 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3197 struct nvme_dev *dev = pci_get_drvdata(pdev);
3200 nvme_dev_shutdown(dev);
3202 schedule_work(&dev->probe_work);
3205 static void nvme_shutdown(struct pci_dev *pdev)
3207 struct nvme_dev *dev = pci_get_drvdata(pdev);
3208 nvme_dev_shutdown(dev);
3211 static void nvme_remove(struct pci_dev *pdev)
3213 struct nvme_dev *dev = pci_get_drvdata(pdev);
3215 spin_lock(&dev_list_lock);
3216 list_del_init(&dev->node);
3217 spin_unlock(&dev_list_lock);
3219 pci_set_drvdata(pdev, NULL);
3220 flush_work(&dev->probe_work);
3221 flush_work(&dev->reset_work);
3222 flush_work(&dev->scan_work);
3223 device_remove_file(dev->device, &dev_attr_reset_controller);
3224 nvme_dev_remove(dev);
3225 nvme_dev_shutdown(dev);
3226 nvme_dev_remove_admin(dev);
3227 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3228 nvme_free_queues(dev, 0);
3229 nvme_release_cmb(dev);
3230 nvme_release_prp_pools(dev);
3231 kref_put(&dev->kref, nvme_free_dev);
3234 /* These functions are yet to be implemented */
3235 #define nvme_error_detected NULL
3236 #define nvme_dump_registers NULL
3237 #define nvme_link_reset NULL
3238 #define nvme_slot_reset NULL
3239 #define nvme_error_resume NULL
3241 #ifdef CONFIG_PM_SLEEP
3242 static int nvme_suspend(struct device *dev)
3244 struct pci_dev *pdev = to_pci_dev(dev);
3245 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3247 nvme_dev_shutdown(ndev);
3251 static int nvme_resume(struct device *dev)
3253 struct pci_dev *pdev = to_pci_dev(dev);
3254 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3256 schedule_work(&ndev->probe_work);
3261 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3263 static const struct pci_error_handlers nvme_err_handler = {
3264 .error_detected = nvme_error_detected,
3265 .mmio_enabled = nvme_dump_registers,
3266 .link_reset = nvme_link_reset,
3267 .slot_reset = nvme_slot_reset,
3268 .resume = nvme_error_resume,
3269 .reset_notify = nvme_reset_notify,
3272 /* Move to pci_ids.h later */
3273 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3275 static const struct pci_device_id nvme_id_table[] = {
3276 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3279 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3281 static struct pci_driver nvme_driver = {
3283 .id_table = nvme_id_table,
3284 .probe = nvme_probe,
3285 .remove = nvme_remove,
3286 .shutdown = nvme_shutdown,
3288 .pm = &nvme_dev_pm_ops,
3290 .err_handler = &nvme_err_handler,
3293 static int __init nvme_init(void)
3297 init_waitqueue_head(&nvme_kthread_wait);
3299 nvme_workq = create_singlethread_workqueue("nvme");
3303 result = register_blkdev(nvme_major, "nvme");
3306 else if (result > 0)
3307 nvme_major = result;
3309 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3312 goto unregister_blkdev;
3313 else if (result > 0)
3314 nvme_char_major = result;
3316 nvme_class = class_create(THIS_MODULE, "nvme");
3317 if (IS_ERR(nvme_class)) {
3318 result = PTR_ERR(nvme_class);
3319 goto unregister_chrdev;
3322 result = pci_register_driver(&nvme_driver);
3328 class_destroy(nvme_class);
3330 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3332 unregister_blkdev(nvme_major, "nvme");
3334 destroy_workqueue(nvme_workq);
3338 static void __exit nvme_exit(void)
3340 pci_unregister_driver(&nvme_driver);
3341 unregister_blkdev(nvme_major, "nvme");
3342 destroy_workqueue(nvme_workq);
3343 class_destroy(nvme_class);
3344 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3345 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3349 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3350 MODULE_LICENSE("GPL");
3351 MODULE_VERSION("1.0");
3352 module_init(nvme_init);
3353 module_exit(nvme_exit);