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nvme: delete dev from dev_list in nvme_reset
[karo-tx-linux.git] / drivers / block / nvme-core.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/fs.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
33 #include <linux/mm.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
43 #include <scsi/sg.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45
46 #define NVME_MINORS             (1U << MINORBITS)
47 #define NVME_Q_DEPTH            1024
48 #define NVME_AQ_DEPTH           256
49 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
53
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
57
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
61
62 static unsigned char shutdown_timeout = 5;
63 module_param(shutdown_timeout, byte, 0644);
64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
65
66 static int nvme_major;
67 module_param(nvme_major, int, 0);
68
69 static int nvme_char_major;
70 module_param(nvme_char_major, int, 0);
71
72 static int use_threaded_interrupts;
73 module_param(use_threaded_interrupts, int, 0);
74
75 static bool use_cmb_sqes = true;
76 module_param(use_cmb_sqes, bool, 0644);
77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
78
79 static DEFINE_SPINLOCK(dev_list_lock);
80 static LIST_HEAD(dev_list);
81 static struct task_struct *nvme_thread;
82 static struct workqueue_struct *nvme_workq;
83 static wait_queue_head_t nvme_kthread_wait;
84
85 static struct class *nvme_class;
86
87 static void nvme_reset_failed_dev(struct work_struct *ws);
88 static int nvme_reset(struct nvme_dev *dev);
89 static int nvme_process_cq(struct nvme_queue *nvmeq);
90
91 struct async_cmd_info {
92         struct kthread_work work;
93         struct kthread_worker *worker;
94         struct request *req;
95         u32 result;
96         int status;
97         void *ctx;
98 };
99
100 /*
101  * An NVM Express queue.  Each device has at least two (one for admin
102  * commands and one for I/O commands).
103  */
104 struct nvme_queue {
105         struct device *q_dmadev;
106         struct nvme_dev *dev;
107         char irqname[24];       /* nvme4294967295-65535\0 */
108         spinlock_t q_lock;
109         struct nvme_command *sq_cmds;
110         struct nvme_command __iomem *sq_cmds_io;
111         volatile struct nvme_completion *cqes;
112         struct blk_mq_tags **tags;
113         dma_addr_t sq_dma_addr;
114         dma_addr_t cq_dma_addr;
115         u32 __iomem *q_db;
116         u16 q_depth;
117         s16 cq_vector;
118         u16 sq_head;
119         u16 sq_tail;
120         u16 cq_head;
121         u16 qid;
122         u8 cq_phase;
123         u8 cqe_seen;
124         struct async_cmd_info cmdinfo;
125 };
126
127 /*
128  * Check we didin't inadvertently grow the command struct
129  */
130 static inline void _nvme_check_size(void)
131 {
132         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
133         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
134         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
135         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
136         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
137         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
138         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
139         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
140         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
141         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
142         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
143         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
144 }
145
146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
147                                                 struct nvme_completion *);
148
149 struct nvme_cmd_info {
150         nvme_completion_fn fn;
151         void *ctx;
152         int aborted;
153         struct nvme_queue *nvmeq;
154         struct nvme_iod iod[0];
155 };
156
157 /*
158  * Max size of iod being embedded in the request payload
159  */
160 #define NVME_INT_PAGES          2
161 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
162 #define NVME_INT_MASK           0x01
163
164 /*
165  * Will slightly overestimate the number of pages needed.  This is OK
166  * as it only leads to a small amount of wasted memory for the lifetime of
167  * the I/O.
168  */
169 static int nvme_npages(unsigned size, struct nvme_dev *dev)
170 {
171         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
172         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
173 }
174
175 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
176 {
177         unsigned int ret = sizeof(struct nvme_cmd_info);
178
179         ret += sizeof(struct nvme_iod);
180         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
181         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
182
183         return ret;
184 }
185
186 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
187                                 unsigned int hctx_idx)
188 {
189         struct nvme_dev *dev = data;
190         struct nvme_queue *nvmeq = dev->queues[0];
191
192         WARN_ON(hctx_idx != 0);
193         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
194         WARN_ON(nvmeq->tags);
195
196         hctx->driver_data = nvmeq;
197         nvmeq->tags = &dev->admin_tagset.tags[0];
198         return 0;
199 }
200
201 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
202 {
203         struct nvme_queue *nvmeq = hctx->driver_data;
204
205         nvmeq->tags = NULL;
206 }
207
208 static int nvme_admin_init_request(void *data, struct request *req,
209                                 unsigned int hctx_idx, unsigned int rq_idx,
210                                 unsigned int numa_node)
211 {
212         struct nvme_dev *dev = data;
213         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
214         struct nvme_queue *nvmeq = dev->queues[0];
215
216         BUG_ON(!nvmeq);
217         cmd->nvmeq = nvmeq;
218         return 0;
219 }
220
221 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
222                           unsigned int hctx_idx)
223 {
224         struct nvme_dev *dev = data;
225         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
226
227         if (!nvmeq->tags)
228                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
229
230         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
231         hctx->driver_data = nvmeq;
232         return 0;
233 }
234
235 static int nvme_init_request(void *data, struct request *req,
236                                 unsigned int hctx_idx, unsigned int rq_idx,
237                                 unsigned int numa_node)
238 {
239         struct nvme_dev *dev = data;
240         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
241         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
242
243         BUG_ON(!nvmeq);
244         cmd->nvmeq = nvmeq;
245         return 0;
246 }
247
248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
249                                 nvme_completion_fn handler)
250 {
251         cmd->fn = handler;
252         cmd->ctx = ctx;
253         cmd->aborted = 0;
254         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
255 }
256
257 static void *iod_get_private(struct nvme_iod *iod)
258 {
259         return (void *) (iod->private & ~0x1UL);
260 }
261
262 /*
263  * If bit 0 is set, the iod is embedded in the request payload.
264  */
265 static bool iod_should_kfree(struct nvme_iod *iod)
266 {
267         return (iod->private & NVME_INT_MASK) == 0;
268 }
269
270 /* Special values must be less than 0x1000 */
271 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
272 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
273 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
274 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
275
276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
277                                                 struct nvme_completion *cqe)
278 {
279         if (ctx == CMD_CTX_CANCELLED)
280                 return;
281         if (ctx == CMD_CTX_COMPLETED) {
282                 dev_warn(nvmeq->q_dmadev,
283                                 "completed id %d twice on queue %d\n",
284                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
285                 return;
286         }
287         if (ctx == CMD_CTX_INVALID) {
288                 dev_warn(nvmeq->q_dmadev,
289                                 "invalid id %d completed on queue %d\n",
290                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
291                 return;
292         }
293         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
294 }
295
296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
297 {
298         void *ctx;
299
300         if (fn)
301                 *fn = cmd->fn;
302         ctx = cmd->ctx;
303         cmd->fn = special_completion;
304         cmd->ctx = CMD_CTX_CANCELLED;
305         return ctx;
306 }
307
308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
309                                                 struct nvme_completion *cqe)
310 {
311         u32 result = le32_to_cpup(&cqe->result);
312         u16 status = le16_to_cpup(&cqe->status) >> 1;
313
314         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
315                 ++nvmeq->dev->event_limit;
316         if (status != NVME_SC_SUCCESS)
317                 return;
318
319         switch (result & 0xff07) {
320         case NVME_AER_NOTICE_NS_CHANGED:
321                 dev_info(nvmeq->q_dmadev, "rescanning\n");
322                 schedule_work(&nvmeq->dev->scan_work);
323         default:
324                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
325         }
326 }
327
328 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
329                                                 struct nvme_completion *cqe)
330 {
331         struct request *req = ctx;
332
333         u16 status = le16_to_cpup(&cqe->status) >> 1;
334         u32 result = le32_to_cpup(&cqe->result);
335
336         blk_mq_free_request(req);
337
338         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
339         ++nvmeq->dev->abort_limit;
340 }
341
342 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
343                                                 struct nvme_completion *cqe)
344 {
345         struct async_cmd_info *cmdinfo = ctx;
346         cmdinfo->result = le32_to_cpup(&cqe->result);
347         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
348         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
349         blk_mq_free_request(cmdinfo->req);
350 }
351
352 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
353                                   unsigned int tag)
354 {
355         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
356
357         return blk_mq_rq_to_pdu(req);
358 }
359
360 /*
361  * Called with local interrupts disabled and the q_lock held.  May not sleep.
362  */
363 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
364                                                 nvme_completion_fn *fn)
365 {
366         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
367         void *ctx;
368         if (tag >= nvmeq->q_depth) {
369                 *fn = special_completion;
370                 return CMD_CTX_INVALID;
371         }
372         if (fn)
373                 *fn = cmd->fn;
374         ctx = cmd->ctx;
375         cmd->fn = special_completion;
376         cmd->ctx = CMD_CTX_COMPLETED;
377         return ctx;
378 }
379
380 /**
381  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
382  * @nvmeq: The queue to use
383  * @cmd: The command to send
384  *
385  * Safe to use from interrupt context
386  */
387 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
388                                                 struct nvme_command *cmd)
389 {
390         u16 tail = nvmeq->sq_tail;
391
392         if (nvmeq->sq_cmds_io)
393                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
394         else
395                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
396
397         if (++tail == nvmeq->q_depth)
398                 tail = 0;
399         writel(tail, nvmeq->q_db);
400         nvmeq->sq_tail = tail;
401 }
402
403 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
404 {
405         unsigned long flags;
406         spin_lock_irqsave(&nvmeq->q_lock, flags);
407         __nvme_submit_cmd(nvmeq, cmd);
408         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
409 }
410
411 static __le64 **iod_list(struct nvme_iod *iod)
412 {
413         return ((void *)iod) + iod->offset;
414 }
415
416 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
417                             unsigned nseg, unsigned long private)
418 {
419         iod->private = private;
420         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
421         iod->npages = -1;
422         iod->length = nbytes;
423         iod->nents = 0;
424 }
425
426 static struct nvme_iod *
427 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
428                  unsigned long priv, gfp_t gfp)
429 {
430         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
431                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
432                                 sizeof(struct scatterlist) * nseg, gfp);
433
434         if (iod)
435                 iod_init(iod, bytes, nseg, priv);
436
437         return iod;
438 }
439
440 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
441                                        gfp_t gfp)
442 {
443         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
444                                                 sizeof(struct nvme_dsm_range);
445         struct nvme_iod *iod;
446
447         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
448             size <= NVME_INT_BYTES(dev)) {
449                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
450
451                 iod = cmd->iod;
452                 iod_init(iod, size, rq->nr_phys_segments,
453                                 (unsigned long) rq | NVME_INT_MASK);
454                 return iod;
455         }
456
457         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
458                                 (unsigned long) rq, gfp);
459 }
460
461 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
462 {
463         const int last_prp = dev->page_size / 8 - 1;
464         int i;
465         __le64 **list = iod_list(iod);
466         dma_addr_t prp_dma = iod->first_dma;
467
468         if (iod->npages == 0)
469                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
470         for (i = 0; i < iod->npages; i++) {
471                 __le64 *prp_list = list[i];
472                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
473                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
474                 prp_dma = next_prp_dma;
475         }
476
477         if (iod_should_kfree(iod))
478                 kfree(iod);
479 }
480
481 static int nvme_error_status(u16 status)
482 {
483         switch (status & 0x7ff) {
484         case NVME_SC_SUCCESS:
485                 return 0;
486         case NVME_SC_CAP_EXCEEDED:
487                 return -ENOSPC;
488         default:
489                 return -EIO;
490         }
491 }
492
493 #ifdef CONFIG_BLK_DEV_INTEGRITY
494 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
495 {
496         if (be32_to_cpu(pi->ref_tag) == v)
497                 pi->ref_tag = cpu_to_be32(p);
498 }
499
500 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
501 {
502         if (be32_to_cpu(pi->ref_tag) == p)
503                 pi->ref_tag = cpu_to_be32(v);
504 }
505
506 /**
507  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
508  *
509  * The virtual start sector is the one that was originally submitted by the
510  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
511  * start sector may be different. Remap protection information to match the
512  * physical LBA on writes, and back to the original seed on reads.
513  *
514  * Type 0 and 3 do not have a ref tag, so no remapping required.
515  */
516 static void nvme_dif_remap(struct request *req,
517                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
518 {
519         struct nvme_ns *ns = req->rq_disk->private_data;
520         struct bio_integrity_payload *bip;
521         struct t10_pi_tuple *pi;
522         void *p, *pmap;
523         u32 i, nlb, ts, phys, virt;
524
525         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
526                 return;
527
528         bip = bio_integrity(req->bio);
529         if (!bip)
530                 return;
531
532         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
533
534         p = pmap;
535         virt = bip_get_seed(bip);
536         phys = nvme_block_nr(ns, blk_rq_pos(req));
537         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
538         ts = ns->disk->integrity->tuple_size;
539
540         for (i = 0; i < nlb; i++, virt++, phys++) {
541                 pi = (struct t10_pi_tuple *)p;
542                 dif_swap(phys, virt, pi);
543                 p += ts;
544         }
545         kunmap_atomic(pmap);
546 }
547
548 static int nvme_noop_verify(struct blk_integrity_iter *iter)
549 {
550         return 0;
551 }
552
553 static int nvme_noop_generate(struct blk_integrity_iter *iter)
554 {
555         return 0;
556 }
557
558 struct blk_integrity nvme_meta_noop = {
559         .name                   = "NVME_META_NOOP",
560         .generate_fn            = nvme_noop_generate,
561         .verify_fn              = nvme_noop_verify,
562 };
563
564 static void nvme_init_integrity(struct nvme_ns *ns)
565 {
566         struct blk_integrity integrity;
567
568         switch (ns->pi_type) {
569         case NVME_NS_DPS_PI_TYPE3:
570                 integrity = t10_pi_type3_crc;
571                 break;
572         case NVME_NS_DPS_PI_TYPE1:
573         case NVME_NS_DPS_PI_TYPE2:
574                 integrity = t10_pi_type1_crc;
575                 break;
576         default:
577                 integrity = nvme_meta_noop;
578                 break;
579         }
580         integrity.tuple_size = ns->ms;
581         blk_integrity_register(ns->disk, &integrity);
582         blk_queue_max_integrity_segments(ns->queue, 1);
583 }
584 #else /* CONFIG_BLK_DEV_INTEGRITY */
585 static void nvme_dif_remap(struct request *req,
586                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
587 {
588 }
589 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
590 {
591 }
592 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
593 {
594 }
595 static void nvme_init_integrity(struct nvme_ns *ns)
596 {
597 }
598 #endif
599
600 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
601                                                 struct nvme_completion *cqe)
602 {
603         struct nvme_iod *iod = ctx;
604         struct request *req = iod_get_private(iod);
605         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
606
607         u16 status = le16_to_cpup(&cqe->status) >> 1;
608
609         if (unlikely(status)) {
610                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
611                     && (jiffies - req->start_time) < req->timeout) {
612                         unsigned long flags;
613
614                         blk_mq_requeue_request(req);
615                         spin_lock_irqsave(req->q->queue_lock, flags);
616                         if (!blk_queue_stopped(req->q))
617                                 blk_mq_kick_requeue_list(req->q);
618                         spin_unlock_irqrestore(req->q->queue_lock, flags);
619                         return;
620                 }
621
622                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
623                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
624                                 status = -EINTR;
625                 } else {
626                         status = nvme_error_status(status);
627                 }
628         }
629
630         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
631                 u32 result = le32_to_cpup(&cqe->result);
632                 req->special = (void *)(uintptr_t)result;
633         }
634
635         if (cmd_rq->aborted)
636                 dev_warn(nvmeq->dev->dev,
637                         "completing aborted command with status:%04x\n",
638                         status);
639
640         if (iod->nents) {
641                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
642                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
643                 if (blk_integrity_rq(req)) {
644                         if (!rq_data_dir(req))
645                                 nvme_dif_remap(req, nvme_dif_complete);
646                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
647                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
648                 }
649         }
650         nvme_free_iod(nvmeq->dev, iod);
651
652         blk_mq_complete_request(req, status);
653 }
654
655 /* length is in bytes.  gfp flags indicates whether we may sleep. */
656 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
657                 int total_len, gfp_t gfp)
658 {
659         struct dma_pool *pool;
660         int length = total_len;
661         struct scatterlist *sg = iod->sg;
662         int dma_len = sg_dma_len(sg);
663         u64 dma_addr = sg_dma_address(sg);
664         u32 page_size = dev->page_size;
665         int offset = dma_addr & (page_size - 1);
666         __le64 *prp_list;
667         __le64 **list = iod_list(iod);
668         dma_addr_t prp_dma;
669         int nprps, i;
670
671         length -= (page_size - offset);
672         if (length <= 0)
673                 return total_len;
674
675         dma_len -= (page_size - offset);
676         if (dma_len) {
677                 dma_addr += (page_size - offset);
678         } else {
679                 sg = sg_next(sg);
680                 dma_addr = sg_dma_address(sg);
681                 dma_len = sg_dma_len(sg);
682         }
683
684         if (length <= page_size) {
685                 iod->first_dma = dma_addr;
686                 return total_len;
687         }
688
689         nprps = DIV_ROUND_UP(length, page_size);
690         if (nprps <= (256 / 8)) {
691                 pool = dev->prp_small_pool;
692                 iod->npages = 0;
693         } else {
694                 pool = dev->prp_page_pool;
695                 iod->npages = 1;
696         }
697
698         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
699         if (!prp_list) {
700                 iod->first_dma = dma_addr;
701                 iod->npages = -1;
702                 return (total_len - length) + page_size;
703         }
704         list[0] = prp_list;
705         iod->first_dma = prp_dma;
706         i = 0;
707         for (;;) {
708                 if (i == page_size >> 3) {
709                         __le64 *old_prp_list = prp_list;
710                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
711                         if (!prp_list)
712                                 return total_len - length;
713                         list[iod->npages++] = prp_list;
714                         prp_list[0] = old_prp_list[i - 1];
715                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
716                         i = 1;
717                 }
718                 prp_list[i++] = cpu_to_le64(dma_addr);
719                 dma_len -= page_size;
720                 dma_addr += page_size;
721                 length -= page_size;
722                 if (length <= 0)
723                         break;
724                 if (dma_len > 0)
725                         continue;
726                 BUG_ON(dma_len < 0);
727                 sg = sg_next(sg);
728                 dma_addr = sg_dma_address(sg);
729                 dma_len = sg_dma_len(sg);
730         }
731
732         return total_len;
733 }
734
735 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
736                 struct nvme_iod *iod)
737 {
738         struct nvme_command cmnd;
739
740         memcpy(&cmnd, req->cmd, sizeof(cmnd));
741         cmnd.rw.command_id = req->tag;
742         if (req->nr_phys_segments) {
743                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
744                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
745         }
746
747         __nvme_submit_cmd(nvmeq, &cmnd);
748 }
749
750 /*
751  * We reuse the small pool to allocate the 16-byte range here as it is not
752  * worth having a special pool for these or additional cases to handle freeing
753  * the iod.
754  */
755 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
756                 struct request *req, struct nvme_iod *iod)
757 {
758         struct nvme_dsm_range *range =
759                                 (struct nvme_dsm_range *)iod_list(iod)[0];
760         struct nvme_command cmnd;
761
762         range->cattr = cpu_to_le32(0);
763         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
764         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
765
766         memset(&cmnd, 0, sizeof(cmnd));
767         cmnd.dsm.opcode = nvme_cmd_dsm;
768         cmnd.dsm.command_id = req->tag;
769         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
770         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
771         cmnd.dsm.nr = 0;
772         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
773
774         __nvme_submit_cmd(nvmeq, &cmnd);
775 }
776
777 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
778                                                                 int cmdid)
779 {
780         struct nvme_command cmnd;
781
782         memset(&cmnd, 0, sizeof(cmnd));
783         cmnd.common.opcode = nvme_cmd_flush;
784         cmnd.common.command_id = cmdid;
785         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
786
787         __nvme_submit_cmd(nvmeq, &cmnd);
788 }
789
790 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
791                                                         struct nvme_ns *ns)
792 {
793         struct request *req = iod_get_private(iod);
794         struct nvme_command cmnd;
795         u16 control = 0;
796         u32 dsmgmt = 0;
797
798         if (req->cmd_flags & REQ_FUA)
799                 control |= NVME_RW_FUA;
800         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
801                 control |= NVME_RW_LR;
802
803         if (req->cmd_flags & REQ_RAHEAD)
804                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
805
806         memset(&cmnd, 0, sizeof(cmnd));
807         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
808         cmnd.rw.command_id = req->tag;
809         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
810         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
811         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
812         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
813         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
814
815         if (ns->ms) {
816                 switch (ns->pi_type) {
817                 case NVME_NS_DPS_PI_TYPE3:
818                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
819                         break;
820                 case NVME_NS_DPS_PI_TYPE1:
821                 case NVME_NS_DPS_PI_TYPE2:
822                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
823                                         NVME_RW_PRINFO_PRCHK_REF;
824                         cmnd.rw.reftag = cpu_to_le32(
825                                         nvme_block_nr(ns, blk_rq_pos(req)));
826                         break;
827                 }
828                 if (blk_integrity_rq(req))
829                         cmnd.rw.metadata =
830                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
831                 else
832                         control |= NVME_RW_PRINFO_PRACT;
833         }
834
835         cmnd.rw.control = cpu_to_le16(control);
836         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
837
838         __nvme_submit_cmd(nvmeq, &cmnd);
839
840         return 0;
841 }
842
843 /*
844  * NOTE: ns is NULL when called on the admin queue.
845  */
846 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
847                          const struct blk_mq_queue_data *bd)
848 {
849         struct nvme_ns *ns = hctx->queue->queuedata;
850         struct nvme_queue *nvmeq = hctx->driver_data;
851         struct nvme_dev *dev = nvmeq->dev;
852         struct request *req = bd->rq;
853         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
854         struct nvme_iod *iod;
855         enum dma_data_direction dma_dir;
856
857         /*
858          * If formated with metadata, require the block layer provide a buffer
859          * unless this namespace is formated such that the metadata can be
860          * stripped/generated by the controller with PRACT=1.
861          */
862         if (ns && ns->ms && !blk_integrity_rq(req)) {
863                 if (!(ns->pi_type && ns->ms == 8) &&
864                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
865                         blk_mq_complete_request(req, -EFAULT);
866                         return BLK_MQ_RQ_QUEUE_OK;
867                 }
868         }
869
870         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
871         if (!iod)
872                 return BLK_MQ_RQ_QUEUE_BUSY;
873
874         if (req->cmd_flags & REQ_DISCARD) {
875                 void *range;
876                 /*
877                  * We reuse the small pool to allocate the 16-byte range here
878                  * as it is not worth having a special pool for these or
879                  * additional cases to handle freeing the iod.
880                  */
881                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
882                                                 &iod->first_dma);
883                 if (!range)
884                         goto retry_cmd;
885                 iod_list(iod)[0] = (__le64 *)range;
886                 iod->npages = 0;
887         } else if (req->nr_phys_segments) {
888                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
889
890                 sg_init_table(iod->sg, req->nr_phys_segments);
891                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
892                 if (!iod->nents)
893                         goto error_cmd;
894
895                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
896                         goto retry_cmd;
897
898                 if (blk_rq_bytes(req) !=
899                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
900                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
901                         goto retry_cmd;
902                 }
903                 if (blk_integrity_rq(req)) {
904                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
905                                 goto error_cmd;
906
907                         sg_init_table(iod->meta_sg, 1);
908                         if (blk_rq_map_integrity_sg(
909                                         req->q, req->bio, iod->meta_sg) != 1)
910                                 goto error_cmd;
911
912                         if (rq_data_dir(req))
913                                 nvme_dif_remap(req, nvme_dif_prep);
914
915                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
916                                 goto error_cmd;
917                 }
918         }
919
920         nvme_set_info(cmd, iod, req_completion);
921         spin_lock_irq(&nvmeq->q_lock);
922         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
923                 nvme_submit_priv(nvmeq, req, iod);
924         else if (req->cmd_flags & REQ_DISCARD)
925                 nvme_submit_discard(nvmeq, ns, req, iod);
926         else if (req->cmd_flags & REQ_FLUSH)
927                 nvme_submit_flush(nvmeq, ns, req->tag);
928         else
929                 nvme_submit_iod(nvmeq, iod, ns);
930
931         nvme_process_cq(nvmeq);
932         spin_unlock_irq(&nvmeq->q_lock);
933         return BLK_MQ_RQ_QUEUE_OK;
934
935  error_cmd:
936         nvme_free_iod(dev, iod);
937         return BLK_MQ_RQ_QUEUE_ERROR;
938  retry_cmd:
939         nvme_free_iod(dev, iod);
940         return BLK_MQ_RQ_QUEUE_BUSY;
941 }
942
943 static int nvme_process_cq(struct nvme_queue *nvmeq)
944 {
945         u16 head, phase;
946
947         head = nvmeq->cq_head;
948         phase = nvmeq->cq_phase;
949
950         for (;;) {
951                 void *ctx;
952                 nvme_completion_fn fn;
953                 struct nvme_completion cqe = nvmeq->cqes[head];
954                 if ((le16_to_cpu(cqe.status) & 1) != phase)
955                         break;
956                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
957                 if (++head == nvmeq->q_depth) {
958                         head = 0;
959                         phase = !phase;
960                 }
961                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
962                 fn(nvmeq, ctx, &cqe);
963         }
964
965         /* If the controller ignores the cq head doorbell and continuously
966          * writes to the queue, it is theoretically possible to wrap around
967          * the queue twice and mistakenly return IRQ_NONE.  Linux only
968          * requires that 0.1% of your interrupts are handled, so this isn't
969          * a big problem.
970          */
971         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
972                 return 0;
973
974         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
975         nvmeq->cq_head = head;
976         nvmeq->cq_phase = phase;
977
978         nvmeq->cqe_seen = 1;
979         return 1;
980 }
981
982 static irqreturn_t nvme_irq(int irq, void *data)
983 {
984         irqreturn_t result;
985         struct nvme_queue *nvmeq = data;
986         spin_lock(&nvmeq->q_lock);
987         nvme_process_cq(nvmeq);
988         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
989         nvmeq->cqe_seen = 0;
990         spin_unlock(&nvmeq->q_lock);
991         return result;
992 }
993
994 static irqreturn_t nvme_irq_check(int irq, void *data)
995 {
996         struct nvme_queue *nvmeq = data;
997         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
998         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
999                 return IRQ_NONE;
1000         return IRQ_WAKE_THREAD;
1001 }
1002
1003 /*
1004  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1005  * if the result is positive, it's an NVM Express status code
1006  */
1007 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1008                 void *buffer, void __user *ubuffer, unsigned bufflen,
1009                 u32 *result, unsigned timeout)
1010 {
1011         bool write = cmd->common.opcode & 1;
1012         struct bio *bio = NULL;
1013         struct request *req;
1014         int ret;
1015
1016         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1017         if (IS_ERR(req))
1018                 return PTR_ERR(req);
1019
1020         req->cmd_type = REQ_TYPE_DRV_PRIV;
1021         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1022         req->__data_len = 0;
1023         req->__sector = (sector_t) -1;
1024         req->bio = req->biotail = NULL;
1025
1026         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1027
1028         req->cmd = (unsigned char *)cmd;
1029         req->cmd_len = sizeof(struct nvme_command);
1030         req->special = (void *)0;
1031
1032         if (buffer && bufflen) {
1033                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1034                 if (ret)
1035                         goto out;
1036         } else if (ubuffer && bufflen) {
1037                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1038                 if (ret)
1039                         goto out;
1040                 bio = req->bio;
1041         }
1042
1043         blk_execute_rq(req->q, NULL, req, 0);
1044         if (bio)
1045                 blk_rq_unmap_user(bio);
1046         if (result)
1047                 *result = (u32)(uintptr_t)req->special;
1048         ret = req->errors;
1049  out:
1050         blk_mq_free_request(req);
1051         return ret;
1052 }
1053
1054 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1055                 void *buffer, unsigned bufflen)
1056 {
1057         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1058 }
1059
1060 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1061 {
1062         struct nvme_queue *nvmeq = dev->queues[0];
1063         struct nvme_command c;
1064         struct nvme_cmd_info *cmd_info;
1065         struct request *req;
1066
1067         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1068         if (IS_ERR(req))
1069                 return PTR_ERR(req);
1070
1071         req->cmd_flags |= REQ_NO_TIMEOUT;
1072         cmd_info = blk_mq_rq_to_pdu(req);
1073         nvme_set_info(cmd_info, NULL, async_req_completion);
1074
1075         memset(&c, 0, sizeof(c));
1076         c.common.opcode = nvme_admin_async_event;
1077         c.common.command_id = req->tag;
1078
1079         blk_mq_free_request(req);
1080         __nvme_submit_cmd(nvmeq, &c);
1081         return 0;
1082 }
1083
1084 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1085                         struct nvme_command *cmd,
1086                         struct async_cmd_info *cmdinfo, unsigned timeout)
1087 {
1088         struct nvme_queue *nvmeq = dev->queues[0];
1089         struct request *req;
1090         struct nvme_cmd_info *cmd_rq;
1091
1092         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1093         if (IS_ERR(req))
1094                 return PTR_ERR(req);
1095
1096         req->timeout = timeout;
1097         cmd_rq = blk_mq_rq_to_pdu(req);
1098         cmdinfo->req = req;
1099         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1100         cmdinfo->status = -EINTR;
1101
1102         cmd->common.command_id = req->tag;
1103
1104         nvme_submit_cmd(nvmeq, cmd);
1105         return 0;
1106 }
1107
1108 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1109 {
1110         struct nvme_command c;
1111
1112         memset(&c, 0, sizeof(c));
1113         c.delete_queue.opcode = opcode;
1114         c.delete_queue.qid = cpu_to_le16(id);
1115
1116         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1117 }
1118
1119 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1120                                                 struct nvme_queue *nvmeq)
1121 {
1122         struct nvme_command c;
1123         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1124
1125         /*
1126          * Note: we (ab)use the fact the the prp fields survive if no data
1127          * is attached to the request.
1128          */
1129         memset(&c, 0, sizeof(c));
1130         c.create_cq.opcode = nvme_admin_create_cq;
1131         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1132         c.create_cq.cqid = cpu_to_le16(qid);
1133         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1134         c.create_cq.cq_flags = cpu_to_le16(flags);
1135         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1136
1137         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1138 }
1139
1140 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1141                                                 struct nvme_queue *nvmeq)
1142 {
1143         struct nvme_command c;
1144         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1145
1146         /*
1147          * Note: we (ab)use the fact the the prp fields survive if no data
1148          * is attached to the request.
1149          */
1150         memset(&c, 0, sizeof(c));
1151         c.create_sq.opcode = nvme_admin_create_sq;
1152         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1153         c.create_sq.sqid = cpu_to_le16(qid);
1154         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1155         c.create_sq.sq_flags = cpu_to_le16(flags);
1156         c.create_sq.cqid = cpu_to_le16(qid);
1157
1158         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1159 }
1160
1161 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1162 {
1163         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1164 }
1165
1166 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1167 {
1168         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1169 }
1170
1171 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1172 {
1173         struct nvme_command c = { };
1174         int error;
1175
1176         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1177         c.identify.opcode = nvme_admin_identify;
1178         c.identify.cns = cpu_to_le32(1);
1179
1180         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1181         if (!*id)
1182                 return -ENOMEM;
1183
1184         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1185                         sizeof(struct nvme_id_ctrl));
1186         if (error)
1187                 kfree(*id);
1188         return error;
1189 }
1190
1191 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1192                 struct nvme_id_ns **id)
1193 {
1194         struct nvme_command c = { };
1195         int error;
1196
1197         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1198         c.identify.opcode = nvme_admin_identify,
1199         c.identify.nsid = cpu_to_le32(nsid),
1200
1201         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1202         if (!*id)
1203                 return -ENOMEM;
1204
1205         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1206                         sizeof(struct nvme_id_ns));
1207         if (error)
1208                 kfree(*id);
1209         return error;
1210 }
1211
1212 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1213                                         dma_addr_t dma_addr, u32 *result)
1214 {
1215         struct nvme_command c;
1216
1217         memset(&c, 0, sizeof(c));
1218         c.features.opcode = nvme_admin_get_features;
1219         c.features.nsid = cpu_to_le32(nsid);
1220         c.features.prp1 = cpu_to_le64(dma_addr);
1221         c.features.fid = cpu_to_le32(fid);
1222
1223         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1224                         result, 0);
1225 }
1226
1227 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1228                                         dma_addr_t dma_addr, u32 *result)
1229 {
1230         struct nvme_command c;
1231
1232         memset(&c, 0, sizeof(c));
1233         c.features.opcode = nvme_admin_set_features;
1234         c.features.prp1 = cpu_to_le64(dma_addr);
1235         c.features.fid = cpu_to_le32(fid);
1236         c.features.dword11 = cpu_to_le32(dword11);
1237
1238         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1239                         result, 0);
1240 }
1241
1242 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1243 {
1244         struct nvme_command c = { };
1245         int error;
1246
1247         c.common.opcode = nvme_admin_get_log_page,
1248         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1249         c.common.cdw10[0] = cpu_to_le32(
1250                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1251                          NVME_LOG_SMART),
1252
1253         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1254         if (!*log)
1255                 return -ENOMEM;
1256
1257         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1258                         sizeof(struct nvme_smart_log));
1259         if (error)
1260                 kfree(*log);
1261         return error;
1262 }
1263
1264 /**
1265  * nvme_abort_req - Attempt aborting a request
1266  *
1267  * Schedule controller reset if the command was already aborted once before and
1268  * still hasn't been returned to the driver, or if this is the admin queue.
1269  */
1270 static void nvme_abort_req(struct request *req)
1271 {
1272         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1273         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1274         struct nvme_dev *dev = nvmeq->dev;
1275         struct request *abort_req;
1276         struct nvme_cmd_info *abort_cmd;
1277         struct nvme_command cmd;
1278
1279         if (!nvmeq->qid || cmd_rq->aborted) {
1280                 unsigned long flags;
1281
1282                 spin_lock_irqsave(&dev_list_lock, flags);
1283                 if (work_busy(&dev->reset_work))
1284                         goto out;
1285                 list_del_init(&dev->node);
1286                 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1287                                                         req->tag, nvmeq->qid);
1288                 queue_work(nvme_workq, &dev->reset_work);
1289  out:
1290                 spin_unlock_irqrestore(&dev_list_lock, flags);
1291                 return;
1292         }
1293
1294         if (!dev->abort_limit)
1295                 return;
1296
1297         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1298                                                                         false);
1299         if (IS_ERR(abort_req))
1300                 return;
1301
1302         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1303         nvme_set_info(abort_cmd, abort_req, abort_completion);
1304
1305         memset(&cmd, 0, sizeof(cmd));
1306         cmd.abort.opcode = nvme_admin_abort_cmd;
1307         cmd.abort.cid = req->tag;
1308         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1309         cmd.abort.command_id = abort_req->tag;
1310
1311         --dev->abort_limit;
1312         cmd_rq->aborted = 1;
1313
1314         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1315                                                         nvmeq->qid);
1316         nvme_submit_cmd(dev->queues[0], &cmd);
1317 }
1318
1319 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1320 {
1321         struct nvme_queue *nvmeq = data;
1322         void *ctx;
1323         nvme_completion_fn fn;
1324         struct nvme_cmd_info *cmd;
1325         struct nvme_completion cqe;
1326
1327         if (!blk_mq_request_started(req))
1328                 return;
1329
1330         cmd = blk_mq_rq_to_pdu(req);
1331
1332         if (cmd->ctx == CMD_CTX_CANCELLED)
1333                 return;
1334
1335         if (blk_queue_dying(req->q))
1336                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1337         else
1338                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1339
1340
1341         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1342                                                 req->tag, nvmeq->qid);
1343         ctx = cancel_cmd_info(cmd, &fn);
1344         fn(nvmeq, ctx, &cqe);
1345 }
1346
1347 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1348 {
1349         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1350         struct nvme_queue *nvmeq = cmd->nvmeq;
1351
1352         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1353                                                         nvmeq->qid);
1354         spin_lock_irq(&nvmeq->q_lock);
1355         nvme_abort_req(req);
1356         spin_unlock_irq(&nvmeq->q_lock);
1357
1358         /*
1359          * The aborted req will be completed on receiving the abort req.
1360          * We enable the timer again. If hit twice, it'll cause a device reset,
1361          * as the device then is in a faulty state.
1362          */
1363         return BLK_EH_RESET_TIMER;
1364 }
1365
1366 static void nvme_free_queue(struct nvme_queue *nvmeq)
1367 {
1368         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1369                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1370         if (nvmeq->sq_cmds)
1371                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1372                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1373         kfree(nvmeq);
1374 }
1375
1376 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1377 {
1378         int i;
1379
1380         for (i = dev->queue_count - 1; i >= lowest; i--) {
1381                 struct nvme_queue *nvmeq = dev->queues[i];
1382                 dev->queue_count--;
1383                 dev->queues[i] = NULL;
1384                 nvme_free_queue(nvmeq);
1385         }
1386 }
1387
1388 /**
1389  * nvme_suspend_queue - put queue into suspended state
1390  * @nvmeq - queue to suspend
1391  */
1392 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1393 {
1394         int vector;
1395
1396         spin_lock_irq(&nvmeq->q_lock);
1397         if (nvmeq->cq_vector == -1) {
1398                 spin_unlock_irq(&nvmeq->q_lock);
1399                 return 1;
1400         }
1401         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1402         nvmeq->dev->online_queues--;
1403         nvmeq->cq_vector = -1;
1404         spin_unlock_irq(&nvmeq->q_lock);
1405
1406         if (!nvmeq->qid && nvmeq->dev->admin_q)
1407                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1408
1409         irq_set_affinity_hint(vector, NULL);
1410         free_irq(vector, nvmeq);
1411
1412         return 0;
1413 }
1414
1415 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1416 {
1417         spin_lock_irq(&nvmeq->q_lock);
1418         if (nvmeq->tags && *nvmeq->tags)
1419                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1420         spin_unlock_irq(&nvmeq->q_lock);
1421 }
1422
1423 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1424 {
1425         struct nvme_queue *nvmeq = dev->queues[qid];
1426
1427         if (!nvmeq)
1428                 return;
1429         if (nvme_suspend_queue(nvmeq))
1430                 return;
1431
1432         /* Don't tell the adapter to delete the admin queue.
1433          * Don't tell a removed adapter to delete IO queues. */
1434         if (qid && readl(&dev->bar->csts) != -1) {
1435                 adapter_delete_sq(dev, qid);
1436                 adapter_delete_cq(dev, qid);
1437         }
1438
1439         spin_lock_irq(&nvmeq->q_lock);
1440         nvme_process_cq(nvmeq);
1441         spin_unlock_irq(&nvmeq->q_lock);
1442 }
1443
1444 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1445                                 int entry_size)
1446 {
1447         int q_depth = dev->q_depth;
1448         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1449
1450         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1451                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1452                 mem_per_q = round_down(mem_per_q, dev->page_size);
1453                 q_depth = div_u64(mem_per_q, entry_size);
1454
1455                 /*
1456                  * Ensure the reduced q_depth is above some threshold where it
1457                  * would be better to map queues in system memory with the
1458                  * original depth
1459                  */
1460                 if (q_depth < 64)
1461                         return -ENOMEM;
1462         }
1463
1464         return q_depth;
1465 }
1466
1467 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1468                                 int qid, int depth)
1469 {
1470         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1471                 unsigned offset = (qid - 1) *
1472                                         roundup(SQ_SIZE(depth), dev->page_size);
1473                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1474                 nvmeq->sq_cmds_io = dev->cmb + offset;
1475         } else {
1476                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1477                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1478                 if (!nvmeq->sq_cmds)
1479                         return -ENOMEM;
1480         }
1481
1482         return 0;
1483 }
1484
1485 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1486                                                         int depth)
1487 {
1488         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1489         if (!nvmeq)
1490                 return NULL;
1491
1492         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1493                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1494         if (!nvmeq->cqes)
1495                 goto free_nvmeq;
1496
1497         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1498                 goto free_cqdma;
1499
1500         nvmeq->q_dmadev = dev->dev;
1501         nvmeq->dev = dev;
1502         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1503                         dev->instance, qid);
1504         spin_lock_init(&nvmeq->q_lock);
1505         nvmeq->cq_head = 0;
1506         nvmeq->cq_phase = 1;
1507         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1508         nvmeq->q_depth = depth;
1509         nvmeq->qid = qid;
1510         nvmeq->cq_vector = -1;
1511         dev->queues[qid] = nvmeq;
1512
1513         /* make sure queue descriptor is set before queue count, for kthread */
1514         mb();
1515         dev->queue_count++;
1516
1517         return nvmeq;
1518
1519  free_cqdma:
1520         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1521                                                         nvmeq->cq_dma_addr);
1522  free_nvmeq:
1523         kfree(nvmeq);
1524         return NULL;
1525 }
1526
1527 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1528                                                         const char *name)
1529 {
1530         if (use_threaded_interrupts)
1531                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1532                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1533                                         name, nvmeq);
1534         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1535                                 IRQF_SHARED, name, nvmeq);
1536 }
1537
1538 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1539 {
1540         struct nvme_dev *dev = nvmeq->dev;
1541
1542         spin_lock_irq(&nvmeq->q_lock);
1543         nvmeq->sq_tail = 0;
1544         nvmeq->cq_head = 0;
1545         nvmeq->cq_phase = 1;
1546         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1547         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1548         dev->online_queues++;
1549         spin_unlock_irq(&nvmeq->q_lock);
1550 }
1551
1552 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1553 {
1554         struct nvme_dev *dev = nvmeq->dev;
1555         int result;
1556
1557         nvmeq->cq_vector = qid - 1;
1558         result = adapter_alloc_cq(dev, qid, nvmeq);
1559         if (result < 0)
1560                 return result;
1561
1562         result = adapter_alloc_sq(dev, qid, nvmeq);
1563         if (result < 0)
1564                 goto release_cq;
1565
1566         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1567         if (result < 0)
1568                 goto release_sq;
1569
1570         nvme_init_queue(nvmeq, qid);
1571         return result;
1572
1573  release_sq:
1574         adapter_delete_sq(dev, qid);
1575  release_cq:
1576         adapter_delete_cq(dev, qid);
1577         return result;
1578 }
1579
1580 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1581 {
1582         unsigned long timeout;
1583         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1584
1585         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1586
1587         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1588                 msleep(100);
1589                 if (fatal_signal_pending(current))
1590                         return -EINTR;
1591                 if (time_after(jiffies, timeout)) {
1592                         dev_err(dev->dev,
1593                                 "Device not ready; aborting %s\n", enabled ?
1594                                                 "initialisation" : "reset");
1595                         return -ENODEV;
1596                 }
1597         }
1598
1599         return 0;
1600 }
1601
1602 /*
1603  * If the device has been passed off to us in an enabled state, just clear
1604  * the enabled bit.  The spec says we should set the 'shutdown notification
1605  * bits', but doing so may cause the device to complete commands to the
1606  * admin queue ... and we don't know what memory that might be pointing at!
1607  */
1608 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1609 {
1610         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1611         dev->ctrl_config &= ~NVME_CC_ENABLE;
1612         writel(dev->ctrl_config, &dev->bar->cc);
1613
1614         return nvme_wait_ready(dev, cap, false);
1615 }
1616
1617 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1618 {
1619         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1620         dev->ctrl_config |= NVME_CC_ENABLE;
1621         writel(dev->ctrl_config, &dev->bar->cc);
1622
1623         return nvme_wait_ready(dev, cap, true);
1624 }
1625
1626 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1627 {
1628         unsigned long timeout;
1629
1630         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1631         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1632
1633         writel(dev->ctrl_config, &dev->bar->cc);
1634
1635         timeout = SHUTDOWN_TIMEOUT + jiffies;
1636         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1637                                                         NVME_CSTS_SHST_CMPLT) {
1638                 msleep(100);
1639                 if (fatal_signal_pending(current))
1640                         return -EINTR;
1641                 if (time_after(jiffies, timeout)) {
1642                         dev_err(dev->dev,
1643                                 "Device shutdown incomplete; abort shutdown\n");
1644                         return -ENODEV;
1645                 }
1646         }
1647
1648         return 0;
1649 }
1650
1651 static struct blk_mq_ops nvme_mq_admin_ops = {
1652         .queue_rq       = nvme_queue_rq,
1653         .map_queue      = blk_mq_map_queue,
1654         .init_hctx      = nvme_admin_init_hctx,
1655         .exit_hctx      = nvme_admin_exit_hctx,
1656         .init_request   = nvme_admin_init_request,
1657         .timeout        = nvme_timeout,
1658 };
1659
1660 static struct blk_mq_ops nvme_mq_ops = {
1661         .queue_rq       = nvme_queue_rq,
1662         .map_queue      = blk_mq_map_queue,
1663         .init_hctx      = nvme_init_hctx,
1664         .init_request   = nvme_init_request,
1665         .timeout        = nvme_timeout,
1666 };
1667
1668 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1669 {
1670         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1671                 blk_cleanup_queue(dev->admin_q);
1672                 blk_mq_free_tag_set(&dev->admin_tagset);
1673         }
1674 }
1675
1676 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1677 {
1678         if (!dev->admin_q) {
1679                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1680                 dev->admin_tagset.nr_hw_queues = 1;
1681                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1682                 dev->admin_tagset.reserved_tags = 1;
1683                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1684                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1685                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1686                 dev->admin_tagset.driver_data = dev;
1687
1688                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1689                         return -ENOMEM;
1690
1691                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1692                 if (IS_ERR(dev->admin_q)) {
1693                         blk_mq_free_tag_set(&dev->admin_tagset);
1694                         return -ENOMEM;
1695                 }
1696                 if (!blk_get_queue(dev->admin_q)) {
1697                         nvme_dev_remove_admin(dev);
1698                         dev->admin_q = NULL;
1699                         return -ENODEV;
1700                 }
1701         } else
1702                 blk_mq_unfreeze_queue(dev->admin_q);
1703
1704         return 0;
1705 }
1706
1707 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1708 {
1709         int result;
1710         u32 aqa;
1711         u64 cap = readq(&dev->bar->cap);
1712         struct nvme_queue *nvmeq;
1713         unsigned page_shift = PAGE_SHIFT;
1714         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1715         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1716
1717         if (page_shift < dev_page_min) {
1718                 dev_err(dev->dev,
1719                                 "Minimum device page size (%u) too large for "
1720                                 "host (%u)\n", 1 << dev_page_min,
1721                                 1 << page_shift);
1722                 return -ENODEV;
1723         }
1724         if (page_shift > dev_page_max) {
1725                 dev_info(dev->dev,
1726                                 "Device maximum page size (%u) smaller than "
1727                                 "host (%u); enabling work-around\n",
1728                                 1 << dev_page_max, 1 << page_shift);
1729                 page_shift = dev_page_max;
1730         }
1731
1732         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1733                                                 NVME_CAP_NSSRC(cap) : 0;
1734
1735         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1736                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1737
1738         result = nvme_disable_ctrl(dev, cap);
1739         if (result < 0)
1740                 return result;
1741
1742         nvmeq = dev->queues[0];
1743         if (!nvmeq) {
1744                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1745                 if (!nvmeq)
1746                         return -ENOMEM;
1747         }
1748
1749         aqa = nvmeq->q_depth - 1;
1750         aqa |= aqa << 16;
1751
1752         dev->page_size = 1 << page_shift;
1753
1754         dev->ctrl_config = NVME_CC_CSS_NVM;
1755         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1756         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1757         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1758
1759         writel(aqa, &dev->bar->aqa);
1760         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1761         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1762
1763         result = nvme_enable_ctrl(dev, cap);
1764         if (result)
1765                 goto free_nvmeq;
1766
1767         nvmeq->cq_vector = 0;
1768         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1769         if (result) {
1770                 nvmeq->cq_vector = -1;
1771                 goto free_nvmeq;
1772         }
1773
1774         return result;
1775
1776  free_nvmeq:
1777         nvme_free_queues(dev, 0);
1778         return result;
1779 }
1780
1781 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1782 {
1783         struct nvme_dev *dev = ns->dev;
1784         struct nvme_user_io io;
1785         struct nvme_command c;
1786         unsigned length, meta_len;
1787         int status, write;
1788         dma_addr_t meta_dma = 0;
1789         void *meta = NULL;
1790         void __user *metadata;
1791
1792         if (copy_from_user(&io, uio, sizeof(io)))
1793                 return -EFAULT;
1794
1795         switch (io.opcode) {
1796         case nvme_cmd_write:
1797         case nvme_cmd_read:
1798         case nvme_cmd_compare:
1799                 break;
1800         default:
1801                 return -EINVAL;
1802         }
1803
1804         length = (io.nblocks + 1) << ns->lba_shift;
1805         meta_len = (io.nblocks + 1) * ns->ms;
1806         metadata = (void __user *)(unsigned long)io.metadata;
1807         write = io.opcode & 1;
1808
1809         if (ns->ext) {
1810                 length += meta_len;
1811                 meta_len = 0;
1812         }
1813         if (meta_len) {
1814                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1815                         return -EINVAL;
1816
1817                 meta = dma_alloc_coherent(dev->dev, meta_len,
1818                                                 &meta_dma, GFP_KERNEL);
1819
1820                 if (!meta) {
1821                         status = -ENOMEM;
1822                         goto unmap;
1823                 }
1824                 if (write) {
1825                         if (copy_from_user(meta, metadata, meta_len)) {
1826                                 status = -EFAULT;
1827                                 goto unmap;
1828                         }
1829                 }
1830         }
1831
1832         memset(&c, 0, sizeof(c));
1833         c.rw.opcode = io.opcode;
1834         c.rw.flags = io.flags;
1835         c.rw.nsid = cpu_to_le32(ns->ns_id);
1836         c.rw.slba = cpu_to_le64(io.slba);
1837         c.rw.length = cpu_to_le16(io.nblocks);
1838         c.rw.control = cpu_to_le16(io.control);
1839         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1840         c.rw.reftag = cpu_to_le32(io.reftag);
1841         c.rw.apptag = cpu_to_le16(io.apptag);
1842         c.rw.appmask = cpu_to_le16(io.appmask);
1843         c.rw.metadata = cpu_to_le64(meta_dma);
1844
1845         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1846                         (void __user *)io.addr, length, NULL, 0);
1847  unmap:
1848         if (meta) {
1849                 if (status == NVME_SC_SUCCESS && !write) {
1850                         if (copy_to_user(metadata, meta, meta_len))
1851                                 status = -EFAULT;
1852                 }
1853                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1854         }
1855         return status;
1856 }
1857
1858 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1859                         struct nvme_passthru_cmd __user *ucmd)
1860 {
1861         struct nvme_passthru_cmd cmd;
1862         struct nvme_command c;
1863         unsigned timeout = 0;
1864         int status;
1865
1866         if (!capable(CAP_SYS_ADMIN))
1867                 return -EACCES;
1868         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1869                 return -EFAULT;
1870
1871         memset(&c, 0, sizeof(c));
1872         c.common.opcode = cmd.opcode;
1873         c.common.flags = cmd.flags;
1874         c.common.nsid = cpu_to_le32(cmd.nsid);
1875         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1876         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1877         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1878         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1879         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1880         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1881         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1882         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1883
1884         if (cmd.timeout_ms)
1885                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1886
1887         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1888                         NULL, (void __user *)cmd.addr, cmd.data_len,
1889                         &cmd.result, timeout);
1890         if (status >= 0) {
1891                 if (put_user(cmd.result, &ucmd->result))
1892                         return -EFAULT;
1893         }
1894
1895         return status;
1896 }
1897
1898 static int nvme_subsys_reset(struct nvme_dev *dev)
1899 {
1900         if (!dev->subsystem)
1901                 return -ENOTTY;
1902
1903         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1904         return 0;
1905 }
1906
1907 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1908                                                         unsigned long arg)
1909 {
1910         struct nvme_ns *ns = bdev->bd_disk->private_data;
1911
1912         switch (cmd) {
1913         case NVME_IOCTL_ID:
1914                 force_successful_syscall_return();
1915                 return ns->ns_id;
1916         case NVME_IOCTL_ADMIN_CMD:
1917                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1918         case NVME_IOCTL_IO_CMD:
1919                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1920         case NVME_IOCTL_SUBMIT_IO:
1921                 return nvme_submit_io(ns, (void __user *)arg);
1922         case SG_GET_VERSION_NUM:
1923                 return nvme_sg_get_version_num((void __user *)arg);
1924         case SG_IO:
1925                 return nvme_sg_io(ns, (void __user *)arg);
1926         default:
1927                 return -ENOTTY;
1928         }
1929 }
1930
1931 #ifdef CONFIG_COMPAT
1932 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1933                                         unsigned int cmd, unsigned long arg)
1934 {
1935         switch (cmd) {
1936         case SG_IO:
1937                 return -ENOIOCTLCMD;
1938         }
1939         return nvme_ioctl(bdev, mode, cmd, arg);
1940 }
1941 #else
1942 #define nvme_compat_ioctl       NULL
1943 #endif
1944
1945 static void nvme_free_dev(struct kref *kref);
1946 static void nvme_free_ns(struct kref *kref)
1947 {
1948         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1949
1950         spin_lock(&dev_list_lock);
1951         ns->disk->private_data = NULL;
1952         spin_unlock(&dev_list_lock);
1953
1954         kref_put(&ns->dev->kref, nvme_free_dev);
1955         put_disk(ns->disk);
1956         kfree(ns);
1957 }
1958
1959 static int nvme_open(struct block_device *bdev, fmode_t mode)
1960 {
1961         int ret = 0;
1962         struct nvme_ns *ns;
1963
1964         spin_lock(&dev_list_lock);
1965         ns = bdev->bd_disk->private_data;
1966         if (!ns)
1967                 ret = -ENXIO;
1968         else if (!kref_get_unless_zero(&ns->kref))
1969                 ret = -ENXIO;
1970         spin_unlock(&dev_list_lock);
1971
1972         return ret;
1973 }
1974
1975 static void nvme_release(struct gendisk *disk, fmode_t mode)
1976 {
1977         struct nvme_ns *ns = disk->private_data;
1978         kref_put(&ns->kref, nvme_free_ns);
1979 }
1980
1981 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1982 {
1983         /* some standard values */
1984         geo->heads = 1 << 6;
1985         geo->sectors = 1 << 5;
1986         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1987         return 0;
1988 }
1989
1990 static void nvme_config_discard(struct nvme_ns *ns)
1991 {
1992         u32 logical_block_size = queue_logical_block_size(ns->queue);
1993         ns->queue->limits.discard_zeroes_data = 0;
1994         ns->queue->limits.discard_alignment = logical_block_size;
1995         ns->queue->limits.discard_granularity = logical_block_size;
1996         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1997         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1998 }
1999
2000 static int nvme_revalidate_disk(struct gendisk *disk)
2001 {
2002         struct nvme_ns *ns = disk->private_data;
2003         struct nvme_dev *dev = ns->dev;
2004         struct nvme_id_ns *id;
2005         u8 lbaf, pi_type;
2006         u16 old_ms;
2007         unsigned short bs;
2008
2009         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2010                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2011                                                 dev->instance, ns->ns_id);
2012                 return -ENODEV;
2013         }
2014         if (id->ncap == 0) {
2015                 kfree(id);
2016                 return -ENODEV;
2017         }
2018
2019         old_ms = ns->ms;
2020         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2021         ns->lba_shift = id->lbaf[lbaf].ds;
2022         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2023         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2024
2025         /*
2026          * If identify namespace failed, use default 512 byte block size so
2027          * block layer can use before failing read/write for 0 capacity.
2028          */
2029         if (ns->lba_shift == 0)
2030                 ns->lba_shift = 9;
2031         bs = 1 << ns->lba_shift;
2032
2033         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2034         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2035                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2036
2037         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2038                                 ns->ms != old_ms ||
2039                                 bs != queue_logical_block_size(disk->queue) ||
2040                                 (ns->ms && ns->ext)))
2041                 blk_integrity_unregister(disk);
2042
2043         ns->pi_type = pi_type;
2044         blk_queue_logical_block_size(ns->queue, bs);
2045
2046         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2047                                                                 !ns->ext)
2048                 nvme_init_integrity(ns);
2049
2050         if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2051                 set_capacity(disk, 0);
2052         else
2053                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2054
2055         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2056                 nvme_config_discard(ns);
2057
2058         kfree(id);
2059         return 0;
2060 }
2061
2062 static const struct block_device_operations nvme_fops = {
2063         .owner          = THIS_MODULE,
2064         .ioctl          = nvme_ioctl,
2065         .compat_ioctl   = nvme_compat_ioctl,
2066         .open           = nvme_open,
2067         .release        = nvme_release,
2068         .getgeo         = nvme_getgeo,
2069         .revalidate_disk= nvme_revalidate_disk,
2070 };
2071
2072 static int nvme_kthread(void *data)
2073 {
2074         struct nvme_dev *dev, *next;
2075
2076         while (!kthread_should_stop()) {
2077                 set_current_state(TASK_INTERRUPTIBLE);
2078                 spin_lock(&dev_list_lock);
2079                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2080                         int i;
2081                         u32 csts = readl(&dev->bar->csts);
2082
2083                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2084                                                         csts & NVME_CSTS_CFS) {
2085                                 if (work_busy(&dev->reset_work))
2086                                         continue;
2087                                 list_del_init(&dev->node);
2088                                 dev_warn(dev->dev,
2089                                         "Failed status: %x, reset controller\n",
2090                                         readl(&dev->bar->csts));
2091                                 queue_work(nvme_workq, &dev->reset_work);
2092                                 continue;
2093                         }
2094                         for (i = 0; i < dev->queue_count; i++) {
2095                                 struct nvme_queue *nvmeq = dev->queues[i];
2096                                 if (!nvmeq)
2097                                         continue;
2098                                 spin_lock_irq(&nvmeq->q_lock);
2099                                 nvme_process_cq(nvmeq);
2100
2101                                 while ((i == 0) && (dev->event_limit > 0)) {
2102                                         if (nvme_submit_async_admin_req(dev))
2103                                                 break;
2104                                         dev->event_limit--;
2105                                 }
2106                                 spin_unlock_irq(&nvmeq->q_lock);
2107                         }
2108                 }
2109                 spin_unlock(&dev_list_lock);
2110                 schedule_timeout(round_jiffies_relative(HZ));
2111         }
2112         return 0;
2113 }
2114
2115 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2116 {
2117         struct nvme_ns *ns;
2118         struct gendisk *disk;
2119         int node = dev_to_node(dev->dev);
2120
2121         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2122         if (!ns)
2123                 return;
2124
2125         ns->queue = blk_mq_init_queue(&dev->tagset);
2126         if (IS_ERR(ns->queue))
2127                 goto out_free_ns;
2128         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2129         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2130         ns->dev = dev;
2131         ns->queue->queuedata = ns;
2132
2133         disk = alloc_disk_node(0, node);
2134         if (!disk)
2135                 goto out_free_queue;
2136
2137         kref_init(&ns->kref);
2138         ns->ns_id = nsid;
2139         ns->disk = disk;
2140         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2141         list_add_tail(&ns->list, &dev->namespaces);
2142
2143         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2144         if (dev->max_hw_sectors) {
2145                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2146                 blk_queue_max_segments(ns->queue,
2147                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2148         }
2149         if (dev->stripe_size)
2150                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2151         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2152                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2153         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2154
2155         disk->major = nvme_major;
2156         disk->first_minor = 0;
2157         disk->fops = &nvme_fops;
2158         disk->private_data = ns;
2159         disk->queue = ns->queue;
2160         disk->driverfs_dev = dev->device;
2161         disk->flags = GENHD_FL_EXT_DEVT;
2162         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2163
2164         /*
2165          * Initialize capacity to 0 until we establish the namespace format and
2166          * setup integrity extentions if necessary. The revalidate_disk after
2167          * add_disk allows the driver to register with integrity if the format
2168          * requires it.
2169          */
2170         set_capacity(disk, 0);
2171         if (nvme_revalidate_disk(ns->disk))
2172                 goto out_free_disk;
2173
2174         kref_get(&dev->kref);
2175         add_disk(ns->disk);
2176         if (ns->ms) {
2177                 struct block_device *bd = bdget_disk(ns->disk, 0);
2178                 if (!bd)
2179                         return;
2180                 if (blkdev_get(bd, FMODE_READ, NULL)) {
2181                         bdput(bd);
2182                         return;
2183                 }
2184                 blkdev_reread_part(bd);
2185                 blkdev_put(bd, FMODE_READ);
2186         }
2187         return;
2188  out_free_disk:
2189         kfree(disk);
2190         list_del(&ns->list);
2191  out_free_queue:
2192         blk_cleanup_queue(ns->queue);
2193  out_free_ns:
2194         kfree(ns);
2195 }
2196
2197 static void nvme_create_io_queues(struct nvme_dev *dev)
2198 {
2199         unsigned i;
2200
2201         for (i = dev->queue_count; i <= dev->max_qid; i++)
2202                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2203                         break;
2204
2205         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2206                 if (nvme_create_queue(dev->queues[i], i))
2207                         break;
2208 }
2209
2210 static int set_queue_count(struct nvme_dev *dev, int count)
2211 {
2212         int status;
2213         u32 result;
2214         u32 q_count = (count - 1) | ((count - 1) << 16);
2215
2216         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2217                                                                 &result);
2218         if (status < 0)
2219                 return status;
2220         if (status > 0) {
2221                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2222                 return 0;
2223         }
2224         return min(result & 0xffff, result >> 16) + 1;
2225 }
2226
2227 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2228 {
2229         u64 szu, size, offset;
2230         u32 cmbloc;
2231         resource_size_t bar_size;
2232         struct pci_dev *pdev = to_pci_dev(dev->dev);
2233         void __iomem *cmb;
2234         dma_addr_t dma_addr;
2235
2236         if (!use_cmb_sqes)
2237                 return NULL;
2238
2239         dev->cmbsz = readl(&dev->bar->cmbsz);
2240         if (!(NVME_CMB_SZ(dev->cmbsz)))
2241                 return NULL;
2242
2243         cmbloc = readl(&dev->bar->cmbloc);
2244
2245         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2246         size = szu * NVME_CMB_SZ(dev->cmbsz);
2247         offset = szu * NVME_CMB_OFST(cmbloc);
2248         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2249
2250         if (offset > bar_size)
2251                 return NULL;
2252
2253         /*
2254          * Controllers may support a CMB size larger than their BAR,
2255          * for example, due to being behind a bridge. Reduce the CMB to
2256          * the reported size of the BAR
2257          */
2258         if (size > bar_size - offset)
2259                 size = bar_size - offset;
2260
2261         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2262         cmb = ioremap_wc(dma_addr, size);
2263         if (!cmb)
2264                 return NULL;
2265
2266         dev->cmb_dma_addr = dma_addr;
2267         dev->cmb_size = size;
2268         return cmb;
2269 }
2270
2271 static inline void nvme_release_cmb(struct nvme_dev *dev)
2272 {
2273         if (dev->cmb) {
2274                 iounmap(dev->cmb);
2275                 dev->cmb = NULL;
2276         }
2277 }
2278
2279 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2280 {
2281         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2282 }
2283
2284 static int nvme_setup_io_queues(struct nvme_dev *dev)
2285 {
2286         struct nvme_queue *adminq = dev->queues[0];
2287         struct pci_dev *pdev = to_pci_dev(dev->dev);
2288         int result, i, vecs, nr_io_queues, size;
2289
2290         nr_io_queues = num_possible_cpus();
2291         result = set_queue_count(dev, nr_io_queues);
2292         if (result <= 0)
2293                 return result;
2294         if (result < nr_io_queues)
2295                 nr_io_queues = result;
2296
2297         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2298                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2299                                 sizeof(struct nvme_command));
2300                 if (result > 0)
2301                         dev->q_depth = result;
2302                 else
2303                         nvme_release_cmb(dev);
2304         }
2305
2306         size = db_bar_size(dev, nr_io_queues);
2307         if (size > 8192) {
2308                 iounmap(dev->bar);
2309                 do {
2310                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2311                         if (dev->bar)
2312                                 break;
2313                         if (!--nr_io_queues)
2314                                 return -ENOMEM;
2315                         size = db_bar_size(dev, nr_io_queues);
2316                 } while (1);
2317                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2318                 adminq->q_db = dev->dbs;
2319         }
2320
2321         /* Deregister the admin queue's interrupt */
2322         free_irq(dev->entry[0].vector, adminq);
2323
2324         /*
2325          * If we enable msix early due to not intx, disable it again before
2326          * setting up the full range we need.
2327          */
2328         if (!pdev->irq)
2329                 pci_disable_msix(pdev);
2330
2331         for (i = 0; i < nr_io_queues; i++)
2332                 dev->entry[i].entry = i;
2333         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2334         if (vecs < 0) {
2335                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2336                 if (vecs < 0) {
2337                         vecs = 1;
2338                 } else {
2339                         for (i = 0; i < vecs; i++)
2340                                 dev->entry[i].vector = i + pdev->irq;
2341                 }
2342         }
2343
2344         /*
2345          * Should investigate if there's a performance win from allocating
2346          * more queues than interrupt vectors; it might allow the submission
2347          * path to scale better, even if the receive path is limited by the
2348          * number of interrupts.
2349          */
2350         nr_io_queues = vecs;
2351         dev->max_qid = nr_io_queues;
2352
2353         result = queue_request_irq(dev, adminq, adminq->irqname);
2354         if (result) {
2355                 adminq->cq_vector = -1;
2356                 goto free_queues;
2357         }
2358
2359         /* Free previously allocated queues that are no longer usable */
2360         nvme_free_queues(dev, nr_io_queues + 1);
2361         nvme_create_io_queues(dev);
2362
2363         return 0;
2364
2365  free_queues:
2366         nvme_free_queues(dev, 1);
2367         return result;
2368 }
2369
2370 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2371 {
2372         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2373         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2374
2375         return nsa->ns_id - nsb->ns_id;
2376 }
2377
2378 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2379 {
2380         struct nvme_ns *ns;
2381
2382         list_for_each_entry(ns, &dev->namespaces, list) {
2383                 if (ns->ns_id == nsid)
2384                         return ns;
2385                 if (ns->ns_id > nsid)
2386                         break;
2387         }
2388         return NULL;
2389 }
2390
2391 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2392 {
2393         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2394                                                         dev->online_queues < 2);
2395 }
2396
2397 static void nvme_ns_remove(struct nvme_ns *ns)
2398 {
2399         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2400
2401         if (kill)
2402                 blk_set_queue_dying(ns->queue);
2403         if (ns->disk->flags & GENHD_FL_UP) {
2404                 if (blk_get_integrity(ns->disk))
2405                         blk_integrity_unregister(ns->disk);
2406                 del_gendisk(ns->disk);
2407         }
2408         if (kill || !blk_queue_dying(ns->queue)) {
2409                 blk_mq_abort_requeue_list(ns->queue);
2410                 blk_cleanup_queue(ns->queue);
2411         }
2412         list_del_init(&ns->list);
2413         kref_put(&ns->kref, nvme_free_ns);
2414 }
2415
2416 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2417 {
2418         struct nvme_ns *ns, *next;
2419         unsigned i;
2420
2421         for (i = 1; i <= nn; i++) {
2422                 ns = nvme_find_ns(dev, i);
2423                 if (ns) {
2424                         if (revalidate_disk(ns->disk))
2425                                 nvme_ns_remove(ns);
2426                 } else
2427                         nvme_alloc_ns(dev, i);
2428         }
2429         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2430                 if (ns->ns_id > nn)
2431                         nvme_ns_remove(ns);
2432         }
2433         list_sort(NULL, &dev->namespaces, ns_cmp);
2434 }
2435
2436 static void nvme_set_irq_hints(struct nvme_dev *dev)
2437 {
2438         struct nvme_queue *nvmeq;
2439         int i;
2440
2441         for (i = 0; i < dev->online_queues; i++) {
2442                 nvmeq = dev->queues[i];
2443
2444                 if (!nvmeq->tags || !(*nvmeq->tags))
2445                         continue;
2446
2447                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2448                                         blk_mq_tags_cpumask(*nvmeq->tags));
2449         }
2450 }
2451
2452 static void nvme_dev_scan(struct work_struct *work)
2453 {
2454         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2455         struct nvme_id_ctrl *ctrl;
2456
2457         if (!dev->tagset.tags)
2458                 return;
2459         if (nvme_identify_ctrl(dev, &ctrl))
2460                 return;
2461         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2462         kfree(ctrl);
2463         nvme_set_irq_hints(dev);
2464 }
2465
2466 /*
2467  * Return: error value if an error occurred setting up the queues or calling
2468  * Identify Device.  0 if these succeeded, even if adding some of the
2469  * namespaces failed.  At the moment, these failures are silent.  TBD which
2470  * failures should be reported.
2471  */
2472 static int nvme_dev_add(struct nvme_dev *dev)
2473 {
2474         struct pci_dev *pdev = to_pci_dev(dev->dev);
2475         int res;
2476         struct nvme_id_ctrl *ctrl;
2477         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2478
2479         res = nvme_identify_ctrl(dev, &ctrl);
2480         if (res) {
2481                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2482                 return -EIO;
2483         }
2484
2485         dev->oncs = le16_to_cpup(&ctrl->oncs);
2486         dev->abort_limit = ctrl->acl + 1;
2487         dev->vwc = ctrl->vwc;
2488         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2489         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2490         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2491         if (ctrl->mdts)
2492                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2493         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2494                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2495                 unsigned int max_hw_sectors;
2496
2497                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2498                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2499                 if (dev->max_hw_sectors) {
2500                         dev->max_hw_sectors = min(max_hw_sectors,
2501                                                         dev->max_hw_sectors);
2502                 } else
2503                         dev->max_hw_sectors = max_hw_sectors;
2504         }
2505         kfree(ctrl);
2506
2507         if (!dev->tagset.tags) {
2508                 dev->tagset.ops = &nvme_mq_ops;
2509                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2510                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2511                 dev->tagset.numa_node = dev_to_node(dev->dev);
2512                 dev->tagset.queue_depth =
2513                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2514                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2515                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2516                 dev->tagset.driver_data = dev;
2517
2518                 if (blk_mq_alloc_tag_set(&dev->tagset))
2519                         return 0;
2520         }
2521         schedule_work(&dev->scan_work);
2522         return 0;
2523 }
2524
2525 static int nvme_dev_map(struct nvme_dev *dev)
2526 {
2527         u64 cap;
2528         int bars, result = -ENOMEM;
2529         struct pci_dev *pdev = to_pci_dev(dev->dev);
2530
2531         if (pci_enable_device_mem(pdev))
2532                 return result;
2533
2534         dev->entry[0].vector = pdev->irq;
2535         pci_set_master(pdev);
2536         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2537         if (!bars)
2538                 goto disable_pci;
2539
2540         if (pci_request_selected_regions(pdev, bars, "nvme"))
2541                 goto disable_pci;
2542
2543         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2544             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2545                 goto disable;
2546
2547         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2548         if (!dev->bar)
2549                 goto disable;
2550
2551         if (readl(&dev->bar->csts) == -1) {
2552                 result = -ENODEV;
2553                 goto unmap;
2554         }
2555
2556         /*
2557          * Some devices don't advertse INTx interrupts, pre-enable a single
2558          * MSIX vec for setup. We'll adjust this later.
2559          */
2560         if (!pdev->irq) {
2561                 result = pci_enable_msix(pdev, dev->entry, 1);
2562                 if (result < 0)
2563                         goto unmap;
2564         }
2565
2566         cap = readq(&dev->bar->cap);
2567         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2568         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2569         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2570         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2571                 dev->cmb = nvme_map_cmb(dev);
2572
2573         return 0;
2574
2575  unmap:
2576         iounmap(dev->bar);
2577         dev->bar = NULL;
2578  disable:
2579         pci_release_regions(pdev);
2580  disable_pci:
2581         pci_disable_device(pdev);
2582         return result;
2583 }
2584
2585 static void nvme_dev_unmap(struct nvme_dev *dev)
2586 {
2587         struct pci_dev *pdev = to_pci_dev(dev->dev);
2588
2589         if (pdev->msi_enabled)
2590                 pci_disable_msi(pdev);
2591         else if (pdev->msix_enabled)
2592                 pci_disable_msix(pdev);
2593
2594         if (dev->bar) {
2595                 iounmap(dev->bar);
2596                 dev->bar = NULL;
2597                 pci_release_regions(pdev);
2598         }
2599
2600         if (pci_is_enabled(pdev))
2601                 pci_disable_device(pdev);
2602 }
2603
2604 struct nvme_delq_ctx {
2605         struct task_struct *waiter;
2606         struct kthread_worker *worker;
2607         atomic_t refcount;
2608 };
2609
2610 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2611 {
2612         dq->waiter = current;
2613         mb();
2614
2615         for (;;) {
2616                 set_current_state(TASK_KILLABLE);
2617                 if (!atomic_read(&dq->refcount))
2618                         break;
2619                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2620                                         fatal_signal_pending(current)) {
2621                         /*
2622                          * Disable the controller first since we can't trust it
2623                          * at this point, but leave the admin queue enabled
2624                          * until all queue deletion requests are flushed.
2625                          * FIXME: This may take a while if there are more h/w
2626                          * queues than admin tags.
2627                          */
2628                         set_current_state(TASK_RUNNING);
2629                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2630                         nvme_clear_queue(dev->queues[0]);
2631                         flush_kthread_worker(dq->worker);
2632                         nvme_disable_queue(dev, 0);
2633                         return;
2634                 }
2635         }
2636         set_current_state(TASK_RUNNING);
2637 }
2638
2639 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2640 {
2641         atomic_dec(&dq->refcount);
2642         if (dq->waiter)
2643                 wake_up_process(dq->waiter);
2644 }
2645
2646 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2647 {
2648         atomic_inc(&dq->refcount);
2649         return dq;
2650 }
2651
2652 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2653 {
2654         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2655         nvme_put_dq(dq);
2656 }
2657
2658 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2659                                                 kthread_work_func_t fn)
2660 {
2661         struct nvme_command c;
2662
2663         memset(&c, 0, sizeof(c));
2664         c.delete_queue.opcode = opcode;
2665         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2666
2667         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2668         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2669                                                                 ADMIN_TIMEOUT);
2670 }
2671
2672 static void nvme_del_cq_work_handler(struct kthread_work *work)
2673 {
2674         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2675                                                         cmdinfo.work);
2676         nvme_del_queue_end(nvmeq);
2677 }
2678
2679 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2680 {
2681         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2682                                                 nvme_del_cq_work_handler);
2683 }
2684
2685 static void nvme_del_sq_work_handler(struct kthread_work *work)
2686 {
2687         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2688                                                         cmdinfo.work);
2689         int status = nvmeq->cmdinfo.status;
2690
2691         if (!status)
2692                 status = nvme_delete_cq(nvmeq);
2693         if (status)
2694                 nvme_del_queue_end(nvmeq);
2695 }
2696
2697 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2698 {
2699         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2700                                                 nvme_del_sq_work_handler);
2701 }
2702
2703 static void nvme_del_queue_start(struct kthread_work *work)
2704 {
2705         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2706                                                         cmdinfo.work);
2707         if (nvme_delete_sq(nvmeq))
2708                 nvme_del_queue_end(nvmeq);
2709 }
2710
2711 static void nvme_disable_io_queues(struct nvme_dev *dev)
2712 {
2713         int i;
2714         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2715         struct nvme_delq_ctx dq;
2716         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2717                                         &worker, "nvme%d", dev->instance);
2718
2719         if (IS_ERR(kworker_task)) {
2720                 dev_err(dev->dev,
2721                         "Failed to create queue del task\n");
2722                 for (i = dev->queue_count - 1; i > 0; i--)
2723                         nvme_disable_queue(dev, i);
2724                 return;
2725         }
2726
2727         dq.waiter = NULL;
2728         atomic_set(&dq.refcount, 0);
2729         dq.worker = &worker;
2730         for (i = dev->queue_count - 1; i > 0; i--) {
2731                 struct nvme_queue *nvmeq = dev->queues[i];
2732
2733                 if (nvme_suspend_queue(nvmeq))
2734                         continue;
2735                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2736                 nvmeq->cmdinfo.worker = dq.worker;
2737                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2738                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2739         }
2740         nvme_wait_dq(&dq, dev);
2741         kthread_stop(kworker_task);
2742 }
2743
2744 /*
2745 * Remove the node from the device list and check
2746 * for whether or not we need to stop the nvme_thread.
2747 */
2748 static void nvme_dev_list_remove(struct nvme_dev *dev)
2749 {
2750         struct task_struct *tmp = NULL;
2751
2752         spin_lock(&dev_list_lock);
2753         list_del_init(&dev->node);
2754         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2755                 tmp = nvme_thread;
2756                 nvme_thread = NULL;
2757         }
2758         spin_unlock(&dev_list_lock);
2759
2760         if (tmp)
2761                 kthread_stop(tmp);
2762 }
2763
2764 static void nvme_freeze_queues(struct nvme_dev *dev)
2765 {
2766         struct nvme_ns *ns;
2767
2768         list_for_each_entry(ns, &dev->namespaces, list) {
2769                 blk_mq_freeze_queue_start(ns->queue);
2770
2771                 spin_lock_irq(ns->queue->queue_lock);
2772                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2773                 spin_unlock_irq(ns->queue->queue_lock);
2774
2775                 blk_mq_cancel_requeue_work(ns->queue);
2776                 blk_mq_stop_hw_queues(ns->queue);
2777         }
2778 }
2779
2780 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2781 {
2782         struct nvme_ns *ns;
2783
2784         list_for_each_entry(ns, &dev->namespaces, list) {
2785                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2786                 blk_mq_unfreeze_queue(ns->queue);
2787                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2788                 blk_mq_kick_requeue_list(ns->queue);
2789         }
2790 }
2791
2792 static void nvme_dev_shutdown(struct nvme_dev *dev)
2793 {
2794         int i;
2795         u32 csts = -1;
2796
2797         nvme_dev_list_remove(dev);
2798
2799         if (dev->bar) {
2800                 nvme_freeze_queues(dev);
2801                 csts = readl(&dev->bar->csts);
2802         }
2803         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2804                 for (i = dev->queue_count - 1; i >= 0; i--) {
2805                         struct nvme_queue *nvmeq = dev->queues[i];
2806                         nvme_suspend_queue(nvmeq);
2807                 }
2808         } else {
2809                 nvme_disable_io_queues(dev);
2810                 nvme_shutdown_ctrl(dev);
2811                 nvme_disable_queue(dev, 0);
2812         }
2813         nvme_dev_unmap(dev);
2814
2815         for (i = dev->queue_count - 1; i >= 0; i--)
2816                 nvme_clear_queue(dev->queues[i]);
2817 }
2818
2819 static void nvme_dev_remove(struct nvme_dev *dev)
2820 {
2821         struct nvme_ns *ns, *next;
2822
2823         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2824                 nvme_ns_remove(ns);
2825 }
2826
2827 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2828 {
2829         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2830                                                 PAGE_SIZE, PAGE_SIZE, 0);
2831         if (!dev->prp_page_pool)
2832                 return -ENOMEM;
2833
2834         /* Optimisation for I/Os between 4k and 128k */
2835         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2836                                                 256, 256, 0);
2837         if (!dev->prp_small_pool) {
2838                 dma_pool_destroy(dev->prp_page_pool);
2839                 return -ENOMEM;
2840         }
2841         return 0;
2842 }
2843
2844 static void nvme_release_prp_pools(struct nvme_dev *dev)
2845 {
2846         dma_pool_destroy(dev->prp_page_pool);
2847         dma_pool_destroy(dev->prp_small_pool);
2848 }
2849
2850 static DEFINE_IDA(nvme_instance_ida);
2851
2852 static int nvme_set_instance(struct nvme_dev *dev)
2853 {
2854         int instance, error;
2855
2856         do {
2857                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2858                         return -ENODEV;
2859
2860                 spin_lock(&dev_list_lock);
2861                 error = ida_get_new(&nvme_instance_ida, &instance);
2862                 spin_unlock(&dev_list_lock);
2863         } while (error == -EAGAIN);
2864
2865         if (error)
2866                 return -ENODEV;
2867
2868         dev->instance = instance;
2869         return 0;
2870 }
2871
2872 static void nvme_release_instance(struct nvme_dev *dev)
2873 {
2874         spin_lock(&dev_list_lock);
2875         ida_remove(&nvme_instance_ida, dev->instance);
2876         spin_unlock(&dev_list_lock);
2877 }
2878
2879 static void nvme_free_dev(struct kref *kref)
2880 {
2881         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2882
2883         put_device(dev->dev);
2884         put_device(dev->device);
2885         nvme_release_instance(dev);
2886         if (dev->tagset.tags)
2887                 blk_mq_free_tag_set(&dev->tagset);
2888         if (dev->admin_q)
2889                 blk_put_queue(dev->admin_q);
2890         kfree(dev->queues);
2891         kfree(dev->entry);
2892         kfree(dev);
2893 }
2894
2895 static int nvme_dev_open(struct inode *inode, struct file *f)
2896 {
2897         struct nvme_dev *dev;
2898         int instance = iminor(inode);
2899         int ret = -ENODEV;
2900
2901         spin_lock(&dev_list_lock);
2902         list_for_each_entry(dev, &dev_list, node) {
2903                 if (dev->instance == instance) {
2904                         if (!dev->admin_q) {
2905                                 ret = -EWOULDBLOCK;
2906                                 break;
2907                         }
2908                         if (!kref_get_unless_zero(&dev->kref))
2909                                 break;
2910                         f->private_data = dev;
2911                         ret = 0;
2912                         break;
2913                 }
2914         }
2915         spin_unlock(&dev_list_lock);
2916
2917         return ret;
2918 }
2919
2920 static int nvme_dev_release(struct inode *inode, struct file *f)
2921 {
2922         struct nvme_dev *dev = f->private_data;
2923         kref_put(&dev->kref, nvme_free_dev);
2924         return 0;
2925 }
2926
2927 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2928 {
2929         struct nvme_dev *dev = f->private_data;
2930         struct nvme_ns *ns;
2931
2932         switch (cmd) {
2933         case NVME_IOCTL_ADMIN_CMD:
2934                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2935         case NVME_IOCTL_IO_CMD:
2936                 if (list_empty(&dev->namespaces))
2937                         return -ENOTTY;
2938                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2939                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2940         case NVME_IOCTL_RESET:
2941                 dev_warn(dev->dev, "resetting controller\n");
2942                 return nvme_reset(dev);
2943         case NVME_IOCTL_SUBSYS_RESET:
2944                 return nvme_subsys_reset(dev);
2945         default:
2946                 return -ENOTTY;
2947         }
2948 }
2949
2950 static const struct file_operations nvme_dev_fops = {
2951         .owner          = THIS_MODULE,
2952         .open           = nvme_dev_open,
2953         .release        = nvme_dev_release,
2954         .unlocked_ioctl = nvme_dev_ioctl,
2955         .compat_ioctl   = nvme_dev_ioctl,
2956 };
2957
2958 static int nvme_dev_start(struct nvme_dev *dev)
2959 {
2960         int result;
2961         bool start_thread = false;
2962
2963         result = nvme_dev_map(dev);
2964         if (result)
2965                 return result;
2966
2967         result = nvme_configure_admin_queue(dev);
2968         if (result)
2969                 goto unmap;
2970
2971         spin_lock(&dev_list_lock);
2972         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2973                 start_thread = true;
2974                 nvme_thread = NULL;
2975         }
2976         list_add(&dev->node, &dev_list);
2977         spin_unlock(&dev_list_lock);
2978
2979         if (start_thread) {
2980                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2981                 wake_up_all(&nvme_kthread_wait);
2982         } else
2983                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2984
2985         if (IS_ERR_OR_NULL(nvme_thread)) {
2986                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2987                 goto disable;
2988         }
2989
2990         nvme_init_queue(dev->queues[0], 0);
2991         result = nvme_alloc_admin_tags(dev);
2992         if (result)
2993                 goto disable;
2994
2995         result = nvme_setup_io_queues(dev);
2996         if (result)
2997                 goto free_tags;
2998
2999         dev->event_limit = 1;
3000         return result;
3001
3002  free_tags:
3003         nvme_dev_remove_admin(dev);
3004         blk_put_queue(dev->admin_q);
3005         dev->admin_q = NULL;
3006         dev->queues[0]->tags = NULL;
3007  disable:
3008         nvme_disable_queue(dev, 0);
3009         nvme_dev_list_remove(dev);
3010  unmap:
3011         nvme_dev_unmap(dev);
3012         return result;
3013 }
3014
3015 static int nvme_remove_dead_ctrl(void *arg)
3016 {
3017         struct nvme_dev *dev = (struct nvme_dev *)arg;
3018         struct pci_dev *pdev = to_pci_dev(dev->dev);
3019
3020         if (pci_get_drvdata(pdev))
3021                 pci_stop_and_remove_bus_device_locked(pdev);
3022         kref_put(&dev->kref, nvme_free_dev);
3023         return 0;
3024 }
3025
3026 static int nvme_dev_resume(struct nvme_dev *dev)
3027 {
3028         int ret;
3029
3030         ret = nvme_dev_start(dev);
3031         if (ret)
3032                 return ret;
3033         if (dev->online_queues < 2) {
3034                 dev_warn(dev->dev, "IO queues not created\n");
3035                 nvme_free_queues(dev, 1);
3036                 nvme_dev_remove(dev);
3037         } else {
3038                 nvme_unfreeze_queues(dev);
3039                 nvme_dev_add(dev);
3040         }
3041         return 0;
3042 }
3043
3044 static void nvme_dead_ctrl(struct nvme_dev *dev)
3045 {
3046         dev_warn(dev->dev, "Device failed to resume\n");
3047         kref_get(&dev->kref);
3048         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3049                                                 dev->instance))) {
3050                 dev_err(dev->dev,
3051                         "Failed to start controller remove task\n");
3052                 kref_put(&dev->kref, nvme_free_dev);
3053         }
3054 }
3055
3056 static void nvme_dev_reset(struct nvme_dev *dev)
3057 {
3058         bool in_probe = work_busy(&dev->probe_work);
3059
3060         nvme_dev_shutdown(dev);
3061
3062         /* Synchronize with device probe so that work will see failure status
3063          * and exit gracefully without trying to schedule another reset */
3064         flush_work(&dev->probe_work);
3065
3066         /* Fail this device if reset occured during probe to avoid
3067          * infinite initialization loops. */
3068         if (in_probe) {
3069                 nvme_dead_ctrl(dev);
3070                 return;
3071         }
3072         /* Schedule device resume asynchronously so the reset work is available
3073          * to cleanup errors that may occur during reinitialization */
3074         schedule_work(&dev->probe_work);
3075 }
3076
3077 static void nvme_reset_failed_dev(struct work_struct *ws)
3078 {
3079         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3080         nvme_dev_reset(dev);
3081 }
3082
3083 static int nvme_reset(struct nvme_dev *dev)
3084 {
3085         int ret = -EBUSY;
3086
3087         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3088                 return -ENODEV;
3089
3090         spin_lock(&dev_list_lock);
3091         if (!work_pending(&dev->reset_work)) {
3092                 list_del_init(&dev->node);
3093                 queue_work(nvme_workq, &dev->reset_work);
3094                 ret = 0;
3095         }
3096         spin_unlock(&dev_list_lock);
3097
3098         if (!ret) {
3099                 flush_work(&dev->reset_work);
3100                 flush_work(&dev->probe_work);
3101                 return 0;
3102         }
3103
3104         return ret;
3105 }
3106
3107 static ssize_t nvme_sysfs_reset(struct device *dev,
3108                                 struct device_attribute *attr, const char *buf,
3109                                 size_t count)
3110 {
3111         struct nvme_dev *ndev = dev_get_drvdata(dev);
3112         int ret;
3113
3114         ret = nvme_reset(ndev);
3115         if (ret < 0)
3116                 return ret;
3117
3118         return count;
3119 }
3120 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3121
3122 static void nvme_async_probe(struct work_struct *work);
3123 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3124 {
3125         int node, result = -ENOMEM;
3126         struct nvme_dev *dev;
3127
3128         node = dev_to_node(&pdev->dev);
3129         if (node == NUMA_NO_NODE)
3130                 set_dev_node(&pdev->dev, 0);
3131
3132         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3133         if (!dev)
3134                 return -ENOMEM;
3135         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3136                                                         GFP_KERNEL, node);
3137         if (!dev->entry)
3138                 goto free;
3139         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3140                                                         GFP_KERNEL, node);
3141         if (!dev->queues)
3142                 goto free;
3143
3144         INIT_LIST_HEAD(&dev->namespaces);
3145         INIT_WORK(&dev->reset_work, nvme_reset_failed_dev);
3146         dev->dev = get_device(&pdev->dev);
3147         pci_set_drvdata(pdev, dev);
3148         result = nvme_set_instance(dev);
3149         if (result)
3150                 goto put_pci;
3151
3152         result = nvme_setup_prp_pools(dev);
3153         if (result)
3154                 goto release;
3155
3156         kref_init(&dev->kref);
3157         dev->device = device_create(nvme_class, &pdev->dev,
3158                                 MKDEV(nvme_char_major, dev->instance),
3159                                 dev, "nvme%d", dev->instance);
3160         if (IS_ERR(dev->device)) {
3161                 result = PTR_ERR(dev->device);
3162                 goto release_pools;
3163         }
3164         get_device(dev->device);
3165         dev_set_drvdata(dev->device, dev);
3166
3167         result = device_create_file(dev->device, &dev_attr_reset_controller);
3168         if (result)
3169                 goto put_dev;
3170
3171         INIT_LIST_HEAD(&dev->node);
3172         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3173         INIT_WORK(&dev->probe_work, nvme_async_probe);
3174         schedule_work(&dev->probe_work);
3175         return 0;
3176
3177  put_dev:
3178         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3179         put_device(dev->device);
3180  release_pools:
3181         nvme_release_prp_pools(dev);
3182  release:
3183         nvme_release_instance(dev);
3184  put_pci:
3185         put_device(dev->dev);
3186  free:
3187         kfree(dev->queues);
3188         kfree(dev->entry);
3189         kfree(dev);
3190         return result;
3191 }
3192
3193 static void nvme_async_probe(struct work_struct *work)
3194 {
3195         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3196
3197         if (nvme_dev_resume(dev) && !work_busy(&dev->reset_work))
3198                 nvme_dead_ctrl(dev);
3199 }
3200
3201 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3202 {
3203         struct nvme_dev *dev = pci_get_drvdata(pdev);
3204
3205         if (prepare)
3206                 nvme_dev_shutdown(dev);
3207         else
3208                 schedule_work(&dev->probe_work);
3209 }
3210
3211 static void nvme_shutdown(struct pci_dev *pdev)
3212 {
3213         struct nvme_dev *dev = pci_get_drvdata(pdev);
3214         nvme_dev_shutdown(dev);
3215 }
3216
3217 static void nvme_remove(struct pci_dev *pdev)
3218 {
3219         struct nvme_dev *dev = pci_get_drvdata(pdev);
3220
3221         spin_lock(&dev_list_lock);
3222         list_del_init(&dev->node);
3223         spin_unlock(&dev_list_lock);
3224
3225         pci_set_drvdata(pdev, NULL);
3226         flush_work(&dev->probe_work);
3227         flush_work(&dev->reset_work);
3228         flush_work(&dev->scan_work);
3229         device_remove_file(dev->device, &dev_attr_reset_controller);
3230         nvme_dev_remove(dev);
3231         nvme_dev_shutdown(dev);
3232         nvme_dev_remove_admin(dev);
3233         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3234         nvme_free_queues(dev, 0);
3235         nvme_release_cmb(dev);
3236         nvme_release_prp_pools(dev);
3237         kref_put(&dev->kref, nvme_free_dev);
3238 }
3239
3240 /* These functions are yet to be implemented */
3241 #define nvme_error_detected NULL
3242 #define nvme_dump_registers NULL
3243 #define nvme_link_reset NULL
3244 #define nvme_slot_reset NULL
3245 #define nvme_error_resume NULL
3246
3247 #ifdef CONFIG_PM_SLEEP
3248 static int nvme_suspend(struct device *dev)
3249 {
3250         struct pci_dev *pdev = to_pci_dev(dev);
3251         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3252
3253         nvme_dev_shutdown(ndev);
3254         return 0;
3255 }
3256
3257 static int nvme_resume(struct device *dev)
3258 {
3259         struct pci_dev *pdev = to_pci_dev(dev);
3260         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3261
3262         schedule_work(&ndev->probe_work);
3263         return 0;
3264 }
3265 #endif
3266
3267 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3268
3269 static const struct pci_error_handlers nvme_err_handler = {
3270         .error_detected = nvme_error_detected,
3271         .mmio_enabled   = nvme_dump_registers,
3272         .link_reset     = nvme_link_reset,
3273         .slot_reset     = nvme_slot_reset,
3274         .resume         = nvme_error_resume,
3275         .reset_notify   = nvme_reset_notify,
3276 };
3277
3278 /* Move to pci_ids.h later */
3279 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3280
3281 static const struct pci_device_id nvme_id_table[] = {
3282         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3283         { 0, }
3284 };
3285 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3286
3287 static struct pci_driver nvme_driver = {
3288         .name           = "nvme",
3289         .id_table       = nvme_id_table,
3290         .probe          = nvme_probe,
3291         .remove         = nvme_remove,
3292         .shutdown       = nvme_shutdown,
3293         .driver         = {
3294                 .pm     = &nvme_dev_pm_ops,
3295         },
3296         .err_handler    = &nvme_err_handler,
3297 };
3298
3299 static int __init nvme_init(void)
3300 {
3301         int result;
3302
3303         init_waitqueue_head(&nvme_kthread_wait);
3304
3305         nvme_workq = create_singlethread_workqueue("nvme");
3306         if (!nvme_workq)
3307                 return -ENOMEM;
3308
3309         result = register_blkdev(nvme_major, "nvme");
3310         if (result < 0)
3311                 goto kill_workq;
3312         else if (result > 0)
3313                 nvme_major = result;
3314
3315         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3316                                                         &nvme_dev_fops);
3317         if (result < 0)
3318                 goto unregister_blkdev;
3319         else if (result > 0)
3320                 nvme_char_major = result;
3321
3322         nvme_class = class_create(THIS_MODULE, "nvme");
3323         if (IS_ERR(nvme_class)) {
3324                 result = PTR_ERR(nvme_class);
3325                 goto unregister_chrdev;
3326         }
3327
3328         result = pci_register_driver(&nvme_driver);
3329         if (result)
3330                 goto destroy_class;
3331         return 0;
3332
3333  destroy_class:
3334         class_destroy(nvme_class);
3335  unregister_chrdev:
3336         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3337  unregister_blkdev:
3338         unregister_blkdev(nvme_major, "nvme");
3339  kill_workq:
3340         destroy_workqueue(nvme_workq);
3341         return result;
3342 }
3343
3344 static void __exit nvme_exit(void)
3345 {
3346         pci_unregister_driver(&nvme_driver);
3347         unregister_blkdev(nvme_major, "nvme");
3348         destroy_workqueue(nvme_workq);
3349         class_destroy(nvme_class);
3350         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3351         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3352         _nvme_check_size();
3353 }
3354
3355 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3356 MODULE_LICENSE("GPL");
3357 MODULE_VERSION("1.0");
3358 module_init(nvme_init);
3359 module_exit(nvme_exit);