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Merge branch 'misc' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
[karo-tx-linux.git] / drivers / block / nvme-core.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17  */
18
19 #include <linux/nvme.h>
20 #include <linux/bio.h>
21 #include <linux/bitops.h>
22 #include <linux/blkdev.h>
23 #include <linux/cpu.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/fs.h>
27 #include <linux/genhd.h>
28 #include <linux/hdreg.h>
29 #include <linux/idr.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 #include <linux/kdev_t.h>
34 #include <linux/kthread.h>
35 #include <linux/kernel.h>
36 #include <linux/mm.h>
37 #include <linux/module.h>
38 #include <linux/moduleparam.h>
39 #include <linux/pci.h>
40 #include <linux/percpu.h>
41 #include <linux/poison.h>
42 #include <linux/ptrace.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/types.h>
46 #include <scsi/sg.h>
47 #include <asm-generic/io-64-nonatomic-lo-hi.h>
48
49 #define NVME_Q_DEPTH 1024
50 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
51 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
52 #define ADMIN_TIMEOUT   (60 * HZ)
53 #define IOD_TIMEOUT     (4 * NVME_IO_TIMEOUT)
54
55 unsigned char io_timeout = 30;
56 module_param(io_timeout, byte, 0644);
57 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
58
59 static int nvme_major;
60 module_param(nvme_major, int, 0);
61
62 static int use_threaded_interrupts;
63 module_param(use_threaded_interrupts, int, 0);
64
65 static DEFINE_SPINLOCK(dev_list_lock);
66 static LIST_HEAD(dev_list);
67 static struct task_struct *nvme_thread;
68 static struct workqueue_struct *nvme_workq;
69 static wait_queue_head_t nvme_kthread_wait;
70
71 static void nvme_reset_failed_dev(struct work_struct *ws);
72
73 struct async_cmd_info {
74         struct kthread_work work;
75         struct kthread_worker *worker;
76         u32 result;
77         int status;
78         void *ctx;
79 };
80
81 /*
82  * An NVM Express queue.  Each device has at least two (one for admin
83  * commands and one for I/O commands).
84  */
85 struct nvme_queue {
86         struct rcu_head r_head;
87         struct device *q_dmadev;
88         struct nvme_dev *dev;
89         char irqname[24];       /* nvme4294967295-65535\0 */
90         spinlock_t q_lock;
91         struct nvme_command *sq_cmds;
92         volatile struct nvme_completion *cqes;
93         dma_addr_t sq_dma_addr;
94         dma_addr_t cq_dma_addr;
95         wait_queue_head_t sq_full;
96         wait_queue_t sq_cong_wait;
97         struct bio_list sq_cong;
98         struct list_head iod_bio;
99         u32 __iomem *q_db;
100         u16 q_depth;
101         u16 cq_vector;
102         u16 sq_head;
103         u16 sq_tail;
104         u16 cq_head;
105         u16 qid;
106         u8 cq_phase;
107         u8 cqe_seen;
108         u8 q_suspended;
109         cpumask_var_t cpu_mask;
110         struct async_cmd_info cmdinfo;
111         unsigned long cmdid_data[];
112 };
113
114 /*
115  * Check we didin't inadvertently grow the command struct
116  */
117 static inline void _nvme_check_size(void)
118 {
119         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
120         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
121         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
122         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
123         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
124         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
125         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
126         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
127         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
128         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
129         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
130         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
131 }
132
133 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
134                                                 struct nvme_completion *);
135
136 struct nvme_cmd_info {
137         nvme_completion_fn fn;
138         void *ctx;
139         unsigned long timeout;
140         int aborted;
141 };
142
143 static struct nvme_cmd_info *nvme_cmd_info(struct nvme_queue *nvmeq)
144 {
145         return (void *)&nvmeq->cmdid_data[BITS_TO_LONGS(nvmeq->q_depth)];
146 }
147
148 static unsigned nvme_queue_extra(int depth)
149 {
150         return DIV_ROUND_UP(depth, 8) + (depth * sizeof(struct nvme_cmd_info));
151 }
152
153 /**
154  * alloc_cmdid() - Allocate a Command ID
155  * @nvmeq: The queue that will be used for this command
156  * @ctx: A pointer that will be passed to the handler
157  * @handler: The function to call on completion
158  *
159  * Allocate a Command ID for a queue.  The data passed in will
160  * be passed to the completion handler.  This is implemented by using
161  * the bottom two bits of the ctx pointer to store the handler ID.
162  * Passing in a pointer that's not 4-byte aligned will cause a BUG.
163  * We can change this if it becomes a problem.
164  *
165  * May be called with local interrupts disabled and the q_lock held,
166  * or with interrupts enabled and no locks held.
167  */
168 static int alloc_cmdid(struct nvme_queue *nvmeq, void *ctx,
169                                 nvme_completion_fn handler, unsigned timeout)
170 {
171         int depth = nvmeq->q_depth - 1;
172         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
173         int cmdid;
174
175         do {
176                 cmdid = find_first_zero_bit(nvmeq->cmdid_data, depth);
177                 if (cmdid >= depth)
178                         return -EBUSY;
179         } while (test_and_set_bit(cmdid, nvmeq->cmdid_data));
180
181         info[cmdid].fn = handler;
182         info[cmdid].ctx = ctx;
183         info[cmdid].timeout = jiffies + timeout;
184         info[cmdid].aborted = 0;
185         return cmdid;
186 }
187
188 static int alloc_cmdid_killable(struct nvme_queue *nvmeq, void *ctx,
189                                 nvme_completion_fn handler, unsigned timeout)
190 {
191         int cmdid;
192         wait_event_killable(nvmeq->sq_full,
193                 (cmdid = alloc_cmdid(nvmeq, ctx, handler, timeout)) >= 0);
194         return (cmdid < 0) ? -EINTR : cmdid;
195 }
196
197 /* Special values must be less than 0x1000 */
198 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
199 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
200 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
201 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
202 #define CMD_CTX_FLUSH           (0x318 + CMD_CTX_BASE)
203 #define CMD_CTX_ABORT           (0x31C + CMD_CTX_BASE)
204
205 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
206                                                 struct nvme_completion *cqe)
207 {
208         if (ctx == CMD_CTX_CANCELLED)
209                 return;
210         if (ctx == CMD_CTX_FLUSH)
211                 return;
212         if (ctx == CMD_CTX_ABORT) {
213                 ++nvmeq->dev->abort_limit;
214                 return;
215         }
216         if (ctx == CMD_CTX_COMPLETED) {
217                 dev_warn(nvmeq->q_dmadev,
218                                 "completed id %d twice on queue %d\n",
219                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
220                 return;
221         }
222         if (ctx == CMD_CTX_INVALID) {
223                 dev_warn(nvmeq->q_dmadev,
224                                 "invalid id %d completed on queue %d\n",
225                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
226                 return;
227         }
228
229         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
230 }
231
232 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
233                                                 struct nvme_completion *cqe)
234 {
235         struct async_cmd_info *cmdinfo = ctx;
236         cmdinfo->result = le32_to_cpup(&cqe->result);
237         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
238         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
239 }
240
241 /*
242  * Called with local interrupts disabled and the q_lock held.  May not sleep.
243  */
244 static void *free_cmdid(struct nvme_queue *nvmeq, int cmdid,
245                                                 nvme_completion_fn *fn)
246 {
247         void *ctx;
248         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
249
250         if (cmdid >= nvmeq->q_depth) {
251                 *fn = special_completion;
252                 return CMD_CTX_INVALID;
253         }
254         if (fn)
255                 *fn = info[cmdid].fn;
256         ctx = info[cmdid].ctx;
257         info[cmdid].fn = special_completion;
258         info[cmdid].ctx = CMD_CTX_COMPLETED;
259         clear_bit(cmdid, nvmeq->cmdid_data);
260         wake_up(&nvmeq->sq_full);
261         return ctx;
262 }
263
264 static void *cancel_cmdid(struct nvme_queue *nvmeq, int cmdid,
265                                                 nvme_completion_fn *fn)
266 {
267         void *ctx;
268         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
269         if (fn)
270                 *fn = info[cmdid].fn;
271         ctx = info[cmdid].ctx;
272         info[cmdid].fn = special_completion;
273         info[cmdid].ctx = CMD_CTX_CANCELLED;
274         return ctx;
275 }
276
277 static struct nvme_queue *raw_nvmeq(struct nvme_dev *dev, int qid)
278 {
279         return rcu_dereference_raw(dev->queues[qid]);
280 }
281
282 static struct nvme_queue *get_nvmeq(struct nvme_dev *dev) __acquires(RCU)
283 {
284         unsigned queue_id = get_cpu_var(*dev->io_queue);
285         rcu_read_lock();
286         return rcu_dereference(dev->queues[queue_id]);
287 }
288
289 static void put_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
290 {
291         rcu_read_unlock();
292         put_cpu_var(nvmeq->dev->io_queue);
293 }
294
295 static struct nvme_queue *lock_nvmeq(struct nvme_dev *dev, int q_idx)
296                                                         __acquires(RCU)
297 {
298         rcu_read_lock();
299         return rcu_dereference(dev->queues[q_idx]);
300 }
301
302 static void unlock_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
303 {
304         rcu_read_unlock();
305 }
306
307 /**
308  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
309  * @nvmeq: The queue to use
310  * @cmd: The command to send
311  *
312  * Safe to use from interrupt context
313  */
314 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
315 {
316         unsigned long flags;
317         u16 tail;
318         spin_lock_irqsave(&nvmeq->q_lock, flags);
319         if (nvmeq->q_suspended) {
320                 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
321                 return -EBUSY;
322         }
323         tail = nvmeq->sq_tail;
324         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
325         if (++tail == nvmeq->q_depth)
326                 tail = 0;
327         writel(tail, nvmeq->q_db);
328         nvmeq->sq_tail = tail;
329         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
330
331         return 0;
332 }
333
334 static __le64 **iod_list(struct nvme_iod *iod)
335 {
336         return ((void *)iod) + iod->offset;
337 }
338
339 /*
340  * Will slightly overestimate the number of pages needed.  This is OK
341  * as it only leads to a small amount of wasted memory for the lifetime of
342  * the I/O.
343  */
344 static int nvme_npages(unsigned size)
345 {
346         unsigned nprps = DIV_ROUND_UP(size + PAGE_SIZE, PAGE_SIZE);
347         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
348 }
349
350 static struct nvme_iod *
351 nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp)
352 {
353         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
354                                 sizeof(__le64 *) * nvme_npages(nbytes) +
355                                 sizeof(struct scatterlist) * nseg, gfp);
356
357         if (iod) {
358                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
359                 iod->npages = -1;
360                 iod->length = nbytes;
361                 iod->nents = 0;
362                 iod->first_dma = 0ULL;
363                 iod->start_time = jiffies;
364         }
365
366         return iod;
367 }
368
369 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
370 {
371         const int last_prp = PAGE_SIZE / 8 - 1;
372         int i;
373         __le64 **list = iod_list(iod);
374         dma_addr_t prp_dma = iod->first_dma;
375
376         if (iod->npages == 0)
377                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
378         for (i = 0; i < iod->npages; i++) {
379                 __le64 *prp_list = list[i];
380                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
381                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
382                 prp_dma = next_prp_dma;
383         }
384         kfree(iod);
385 }
386
387 static void nvme_start_io_acct(struct bio *bio)
388 {
389         struct gendisk *disk = bio->bi_bdev->bd_disk;
390         const int rw = bio_data_dir(bio);
391         int cpu = part_stat_lock();
392         part_round_stats(cpu, &disk->part0);
393         part_stat_inc(cpu, &disk->part0, ios[rw]);
394         part_stat_add(cpu, &disk->part0, sectors[rw], bio_sectors(bio));
395         part_inc_in_flight(&disk->part0, rw);
396         part_stat_unlock();
397 }
398
399 static void nvme_end_io_acct(struct bio *bio, unsigned long start_time)
400 {
401         struct gendisk *disk = bio->bi_bdev->bd_disk;
402         const int rw = bio_data_dir(bio);
403         unsigned long duration = jiffies - start_time;
404         int cpu = part_stat_lock();
405         part_stat_add(cpu, &disk->part0, ticks[rw], duration);
406         part_round_stats(cpu, &disk->part0);
407         part_dec_in_flight(&disk->part0, rw);
408         part_stat_unlock();
409 }
410
411 static void bio_completion(struct nvme_queue *nvmeq, void *ctx,
412                                                 struct nvme_completion *cqe)
413 {
414         struct nvme_iod *iod = ctx;
415         struct bio *bio = iod->private;
416         u16 status = le16_to_cpup(&cqe->status) >> 1;
417
418         if (unlikely(status)) {
419                 if (!(status & NVME_SC_DNR ||
420                                 bio->bi_rw & REQ_FAILFAST_MASK) &&
421                                 (jiffies - iod->start_time) < IOD_TIMEOUT) {
422                         if (!waitqueue_active(&nvmeq->sq_full))
423                                 add_wait_queue(&nvmeq->sq_full,
424                                                         &nvmeq->sq_cong_wait);
425                         list_add_tail(&iod->node, &nvmeq->iod_bio);
426                         wake_up(&nvmeq->sq_full);
427                         return;
428                 }
429         }
430         if (iod->nents) {
431                 dma_unmap_sg(nvmeq->q_dmadev, iod->sg, iod->nents,
432                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
433                 nvme_end_io_acct(bio, iod->start_time);
434         }
435         nvme_free_iod(nvmeq->dev, iod);
436         if (status)
437                 bio_endio(bio, -EIO);
438         else
439                 bio_endio(bio, 0);
440 }
441
442 /* length is in bytes.  gfp flags indicates whether we may sleep. */
443 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
444                                                                 gfp_t gfp)
445 {
446         struct dma_pool *pool;
447         int length = total_len;
448         struct scatterlist *sg = iod->sg;
449         int dma_len = sg_dma_len(sg);
450         u64 dma_addr = sg_dma_address(sg);
451         int offset = offset_in_page(dma_addr);
452         __le64 *prp_list;
453         __le64 **list = iod_list(iod);
454         dma_addr_t prp_dma;
455         int nprps, i;
456
457         length -= (PAGE_SIZE - offset);
458         if (length <= 0)
459                 return total_len;
460
461         dma_len -= (PAGE_SIZE - offset);
462         if (dma_len) {
463                 dma_addr += (PAGE_SIZE - offset);
464         } else {
465                 sg = sg_next(sg);
466                 dma_addr = sg_dma_address(sg);
467                 dma_len = sg_dma_len(sg);
468         }
469
470         if (length <= PAGE_SIZE) {
471                 iod->first_dma = dma_addr;
472                 return total_len;
473         }
474
475         nprps = DIV_ROUND_UP(length, PAGE_SIZE);
476         if (nprps <= (256 / 8)) {
477                 pool = dev->prp_small_pool;
478                 iod->npages = 0;
479         } else {
480                 pool = dev->prp_page_pool;
481                 iod->npages = 1;
482         }
483
484         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
485         if (!prp_list) {
486                 iod->first_dma = dma_addr;
487                 iod->npages = -1;
488                 return (total_len - length) + PAGE_SIZE;
489         }
490         list[0] = prp_list;
491         iod->first_dma = prp_dma;
492         i = 0;
493         for (;;) {
494                 if (i == PAGE_SIZE / 8) {
495                         __le64 *old_prp_list = prp_list;
496                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
497                         if (!prp_list)
498                                 return total_len - length;
499                         list[iod->npages++] = prp_list;
500                         prp_list[0] = old_prp_list[i - 1];
501                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
502                         i = 1;
503                 }
504                 prp_list[i++] = cpu_to_le64(dma_addr);
505                 dma_len -= PAGE_SIZE;
506                 dma_addr += PAGE_SIZE;
507                 length -= PAGE_SIZE;
508                 if (length <= 0)
509                         break;
510                 if (dma_len > 0)
511                         continue;
512                 BUG_ON(dma_len < 0);
513                 sg = sg_next(sg);
514                 dma_addr = sg_dma_address(sg);
515                 dma_len = sg_dma_len(sg);
516         }
517
518         return total_len;
519 }
520
521 static int nvme_split_and_submit(struct bio *bio, struct nvme_queue *nvmeq,
522                                  int len)
523 {
524         struct bio *split = bio_split(bio, len >> 9, GFP_ATOMIC, NULL);
525         if (!split)
526                 return -ENOMEM;
527
528         bio_chain(split, bio);
529
530         if (!waitqueue_active(&nvmeq->sq_full))
531                 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
532         bio_list_add(&nvmeq->sq_cong, split);
533         bio_list_add(&nvmeq->sq_cong, bio);
534         wake_up(&nvmeq->sq_full);
535
536         return 0;
537 }
538
539 /* NVMe scatterlists require no holes in the virtual address */
540 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2)   ((vec2)->bv_offset || \
541                         (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
542
543 static int nvme_map_bio(struct nvme_queue *nvmeq, struct nvme_iod *iod,
544                 struct bio *bio, enum dma_data_direction dma_dir, int psegs)
545 {
546         struct bio_vec bvec, bvprv;
547         struct bvec_iter iter;
548         struct scatterlist *sg = NULL;
549         int length = 0, nsegs = 0, split_len = bio->bi_iter.bi_size;
550         int first = 1;
551
552         if (nvmeq->dev->stripe_size)
553                 split_len = nvmeq->dev->stripe_size -
554                         ((bio->bi_iter.bi_sector << 9) &
555                          (nvmeq->dev->stripe_size - 1));
556
557         sg_init_table(iod->sg, psegs);
558         bio_for_each_segment(bvec, bio, iter) {
559                 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
560                         sg->length += bvec.bv_len;
561                 } else {
562                         if (!first && BIOVEC_NOT_VIRT_MERGEABLE(&bvprv, &bvec))
563                                 return nvme_split_and_submit(bio, nvmeq,
564                                                              length);
565
566                         sg = sg ? sg + 1 : iod->sg;
567                         sg_set_page(sg, bvec.bv_page,
568                                     bvec.bv_len, bvec.bv_offset);
569                         nsegs++;
570                 }
571
572                 if (split_len - length < bvec.bv_len)
573                         return nvme_split_and_submit(bio, nvmeq, split_len);
574                 length += bvec.bv_len;
575                 bvprv = bvec;
576                 first = 0;
577         }
578         iod->nents = nsegs;
579         sg_mark_end(sg);
580         if (dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir) == 0)
581                 return -ENOMEM;
582
583         BUG_ON(length != bio->bi_iter.bi_size);
584         return length;
585 }
586
587 static int nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
588                 struct bio *bio, struct nvme_iod *iod, int cmdid)
589 {
590         struct nvme_dsm_range *range =
591                                 (struct nvme_dsm_range *)iod_list(iod)[0];
592         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
593
594         range->cattr = cpu_to_le32(0);
595         range->nlb = cpu_to_le32(bio->bi_iter.bi_size >> ns->lba_shift);
596         range->slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
597
598         memset(cmnd, 0, sizeof(*cmnd));
599         cmnd->dsm.opcode = nvme_cmd_dsm;
600         cmnd->dsm.command_id = cmdid;
601         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
602         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
603         cmnd->dsm.nr = 0;
604         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
605
606         if (++nvmeq->sq_tail == nvmeq->q_depth)
607                 nvmeq->sq_tail = 0;
608         writel(nvmeq->sq_tail, nvmeq->q_db);
609
610         return 0;
611 }
612
613 static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
614                                                                 int cmdid)
615 {
616         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
617
618         memset(cmnd, 0, sizeof(*cmnd));
619         cmnd->common.opcode = nvme_cmd_flush;
620         cmnd->common.command_id = cmdid;
621         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
622
623         if (++nvmeq->sq_tail == nvmeq->q_depth)
624                 nvmeq->sq_tail = 0;
625         writel(nvmeq->sq_tail, nvmeq->q_db);
626
627         return 0;
628 }
629
630 int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns)
631 {
632         int cmdid = alloc_cmdid(nvmeq, (void *)CMD_CTX_FLUSH,
633                                         special_completion, NVME_IO_TIMEOUT);
634         if (unlikely(cmdid < 0))
635                 return cmdid;
636
637         return nvme_submit_flush(nvmeq, ns, cmdid);
638 }
639
640 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod)
641 {
642         struct bio *bio = iod->private;
643         struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
644         struct nvme_command *cmnd;
645         int cmdid;
646         u16 control;
647         u32 dsmgmt;
648
649         cmdid = alloc_cmdid(nvmeq, iod, bio_completion, NVME_IO_TIMEOUT);
650         if (unlikely(cmdid < 0))
651                 return cmdid;
652
653         if (bio->bi_rw & REQ_DISCARD)
654                 return nvme_submit_discard(nvmeq, ns, bio, iod, cmdid);
655         if ((bio->bi_rw & REQ_FLUSH) && !iod->nents)
656                 return nvme_submit_flush(nvmeq, ns, cmdid);
657
658         control = 0;
659         if (bio->bi_rw & REQ_FUA)
660                 control |= NVME_RW_FUA;
661         if (bio->bi_rw & (REQ_FAILFAST_DEV | REQ_RAHEAD))
662                 control |= NVME_RW_LR;
663
664         dsmgmt = 0;
665         if (bio->bi_rw & REQ_RAHEAD)
666                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
667
668         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
669         memset(cmnd, 0, sizeof(*cmnd));
670
671         cmnd->rw.opcode = bio_data_dir(bio) ? nvme_cmd_write : nvme_cmd_read;
672         cmnd->rw.command_id = cmdid;
673         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
674         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
675         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
676         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
677         cmnd->rw.length =
678                 cpu_to_le16((bio->bi_iter.bi_size >> ns->lba_shift) - 1);
679         cmnd->rw.control = cpu_to_le16(control);
680         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
681
682         if (++nvmeq->sq_tail == nvmeq->q_depth)
683                 nvmeq->sq_tail = 0;
684         writel(nvmeq->sq_tail, nvmeq->q_db);
685
686         return 0;
687 }
688
689 /*
690  * Called with local interrupts disabled and the q_lock held.  May not sleep.
691  */
692 static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
693                                                                 struct bio *bio)
694 {
695         struct nvme_iod *iod;
696         int psegs = bio_phys_segments(ns->queue, bio);
697         int result;
698
699         if ((bio->bi_rw & REQ_FLUSH) && psegs) {
700                 result = nvme_submit_flush_data(nvmeq, ns);
701                 if (result)
702                         return result;
703         }
704
705         iod = nvme_alloc_iod(psegs, bio->bi_iter.bi_size, GFP_ATOMIC);
706         if (!iod)
707                 return -ENOMEM;
708
709         iod->private = bio;
710         if (bio->bi_rw & REQ_DISCARD) {
711                 void *range;
712                 /*
713                  * We reuse the small pool to allocate the 16-byte range here
714                  * as it is not worth having a special pool for these or
715                  * additional cases to handle freeing the iod.
716                  */
717                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
718                                                 GFP_ATOMIC,
719                                                 &iod->first_dma);
720                 if (!range) {
721                         result = -ENOMEM;
722                         goto free_iod;
723                 }
724                 iod_list(iod)[0] = (__le64 *)range;
725                 iod->npages = 0;
726         } else if (psegs) {
727                 result = nvme_map_bio(nvmeq, iod, bio,
728                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
729                         psegs);
730                 if (result <= 0)
731                         goto free_iod;
732                 if (nvme_setup_prps(nvmeq->dev, iod, result, GFP_ATOMIC) !=
733                                                                 result) {
734                         result = -ENOMEM;
735                         goto free_iod;
736                 }
737                 nvme_start_io_acct(bio);
738         }
739         if (unlikely(nvme_submit_iod(nvmeq, iod))) {
740                 if (!waitqueue_active(&nvmeq->sq_full))
741                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
742                 list_add_tail(&iod->node, &nvmeq->iod_bio);
743         }
744         return 0;
745
746  free_iod:
747         nvme_free_iod(nvmeq->dev, iod);
748         return result;
749 }
750
751 static int nvme_process_cq(struct nvme_queue *nvmeq)
752 {
753         u16 head, phase;
754
755         head = nvmeq->cq_head;
756         phase = nvmeq->cq_phase;
757
758         for (;;) {
759                 void *ctx;
760                 nvme_completion_fn fn;
761                 struct nvme_completion cqe = nvmeq->cqes[head];
762                 if ((le16_to_cpu(cqe.status) & 1) != phase)
763                         break;
764                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
765                 if (++head == nvmeq->q_depth) {
766                         head = 0;
767                         phase = !phase;
768                 }
769
770                 ctx = free_cmdid(nvmeq, cqe.command_id, &fn);
771                 fn(nvmeq, ctx, &cqe);
772         }
773
774         /* If the controller ignores the cq head doorbell and continuously
775          * writes to the queue, it is theoretically possible to wrap around
776          * the queue twice and mistakenly return IRQ_NONE.  Linux only
777          * requires that 0.1% of your interrupts are handled, so this isn't
778          * a big problem.
779          */
780         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
781                 return 0;
782
783         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
784         nvmeq->cq_head = head;
785         nvmeq->cq_phase = phase;
786
787         nvmeq->cqe_seen = 1;
788         return 1;
789 }
790
791 static void nvme_make_request(struct request_queue *q, struct bio *bio)
792 {
793         struct nvme_ns *ns = q->queuedata;
794         struct nvme_queue *nvmeq = get_nvmeq(ns->dev);
795         int result = -EBUSY;
796
797         if (!nvmeq) {
798                 put_nvmeq(NULL);
799                 bio_endio(bio, -EIO);
800                 return;
801         }
802
803         spin_lock_irq(&nvmeq->q_lock);
804         if (!nvmeq->q_suspended && bio_list_empty(&nvmeq->sq_cong))
805                 result = nvme_submit_bio_queue(nvmeq, ns, bio);
806         if (unlikely(result)) {
807                 if (!waitqueue_active(&nvmeq->sq_full))
808                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
809                 bio_list_add(&nvmeq->sq_cong, bio);
810         }
811
812         nvme_process_cq(nvmeq);
813         spin_unlock_irq(&nvmeq->q_lock);
814         put_nvmeq(nvmeq);
815 }
816
817 static irqreturn_t nvme_irq(int irq, void *data)
818 {
819         irqreturn_t result;
820         struct nvme_queue *nvmeq = data;
821         spin_lock(&nvmeq->q_lock);
822         nvme_process_cq(nvmeq);
823         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
824         nvmeq->cqe_seen = 0;
825         spin_unlock(&nvmeq->q_lock);
826         return result;
827 }
828
829 static irqreturn_t nvme_irq_check(int irq, void *data)
830 {
831         struct nvme_queue *nvmeq = data;
832         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
833         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
834                 return IRQ_NONE;
835         return IRQ_WAKE_THREAD;
836 }
837
838 static void nvme_abort_command(struct nvme_queue *nvmeq, int cmdid)
839 {
840         spin_lock_irq(&nvmeq->q_lock);
841         cancel_cmdid(nvmeq, cmdid, NULL);
842         spin_unlock_irq(&nvmeq->q_lock);
843 }
844
845 struct sync_cmd_info {
846         struct task_struct *task;
847         u32 result;
848         int status;
849 };
850
851 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
852                                                 struct nvme_completion *cqe)
853 {
854         struct sync_cmd_info *cmdinfo = ctx;
855         cmdinfo->result = le32_to_cpup(&cqe->result);
856         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
857         wake_up_process(cmdinfo->task);
858 }
859
860 /*
861  * Returns 0 on success.  If the result is negative, it's a Linux error code;
862  * if the result is positive, it's an NVM Express status code
863  */
864 static int nvme_submit_sync_cmd(struct nvme_dev *dev, int q_idx,
865                                                 struct nvme_command *cmd,
866                                                 u32 *result, unsigned timeout)
867 {
868         int cmdid, ret;
869         struct sync_cmd_info cmdinfo;
870         struct nvme_queue *nvmeq;
871
872         nvmeq = lock_nvmeq(dev, q_idx);
873         if (!nvmeq) {
874                 unlock_nvmeq(nvmeq);
875                 return -ENODEV;
876         }
877
878         cmdinfo.task = current;
879         cmdinfo.status = -EINTR;
880
881         cmdid = alloc_cmdid(nvmeq, &cmdinfo, sync_completion, timeout);
882         if (cmdid < 0) {
883                 unlock_nvmeq(nvmeq);
884                 return cmdid;
885         }
886         cmd->common.command_id = cmdid;
887
888         set_current_state(TASK_KILLABLE);
889         ret = nvme_submit_cmd(nvmeq, cmd);
890         if (ret) {
891                 free_cmdid(nvmeq, cmdid, NULL);
892                 unlock_nvmeq(nvmeq);
893                 set_current_state(TASK_RUNNING);
894                 return ret;
895         }
896         unlock_nvmeq(nvmeq);
897         schedule_timeout(timeout);
898
899         if (cmdinfo.status == -EINTR) {
900                 nvmeq = lock_nvmeq(dev, q_idx);
901                 if (nvmeq)
902                         nvme_abort_command(nvmeq, cmdid);
903                 unlock_nvmeq(nvmeq);
904                 return -EINTR;
905         }
906
907         if (result)
908                 *result = cmdinfo.result;
909
910         return cmdinfo.status;
911 }
912
913 static int nvme_submit_async_cmd(struct nvme_queue *nvmeq,
914                         struct nvme_command *cmd,
915                         struct async_cmd_info *cmdinfo, unsigned timeout)
916 {
917         int cmdid;
918
919         cmdid = alloc_cmdid_killable(nvmeq, cmdinfo, async_completion, timeout);
920         if (cmdid < 0)
921                 return cmdid;
922         cmdinfo->status = -EINTR;
923         cmd->common.command_id = cmdid;
924         return nvme_submit_cmd(nvmeq, cmd);
925 }
926
927 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
928                                                                 u32 *result)
929 {
930         return nvme_submit_sync_cmd(dev, 0, cmd, result, ADMIN_TIMEOUT);
931 }
932
933 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
934                                                                 u32 *result)
935 {
936         return nvme_submit_sync_cmd(dev, smp_processor_id() + 1, cmd, result,
937                                                         NVME_IO_TIMEOUT);
938 }
939
940 static int nvme_submit_admin_cmd_async(struct nvme_dev *dev,
941                 struct nvme_command *cmd, struct async_cmd_info *cmdinfo)
942 {
943         return nvme_submit_async_cmd(raw_nvmeq(dev, 0), cmd, cmdinfo,
944                                                                 ADMIN_TIMEOUT);
945 }
946
947 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
948 {
949         int status;
950         struct nvme_command c;
951
952         memset(&c, 0, sizeof(c));
953         c.delete_queue.opcode = opcode;
954         c.delete_queue.qid = cpu_to_le16(id);
955
956         status = nvme_submit_admin_cmd(dev, &c, NULL);
957         if (status)
958                 return -EIO;
959         return 0;
960 }
961
962 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
963                                                 struct nvme_queue *nvmeq)
964 {
965         int status;
966         struct nvme_command c;
967         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
968
969         memset(&c, 0, sizeof(c));
970         c.create_cq.opcode = nvme_admin_create_cq;
971         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
972         c.create_cq.cqid = cpu_to_le16(qid);
973         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
974         c.create_cq.cq_flags = cpu_to_le16(flags);
975         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
976
977         status = nvme_submit_admin_cmd(dev, &c, NULL);
978         if (status)
979                 return -EIO;
980         return 0;
981 }
982
983 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
984                                                 struct nvme_queue *nvmeq)
985 {
986         int status;
987         struct nvme_command c;
988         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
989
990         memset(&c, 0, sizeof(c));
991         c.create_sq.opcode = nvme_admin_create_sq;
992         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
993         c.create_sq.sqid = cpu_to_le16(qid);
994         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
995         c.create_sq.sq_flags = cpu_to_le16(flags);
996         c.create_sq.cqid = cpu_to_le16(qid);
997
998         status = nvme_submit_admin_cmd(dev, &c, NULL);
999         if (status)
1000                 return -EIO;
1001         return 0;
1002 }
1003
1004 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1005 {
1006         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1007 }
1008
1009 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1010 {
1011         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1012 }
1013
1014 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1015                                                         dma_addr_t dma_addr)
1016 {
1017         struct nvme_command c;
1018
1019         memset(&c, 0, sizeof(c));
1020         c.identify.opcode = nvme_admin_identify;
1021         c.identify.nsid = cpu_to_le32(nsid);
1022         c.identify.prp1 = cpu_to_le64(dma_addr);
1023         c.identify.cns = cpu_to_le32(cns);
1024
1025         return nvme_submit_admin_cmd(dev, &c, NULL);
1026 }
1027
1028 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1029                                         dma_addr_t dma_addr, u32 *result)
1030 {
1031         struct nvme_command c;
1032
1033         memset(&c, 0, sizeof(c));
1034         c.features.opcode = nvme_admin_get_features;
1035         c.features.nsid = cpu_to_le32(nsid);
1036         c.features.prp1 = cpu_to_le64(dma_addr);
1037         c.features.fid = cpu_to_le32(fid);
1038
1039         return nvme_submit_admin_cmd(dev, &c, result);
1040 }
1041
1042 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1043                                         dma_addr_t dma_addr, u32 *result)
1044 {
1045         struct nvme_command c;
1046
1047         memset(&c, 0, sizeof(c));
1048         c.features.opcode = nvme_admin_set_features;
1049         c.features.prp1 = cpu_to_le64(dma_addr);
1050         c.features.fid = cpu_to_le32(fid);
1051         c.features.dword11 = cpu_to_le32(dword11);
1052
1053         return nvme_submit_admin_cmd(dev, &c, result);
1054 }
1055
1056 /**
1057  * nvme_abort_cmd - Attempt aborting a command
1058  * @cmdid: Command id of a timed out IO
1059  * @queue: The queue with timed out IO
1060  *
1061  * Schedule controller reset if the command was already aborted once before and
1062  * still hasn't been returned to the driver, or if this is the admin queue.
1063  */
1064 static void nvme_abort_cmd(int cmdid, struct nvme_queue *nvmeq)
1065 {
1066         int a_cmdid;
1067         struct nvme_command cmd;
1068         struct nvme_dev *dev = nvmeq->dev;
1069         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1070         struct nvme_queue *adminq;
1071
1072         if (!nvmeq->qid || info[cmdid].aborted) {
1073                 if (work_busy(&dev->reset_work))
1074                         return;
1075                 list_del_init(&dev->node);
1076                 dev_warn(&dev->pci_dev->dev,
1077                         "I/O %d QID %d timeout, reset controller\n", cmdid,
1078                                                                 nvmeq->qid);
1079                 dev->reset_workfn = nvme_reset_failed_dev;
1080                 queue_work(nvme_workq, &dev->reset_work);
1081                 return;
1082         }
1083
1084         if (!dev->abort_limit)
1085                 return;
1086
1087         adminq = rcu_dereference(dev->queues[0]);
1088         a_cmdid = alloc_cmdid(adminq, CMD_CTX_ABORT, special_completion,
1089                                                                 ADMIN_TIMEOUT);
1090         if (a_cmdid < 0)
1091                 return;
1092
1093         memset(&cmd, 0, sizeof(cmd));
1094         cmd.abort.opcode = nvme_admin_abort_cmd;
1095         cmd.abort.cid = cmdid;
1096         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1097         cmd.abort.command_id = a_cmdid;
1098
1099         --dev->abort_limit;
1100         info[cmdid].aborted = 1;
1101         info[cmdid].timeout = jiffies + ADMIN_TIMEOUT;
1102
1103         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", cmdid,
1104                                                         nvmeq->qid);
1105         nvme_submit_cmd(adminq, &cmd);
1106 }
1107
1108 /**
1109  * nvme_cancel_ios - Cancel outstanding I/Os
1110  * @queue: The queue to cancel I/Os on
1111  * @timeout: True to only cancel I/Os which have timed out
1112  */
1113 static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
1114 {
1115         int depth = nvmeq->q_depth - 1;
1116         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1117         unsigned long now = jiffies;
1118         int cmdid;
1119
1120         for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
1121                 void *ctx;
1122                 nvme_completion_fn fn;
1123                 static struct nvme_completion cqe = {
1124                         .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1125                 };
1126
1127                 if (timeout && !time_after(now, info[cmdid].timeout))
1128                         continue;
1129                 if (info[cmdid].ctx == CMD_CTX_CANCELLED)
1130                         continue;
1131                 if (timeout && nvmeq->dev->initialized) {
1132                         nvme_abort_cmd(cmdid, nvmeq);
1133                         continue;
1134                 }
1135                 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n", cmdid,
1136                                                                 nvmeq->qid);
1137                 ctx = cancel_cmdid(nvmeq, cmdid, &fn);
1138                 fn(nvmeq, ctx, &cqe);
1139         }
1140 }
1141
1142 static void nvme_free_queue(struct rcu_head *r)
1143 {
1144         struct nvme_queue *nvmeq = container_of(r, struct nvme_queue, r_head);
1145
1146         spin_lock_irq(&nvmeq->q_lock);
1147         while (bio_list_peek(&nvmeq->sq_cong)) {
1148                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1149                 bio_endio(bio, -EIO);
1150         }
1151         while (!list_empty(&nvmeq->iod_bio)) {
1152                 static struct nvme_completion cqe = {
1153                         .status = cpu_to_le16(
1154                                 (NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1),
1155                 };
1156                 struct nvme_iod *iod = list_first_entry(&nvmeq->iod_bio,
1157                                                         struct nvme_iod,
1158                                                         node);
1159                 list_del(&iod->node);
1160                 bio_completion(nvmeq, iod, &cqe);
1161         }
1162         spin_unlock_irq(&nvmeq->q_lock);
1163
1164         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1165                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1166         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1167                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1168         if (nvmeq->qid)
1169                 free_cpumask_var(nvmeq->cpu_mask);
1170         kfree(nvmeq);
1171 }
1172
1173 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1174 {
1175         int i;
1176
1177         for (i = dev->queue_count - 1; i >= lowest; i--) {
1178                 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
1179                 rcu_assign_pointer(dev->queues[i], NULL);
1180                 call_rcu(&nvmeq->r_head, nvme_free_queue);
1181                 dev->queue_count--;
1182         }
1183 }
1184
1185 /**
1186  * nvme_suspend_queue - put queue into suspended state
1187  * @nvmeq - queue to suspend
1188  *
1189  * Returns 1 if already suspended, 0 otherwise.
1190  */
1191 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1192 {
1193         int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1194
1195         spin_lock_irq(&nvmeq->q_lock);
1196         if (nvmeq->q_suspended) {
1197                 spin_unlock_irq(&nvmeq->q_lock);
1198                 return 1;
1199         }
1200         nvmeq->q_suspended = 1;
1201         nvmeq->dev->online_queues--;
1202         spin_unlock_irq(&nvmeq->q_lock);
1203
1204         irq_set_affinity_hint(vector, NULL);
1205         free_irq(vector, nvmeq);
1206
1207         return 0;
1208 }
1209
1210 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1211 {
1212         spin_lock_irq(&nvmeq->q_lock);
1213         nvme_process_cq(nvmeq);
1214         nvme_cancel_ios(nvmeq, false);
1215         spin_unlock_irq(&nvmeq->q_lock);
1216 }
1217
1218 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1219 {
1220         struct nvme_queue *nvmeq = raw_nvmeq(dev, qid);
1221
1222         if (!nvmeq)
1223                 return;
1224         if (nvme_suspend_queue(nvmeq))
1225                 return;
1226
1227         /* Don't tell the adapter to delete the admin queue.
1228          * Don't tell a removed adapter to delete IO queues. */
1229         if (qid && readl(&dev->bar->csts) != -1) {
1230                 adapter_delete_sq(dev, qid);
1231                 adapter_delete_cq(dev, qid);
1232         }
1233         nvme_clear_queue(nvmeq);
1234 }
1235
1236 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1237                                                         int depth, int vector)
1238 {
1239         struct device *dmadev = &dev->pci_dev->dev;
1240         unsigned extra = nvme_queue_extra(depth);
1241         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
1242         if (!nvmeq)
1243                 return NULL;
1244
1245         nvmeq->cqes = dma_alloc_coherent(dmadev, CQ_SIZE(depth),
1246                                         &nvmeq->cq_dma_addr, GFP_KERNEL);
1247         if (!nvmeq->cqes)
1248                 goto free_nvmeq;
1249         memset((void *)nvmeq->cqes, 0, CQ_SIZE(depth));
1250
1251         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1252                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1253         if (!nvmeq->sq_cmds)
1254                 goto free_cqdma;
1255
1256         if (qid && !zalloc_cpumask_var(&nvmeq->cpu_mask, GFP_KERNEL))
1257                 goto free_sqdma;
1258
1259         nvmeq->q_dmadev = dmadev;
1260         nvmeq->dev = dev;
1261         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1262                         dev->instance, qid);
1263         spin_lock_init(&nvmeq->q_lock);
1264         nvmeq->cq_head = 0;
1265         nvmeq->cq_phase = 1;
1266         init_waitqueue_head(&nvmeq->sq_full);
1267         init_waitqueue_entry(&nvmeq->sq_cong_wait, nvme_thread);
1268         bio_list_init(&nvmeq->sq_cong);
1269         INIT_LIST_HEAD(&nvmeq->iod_bio);
1270         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1271         nvmeq->q_depth = depth;
1272         nvmeq->cq_vector = vector;
1273         nvmeq->qid = qid;
1274         nvmeq->q_suspended = 1;
1275         dev->queue_count++;
1276         rcu_assign_pointer(dev->queues[qid], nvmeq);
1277
1278         return nvmeq;
1279
1280  free_sqdma:
1281         dma_free_coherent(dmadev, SQ_SIZE(depth), (void *)nvmeq->sq_cmds,
1282                                                         nvmeq->sq_dma_addr);
1283  free_cqdma:
1284         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1285                                                         nvmeq->cq_dma_addr);
1286  free_nvmeq:
1287         kfree(nvmeq);
1288         return NULL;
1289 }
1290
1291 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1292                                                         const char *name)
1293 {
1294         if (use_threaded_interrupts)
1295                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1296                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1297                                         name, nvmeq);
1298         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1299                                 IRQF_SHARED, name, nvmeq);
1300 }
1301
1302 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1303 {
1304         struct nvme_dev *dev = nvmeq->dev;
1305         unsigned extra = nvme_queue_extra(nvmeq->q_depth);
1306
1307         nvmeq->sq_tail = 0;
1308         nvmeq->cq_head = 0;
1309         nvmeq->cq_phase = 1;
1310         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1311         memset(nvmeq->cmdid_data, 0, extra);
1312         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1313         nvme_cancel_ios(nvmeq, false);
1314         nvmeq->q_suspended = 0;
1315         dev->online_queues++;
1316 }
1317
1318 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1319 {
1320         struct nvme_dev *dev = nvmeq->dev;
1321         int result;
1322
1323         result = adapter_alloc_cq(dev, qid, nvmeq);
1324         if (result < 0)
1325                 return result;
1326
1327         result = adapter_alloc_sq(dev, qid, nvmeq);
1328         if (result < 0)
1329                 goto release_cq;
1330
1331         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1332         if (result < 0)
1333                 goto release_sq;
1334
1335         spin_lock_irq(&nvmeq->q_lock);
1336         nvme_init_queue(nvmeq, qid);
1337         spin_unlock_irq(&nvmeq->q_lock);
1338
1339         return result;
1340
1341  release_sq:
1342         adapter_delete_sq(dev, qid);
1343  release_cq:
1344         adapter_delete_cq(dev, qid);
1345         return result;
1346 }
1347
1348 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1349 {
1350         unsigned long timeout;
1351         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1352
1353         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1354
1355         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1356                 msleep(100);
1357                 if (fatal_signal_pending(current))
1358                         return -EINTR;
1359                 if (time_after(jiffies, timeout)) {
1360                         dev_err(&dev->pci_dev->dev,
1361                                 "Device not ready; aborting initialisation\n");
1362                         return -ENODEV;
1363                 }
1364         }
1365
1366         return 0;
1367 }
1368
1369 /*
1370  * If the device has been passed off to us in an enabled state, just clear
1371  * the enabled bit.  The spec says we should set the 'shutdown notification
1372  * bits', but doing so may cause the device to complete commands to the
1373  * admin queue ... and we don't know what memory that might be pointing at!
1374  */
1375 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1376 {
1377         u32 cc = readl(&dev->bar->cc);
1378
1379         if (cc & NVME_CC_ENABLE)
1380                 writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
1381         return nvme_wait_ready(dev, cap, false);
1382 }
1383
1384 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1385 {
1386         return nvme_wait_ready(dev, cap, true);
1387 }
1388
1389 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1390 {
1391         unsigned long timeout;
1392         u32 cc;
1393
1394         cc = (readl(&dev->bar->cc) & ~NVME_CC_SHN_MASK) | NVME_CC_SHN_NORMAL;
1395         writel(cc, &dev->bar->cc);
1396
1397         timeout = 2 * HZ + jiffies;
1398         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1399                                                         NVME_CSTS_SHST_CMPLT) {
1400                 msleep(100);
1401                 if (fatal_signal_pending(current))
1402                         return -EINTR;
1403                 if (time_after(jiffies, timeout)) {
1404                         dev_err(&dev->pci_dev->dev,
1405                                 "Device shutdown incomplete; abort shutdown\n");
1406                         return -ENODEV;
1407                 }
1408         }
1409
1410         return 0;
1411 }
1412
1413 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1414 {
1415         int result;
1416         u32 aqa;
1417         u64 cap = readq(&dev->bar->cap);
1418         struct nvme_queue *nvmeq;
1419
1420         result = nvme_disable_ctrl(dev, cap);
1421         if (result < 0)
1422                 return result;
1423
1424         nvmeq = raw_nvmeq(dev, 0);
1425         if (!nvmeq) {
1426                 nvmeq = nvme_alloc_queue(dev, 0, 64, 0);
1427                 if (!nvmeq)
1428                         return -ENOMEM;
1429         }
1430
1431         aqa = nvmeq->q_depth - 1;
1432         aqa |= aqa << 16;
1433
1434         dev->ctrl_config = NVME_CC_ENABLE | NVME_CC_CSS_NVM;
1435         dev->ctrl_config |= (PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
1436         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1437         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1438
1439         writel(aqa, &dev->bar->aqa);
1440         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1441         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1442         writel(dev->ctrl_config, &dev->bar->cc);
1443
1444         result = nvme_enable_ctrl(dev, cap);
1445         if (result)
1446                 return result;
1447
1448         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1449         if (result)
1450                 return result;
1451
1452         spin_lock_irq(&nvmeq->q_lock);
1453         nvme_init_queue(nvmeq, 0);
1454         spin_unlock_irq(&nvmeq->q_lock);
1455         return result;
1456 }
1457
1458 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1459                                 unsigned long addr, unsigned length)
1460 {
1461         int i, err, count, nents, offset;
1462         struct scatterlist *sg;
1463         struct page **pages;
1464         struct nvme_iod *iod;
1465
1466         if (addr & 3)
1467                 return ERR_PTR(-EINVAL);
1468         if (!length || length > INT_MAX - PAGE_SIZE)
1469                 return ERR_PTR(-EINVAL);
1470
1471         offset = offset_in_page(addr);
1472         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1473         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1474         if (!pages)
1475                 return ERR_PTR(-ENOMEM);
1476
1477         err = get_user_pages_fast(addr, count, 1, pages);
1478         if (err < count) {
1479                 count = err;
1480                 err = -EFAULT;
1481                 goto put_pages;
1482         }
1483
1484         iod = nvme_alloc_iod(count, length, GFP_KERNEL);
1485         sg = iod->sg;
1486         sg_init_table(sg, count);
1487         for (i = 0; i < count; i++) {
1488                 sg_set_page(&sg[i], pages[i],
1489                             min_t(unsigned, length, PAGE_SIZE - offset),
1490                             offset);
1491                 length -= (PAGE_SIZE - offset);
1492                 offset = 0;
1493         }
1494         sg_mark_end(&sg[i - 1]);
1495         iod->nents = count;
1496
1497         err = -ENOMEM;
1498         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1499                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1500         if (!nents)
1501                 goto free_iod;
1502
1503         kfree(pages);
1504         return iod;
1505
1506  free_iod:
1507         kfree(iod);
1508  put_pages:
1509         for (i = 0; i < count; i++)
1510                 put_page(pages[i]);
1511         kfree(pages);
1512         return ERR_PTR(err);
1513 }
1514
1515 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1516                         struct nvme_iod *iod)
1517 {
1518         int i;
1519
1520         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1521                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1522
1523         for (i = 0; i < iod->nents; i++)
1524                 put_page(sg_page(&iod->sg[i]));
1525 }
1526
1527 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1528 {
1529         struct nvme_dev *dev = ns->dev;
1530         struct nvme_user_io io;
1531         struct nvme_command c;
1532         unsigned length, meta_len;
1533         int status, i;
1534         struct nvme_iod *iod, *meta_iod = NULL;
1535         dma_addr_t meta_dma_addr;
1536         void *meta, *uninitialized_var(meta_mem);
1537
1538         if (copy_from_user(&io, uio, sizeof(io)))
1539                 return -EFAULT;
1540         length = (io.nblocks + 1) << ns->lba_shift;
1541         meta_len = (io.nblocks + 1) * ns->ms;
1542
1543         if (meta_len && ((io.metadata & 3) || !io.metadata))
1544                 return -EINVAL;
1545
1546         switch (io.opcode) {
1547         case nvme_cmd_write:
1548         case nvme_cmd_read:
1549         case nvme_cmd_compare:
1550                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1551                 break;
1552         default:
1553                 return -EINVAL;
1554         }
1555
1556         if (IS_ERR(iod))
1557                 return PTR_ERR(iod);
1558
1559         memset(&c, 0, sizeof(c));
1560         c.rw.opcode = io.opcode;
1561         c.rw.flags = io.flags;
1562         c.rw.nsid = cpu_to_le32(ns->ns_id);
1563         c.rw.slba = cpu_to_le64(io.slba);
1564         c.rw.length = cpu_to_le16(io.nblocks);
1565         c.rw.control = cpu_to_le16(io.control);
1566         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1567         c.rw.reftag = cpu_to_le32(io.reftag);
1568         c.rw.apptag = cpu_to_le16(io.apptag);
1569         c.rw.appmask = cpu_to_le16(io.appmask);
1570
1571         if (meta_len) {
1572                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1573                                                                 meta_len);
1574                 if (IS_ERR(meta_iod)) {
1575                         status = PTR_ERR(meta_iod);
1576                         meta_iod = NULL;
1577                         goto unmap;
1578                 }
1579
1580                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1581                                                 &meta_dma_addr, GFP_KERNEL);
1582                 if (!meta_mem) {
1583                         status = -ENOMEM;
1584                         goto unmap;
1585                 }
1586
1587                 if (io.opcode & 1) {
1588                         int meta_offset = 0;
1589
1590                         for (i = 0; i < meta_iod->nents; i++) {
1591                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1592                                                 meta_iod->sg[i].offset;
1593                                 memcpy(meta_mem + meta_offset, meta,
1594                                                 meta_iod->sg[i].length);
1595                                 kunmap_atomic(meta);
1596                                 meta_offset += meta_iod->sg[i].length;
1597                         }
1598                 }
1599
1600                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1601         }
1602
1603         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1604         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1605         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1606
1607         if (length != (io.nblocks + 1) << ns->lba_shift)
1608                 status = -ENOMEM;
1609         else
1610                 status = nvme_submit_io_cmd(dev, &c, NULL);
1611
1612         if (meta_len) {
1613                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1614                         int meta_offset = 0;
1615
1616                         for (i = 0; i < meta_iod->nents; i++) {
1617                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1618                                                 meta_iod->sg[i].offset;
1619                                 memcpy(meta, meta_mem + meta_offset,
1620                                                 meta_iod->sg[i].length);
1621                                 kunmap_atomic(meta);
1622                                 meta_offset += meta_iod->sg[i].length;
1623                         }
1624                 }
1625
1626                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1627                                                                 meta_dma_addr);
1628         }
1629
1630  unmap:
1631         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1632         nvme_free_iod(dev, iod);
1633
1634         if (meta_iod) {
1635                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1636                 nvme_free_iod(dev, meta_iod);
1637         }
1638
1639         return status;
1640 }
1641
1642 static int nvme_user_admin_cmd(struct nvme_dev *dev,
1643                                         struct nvme_admin_cmd __user *ucmd)
1644 {
1645         struct nvme_admin_cmd cmd;
1646         struct nvme_command c;
1647         int status, length;
1648         struct nvme_iod *uninitialized_var(iod);
1649         unsigned timeout;
1650
1651         if (!capable(CAP_SYS_ADMIN))
1652                 return -EACCES;
1653         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1654                 return -EFAULT;
1655
1656         memset(&c, 0, sizeof(c));
1657         c.common.opcode = cmd.opcode;
1658         c.common.flags = cmd.flags;
1659         c.common.nsid = cpu_to_le32(cmd.nsid);
1660         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1661         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1662         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1663         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1664         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1665         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1666         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1667         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1668
1669         length = cmd.data_len;
1670         if (cmd.data_len) {
1671                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1672                                                                 length);
1673                 if (IS_ERR(iod))
1674                         return PTR_ERR(iod);
1675                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1676                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1677                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1678         }
1679
1680         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1681                                                                 ADMIN_TIMEOUT;
1682         if (length != cmd.data_len)
1683                 status = -ENOMEM;
1684         else
1685                 status = nvme_submit_sync_cmd(dev, 0, &c, &cmd.result, timeout);
1686
1687         if (cmd.data_len) {
1688                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1689                 nvme_free_iod(dev, iod);
1690         }
1691
1692         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1693                                                         sizeof(cmd.result)))
1694                 status = -EFAULT;
1695
1696         return status;
1697 }
1698
1699 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1700                                                         unsigned long arg)
1701 {
1702         struct nvme_ns *ns = bdev->bd_disk->private_data;
1703
1704         switch (cmd) {
1705         case NVME_IOCTL_ID:
1706                 force_successful_syscall_return();
1707                 return ns->ns_id;
1708         case NVME_IOCTL_ADMIN_CMD:
1709                 return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
1710         case NVME_IOCTL_SUBMIT_IO:
1711                 return nvme_submit_io(ns, (void __user *)arg);
1712         case SG_GET_VERSION_NUM:
1713                 return nvme_sg_get_version_num((void __user *)arg);
1714         case SG_IO:
1715                 return nvme_sg_io(ns, (void __user *)arg);
1716         default:
1717                 return -ENOTTY;
1718         }
1719 }
1720
1721 #ifdef CONFIG_COMPAT
1722 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1723                                         unsigned int cmd, unsigned long arg)
1724 {
1725         struct nvme_ns *ns = bdev->bd_disk->private_data;
1726
1727         switch (cmd) {
1728         case SG_IO:
1729                 return nvme_sg_io32(ns, arg);
1730         }
1731         return nvme_ioctl(bdev, mode, cmd, arg);
1732 }
1733 #else
1734 #define nvme_compat_ioctl       NULL
1735 #endif
1736
1737 static int nvme_open(struct block_device *bdev, fmode_t mode)
1738 {
1739         struct nvme_ns *ns = bdev->bd_disk->private_data;
1740         struct nvme_dev *dev = ns->dev;
1741
1742         kref_get(&dev->kref);
1743         return 0;
1744 }
1745
1746 static void nvme_free_dev(struct kref *kref);
1747
1748 static void nvme_release(struct gendisk *disk, fmode_t mode)
1749 {
1750         struct nvme_ns *ns = disk->private_data;
1751         struct nvme_dev *dev = ns->dev;
1752
1753         kref_put(&dev->kref, nvme_free_dev);
1754 }
1755
1756 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1757 {
1758         /* some standard values */
1759         geo->heads = 1 << 6;
1760         geo->sectors = 1 << 5;
1761         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1762         return 0;
1763 }
1764
1765 static const struct block_device_operations nvme_fops = {
1766         .owner          = THIS_MODULE,
1767         .ioctl          = nvme_ioctl,
1768         .compat_ioctl   = nvme_compat_ioctl,
1769         .open           = nvme_open,
1770         .release        = nvme_release,
1771         .getgeo         = nvme_getgeo,
1772 };
1773
1774 static void nvme_resubmit_iods(struct nvme_queue *nvmeq)
1775 {
1776         struct nvme_iod *iod, *next;
1777
1778         list_for_each_entry_safe(iod, next, &nvmeq->iod_bio, node) {
1779                 if (unlikely(nvme_submit_iod(nvmeq, iod)))
1780                         break;
1781                 list_del(&iod->node);
1782                 if (bio_list_empty(&nvmeq->sq_cong) &&
1783                                                 list_empty(&nvmeq->iod_bio))
1784                         remove_wait_queue(&nvmeq->sq_full,
1785                                                 &nvmeq->sq_cong_wait);
1786         }
1787 }
1788
1789 static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
1790 {
1791         while (bio_list_peek(&nvmeq->sq_cong)) {
1792                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1793                 struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
1794
1795                 if (bio_list_empty(&nvmeq->sq_cong) &&
1796                                                 list_empty(&nvmeq->iod_bio))
1797                         remove_wait_queue(&nvmeq->sq_full,
1798                                                         &nvmeq->sq_cong_wait);
1799                 if (nvme_submit_bio_queue(nvmeq, ns, bio)) {
1800                         if (!waitqueue_active(&nvmeq->sq_full))
1801                                 add_wait_queue(&nvmeq->sq_full,
1802                                                         &nvmeq->sq_cong_wait);
1803                         bio_list_add_head(&nvmeq->sq_cong, bio);
1804                         break;
1805                 }
1806         }
1807 }
1808
1809 static int nvme_kthread(void *data)
1810 {
1811         struct nvme_dev *dev, *next;
1812
1813         while (!kthread_should_stop()) {
1814                 set_current_state(TASK_INTERRUPTIBLE);
1815                 spin_lock(&dev_list_lock);
1816                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1817                         int i;
1818                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1819                                                         dev->initialized) {
1820                                 if (work_busy(&dev->reset_work))
1821                                         continue;
1822                                 list_del_init(&dev->node);
1823                                 dev_warn(&dev->pci_dev->dev,
1824                                         "Failed status, reset controller\n");
1825                                 dev->reset_workfn = nvme_reset_failed_dev;
1826                                 queue_work(nvme_workq, &dev->reset_work);
1827                                 continue;
1828                         }
1829                         rcu_read_lock();
1830                         for (i = 0; i < dev->queue_count; i++) {
1831                                 struct nvme_queue *nvmeq =
1832                                                 rcu_dereference(dev->queues[i]);
1833                                 if (!nvmeq)
1834                                         continue;
1835                                 spin_lock_irq(&nvmeq->q_lock);
1836                                 if (nvmeq->q_suspended)
1837                                         goto unlock;
1838                                 nvme_process_cq(nvmeq);
1839                                 nvme_cancel_ios(nvmeq, true);
1840                                 nvme_resubmit_bios(nvmeq);
1841                                 nvme_resubmit_iods(nvmeq);
1842  unlock:
1843                                 spin_unlock_irq(&nvmeq->q_lock);
1844                         }
1845                         rcu_read_unlock();
1846                 }
1847                 spin_unlock(&dev_list_lock);
1848                 schedule_timeout(round_jiffies_relative(HZ));
1849         }
1850         return 0;
1851 }
1852
1853 static void nvme_config_discard(struct nvme_ns *ns)
1854 {
1855         u32 logical_block_size = queue_logical_block_size(ns->queue);
1856         ns->queue->limits.discard_zeroes_data = 0;
1857         ns->queue->limits.discard_alignment = logical_block_size;
1858         ns->queue->limits.discard_granularity = logical_block_size;
1859         ns->queue->limits.max_discard_sectors = 0xffffffff;
1860         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1861 }
1862
1863 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1864                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1865 {
1866         struct nvme_ns *ns;
1867         struct gendisk *disk;
1868         int lbaf;
1869
1870         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1871                 return NULL;
1872
1873         ns = kzalloc(sizeof(*ns), GFP_KERNEL);
1874         if (!ns)
1875                 return NULL;
1876         ns->queue = blk_alloc_queue(GFP_KERNEL);
1877         if (!ns->queue)
1878                 goto out_free_ns;
1879         ns->queue->queue_flags = QUEUE_FLAG_DEFAULT;
1880         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1881         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1882         blk_queue_make_request(ns->queue, nvme_make_request);
1883         ns->dev = dev;
1884         ns->queue->queuedata = ns;
1885
1886         disk = alloc_disk(0);
1887         if (!disk)
1888                 goto out_free_queue;
1889         ns->ns_id = nsid;
1890         ns->disk = disk;
1891         lbaf = id->flbas & 0xf;
1892         ns->lba_shift = id->lbaf[lbaf].ds;
1893         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1894         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1895         if (dev->max_hw_sectors)
1896                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1897
1898         disk->major = nvme_major;
1899         disk->first_minor = 0;
1900         disk->fops = &nvme_fops;
1901         disk->private_data = ns;
1902         disk->queue = ns->queue;
1903         disk->driverfs_dev = &dev->pci_dev->dev;
1904         disk->flags = GENHD_FL_EXT_DEVT;
1905         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1906         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1907
1908         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1909                 nvme_config_discard(ns);
1910
1911         return ns;
1912
1913  out_free_queue:
1914         blk_cleanup_queue(ns->queue);
1915  out_free_ns:
1916         kfree(ns);
1917         return NULL;
1918 }
1919
1920 static int nvme_find_closest_node(int node)
1921 {
1922         int n, val, min_val = INT_MAX, best_node = node;
1923
1924         for_each_online_node(n) {
1925                 if (n == node)
1926                         continue;
1927                 val = node_distance(node, n);
1928                 if (val < min_val) {
1929                         min_val = val;
1930                         best_node = n;
1931                 }
1932         }
1933         return best_node;
1934 }
1935
1936 static void nvme_set_queue_cpus(cpumask_t *qmask, struct nvme_queue *nvmeq,
1937                                                                 int count)
1938 {
1939         int cpu;
1940         for_each_cpu(cpu, qmask) {
1941                 if (cpumask_weight(nvmeq->cpu_mask) >= count)
1942                         break;
1943                 if (!cpumask_test_and_set_cpu(cpu, nvmeq->cpu_mask))
1944                         *per_cpu_ptr(nvmeq->dev->io_queue, cpu) = nvmeq->qid;
1945         }
1946 }
1947
1948 static void nvme_add_cpus(cpumask_t *mask, const cpumask_t *unassigned_cpus,
1949         const cpumask_t *new_mask, struct nvme_queue *nvmeq, int cpus_per_queue)
1950 {
1951         int next_cpu;
1952         for_each_cpu(next_cpu, new_mask) {
1953                 cpumask_or(mask, mask, get_cpu_mask(next_cpu));
1954                 cpumask_or(mask, mask, topology_thread_cpumask(next_cpu));
1955                 cpumask_and(mask, mask, unassigned_cpus);
1956                 nvme_set_queue_cpus(mask, nvmeq, cpus_per_queue);
1957         }
1958 }
1959
1960 static void nvme_create_io_queues(struct nvme_dev *dev)
1961 {
1962         unsigned i, max;
1963
1964         max = min(dev->max_qid, num_online_cpus());
1965         for (i = dev->queue_count; i <= max; i++)
1966                 if (!nvme_alloc_queue(dev, i, dev->q_depth, i - 1))
1967                         break;
1968
1969         max = min(dev->queue_count - 1, num_online_cpus());
1970         for (i = dev->online_queues; i <= max; i++)
1971                 if (nvme_create_queue(raw_nvmeq(dev, i), i))
1972                         break;
1973 }
1974
1975 /*
1976  * If there are fewer queues than online cpus, this will try to optimally
1977  * assign a queue to multiple cpus by grouping cpus that are "close" together:
1978  * thread siblings, core, socket, closest node, then whatever else is
1979  * available.
1980  */
1981 static void nvme_assign_io_queues(struct nvme_dev *dev)
1982 {
1983         unsigned cpu, cpus_per_queue, queues, remainder, i;
1984         cpumask_var_t unassigned_cpus;
1985
1986         nvme_create_io_queues(dev);
1987
1988         queues = min(dev->online_queues - 1, num_online_cpus());
1989         if (!queues)
1990                 return;
1991
1992         cpus_per_queue = num_online_cpus() / queues;
1993         remainder = queues - (num_online_cpus() - queues * cpus_per_queue);
1994
1995         if (!alloc_cpumask_var(&unassigned_cpus, GFP_KERNEL))
1996                 return;
1997
1998         cpumask_copy(unassigned_cpus, cpu_online_mask);
1999         cpu = cpumask_first(unassigned_cpus);
2000         for (i = 1; i <= queues; i++) {
2001                 struct nvme_queue *nvmeq = lock_nvmeq(dev, i);
2002                 cpumask_t mask;
2003
2004                 cpumask_clear(nvmeq->cpu_mask);
2005                 if (!cpumask_weight(unassigned_cpus)) {
2006                         unlock_nvmeq(nvmeq);
2007                         break;
2008                 }
2009
2010                 mask = *get_cpu_mask(cpu);
2011                 nvme_set_queue_cpus(&mask, nvmeq, cpus_per_queue);
2012                 if (cpus_weight(mask) < cpus_per_queue)
2013                         nvme_add_cpus(&mask, unassigned_cpus,
2014                                 topology_thread_cpumask(cpu),
2015                                 nvmeq, cpus_per_queue);
2016                 if (cpus_weight(mask) < cpus_per_queue)
2017                         nvme_add_cpus(&mask, unassigned_cpus,
2018                                 topology_core_cpumask(cpu),
2019                                 nvmeq, cpus_per_queue);
2020                 if (cpus_weight(mask) < cpus_per_queue)
2021                         nvme_add_cpus(&mask, unassigned_cpus,
2022                                 cpumask_of_node(cpu_to_node(cpu)),
2023                                 nvmeq, cpus_per_queue);
2024                 if (cpus_weight(mask) < cpus_per_queue)
2025                         nvme_add_cpus(&mask, unassigned_cpus,
2026                                 cpumask_of_node(
2027                                         nvme_find_closest_node(
2028                                                 cpu_to_node(cpu))),
2029                                 nvmeq, cpus_per_queue);
2030                 if (cpus_weight(mask) < cpus_per_queue)
2031                         nvme_add_cpus(&mask, unassigned_cpus,
2032                                 unassigned_cpus,
2033                                 nvmeq, cpus_per_queue);
2034
2035                 WARN(cpumask_weight(nvmeq->cpu_mask) != cpus_per_queue,
2036                         "nvme%d qid:%d mis-matched queue-to-cpu assignment\n",
2037                         dev->instance, i);
2038
2039                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2040                                                         nvmeq->cpu_mask);
2041                 cpumask_andnot(unassigned_cpus, unassigned_cpus,
2042                                                 nvmeq->cpu_mask);
2043                 cpu = cpumask_next(cpu, unassigned_cpus);
2044                 if (remainder && !--remainder)
2045                         cpus_per_queue++;
2046                 unlock_nvmeq(nvmeq);
2047         }
2048         WARN(cpumask_weight(unassigned_cpus), "nvme%d unassigned online cpus\n",
2049                                                                 dev->instance);
2050         i = 0;
2051         cpumask_andnot(unassigned_cpus, cpu_possible_mask, cpu_online_mask);
2052         for_each_cpu(cpu, unassigned_cpus)
2053                 *per_cpu_ptr(dev->io_queue, cpu) = (i++ % queues) + 1;
2054         free_cpumask_var(unassigned_cpus);
2055 }
2056
2057 static int set_queue_count(struct nvme_dev *dev, int count)
2058 {
2059         int status;
2060         u32 result;
2061         u32 q_count = (count - 1) | ((count - 1) << 16);
2062
2063         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2064                                                                 &result);
2065         if (status)
2066                 return status < 0 ? -EIO : -EBUSY;
2067         return min(result & 0xffff, result >> 16) + 1;
2068 }
2069
2070 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2071 {
2072         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2073 }
2074
2075 static int nvme_cpu_notify(struct notifier_block *self,
2076                                 unsigned long action, void *hcpu)
2077 {
2078         struct nvme_dev *dev = container_of(self, struct nvme_dev, nb);
2079         switch (action) {
2080         case CPU_ONLINE:
2081         case CPU_DEAD:
2082                 nvme_assign_io_queues(dev);
2083                 break;
2084         }
2085         return NOTIFY_OK;
2086 }
2087
2088 static int nvme_setup_io_queues(struct nvme_dev *dev)
2089 {
2090         struct nvme_queue *adminq = raw_nvmeq(dev, 0);
2091         struct pci_dev *pdev = dev->pci_dev;
2092         int result, i, vecs, nr_io_queues, size;
2093
2094         nr_io_queues = num_possible_cpus();
2095         result = set_queue_count(dev, nr_io_queues);
2096         if (result < 0)
2097                 return result;
2098         if (result < nr_io_queues)
2099                 nr_io_queues = result;
2100
2101         size = db_bar_size(dev, nr_io_queues);
2102         if (size > 8192) {
2103                 iounmap(dev->bar);
2104                 do {
2105                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2106                         if (dev->bar)
2107                                 break;
2108                         if (!--nr_io_queues)
2109                                 return -ENOMEM;
2110                         size = db_bar_size(dev, nr_io_queues);
2111                 } while (1);
2112                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2113                 adminq->q_db = dev->dbs;
2114         }
2115
2116         /* Deregister the admin queue's interrupt */
2117         free_irq(dev->entry[0].vector, adminq);
2118
2119         for (i = 0; i < nr_io_queues; i++)
2120                 dev->entry[i].entry = i;
2121         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2122         if (vecs < 0) {
2123                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2124                 if (vecs < 0) {
2125                         vecs = 1;
2126                 } else {
2127                         for (i = 0; i < vecs; i++)
2128                                 dev->entry[i].vector = i + pdev->irq;
2129                 }
2130         }
2131
2132         /*
2133          * Should investigate if there's a performance win from allocating
2134          * more queues than interrupt vectors; it might allow the submission
2135          * path to scale better, even if the receive path is limited by the
2136          * number of interrupts.
2137          */
2138         nr_io_queues = vecs;
2139         dev->max_qid = nr_io_queues;
2140
2141         result = queue_request_irq(dev, adminq, adminq->irqname);
2142         if (result) {
2143                 adminq->q_suspended = 1;
2144                 goto free_queues;
2145         }
2146
2147         /* Free previously allocated queues that are no longer usable */
2148         nvme_free_queues(dev, nr_io_queues + 1);
2149         nvme_assign_io_queues(dev);
2150
2151         dev->nb.notifier_call = &nvme_cpu_notify;
2152         result = register_hotcpu_notifier(&dev->nb);
2153         if (result)
2154                 goto free_queues;
2155
2156         return 0;
2157
2158  free_queues:
2159         nvme_free_queues(dev, 1);
2160         return result;
2161 }
2162
2163 /*
2164  * Return: error value if an error occurred setting up the queues or calling
2165  * Identify Device.  0 if these succeeded, even if adding some of the
2166  * namespaces failed.  At the moment, these failures are silent.  TBD which
2167  * failures should be reported.
2168  */
2169 static int nvme_dev_add(struct nvme_dev *dev)
2170 {
2171         struct pci_dev *pdev = dev->pci_dev;
2172         int res;
2173         unsigned nn, i;
2174         struct nvme_ns *ns;
2175         struct nvme_id_ctrl *ctrl;
2176         struct nvme_id_ns *id_ns;
2177         void *mem;
2178         dma_addr_t dma_addr;
2179         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2180
2181         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2182         if (!mem)
2183                 return -ENOMEM;
2184
2185         res = nvme_identify(dev, 0, 1, dma_addr);
2186         if (res) {
2187                 res = -EIO;
2188                 goto out;
2189         }
2190
2191         ctrl = mem;
2192         nn = le32_to_cpup(&ctrl->nn);
2193         dev->oncs = le16_to_cpup(&ctrl->oncs);
2194         dev->abort_limit = ctrl->acl + 1;
2195         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2196         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2197         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2198         if (ctrl->mdts)
2199                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2200         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2201                         (pdev->device == 0x0953) && ctrl->vs[3])
2202                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2203
2204         id_ns = mem;
2205         for (i = 1; i <= nn; i++) {
2206                 res = nvme_identify(dev, i, 0, dma_addr);
2207                 if (res)
2208                         continue;
2209
2210                 if (id_ns->ncap == 0)
2211                         continue;
2212
2213                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2214                                                         dma_addr + 4096, NULL);
2215                 if (res)
2216                         memset(mem + 4096, 0, 4096);
2217
2218                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2219                 if (ns)
2220                         list_add_tail(&ns->list, &dev->namespaces);
2221         }
2222         list_for_each_entry(ns, &dev->namespaces, list)
2223                 add_disk(ns->disk);
2224         res = 0;
2225
2226  out:
2227         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2228         return res;
2229 }
2230
2231 static int nvme_dev_map(struct nvme_dev *dev)
2232 {
2233         u64 cap;
2234         int bars, result = -ENOMEM;
2235         struct pci_dev *pdev = dev->pci_dev;
2236
2237         if (pci_enable_device_mem(pdev))
2238                 return result;
2239
2240         dev->entry[0].vector = pdev->irq;
2241         pci_set_master(pdev);
2242         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2243         if (pci_request_selected_regions(pdev, bars, "nvme"))
2244                 goto disable_pci;
2245
2246         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2247             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2248                 goto disable;
2249
2250         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2251         if (!dev->bar)
2252                 goto disable;
2253         if (readl(&dev->bar->csts) == -1) {
2254                 result = -ENODEV;
2255                 goto unmap;
2256         }
2257         cap = readq(&dev->bar->cap);
2258         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2259         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2260         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2261
2262         return 0;
2263
2264  unmap:
2265         iounmap(dev->bar);
2266         dev->bar = NULL;
2267  disable:
2268         pci_release_regions(pdev);
2269  disable_pci:
2270         pci_disable_device(pdev);
2271         return result;
2272 }
2273
2274 static void nvme_dev_unmap(struct nvme_dev *dev)
2275 {
2276         if (dev->pci_dev->msi_enabled)
2277                 pci_disable_msi(dev->pci_dev);
2278         else if (dev->pci_dev->msix_enabled)
2279                 pci_disable_msix(dev->pci_dev);
2280
2281         if (dev->bar) {
2282                 iounmap(dev->bar);
2283                 dev->bar = NULL;
2284                 pci_release_regions(dev->pci_dev);
2285         }
2286
2287         if (pci_is_enabled(dev->pci_dev))
2288                 pci_disable_device(dev->pci_dev);
2289 }
2290
2291 struct nvme_delq_ctx {
2292         struct task_struct *waiter;
2293         struct kthread_worker *worker;
2294         atomic_t refcount;
2295 };
2296
2297 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2298 {
2299         dq->waiter = current;
2300         mb();
2301
2302         for (;;) {
2303                 set_current_state(TASK_KILLABLE);
2304                 if (!atomic_read(&dq->refcount))
2305                         break;
2306                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2307                                         fatal_signal_pending(current)) {
2308                         set_current_state(TASK_RUNNING);
2309
2310                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2311                         nvme_disable_queue(dev, 0);
2312
2313                         send_sig(SIGKILL, dq->worker->task, 1);
2314                         flush_kthread_worker(dq->worker);
2315                         return;
2316                 }
2317         }
2318         set_current_state(TASK_RUNNING);
2319 }
2320
2321 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2322 {
2323         atomic_dec(&dq->refcount);
2324         if (dq->waiter)
2325                 wake_up_process(dq->waiter);
2326 }
2327
2328 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2329 {
2330         atomic_inc(&dq->refcount);
2331         return dq;
2332 }
2333
2334 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2335 {
2336         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2337
2338         nvme_clear_queue(nvmeq);
2339         nvme_put_dq(dq);
2340 }
2341
2342 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2343                                                 kthread_work_func_t fn)
2344 {
2345         struct nvme_command c;
2346
2347         memset(&c, 0, sizeof(c));
2348         c.delete_queue.opcode = opcode;
2349         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2350
2351         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2352         return nvme_submit_admin_cmd_async(nvmeq->dev, &c, &nvmeq->cmdinfo);
2353 }
2354
2355 static void nvme_del_cq_work_handler(struct kthread_work *work)
2356 {
2357         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2358                                                         cmdinfo.work);
2359         nvme_del_queue_end(nvmeq);
2360 }
2361
2362 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2363 {
2364         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2365                                                 nvme_del_cq_work_handler);
2366 }
2367
2368 static void nvme_del_sq_work_handler(struct kthread_work *work)
2369 {
2370         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2371                                                         cmdinfo.work);
2372         int status = nvmeq->cmdinfo.status;
2373
2374         if (!status)
2375                 status = nvme_delete_cq(nvmeq);
2376         if (status)
2377                 nvme_del_queue_end(nvmeq);
2378 }
2379
2380 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2381 {
2382         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2383                                                 nvme_del_sq_work_handler);
2384 }
2385
2386 static void nvme_del_queue_start(struct kthread_work *work)
2387 {
2388         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2389                                                         cmdinfo.work);
2390         allow_signal(SIGKILL);
2391         if (nvme_delete_sq(nvmeq))
2392                 nvme_del_queue_end(nvmeq);
2393 }
2394
2395 static void nvme_disable_io_queues(struct nvme_dev *dev)
2396 {
2397         int i;
2398         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2399         struct nvme_delq_ctx dq;
2400         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2401                                         &worker, "nvme%d", dev->instance);
2402
2403         if (IS_ERR(kworker_task)) {
2404                 dev_err(&dev->pci_dev->dev,
2405                         "Failed to create queue del task\n");
2406                 for (i = dev->queue_count - 1; i > 0; i--)
2407                         nvme_disable_queue(dev, i);
2408                 return;
2409         }
2410
2411         dq.waiter = NULL;
2412         atomic_set(&dq.refcount, 0);
2413         dq.worker = &worker;
2414         for (i = dev->queue_count - 1; i > 0; i--) {
2415                 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2416
2417                 if (nvme_suspend_queue(nvmeq))
2418                         continue;
2419                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2420                 nvmeq->cmdinfo.worker = dq.worker;
2421                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2422                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2423         }
2424         nvme_wait_dq(&dq, dev);
2425         kthread_stop(kworker_task);
2426 }
2427
2428 /*
2429 * Remove the node from the device list and check
2430 * for whether or not we need to stop the nvme_thread.
2431 */
2432 static void nvme_dev_list_remove(struct nvme_dev *dev)
2433 {
2434         struct task_struct *tmp = NULL;
2435
2436         spin_lock(&dev_list_lock);
2437         list_del_init(&dev->node);
2438         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2439                 tmp = nvme_thread;
2440                 nvme_thread = NULL;
2441         }
2442         spin_unlock(&dev_list_lock);
2443
2444         if (tmp)
2445                 kthread_stop(tmp);
2446 }
2447
2448 static void nvme_dev_shutdown(struct nvme_dev *dev)
2449 {
2450         int i;
2451
2452         dev->initialized = 0;
2453         unregister_hotcpu_notifier(&dev->nb);
2454
2455         nvme_dev_list_remove(dev);
2456
2457         if (!dev->bar || (dev->bar && readl(&dev->bar->csts) == -1)) {
2458                 for (i = dev->queue_count - 1; i >= 0; i--) {
2459                         struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2460                         nvme_suspend_queue(nvmeq);
2461                         nvme_clear_queue(nvmeq);
2462                 }
2463         } else {
2464                 nvme_disable_io_queues(dev);
2465                 nvme_shutdown_ctrl(dev);
2466                 nvme_disable_queue(dev, 0);
2467         }
2468         nvme_dev_unmap(dev);
2469 }
2470
2471 static void nvme_dev_remove(struct nvme_dev *dev)
2472 {
2473         struct nvme_ns *ns;
2474
2475         list_for_each_entry(ns, &dev->namespaces, list) {
2476                 if (ns->disk->flags & GENHD_FL_UP)
2477                         del_gendisk(ns->disk);
2478                 if (!blk_queue_dying(ns->queue))
2479                         blk_cleanup_queue(ns->queue);
2480         }
2481 }
2482
2483 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2484 {
2485         struct device *dmadev = &dev->pci_dev->dev;
2486         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2487                                                 PAGE_SIZE, PAGE_SIZE, 0);
2488         if (!dev->prp_page_pool)
2489                 return -ENOMEM;
2490
2491         /* Optimisation for I/Os between 4k and 128k */
2492         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2493                                                 256, 256, 0);
2494         if (!dev->prp_small_pool) {
2495                 dma_pool_destroy(dev->prp_page_pool);
2496                 return -ENOMEM;
2497         }
2498         return 0;
2499 }
2500
2501 static void nvme_release_prp_pools(struct nvme_dev *dev)
2502 {
2503         dma_pool_destroy(dev->prp_page_pool);
2504         dma_pool_destroy(dev->prp_small_pool);
2505 }
2506
2507 static DEFINE_IDA(nvme_instance_ida);
2508
2509 static int nvme_set_instance(struct nvme_dev *dev)
2510 {
2511         int instance, error;
2512
2513         do {
2514                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2515                         return -ENODEV;
2516
2517                 spin_lock(&dev_list_lock);
2518                 error = ida_get_new(&nvme_instance_ida, &instance);
2519                 spin_unlock(&dev_list_lock);
2520         } while (error == -EAGAIN);
2521
2522         if (error)
2523                 return -ENODEV;
2524
2525         dev->instance = instance;
2526         return 0;
2527 }
2528
2529 static void nvme_release_instance(struct nvme_dev *dev)
2530 {
2531         spin_lock(&dev_list_lock);
2532         ida_remove(&nvme_instance_ida, dev->instance);
2533         spin_unlock(&dev_list_lock);
2534 }
2535
2536 static void nvme_free_namespaces(struct nvme_dev *dev)
2537 {
2538         struct nvme_ns *ns, *next;
2539
2540         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2541                 list_del(&ns->list);
2542                 put_disk(ns->disk);
2543                 kfree(ns);
2544         }
2545 }
2546
2547 static void nvme_free_dev(struct kref *kref)
2548 {
2549         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2550
2551         nvme_free_namespaces(dev);
2552         free_percpu(dev->io_queue);
2553         kfree(dev->queues);
2554         kfree(dev->entry);
2555         kfree(dev);
2556 }
2557
2558 static int nvme_dev_open(struct inode *inode, struct file *f)
2559 {
2560         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2561                                                                 miscdev);
2562         kref_get(&dev->kref);
2563         f->private_data = dev;
2564         return 0;
2565 }
2566
2567 static int nvme_dev_release(struct inode *inode, struct file *f)
2568 {
2569         struct nvme_dev *dev = f->private_data;
2570         kref_put(&dev->kref, nvme_free_dev);
2571         return 0;
2572 }
2573
2574 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2575 {
2576         struct nvme_dev *dev = f->private_data;
2577         switch (cmd) {
2578         case NVME_IOCTL_ADMIN_CMD:
2579                 return nvme_user_admin_cmd(dev, (void __user *)arg);
2580         default:
2581                 return -ENOTTY;
2582         }
2583 }
2584
2585 static const struct file_operations nvme_dev_fops = {
2586         .owner          = THIS_MODULE,
2587         .open           = nvme_dev_open,
2588         .release        = nvme_dev_release,
2589         .unlocked_ioctl = nvme_dev_ioctl,
2590         .compat_ioctl   = nvme_dev_ioctl,
2591 };
2592
2593 static int nvme_dev_start(struct nvme_dev *dev)
2594 {
2595         int result;
2596         bool start_thread = false;
2597
2598         result = nvme_dev_map(dev);
2599         if (result)
2600                 return result;
2601
2602         result = nvme_configure_admin_queue(dev);
2603         if (result)
2604                 goto unmap;
2605
2606         spin_lock(&dev_list_lock);
2607         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2608                 start_thread = true;
2609                 nvme_thread = NULL;
2610         }
2611         list_add(&dev->node, &dev_list);
2612         spin_unlock(&dev_list_lock);
2613
2614         if (start_thread) {
2615                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2616                 wake_up(&nvme_kthread_wait);
2617         } else
2618                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2619
2620         if (IS_ERR_OR_NULL(nvme_thread)) {
2621                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2622                 goto disable;
2623         }
2624
2625         result = nvme_setup_io_queues(dev);
2626         if (result && result != -EBUSY)
2627                 goto disable;
2628
2629         return result;
2630
2631  disable:
2632         nvme_disable_queue(dev, 0);
2633         nvme_dev_list_remove(dev);
2634  unmap:
2635         nvme_dev_unmap(dev);
2636         return result;
2637 }
2638
2639 static int nvme_remove_dead_ctrl(void *arg)
2640 {
2641         struct nvme_dev *dev = (struct nvme_dev *)arg;
2642         struct pci_dev *pdev = dev->pci_dev;
2643
2644         if (pci_get_drvdata(pdev))
2645                 pci_stop_and_remove_bus_device(pdev);
2646         kref_put(&dev->kref, nvme_free_dev);
2647         return 0;
2648 }
2649
2650 static void nvme_remove_disks(struct work_struct *ws)
2651 {
2652         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2653
2654         nvme_dev_remove(dev);
2655         nvme_free_queues(dev, 1);
2656 }
2657
2658 static int nvme_dev_resume(struct nvme_dev *dev)
2659 {
2660         int ret;
2661
2662         ret = nvme_dev_start(dev);
2663         if (ret && ret != -EBUSY)
2664                 return ret;
2665         if (ret == -EBUSY) {
2666                 spin_lock(&dev_list_lock);
2667                 dev->reset_workfn = nvme_remove_disks;
2668                 queue_work(nvme_workq, &dev->reset_work);
2669                 spin_unlock(&dev_list_lock);
2670         }
2671         dev->initialized = 1;
2672         return 0;
2673 }
2674
2675 static void nvme_dev_reset(struct nvme_dev *dev)
2676 {
2677         nvme_dev_shutdown(dev);
2678         if (nvme_dev_resume(dev)) {
2679                 dev_err(&dev->pci_dev->dev, "Device failed to resume\n");
2680                 kref_get(&dev->kref);
2681                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2682                                                         dev->instance))) {
2683                         dev_err(&dev->pci_dev->dev,
2684                                 "Failed to start controller remove task\n");
2685                         kref_put(&dev->kref, nvme_free_dev);
2686                 }
2687         }
2688 }
2689
2690 static void nvme_reset_failed_dev(struct work_struct *ws)
2691 {
2692         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2693         nvme_dev_reset(dev);
2694 }
2695
2696 static void nvme_reset_workfn(struct work_struct *work)
2697 {
2698         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2699         dev->reset_workfn(work);
2700 }
2701
2702 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2703 {
2704         int result = -ENOMEM;
2705         struct nvme_dev *dev;
2706
2707         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2708         if (!dev)
2709                 return -ENOMEM;
2710         dev->entry = kcalloc(num_possible_cpus(), sizeof(*dev->entry),
2711                                                                 GFP_KERNEL);
2712         if (!dev->entry)
2713                 goto free;
2714         dev->queues = kcalloc(num_possible_cpus() + 1, sizeof(void *),
2715                                                                 GFP_KERNEL);
2716         if (!dev->queues)
2717                 goto free;
2718         dev->io_queue = alloc_percpu(unsigned short);
2719         if (!dev->io_queue)
2720                 goto free;
2721
2722         INIT_LIST_HEAD(&dev->namespaces);
2723         dev->reset_workfn = nvme_reset_failed_dev;
2724         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2725         dev->pci_dev = pdev;
2726         pci_set_drvdata(pdev, dev);
2727         result = nvme_set_instance(dev);
2728         if (result)
2729                 goto free;
2730
2731         result = nvme_setup_prp_pools(dev);
2732         if (result)
2733                 goto release;
2734
2735         kref_init(&dev->kref);
2736         result = nvme_dev_start(dev);
2737         if (result) {
2738                 if (result == -EBUSY)
2739                         goto create_cdev;
2740                 goto release_pools;
2741         }
2742
2743         result = nvme_dev_add(dev);
2744         if (result)
2745                 goto shutdown;
2746
2747  create_cdev:
2748         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2749         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2750         dev->miscdev.parent = &pdev->dev;
2751         dev->miscdev.name = dev->name;
2752         dev->miscdev.fops = &nvme_dev_fops;
2753         result = misc_register(&dev->miscdev);
2754         if (result)
2755                 goto remove;
2756
2757         dev->initialized = 1;
2758         return 0;
2759
2760  remove:
2761         nvme_dev_remove(dev);
2762         nvme_free_namespaces(dev);
2763  shutdown:
2764         nvme_dev_shutdown(dev);
2765  release_pools:
2766         nvme_free_queues(dev, 0);
2767         nvme_release_prp_pools(dev);
2768  release:
2769         nvme_release_instance(dev);
2770  free:
2771         free_percpu(dev->io_queue);
2772         kfree(dev->queues);
2773         kfree(dev->entry);
2774         kfree(dev);
2775         return result;
2776 }
2777
2778 static void nvme_shutdown(struct pci_dev *pdev)
2779 {
2780         struct nvme_dev *dev = pci_get_drvdata(pdev);
2781         nvme_dev_shutdown(dev);
2782 }
2783
2784 static void nvme_remove(struct pci_dev *pdev)
2785 {
2786         struct nvme_dev *dev = pci_get_drvdata(pdev);
2787
2788         spin_lock(&dev_list_lock);
2789         list_del_init(&dev->node);
2790         spin_unlock(&dev_list_lock);
2791
2792         pci_set_drvdata(pdev, NULL);
2793         flush_work(&dev->reset_work);
2794         misc_deregister(&dev->miscdev);
2795         nvme_dev_remove(dev);
2796         nvme_dev_shutdown(dev);
2797         nvme_free_queues(dev, 0);
2798         rcu_barrier();
2799         nvme_release_instance(dev);
2800         nvme_release_prp_pools(dev);
2801         kref_put(&dev->kref, nvme_free_dev);
2802 }
2803
2804 /* These functions are yet to be implemented */
2805 #define nvme_error_detected NULL
2806 #define nvme_dump_registers NULL
2807 #define nvme_link_reset NULL
2808 #define nvme_slot_reset NULL
2809 #define nvme_error_resume NULL
2810
2811 #ifdef CONFIG_PM_SLEEP
2812 static int nvme_suspend(struct device *dev)
2813 {
2814         struct pci_dev *pdev = to_pci_dev(dev);
2815         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2816
2817         nvme_dev_shutdown(ndev);
2818         return 0;
2819 }
2820
2821 static int nvme_resume(struct device *dev)
2822 {
2823         struct pci_dev *pdev = to_pci_dev(dev);
2824         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2825
2826         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2827                 ndev->reset_workfn = nvme_reset_failed_dev;
2828                 queue_work(nvme_workq, &ndev->reset_work);
2829         }
2830         return 0;
2831 }
2832 #endif
2833
2834 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2835
2836 static const struct pci_error_handlers nvme_err_handler = {
2837         .error_detected = nvme_error_detected,
2838         .mmio_enabled   = nvme_dump_registers,
2839         .link_reset     = nvme_link_reset,
2840         .slot_reset     = nvme_slot_reset,
2841         .resume         = nvme_error_resume,
2842 };
2843
2844 /* Move to pci_ids.h later */
2845 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2846
2847 static const struct pci_device_id nvme_id_table[] = {
2848         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2849         { 0, }
2850 };
2851 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2852
2853 static struct pci_driver nvme_driver = {
2854         .name           = "nvme",
2855         .id_table       = nvme_id_table,
2856         .probe          = nvme_probe,
2857         .remove         = nvme_remove,
2858         .shutdown       = nvme_shutdown,
2859         .driver         = {
2860                 .pm     = &nvme_dev_pm_ops,
2861         },
2862         .err_handler    = &nvme_err_handler,
2863 };
2864
2865 static int __init nvme_init(void)
2866 {
2867         int result;
2868
2869         init_waitqueue_head(&nvme_kthread_wait);
2870
2871         nvme_workq = create_singlethread_workqueue("nvme");
2872         if (!nvme_workq)
2873                 return -ENOMEM;
2874
2875         result = register_blkdev(nvme_major, "nvme");
2876         if (result < 0)
2877                 goto kill_workq;
2878         else if (result > 0)
2879                 nvme_major = result;
2880
2881         result = pci_register_driver(&nvme_driver);
2882         if (result)
2883                 goto unregister_blkdev;
2884         return 0;
2885
2886  unregister_blkdev:
2887         unregister_blkdev(nvme_major, "nvme");
2888  kill_workq:
2889         destroy_workqueue(nvme_workq);
2890         return result;
2891 }
2892
2893 static void __exit nvme_exit(void)
2894 {
2895         pci_unregister_driver(&nvme_driver);
2896         unregister_blkdev(nvme_major, "nvme");
2897         destroy_workqueue(nvme_workq);
2898         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
2899 }
2900
2901 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2902 MODULE_LICENSE("GPL");
2903 MODULE_VERSION("0.9");
2904 module_init(nvme_init);
2905 module_exit(nvme_exit);