2 * NVM Express device driver
3 * Copyright (c) 2011, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 #include <linux/nvme.h>
20 #include <linux/bio.h>
21 #include <linux/bitops.h>
22 #include <linux/blkdev.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
26 #include <linux/genhd.h>
27 #include <linux/idr.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
31 #include <linux/kdev_t.h>
32 #include <linux/kthread.h>
33 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/pci.h>
38 #include <linux/poison.h>
39 #include <linux/ptrace.h>
40 #include <linux/sched.h>
41 #include <linux/slab.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_Q_DEPTH 1024
47 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
48 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
49 #define ADMIN_TIMEOUT (60 * HZ)
51 static int nvme_major;
52 module_param(nvme_major, int, 0);
54 static int use_threaded_interrupts;
55 module_param(use_threaded_interrupts, int, 0);
57 static DEFINE_SPINLOCK(dev_list_lock);
58 static LIST_HEAD(dev_list);
59 static struct task_struct *nvme_thread;
60 static struct workqueue_struct *nvme_workq;
62 static void nvme_reset_failed_dev(struct work_struct *ws);
64 struct async_cmd_info {
65 struct kthread_work work;
66 struct kthread_worker *worker;
73 * An NVM Express queue. Each device has at least two (one for admin
74 * commands and one for I/O commands).
77 struct rcu_head r_head;
78 struct device *q_dmadev;
80 char irqname[24]; /* nvme4294967295-65535\0 */
82 struct nvme_command *sq_cmds;
83 volatile struct nvme_completion *cqes;
84 dma_addr_t sq_dma_addr;
85 dma_addr_t cq_dma_addr;
86 wait_queue_head_t sq_full;
87 wait_queue_t sq_cong_wait;
88 struct bio_list sq_cong;
99 struct async_cmd_info cmdinfo;
100 unsigned long cmdid_data[];
104 * Check we didin't inadvertently grow the command struct
106 static inline void _nvme_check_size(void)
108 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
109 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
110 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
111 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
112 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
113 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
114 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
115 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
116 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
117 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
118 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
119 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
122 typedef void (*nvme_completion_fn)(struct nvme_dev *, void *,
123 struct nvme_completion *);
125 struct nvme_cmd_info {
126 nvme_completion_fn fn;
128 unsigned long timeout;
132 static struct nvme_cmd_info *nvme_cmd_info(struct nvme_queue *nvmeq)
134 return (void *)&nvmeq->cmdid_data[BITS_TO_LONGS(nvmeq->q_depth)];
137 static unsigned nvme_queue_extra(int depth)
139 return DIV_ROUND_UP(depth, 8) + (depth * sizeof(struct nvme_cmd_info));
143 * alloc_cmdid() - Allocate a Command ID
144 * @nvmeq: The queue that will be used for this command
145 * @ctx: A pointer that will be passed to the handler
146 * @handler: The function to call on completion
148 * Allocate a Command ID for a queue. The data passed in will
149 * be passed to the completion handler. This is implemented by using
150 * the bottom two bits of the ctx pointer to store the handler ID.
151 * Passing in a pointer that's not 4-byte aligned will cause a BUG.
152 * We can change this if it becomes a problem.
154 * May be called with local interrupts disabled and the q_lock held,
155 * or with interrupts enabled and no locks held.
157 static int alloc_cmdid(struct nvme_queue *nvmeq, void *ctx,
158 nvme_completion_fn handler, unsigned timeout)
160 int depth = nvmeq->q_depth - 1;
161 struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
165 cmdid = find_first_zero_bit(nvmeq->cmdid_data, depth);
168 } while (test_and_set_bit(cmdid, nvmeq->cmdid_data));
170 info[cmdid].fn = handler;
171 info[cmdid].ctx = ctx;
172 info[cmdid].timeout = jiffies + timeout;
173 info[cmdid].aborted = 0;
177 static int alloc_cmdid_killable(struct nvme_queue *nvmeq, void *ctx,
178 nvme_completion_fn handler, unsigned timeout)
181 wait_event_killable(nvmeq->sq_full,
182 (cmdid = alloc_cmdid(nvmeq, ctx, handler, timeout)) >= 0);
183 return (cmdid < 0) ? -EINTR : cmdid;
186 /* Special values must be less than 0x1000 */
187 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
188 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
189 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
190 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
191 #define CMD_CTX_FLUSH (0x318 + CMD_CTX_BASE)
192 #define CMD_CTX_ABORT (0x31C + CMD_CTX_BASE)
194 static void special_completion(struct nvme_dev *dev, void *ctx,
195 struct nvme_completion *cqe)
197 if (ctx == CMD_CTX_CANCELLED)
199 if (ctx == CMD_CTX_FLUSH)
201 if (ctx == CMD_CTX_ABORT) {
205 if (ctx == CMD_CTX_COMPLETED) {
206 dev_warn(&dev->pci_dev->dev,
207 "completed id %d twice on queue %d\n",
208 cqe->command_id, le16_to_cpup(&cqe->sq_id));
211 if (ctx == CMD_CTX_INVALID) {
212 dev_warn(&dev->pci_dev->dev,
213 "invalid id %d completed on queue %d\n",
214 cqe->command_id, le16_to_cpup(&cqe->sq_id));
218 dev_warn(&dev->pci_dev->dev, "Unknown special completion %p\n", ctx);
221 static void async_completion(struct nvme_dev *dev, void *ctx,
222 struct nvme_completion *cqe)
224 struct async_cmd_info *cmdinfo = ctx;
225 cmdinfo->result = le32_to_cpup(&cqe->result);
226 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
227 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
231 * Called with local interrupts disabled and the q_lock held. May not sleep.
233 static void *free_cmdid(struct nvme_queue *nvmeq, int cmdid,
234 nvme_completion_fn *fn)
237 struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
239 if (cmdid >= nvmeq->q_depth) {
240 *fn = special_completion;
241 return CMD_CTX_INVALID;
244 *fn = info[cmdid].fn;
245 ctx = info[cmdid].ctx;
246 info[cmdid].fn = special_completion;
247 info[cmdid].ctx = CMD_CTX_COMPLETED;
248 clear_bit(cmdid, nvmeq->cmdid_data);
249 wake_up(&nvmeq->sq_full);
253 static void *cancel_cmdid(struct nvme_queue *nvmeq, int cmdid,
254 nvme_completion_fn *fn)
257 struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
259 *fn = info[cmdid].fn;
260 ctx = info[cmdid].ctx;
261 info[cmdid].fn = special_completion;
262 info[cmdid].ctx = CMD_CTX_CANCELLED;
266 static struct nvme_queue *raw_nvmeq(struct nvme_dev *dev, int qid)
268 return rcu_dereference_raw(dev->queues[qid]);
271 static struct nvme_queue *get_nvmeq(struct nvme_dev *dev) __acquires(RCU)
274 return rcu_dereference(dev->queues[get_cpu() + 1]);
277 static void put_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
283 static struct nvme_queue *lock_nvmeq(struct nvme_dev *dev, int q_idx)
287 return rcu_dereference(dev->queues[q_idx]);
290 static void unlock_nvmeq(struct nvme_queue *nvmeq) __releases(RCU)
296 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
297 * @nvmeq: The queue to use
298 * @cmd: The command to send
300 * Safe to use from interrupt context
302 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
306 spin_lock_irqsave(&nvmeq->q_lock, flags);
307 if (nvmeq->q_suspended) {
308 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
311 tail = nvmeq->sq_tail;
312 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
313 if (++tail == nvmeq->q_depth)
315 writel(tail, nvmeq->q_db);
316 nvmeq->sq_tail = tail;
317 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
322 static __le64 **iod_list(struct nvme_iod *iod)
324 return ((void *)iod) + iod->offset;
328 * Will slightly overestimate the number of pages needed. This is OK
329 * as it only leads to a small amount of wasted memory for the lifetime of
332 static int nvme_npages(unsigned size)
334 unsigned nprps = DIV_ROUND_UP(size + PAGE_SIZE, PAGE_SIZE);
335 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
338 static struct nvme_iod *
339 nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp)
341 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
342 sizeof(__le64 *) * nvme_npages(nbytes) +
343 sizeof(struct scatterlist) * nseg, gfp);
346 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
348 iod->length = nbytes;
350 iod->start_time = jiffies;
356 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
358 const int last_prp = PAGE_SIZE / 8 - 1;
360 __le64 **list = iod_list(iod);
361 dma_addr_t prp_dma = iod->first_dma;
363 if (iod->npages == 0)
364 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
365 for (i = 0; i < iod->npages; i++) {
366 __le64 *prp_list = list[i];
367 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
368 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
369 prp_dma = next_prp_dma;
374 static void nvme_start_io_acct(struct bio *bio)
376 struct gendisk *disk = bio->bi_bdev->bd_disk;
377 const int rw = bio_data_dir(bio);
378 int cpu = part_stat_lock();
379 part_round_stats(cpu, &disk->part0);
380 part_stat_inc(cpu, &disk->part0, ios[rw]);
381 part_stat_add(cpu, &disk->part0, sectors[rw], bio_sectors(bio));
382 part_inc_in_flight(&disk->part0, rw);
386 static void nvme_end_io_acct(struct bio *bio, unsigned long start_time)
388 struct gendisk *disk = bio->bi_bdev->bd_disk;
389 const int rw = bio_data_dir(bio);
390 unsigned long duration = jiffies - start_time;
391 int cpu = part_stat_lock();
392 part_stat_add(cpu, &disk->part0, ticks[rw], duration);
393 part_round_stats(cpu, &disk->part0);
394 part_dec_in_flight(&disk->part0, rw);
398 static void bio_completion(struct nvme_dev *dev, void *ctx,
399 struct nvme_completion *cqe)
401 struct nvme_iod *iod = ctx;
402 struct bio *bio = iod->private;
403 u16 status = le16_to_cpup(&cqe->status) >> 1;
406 dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
407 bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
408 nvme_end_io_acct(bio, iod->start_time);
410 nvme_free_iod(dev, iod);
412 bio_endio(bio, -EIO);
417 /* length is in bytes. gfp flags indicates whether we may sleep. */
418 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_common_command *cmd,
419 struct nvme_iod *iod, int total_len, gfp_t gfp)
421 struct dma_pool *pool;
422 int length = total_len;
423 struct scatterlist *sg = iod->sg;
424 int dma_len = sg_dma_len(sg);
425 u64 dma_addr = sg_dma_address(sg);
426 int offset = offset_in_page(dma_addr);
428 __le64 **list = iod_list(iod);
432 cmd->prp1 = cpu_to_le64(dma_addr);
433 length -= (PAGE_SIZE - offset);
437 dma_len -= (PAGE_SIZE - offset);
439 dma_addr += (PAGE_SIZE - offset);
442 dma_addr = sg_dma_address(sg);
443 dma_len = sg_dma_len(sg);
446 if (length <= PAGE_SIZE) {
447 cmd->prp2 = cpu_to_le64(dma_addr);
451 nprps = DIV_ROUND_UP(length, PAGE_SIZE);
452 if (nprps <= (256 / 8)) {
453 pool = dev->prp_small_pool;
456 pool = dev->prp_page_pool;
460 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
462 cmd->prp2 = cpu_to_le64(dma_addr);
464 return (total_len - length) + PAGE_SIZE;
467 iod->first_dma = prp_dma;
468 cmd->prp2 = cpu_to_le64(prp_dma);
471 if (i == PAGE_SIZE / 8) {
472 __le64 *old_prp_list = prp_list;
473 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
475 return total_len - length;
476 list[iod->npages++] = prp_list;
477 prp_list[0] = old_prp_list[i - 1];
478 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
481 prp_list[i++] = cpu_to_le64(dma_addr);
482 dma_len -= PAGE_SIZE;
483 dma_addr += PAGE_SIZE;
491 dma_addr = sg_dma_address(sg);
492 dma_len = sg_dma_len(sg);
498 static int nvme_split_and_submit(struct bio *bio, struct nvme_queue *nvmeq,
501 struct bio *split = bio_split(bio, len >> 9, GFP_ATOMIC, NULL);
505 bio_chain(split, bio);
507 if (bio_list_empty(&nvmeq->sq_cong))
508 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
509 bio_list_add(&nvmeq->sq_cong, split);
510 bio_list_add(&nvmeq->sq_cong, bio);
515 /* NVMe scatterlists require no holes in the virtual address */
516 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2) ((vec2)->bv_offset || \
517 (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
519 static int nvme_map_bio(struct nvme_queue *nvmeq, struct nvme_iod *iod,
520 struct bio *bio, enum dma_data_direction dma_dir, int psegs)
522 struct bio_vec bvec, bvprv;
523 struct bvec_iter iter;
524 struct scatterlist *sg = NULL;
525 int length = 0, nsegs = 0, split_len = bio->bi_iter.bi_size;
528 if (nvmeq->dev->stripe_size)
529 split_len = nvmeq->dev->stripe_size -
530 ((bio->bi_iter.bi_sector << 9) &
531 (nvmeq->dev->stripe_size - 1));
533 sg_init_table(iod->sg, psegs);
534 bio_for_each_segment(bvec, bio, iter) {
535 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
536 sg->length += bvec.bv_len;
538 if (!first && BIOVEC_NOT_VIRT_MERGEABLE(&bvprv, &bvec))
539 return nvme_split_and_submit(bio, nvmeq,
542 sg = sg ? sg + 1 : iod->sg;
543 sg_set_page(sg, bvec.bv_page,
544 bvec.bv_len, bvec.bv_offset);
548 if (split_len - length < bvec.bv_len)
549 return nvme_split_and_submit(bio, nvmeq, split_len);
550 length += bvec.bv_len;
556 if (dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir) == 0)
559 BUG_ON(length != bio->bi_iter.bi_size);
564 * We reuse the small pool to allocate the 16-byte range here as it is not
565 * worth having a special pool for these or additional cases to handle freeing
568 static int nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
569 struct bio *bio, struct nvme_iod *iod, int cmdid)
571 struct nvme_dsm_range *range;
572 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
574 range = dma_pool_alloc(nvmeq->dev->prp_small_pool, GFP_ATOMIC,
579 iod_list(iod)[0] = (__le64 *)range;
582 range->cattr = cpu_to_le32(0);
583 range->nlb = cpu_to_le32(bio->bi_iter.bi_size >> ns->lba_shift);
584 range->slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
586 memset(cmnd, 0, sizeof(*cmnd));
587 cmnd->dsm.opcode = nvme_cmd_dsm;
588 cmnd->dsm.command_id = cmdid;
589 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
590 cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
592 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
594 if (++nvmeq->sq_tail == nvmeq->q_depth)
596 writel(nvmeq->sq_tail, nvmeq->q_db);
601 static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
604 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
606 memset(cmnd, 0, sizeof(*cmnd));
607 cmnd->common.opcode = nvme_cmd_flush;
608 cmnd->common.command_id = cmdid;
609 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
611 if (++nvmeq->sq_tail == nvmeq->q_depth)
613 writel(nvmeq->sq_tail, nvmeq->q_db);
618 int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns)
620 int cmdid = alloc_cmdid(nvmeq, (void *)CMD_CTX_FLUSH,
621 special_completion, NVME_IO_TIMEOUT);
622 if (unlikely(cmdid < 0))
625 return nvme_submit_flush(nvmeq, ns, cmdid);
629 * Called with local interrupts disabled and the q_lock held. May not sleep.
631 static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
634 struct nvme_command *cmnd;
635 struct nvme_iod *iod;
636 enum dma_data_direction dma_dir;
637 int cmdid, length, result;
640 int psegs = bio_phys_segments(ns->queue, bio);
642 if ((bio->bi_rw & REQ_FLUSH) && psegs) {
643 result = nvme_submit_flush_data(nvmeq, ns);
649 iod = nvme_alloc_iod(psegs, bio->bi_iter.bi_size, GFP_ATOMIC);
655 cmdid = alloc_cmdid(nvmeq, iod, bio_completion, NVME_IO_TIMEOUT);
656 if (unlikely(cmdid < 0))
659 if (bio->bi_rw & REQ_DISCARD) {
660 result = nvme_submit_discard(nvmeq, ns, bio, iod, cmdid);
665 if ((bio->bi_rw & REQ_FLUSH) && !psegs)
666 return nvme_submit_flush(nvmeq, ns, cmdid);
669 if (bio->bi_rw & REQ_FUA)
670 control |= NVME_RW_FUA;
671 if (bio->bi_rw & (REQ_FAILFAST_DEV | REQ_RAHEAD))
672 control |= NVME_RW_LR;
675 if (bio->bi_rw & REQ_RAHEAD)
676 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
678 cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
680 memset(cmnd, 0, sizeof(*cmnd));
681 if (bio_data_dir(bio)) {
682 cmnd->rw.opcode = nvme_cmd_write;
683 dma_dir = DMA_TO_DEVICE;
685 cmnd->rw.opcode = nvme_cmd_read;
686 dma_dir = DMA_FROM_DEVICE;
689 result = nvme_map_bio(nvmeq, iod, bio, dma_dir, psegs);
694 cmnd->rw.command_id = cmdid;
695 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
696 length = nvme_setup_prps(nvmeq->dev, &cmnd->common, iod, length,
698 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_iter.bi_sector));
699 cmnd->rw.length = cpu_to_le16((length >> ns->lba_shift) - 1);
700 cmnd->rw.control = cpu_to_le16(control);
701 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
703 nvme_start_io_acct(bio);
704 if (++nvmeq->sq_tail == nvmeq->q_depth)
706 writel(nvmeq->sq_tail, nvmeq->q_db);
711 free_cmdid(nvmeq, cmdid, NULL);
713 nvme_free_iod(nvmeq->dev, iod);
718 static int nvme_process_cq(struct nvme_queue *nvmeq)
722 head = nvmeq->cq_head;
723 phase = nvmeq->cq_phase;
727 nvme_completion_fn fn;
728 struct nvme_completion cqe = nvmeq->cqes[head];
729 if ((le16_to_cpu(cqe.status) & 1) != phase)
731 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
732 if (++head == nvmeq->q_depth) {
737 ctx = free_cmdid(nvmeq, cqe.command_id, &fn);
738 fn(nvmeq->dev, ctx, &cqe);
741 /* If the controller ignores the cq head doorbell and continuously
742 * writes to the queue, it is theoretically possible to wrap around
743 * the queue twice and mistakenly return IRQ_NONE. Linux only
744 * requires that 0.1% of your interrupts are handled, so this isn't
747 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
750 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
751 nvmeq->cq_head = head;
752 nvmeq->cq_phase = phase;
758 static void nvme_make_request(struct request_queue *q, struct bio *bio)
760 struct nvme_ns *ns = q->queuedata;
761 struct nvme_queue *nvmeq = get_nvmeq(ns->dev);
766 bio_endio(bio, -EIO);
770 spin_lock_irq(&nvmeq->q_lock);
771 if (!nvmeq->q_suspended && bio_list_empty(&nvmeq->sq_cong))
772 result = nvme_submit_bio_queue(nvmeq, ns, bio);
773 if (unlikely(result)) {
774 if (bio_list_empty(&nvmeq->sq_cong))
775 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
776 bio_list_add(&nvmeq->sq_cong, bio);
779 nvme_process_cq(nvmeq);
780 spin_unlock_irq(&nvmeq->q_lock);
784 static irqreturn_t nvme_irq(int irq, void *data)
787 struct nvme_queue *nvmeq = data;
788 spin_lock(&nvmeq->q_lock);
789 nvme_process_cq(nvmeq);
790 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
792 spin_unlock(&nvmeq->q_lock);
796 static irqreturn_t nvme_irq_check(int irq, void *data)
798 struct nvme_queue *nvmeq = data;
799 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
800 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
802 return IRQ_WAKE_THREAD;
805 static void nvme_abort_command(struct nvme_queue *nvmeq, int cmdid)
807 spin_lock_irq(&nvmeq->q_lock);
808 cancel_cmdid(nvmeq, cmdid, NULL);
809 spin_unlock_irq(&nvmeq->q_lock);
812 struct sync_cmd_info {
813 struct task_struct *task;
818 static void sync_completion(struct nvme_dev *dev, void *ctx,
819 struct nvme_completion *cqe)
821 struct sync_cmd_info *cmdinfo = ctx;
822 cmdinfo->result = le32_to_cpup(&cqe->result);
823 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
824 wake_up_process(cmdinfo->task);
828 * Returns 0 on success. If the result is negative, it's a Linux error code;
829 * if the result is positive, it's an NVM Express status code
831 static int nvme_submit_sync_cmd(struct nvme_dev *dev, int q_idx,
832 struct nvme_command *cmd,
833 u32 *result, unsigned timeout)
836 struct sync_cmd_info cmdinfo;
837 struct nvme_queue *nvmeq;
839 nvmeq = lock_nvmeq(dev, q_idx);
845 cmdinfo.task = current;
846 cmdinfo.status = -EINTR;
848 cmdid = alloc_cmdid(nvmeq, &cmdinfo, sync_completion, timeout);
853 cmd->common.command_id = cmdid;
855 set_current_state(TASK_KILLABLE);
856 ret = nvme_submit_cmd(nvmeq, cmd);
858 free_cmdid(nvmeq, cmdid, NULL);
860 set_current_state(TASK_RUNNING);
864 schedule_timeout(timeout);
866 if (cmdinfo.status == -EINTR) {
867 nvmeq = lock_nvmeq(dev, q_idx);
869 nvme_abort_command(nvmeq, cmdid);
875 *result = cmdinfo.result;
877 return cmdinfo.status;
880 static int nvme_submit_async_cmd(struct nvme_queue *nvmeq,
881 struct nvme_command *cmd,
882 struct async_cmd_info *cmdinfo, unsigned timeout)
886 cmdid = alloc_cmdid_killable(nvmeq, cmdinfo, async_completion, timeout);
889 cmdinfo->status = -EINTR;
890 cmd->common.command_id = cmdid;
891 return nvme_submit_cmd(nvmeq, cmd);
894 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
897 return nvme_submit_sync_cmd(dev, 0, cmd, result, ADMIN_TIMEOUT);
900 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
903 return nvme_submit_sync_cmd(dev, smp_processor_id() + 1, cmd, result,
907 static int nvme_submit_admin_cmd_async(struct nvme_dev *dev,
908 struct nvme_command *cmd, struct async_cmd_info *cmdinfo)
910 return nvme_submit_async_cmd(raw_nvmeq(dev, 0), cmd, cmdinfo,
914 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
917 struct nvme_command c;
919 memset(&c, 0, sizeof(c));
920 c.delete_queue.opcode = opcode;
921 c.delete_queue.qid = cpu_to_le16(id);
923 status = nvme_submit_admin_cmd(dev, &c, NULL);
929 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
930 struct nvme_queue *nvmeq)
933 struct nvme_command c;
934 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
936 memset(&c, 0, sizeof(c));
937 c.create_cq.opcode = nvme_admin_create_cq;
938 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
939 c.create_cq.cqid = cpu_to_le16(qid);
940 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
941 c.create_cq.cq_flags = cpu_to_le16(flags);
942 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
944 status = nvme_submit_admin_cmd(dev, &c, NULL);
950 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
951 struct nvme_queue *nvmeq)
954 struct nvme_command c;
955 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
957 memset(&c, 0, sizeof(c));
958 c.create_sq.opcode = nvme_admin_create_sq;
959 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
960 c.create_sq.sqid = cpu_to_le16(qid);
961 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
962 c.create_sq.sq_flags = cpu_to_le16(flags);
963 c.create_sq.cqid = cpu_to_le16(qid);
965 status = nvme_submit_admin_cmd(dev, &c, NULL);
971 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
973 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
976 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
978 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
981 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
984 struct nvme_command c;
986 memset(&c, 0, sizeof(c));
987 c.identify.opcode = nvme_admin_identify;
988 c.identify.nsid = cpu_to_le32(nsid);
989 c.identify.prp1 = cpu_to_le64(dma_addr);
990 c.identify.cns = cpu_to_le32(cns);
992 return nvme_submit_admin_cmd(dev, &c, NULL);
995 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
996 dma_addr_t dma_addr, u32 *result)
998 struct nvme_command c;
1000 memset(&c, 0, sizeof(c));
1001 c.features.opcode = nvme_admin_get_features;
1002 c.features.nsid = cpu_to_le32(nsid);
1003 c.features.prp1 = cpu_to_le64(dma_addr);
1004 c.features.fid = cpu_to_le32(fid);
1006 return nvme_submit_admin_cmd(dev, &c, result);
1009 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1010 dma_addr_t dma_addr, u32 *result)
1012 struct nvme_command c;
1014 memset(&c, 0, sizeof(c));
1015 c.features.opcode = nvme_admin_set_features;
1016 c.features.prp1 = cpu_to_le64(dma_addr);
1017 c.features.fid = cpu_to_le32(fid);
1018 c.features.dword11 = cpu_to_le32(dword11);
1020 return nvme_submit_admin_cmd(dev, &c, result);
1024 * nvme_abort_cmd - Attempt aborting a command
1025 * @cmdid: Command id of a timed out IO
1026 * @queue: The queue with timed out IO
1028 * Schedule controller reset if the command was already aborted once before and
1029 * still hasn't been returned to the driver, or if this is the admin queue.
1031 static void nvme_abort_cmd(int cmdid, struct nvme_queue *nvmeq)
1034 struct nvme_command cmd;
1035 struct nvme_dev *dev = nvmeq->dev;
1036 struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1037 struct nvme_queue *adminq;
1039 if (!nvmeq->qid || info[cmdid].aborted) {
1040 if (work_busy(&dev->reset_work))
1042 list_del_init(&dev->node);
1043 dev_warn(&dev->pci_dev->dev,
1044 "I/O %d QID %d timeout, reset controller\n", cmdid,
1046 PREPARE_WORK(&dev->reset_work, nvme_reset_failed_dev);
1047 queue_work(nvme_workq, &dev->reset_work);
1051 if (!dev->abort_limit)
1054 adminq = rcu_dereference(dev->queues[0]);
1055 a_cmdid = alloc_cmdid(adminq, CMD_CTX_ABORT, special_completion,
1060 memset(&cmd, 0, sizeof(cmd));
1061 cmd.abort.opcode = nvme_admin_abort_cmd;
1062 cmd.abort.cid = cmdid;
1063 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1064 cmd.abort.command_id = a_cmdid;
1067 info[cmdid].aborted = 1;
1068 info[cmdid].timeout = jiffies + ADMIN_TIMEOUT;
1070 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", cmdid,
1072 nvme_submit_cmd(adminq, &cmd);
1076 * nvme_cancel_ios - Cancel outstanding I/Os
1077 * @queue: The queue to cancel I/Os on
1078 * @timeout: True to only cancel I/Os which have timed out
1080 static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
1082 int depth = nvmeq->q_depth - 1;
1083 struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1084 unsigned long now = jiffies;
1087 for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
1089 nvme_completion_fn fn;
1090 static struct nvme_completion cqe = {
1091 .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1094 if (timeout && !time_after(now, info[cmdid].timeout))
1096 if (info[cmdid].ctx == CMD_CTX_CANCELLED)
1098 if (timeout && nvmeq->dev->initialized) {
1099 nvme_abort_cmd(cmdid, nvmeq);
1102 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n", cmdid,
1104 ctx = cancel_cmdid(nvmeq, cmdid, &fn);
1105 fn(nvmeq->dev, ctx, &cqe);
1109 static void nvme_free_queue(struct rcu_head *r)
1111 struct nvme_queue *nvmeq = container_of(r, struct nvme_queue, r_head);
1113 spin_lock_irq(&nvmeq->q_lock);
1114 while (bio_list_peek(&nvmeq->sq_cong)) {
1115 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1116 bio_endio(bio, -EIO);
1118 spin_unlock_irq(&nvmeq->q_lock);
1120 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1121 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1122 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1123 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1127 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1131 for (i = num_possible_cpus(); i > dev->queue_count - 1; i--)
1132 rcu_assign_pointer(dev->queues[i], NULL);
1133 for (i = dev->queue_count - 1; i >= lowest; i--) {
1134 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
1135 rcu_assign_pointer(dev->queues[i], NULL);
1136 call_rcu(&nvmeq->r_head, nvme_free_queue);
1142 * nvme_suspend_queue - put queue into suspended state
1143 * @nvmeq - queue to suspend
1145 * Returns 1 if already suspended, 0 otherwise.
1147 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1149 int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1151 spin_lock_irq(&nvmeq->q_lock);
1152 if (nvmeq->q_suspended) {
1153 spin_unlock_irq(&nvmeq->q_lock);
1156 nvmeq->q_suspended = 1;
1157 spin_unlock_irq(&nvmeq->q_lock);
1159 irq_set_affinity_hint(vector, NULL);
1160 free_irq(vector, nvmeq);
1165 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1167 spin_lock_irq(&nvmeq->q_lock);
1168 nvme_process_cq(nvmeq);
1169 nvme_cancel_ios(nvmeq, false);
1170 spin_unlock_irq(&nvmeq->q_lock);
1173 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1175 struct nvme_queue *nvmeq = raw_nvmeq(dev, qid);
1179 if (nvme_suspend_queue(nvmeq))
1182 /* Don't tell the adapter to delete the admin queue.
1183 * Don't tell a removed adapter to delete IO queues. */
1184 if (qid && readl(&dev->bar->csts) != -1) {
1185 adapter_delete_sq(dev, qid);
1186 adapter_delete_cq(dev, qid);
1188 nvme_clear_queue(nvmeq);
1191 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1192 int depth, int vector)
1194 struct device *dmadev = &dev->pci_dev->dev;
1195 unsigned extra = nvme_queue_extra(depth);
1196 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
1200 nvmeq->cqes = dma_alloc_coherent(dmadev, CQ_SIZE(depth),
1201 &nvmeq->cq_dma_addr, GFP_KERNEL);
1204 memset((void *)nvmeq->cqes, 0, CQ_SIZE(depth));
1206 nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1207 &nvmeq->sq_dma_addr, GFP_KERNEL);
1208 if (!nvmeq->sq_cmds)
1211 nvmeq->q_dmadev = dmadev;
1213 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1214 dev->instance, qid);
1215 spin_lock_init(&nvmeq->q_lock);
1217 nvmeq->cq_phase = 1;
1218 init_waitqueue_head(&nvmeq->sq_full);
1219 init_waitqueue_entry(&nvmeq->sq_cong_wait, nvme_thread);
1220 bio_list_init(&nvmeq->sq_cong);
1221 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1222 nvmeq->q_depth = depth;
1223 nvmeq->cq_vector = vector;
1225 nvmeq->q_suspended = 1;
1227 rcu_assign_pointer(dev->queues[qid], nvmeq);
1232 dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1233 nvmeq->cq_dma_addr);
1239 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1242 if (use_threaded_interrupts)
1243 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1244 nvme_irq_check, nvme_irq, IRQF_SHARED,
1246 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1247 IRQF_SHARED, name, nvmeq);
1250 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1252 struct nvme_dev *dev = nvmeq->dev;
1253 unsigned extra = nvme_queue_extra(nvmeq->q_depth);
1257 nvmeq->cq_phase = 1;
1258 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1259 memset(nvmeq->cmdid_data, 0, extra);
1260 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1261 nvme_cancel_ios(nvmeq, false);
1262 nvmeq->q_suspended = 0;
1265 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1267 struct nvme_dev *dev = nvmeq->dev;
1270 result = adapter_alloc_cq(dev, qid, nvmeq);
1274 result = adapter_alloc_sq(dev, qid, nvmeq);
1278 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1282 spin_lock_irq(&nvmeq->q_lock);
1283 nvme_init_queue(nvmeq, qid);
1284 spin_unlock_irq(&nvmeq->q_lock);
1289 adapter_delete_sq(dev, qid);
1291 adapter_delete_cq(dev, qid);
1295 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1297 unsigned long timeout;
1298 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1300 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1302 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1304 if (fatal_signal_pending(current))
1306 if (time_after(jiffies, timeout)) {
1307 dev_err(&dev->pci_dev->dev,
1308 "Device not ready; aborting initialisation\n");
1317 * If the device has been passed off to us in an enabled state, just clear
1318 * the enabled bit. The spec says we should set the 'shutdown notification
1319 * bits', but doing so may cause the device to complete commands to the
1320 * admin queue ... and we don't know what memory that might be pointing at!
1322 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1324 u32 cc = readl(&dev->bar->cc);
1326 if (cc & NVME_CC_ENABLE)
1327 writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
1328 return nvme_wait_ready(dev, cap, false);
1331 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1333 return nvme_wait_ready(dev, cap, true);
1336 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1338 unsigned long timeout;
1341 cc = (readl(&dev->bar->cc) & ~NVME_CC_SHN_MASK) | NVME_CC_SHN_NORMAL;
1342 writel(cc, &dev->bar->cc);
1344 timeout = 2 * HZ + jiffies;
1345 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1346 NVME_CSTS_SHST_CMPLT) {
1348 if (fatal_signal_pending(current))
1350 if (time_after(jiffies, timeout)) {
1351 dev_err(&dev->pci_dev->dev,
1352 "Device shutdown incomplete; abort shutdown\n");
1360 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1364 u64 cap = readq(&dev->bar->cap);
1365 struct nvme_queue *nvmeq;
1367 result = nvme_disable_ctrl(dev, cap);
1371 nvmeq = raw_nvmeq(dev, 0);
1373 nvmeq = nvme_alloc_queue(dev, 0, 64, 0);
1378 aqa = nvmeq->q_depth - 1;
1381 dev->ctrl_config = NVME_CC_ENABLE | NVME_CC_CSS_NVM;
1382 dev->ctrl_config |= (PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
1383 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1384 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1386 writel(aqa, &dev->bar->aqa);
1387 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1388 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1389 writel(dev->ctrl_config, &dev->bar->cc);
1391 result = nvme_enable_ctrl(dev, cap);
1395 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1399 spin_lock_irq(&nvmeq->q_lock);
1400 nvme_init_queue(nvmeq, 0);
1401 spin_unlock_irq(&nvmeq->q_lock);
1405 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1406 unsigned long addr, unsigned length)
1408 int i, err, count, nents, offset;
1409 struct scatterlist *sg;
1410 struct page **pages;
1411 struct nvme_iod *iod;
1414 return ERR_PTR(-EINVAL);
1415 if (!length || length > INT_MAX - PAGE_SIZE)
1416 return ERR_PTR(-EINVAL);
1418 offset = offset_in_page(addr);
1419 count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1420 pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1422 return ERR_PTR(-ENOMEM);
1424 err = get_user_pages_fast(addr, count, 1, pages);
1431 iod = nvme_alloc_iod(count, length, GFP_KERNEL);
1433 sg_init_table(sg, count);
1434 for (i = 0; i < count; i++) {
1435 sg_set_page(&sg[i], pages[i],
1436 min_t(unsigned, length, PAGE_SIZE - offset),
1438 length -= (PAGE_SIZE - offset);
1441 sg_mark_end(&sg[i - 1]);
1445 nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1446 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1456 for (i = 0; i < count; i++)
1459 return ERR_PTR(err);
1462 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1463 struct nvme_iod *iod)
1467 dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1468 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1470 for (i = 0; i < iod->nents; i++)
1471 put_page(sg_page(&iod->sg[i]));
1474 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1476 struct nvme_dev *dev = ns->dev;
1477 struct nvme_user_io io;
1478 struct nvme_command c;
1479 unsigned length, meta_len;
1481 struct nvme_iod *iod, *meta_iod = NULL;
1482 dma_addr_t meta_dma_addr;
1483 void *meta, *uninitialized_var(meta_mem);
1485 if (copy_from_user(&io, uio, sizeof(io)))
1487 length = (io.nblocks + 1) << ns->lba_shift;
1488 meta_len = (io.nblocks + 1) * ns->ms;
1490 if (meta_len && ((io.metadata & 3) || !io.metadata))
1493 switch (io.opcode) {
1494 case nvme_cmd_write:
1496 case nvme_cmd_compare:
1497 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1504 return PTR_ERR(iod);
1506 memset(&c, 0, sizeof(c));
1507 c.rw.opcode = io.opcode;
1508 c.rw.flags = io.flags;
1509 c.rw.nsid = cpu_to_le32(ns->ns_id);
1510 c.rw.slba = cpu_to_le64(io.slba);
1511 c.rw.length = cpu_to_le16(io.nblocks);
1512 c.rw.control = cpu_to_le16(io.control);
1513 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1514 c.rw.reftag = cpu_to_le32(io.reftag);
1515 c.rw.apptag = cpu_to_le16(io.apptag);
1516 c.rw.appmask = cpu_to_le16(io.appmask);
1519 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1521 if (IS_ERR(meta_iod)) {
1522 status = PTR_ERR(meta_iod);
1527 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1528 &meta_dma_addr, GFP_KERNEL);
1534 if (io.opcode & 1) {
1535 int meta_offset = 0;
1537 for (i = 0; i < meta_iod->nents; i++) {
1538 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1539 meta_iod->sg[i].offset;
1540 memcpy(meta_mem + meta_offset, meta,
1541 meta_iod->sg[i].length);
1542 kunmap_atomic(meta);
1543 meta_offset += meta_iod->sg[i].length;
1547 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1550 length = nvme_setup_prps(dev, &c.common, iod, length, GFP_KERNEL);
1552 if (length != (io.nblocks + 1) << ns->lba_shift)
1555 status = nvme_submit_io_cmd(dev, &c, NULL);
1558 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1559 int meta_offset = 0;
1561 for (i = 0; i < meta_iod->nents; i++) {
1562 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1563 meta_iod->sg[i].offset;
1564 memcpy(meta, meta_mem + meta_offset,
1565 meta_iod->sg[i].length);
1566 kunmap_atomic(meta);
1567 meta_offset += meta_iod->sg[i].length;
1571 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1576 nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1577 nvme_free_iod(dev, iod);
1580 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1581 nvme_free_iod(dev, meta_iod);
1587 static int nvme_user_admin_cmd(struct nvme_dev *dev,
1588 struct nvme_admin_cmd __user *ucmd)
1590 struct nvme_admin_cmd cmd;
1591 struct nvme_command c;
1593 struct nvme_iod *uninitialized_var(iod);
1596 if (!capable(CAP_SYS_ADMIN))
1598 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1601 memset(&c, 0, sizeof(c));
1602 c.common.opcode = cmd.opcode;
1603 c.common.flags = cmd.flags;
1604 c.common.nsid = cpu_to_le32(cmd.nsid);
1605 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1606 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1607 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1608 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1609 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1610 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1611 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1612 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1614 length = cmd.data_len;
1616 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1619 return PTR_ERR(iod);
1620 length = nvme_setup_prps(dev, &c.common, iod, length,
1624 timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1626 if (length != cmd.data_len)
1629 status = nvme_submit_sync_cmd(dev, 0, &c, &cmd.result, timeout);
1632 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1633 nvme_free_iod(dev, iod);
1636 if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1637 sizeof(cmd.result)))
1643 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1646 struct nvme_ns *ns = bdev->bd_disk->private_data;
1650 force_successful_syscall_return();
1652 case NVME_IOCTL_ADMIN_CMD:
1653 return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
1654 case NVME_IOCTL_SUBMIT_IO:
1655 return nvme_submit_io(ns, (void __user *)arg);
1656 case SG_GET_VERSION_NUM:
1657 return nvme_sg_get_version_num((void __user *)arg);
1659 return nvme_sg_io(ns, (void __user *)arg);
1665 #ifdef CONFIG_COMPAT
1666 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1667 unsigned int cmd, unsigned long arg)
1669 struct nvme_ns *ns = bdev->bd_disk->private_data;
1673 return nvme_sg_io32(ns, arg);
1675 return nvme_ioctl(bdev, mode, cmd, arg);
1678 #define nvme_compat_ioctl NULL
1681 static int nvme_open(struct block_device *bdev, fmode_t mode)
1683 struct nvme_ns *ns = bdev->bd_disk->private_data;
1684 struct nvme_dev *dev = ns->dev;
1686 kref_get(&dev->kref);
1690 static void nvme_free_dev(struct kref *kref);
1692 static void nvme_release(struct gendisk *disk, fmode_t mode)
1694 struct nvme_ns *ns = disk->private_data;
1695 struct nvme_dev *dev = ns->dev;
1697 kref_put(&dev->kref, nvme_free_dev);
1700 static const struct block_device_operations nvme_fops = {
1701 .owner = THIS_MODULE,
1702 .ioctl = nvme_ioctl,
1703 .compat_ioctl = nvme_compat_ioctl,
1705 .release = nvme_release,
1708 static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
1710 while (bio_list_peek(&nvmeq->sq_cong)) {
1711 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1712 struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
1714 if (bio_list_empty(&nvmeq->sq_cong))
1715 remove_wait_queue(&nvmeq->sq_full,
1716 &nvmeq->sq_cong_wait);
1717 if (nvme_submit_bio_queue(nvmeq, ns, bio)) {
1718 if (bio_list_empty(&nvmeq->sq_cong))
1719 add_wait_queue(&nvmeq->sq_full,
1720 &nvmeq->sq_cong_wait);
1721 bio_list_add_head(&nvmeq->sq_cong, bio);
1727 static int nvme_kthread(void *data)
1729 struct nvme_dev *dev, *next;
1731 while (!kthread_should_stop()) {
1732 set_current_state(TASK_INTERRUPTIBLE);
1733 spin_lock(&dev_list_lock);
1734 list_for_each_entry_safe(dev, next, &dev_list, node) {
1736 if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1738 if (work_busy(&dev->reset_work))
1740 list_del_init(&dev->node);
1741 dev_warn(&dev->pci_dev->dev,
1742 "Failed status, reset controller\n");
1743 PREPARE_WORK(&dev->reset_work,
1744 nvme_reset_failed_dev);
1745 queue_work(nvme_workq, &dev->reset_work);
1749 for (i = 0; i < dev->queue_count; i++) {
1750 struct nvme_queue *nvmeq =
1751 rcu_dereference(dev->queues[i]);
1754 spin_lock_irq(&nvmeq->q_lock);
1755 if (nvmeq->q_suspended)
1757 nvme_process_cq(nvmeq);
1758 nvme_cancel_ios(nvmeq, true);
1759 nvme_resubmit_bios(nvmeq);
1761 spin_unlock_irq(&nvmeq->q_lock);
1765 spin_unlock(&dev_list_lock);
1766 schedule_timeout(round_jiffies_relative(HZ));
1771 static void nvme_config_discard(struct nvme_ns *ns)
1773 u32 logical_block_size = queue_logical_block_size(ns->queue);
1774 ns->queue->limits.discard_zeroes_data = 0;
1775 ns->queue->limits.discard_alignment = logical_block_size;
1776 ns->queue->limits.discard_granularity = logical_block_size;
1777 ns->queue->limits.max_discard_sectors = 0xffffffff;
1778 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1781 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1782 struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1785 struct gendisk *disk;
1788 if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1791 ns = kzalloc(sizeof(*ns), GFP_KERNEL);
1794 ns->queue = blk_alloc_queue(GFP_KERNEL);
1797 ns->queue->queue_flags = QUEUE_FLAG_DEFAULT;
1798 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1799 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1800 blk_queue_make_request(ns->queue, nvme_make_request);
1802 ns->queue->queuedata = ns;
1804 disk = alloc_disk(0);
1806 goto out_free_queue;
1809 lbaf = id->flbas & 0xf;
1810 ns->lba_shift = id->lbaf[lbaf].ds;
1811 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1812 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1813 if (dev->max_hw_sectors)
1814 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1816 disk->major = nvme_major;
1817 disk->first_minor = 0;
1818 disk->fops = &nvme_fops;
1819 disk->private_data = ns;
1820 disk->queue = ns->queue;
1821 disk->driverfs_dev = &dev->pci_dev->dev;
1822 disk->flags = GENHD_FL_EXT_DEVT;
1823 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1824 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1826 if (dev->oncs & NVME_CTRL_ONCS_DSM)
1827 nvme_config_discard(ns);
1832 blk_cleanup_queue(ns->queue);
1838 static int set_queue_count(struct nvme_dev *dev, int count)
1842 u32 q_count = (count - 1) | ((count - 1) << 16);
1844 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
1847 return status < 0 ? -EIO : -EBUSY;
1848 return min(result & 0xffff, result >> 16) + 1;
1851 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
1853 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
1856 static int nvme_setup_io_queues(struct nvme_dev *dev)
1858 struct nvme_queue *adminq = raw_nvmeq(dev, 0);
1859 struct pci_dev *pdev = dev->pci_dev;
1860 int result, cpu, i, vecs, nr_io_queues, size, q_depth;
1862 nr_io_queues = num_online_cpus();
1863 result = set_queue_count(dev, nr_io_queues);
1866 if (result < nr_io_queues)
1867 nr_io_queues = result;
1869 size = db_bar_size(dev, nr_io_queues);
1873 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
1876 if (!--nr_io_queues)
1878 size = db_bar_size(dev, nr_io_queues);
1880 dev->dbs = ((void __iomem *)dev->bar) + 4096;
1881 adminq->q_db = dev->dbs;
1884 /* Deregister the admin queue's interrupt */
1885 free_irq(dev->entry[0].vector, adminq);
1887 vecs = nr_io_queues;
1888 for (i = 0; i < vecs; i++)
1889 dev->entry[i].entry = i;
1891 result = pci_enable_msix(pdev, dev->entry, vecs);
1898 vecs = nr_io_queues;
1902 result = pci_enable_msi_block(pdev, vecs);
1904 for (i = 0; i < vecs; i++)
1905 dev->entry[i].vector = i + pdev->irq;
1907 } else if (result < 0) {
1916 * Should investigate if there's a performance win from allocating
1917 * more queues than interrupt vectors; it might allow the submission
1918 * path to scale better, even if the receive path is limited by the
1919 * number of interrupts.
1921 nr_io_queues = vecs;
1923 result = queue_request_irq(dev, adminq, adminq->irqname);
1925 adminq->q_suspended = 1;
1929 /* Free previously allocated queues that are no longer usable */
1930 nvme_free_queues(dev, nr_io_queues);
1932 cpu = cpumask_first(cpu_online_mask);
1933 for (i = 0; i < nr_io_queues; i++) {
1934 irq_set_affinity_hint(dev->entry[i].vector, get_cpu_mask(cpu));
1935 cpu = cpumask_next(cpu, cpu_online_mask);
1938 q_depth = min_t(int, NVME_CAP_MQES(readq(&dev->bar->cap)) + 1,
1940 for (i = dev->queue_count - 1; i < nr_io_queues; i++) {
1941 if (!nvme_alloc_queue(dev, i + 1, q_depth, i)) {
1947 for (; i < num_possible_cpus(); i++) {
1948 int target = i % rounddown_pow_of_two(dev->queue_count - 1);
1949 rcu_assign_pointer(dev->queues[i + 1], dev->queues[target + 1]);
1952 for (i = 1; i < dev->queue_count; i++) {
1953 result = nvme_create_queue(raw_nvmeq(dev, i), i);
1955 for (--i; i > 0; i--)
1956 nvme_disable_queue(dev, i);
1964 nvme_free_queues(dev, 1);
1969 * Return: error value if an error occurred setting up the queues or calling
1970 * Identify Device. 0 if these succeeded, even if adding some of the
1971 * namespaces failed. At the moment, these failures are silent. TBD which
1972 * failures should be reported.
1974 static int nvme_dev_add(struct nvme_dev *dev)
1976 struct pci_dev *pdev = dev->pci_dev;
1980 struct nvme_id_ctrl *ctrl;
1981 struct nvme_id_ns *id_ns;
1983 dma_addr_t dma_addr;
1984 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
1986 mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
1990 res = nvme_identify(dev, 0, 1, dma_addr);
1997 nn = le32_to_cpup(&ctrl->nn);
1998 dev->oncs = le16_to_cpup(&ctrl->oncs);
1999 dev->abort_limit = ctrl->acl + 1;
2000 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2001 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2002 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2004 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2005 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2006 (pdev->device == 0x0953) && ctrl->vs[3])
2007 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2010 for (i = 1; i <= nn; i++) {
2011 res = nvme_identify(dev, i, 0, dma_addr);
2015 if (id_ns->ncap == 0)
2018 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2019 dma_addr + 4096, NULL);
2021 memset(mem + 4096, 0, 4096);
2023 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2025 list_add_tail(&ns->list, &dev->namespaces);
2027 list_for_each_entry(ns, &dev->namespaces, list)
2032 dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2036 static int nvme_dev_map(struct nvme_dev *dev)
2038 int bars, result = -ENOMEM;
2039 struct pci_dev *pdev = dev->pci_dev;
2041 if (pci_enable_device_mem(pdev))
2044 dev->entry[0].vector = pdev->irq;
2045 pci_set_master(pdev);
2046 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2047 if (pci_request_selected_regions(pdev, bars, "nvme"))
2050 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2051 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2054 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2057 if (readl(&dev->bar->csts) == -1) {
2061 dev->db_stride = 1 << NVME_CAP_STRIDE(readq(&dev->bar->cap));
2062 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2070 pci_release_regions(pdev);
2072 pci_disable_device(pdev);
2076 static void nvme_dev_unmap(struct nvme_dev *dev)
2078 if (dev->pci_dev->msi_enabled)
2079 pci_disable_msi(dev->pci_dev);
2080 else if (dev->pci_dev->msix_enabled)
2081 pci_disable_msix(dev->pci_dev);
2086 pci_release_regions(dev->pci_dev);
2089 if (pci_is_enabled(dev->pci_dev))
2090 pci_disable_device(dev->pci_dev);
2093 struct nvme_delq_ctx {
2094 struct task_struct *waiter;
2095 struct kthread_worker *worker;
2099 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2101 dq->waiter = current;
2105 set_current_state(TASK_KILLABLE);
2106 if (!atomic_read(&dq->refcount))
2108 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2109 fatal_signal_pending(current)) {
2110 set_current_state(TASK_RUNNING);
2112 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2113 nvme_disable_queue(dev, 0);
2115 send_sig(SIGKILL, dq->worker->task, 1);
2116 flush_kthread_worker(dq->worker);
2120 set_current_state(TASK_RUNNING);
2123 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2125 atomic_dec(&dq->refcount);
2127 wake_up_process(dq->waiter);
2130 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2132 atomic_inc(&dq->refcount);
2136 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2138 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2140 nvme_clear_queue(nvmeq);
2144 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2145 kthread_work_func_t fn)
2147 struct nvme_command c;
2149 memset(&c, 0, sizeof(c));
2150 c.delete_queue.opcode = opcode;
2151 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2153 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2154 return nvme_submit_admin_cmd_async(nvmeq->dev, &c, &nvmeq->cmdinfo);
2157 static void nvme_del_cq_work_handler(struct kthread_work *work)
2159 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2161 nvme_del_queue_end(nvmeq);
2164 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2166 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2167 nvme_del_cq_work_handler);
2170 static void nvme_del_sq_work_handler(struct kthread_work *work)
2172 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2174 int status = nvmeq->cmdinfo.status;
2177 status = nvme_delete_cq(nvmeq);
2179 nvme_del_queue_end(nvmeq);
2182 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2184 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2185 nvme_del_sq_work_handler);
2188 static void nvme_del_queue_start(struct kthread_work *work)
2190 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2192 allow_signal(SIGKILL);
2193 if (nvme_delete_sq(nvmeq))
2194 nvme_del_queue_end(nvmeq);
2197 static void nvme_disable_io_queues(struct nvme_dev *dev)
2200 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2201 struct nvme_delq_ctx dq;
2202 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2203 &worker, "nvme%d", dev->instance);
2205 if (IS_ERR(kworker_task)) {
2206 dev_err(&dev->pci_dev->dev,
2207 "Failed to create queue del task\n");
2208 for (i = dev->queue_count - 1; i > 0; i--)
2209 nvme_disable_queue(dev, i);
2214 atomic_set(&dq.refcount, 0);
2215 dq.worker = &worker;
2216 for (i = dev->queue_count - 1; i > 0; i--) {
2217 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2219 if (nvme_suspend_queue(nvmeq))
2221 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2222 nvmeq->cmdinfo.worker = dq.worker;
2223 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2224 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2226 nvme_wait_dq(&dq, dev);
2227 kthread_stop(kworker_task);
2230 static void nvme_dev_shutdown(struct nvme_dev *dev)
2234 dev->initialized = 0;
2236 spin_lock(&dev_list_lock);
2237 list_del_init(&dev->node);
2238 spin_unlock(&dev_list_lock);
2240 if (!dev->bar || (dev->bar && readl(&dev->bar->csts) == -1)) {
2241 for (i = dev->queue_count - 1; i >= 0; i--) {
2242 struct nvme_queue *nvmeq = raw_nvmeq(dev, i);
2243 nvme_suspend_queue(nvmeq);
2244 nvme_clear_queue(nvmeq);
2247 nvme_disable_io_queues(dev);
2248 nvme_shutdown_ctrl(dev);
2249 nvme_disable_queue(dev, 0);
2251 nvme_dev_unmap(dev);
2254 static void nvme_dev_remove(struct nvme_dev *dev)
2258 list_for_each_entry(ns, &dev->namespaces, list) {
2259 if (ns->disk->flags & GENHD_FL_UP)
2260 del_gendisk(ns->disk);
2261 if (!blk_queue_dying(ns->queue))
2262 blk_cleanup_queue(ns->queue);
2266 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2268 struct device *dmadev = &dev->pci_dev->dev;
2269 dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2270 PAGE_SIZE, PAGE_SIZE, 0);
2271 if (!dev->prp_page_pool)
2274 /* Optimisation for I/Os between 4k and 128k */
2275 dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2277 if (!dev->prp_small_pool) {
2278 dma_pool_destroy(dev->prp_page_pool);
2284 static void nvme_release_prp_pools(struct nvme_dev *dev)
2286 dma_pool_destroy(dev->prp_page_pool);
2287 dma_pool_destroy(dev->prp_small_pool);
2290 static DEFINE_IDA(nvme_instance_ida);
2292 static int nvme_set_instance(struct nvme_dev *dev)
2294 int instance, error;
2297 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2300 spin_lock(&dev_list_lock);
2301 error = ida_get_new(&nvme_instance_ida, &instance);
2302 spin_unlock(&dev_list_lock);
2303 } while (error == -EAGAIN);
2308 dev->instance = instance;
2312 static void nvme_release_instance(struct nvme_dev *dev)
2314 spin_lock(&dev_list_lock);
2315 ida_remove(&nvme_instance_ida, dev->instance);
2316 spin_unlock(&dev_list_lock);
2319 static void nvme_free_namespaces(struct nvme_dev *dev)
2321 struct nvme_ns *ns, *next;
2323 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2324 list_del(&ns->list);
2330 static void nvme_free_dev(struct kref *kref)
2332 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2334 nvme_free_namespaces(dev);
2340 static int nvme_dev_open(struct inode *inode, struct file *f)
2342 struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2344 kref_get(&dev->kref);
2345 f->private_data = dev;
2349 static int nvme_dev_release(struct inode *inode, struct file *f)
2351 struct nvme_dev *dev = f->private_data;
2352 kref_put(&dev->kref, nvme_free_dev);
2356 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2358 struct nvme_dev *dev = f->private_data;
2360 case NVME_IOCTL_ADMIN_CMD:
2361 return nvme_user_admin_cmd(dev, (void __user *)arg);
2367 static const struct file_operations nvme_dev_fops = {
2368 .owner = THIS_MODULE,
2369 .open = nvme_dev_open,
2370 .release = nvme_dev_release,
2371 .unlocked_ioctl = nvme_dev_ioctl,
2372 .compat_ioctl = nvme_dev_ioctl,
2375 static int nvme_dev_start(struct nvme_dev *dev)
2379 result = nvme_dev_map(dev);
2383 result = nvme_configure_admin_queue(dev);
2387 spin_lock(&dev_list_lock);
2388 list_add(&dev->node, &dev_list);
2389 spin_unlock(&dev_list_lock);
2391 result = nvme_setup_io_queues(dev);
2392 if (result && result != -EBUSY)
2398 nvme_disable_queue(dev, 0);
2399 spin_lock(&dev_list_lock);
2400 list_del_init(&dev->node);
2401 spin_unlock(&dev_list_lock);
2403 nvme_dev_unmap(dev);
2407 static int nvme_remove_dead_ctrl(void *arg)
2409 struct nvme_dev *dev = (struct nvme_dev *)arg;
2410 struct pci_dev *pdev = dev->pci_dev;
2412 if (pci_get_drvdata(pdev))
2413 pci_stop_and_remove_bus_device(pdev);
2414 kref_put(&dev->kref, nvme_free_dev);
2418 static void nvme_remove_disks(struct work_struct *ws)
2420 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2422 nvme_dev_remove(dev);
2423 nvme_free_queues(dev, 1);
2426 static int nvme_dev_resume(struct nvme_dev *dev)
2430 ret = nvme_dev_start(dev);
2431 if (ret && ret != -EBUSY)
2433 if (ret == -EBUSY) {
2434 spin_lock(&dev_list_lock);
2435 PREPARE_WORK(&dev->reset_work, nvme_remove_disks);
2436 queue_work(nvme_workq, &dev->reset_work);
2437 spin_unlock(&dev_list_lock);
2439 dev->initialized = 1;
2443 static void nvme_dev_reset(struct nvme_dev *dev)
2445 nvme_dev_shutdown(dev);
2446 if (nvme_dev_resume(dev)) {
2447 dev_err(&dev->pci_dev->dev, "Device failed to resume\n");
2448 kref_get(&dev->kref);
2449 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2451 dev_err(&dev->pci_dev->dev,
2452 "Failed to start controller remove task\n");
2453 kref_put(&dev->kref, nvme_free_dev);
2458 static void nvme_reset_failed_dev(struct work_struct *ws)
2460 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2461 nvme_dev_reset(dev);
2464 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2466 int result = -ENOMEM;
2467 struct nvme_dev *dev;
2469 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2472 dev->entry = kcalloc(num_possible_cpus(), sizeof(*dev->entry),
2476 dev->queues = kcalloc(num_possible_cpus() + 1, sizeof(void *),
2481 INIT_LIST_HEAD(&dev->namespaces);
2482 INIT_WORK(&dev->reset_work, nvme_reset_failed_dev);
2483 dev->pci_dev = pdev;
2484 pci_set_drvdata(pdev, dev);
2485 result = nvme_set_instance(dev);
2489 result = nvme_setup_prp_pools(dev);
2493 kref_init(&dev->kref);
2494 result = nvme_dev_start(dev);
2496 if (result == -EBUSY)
2501 result = nvme_dev_add(dev);
2506 scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2507 dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2508 dev->miscdev.parent = &pdev->dev;
2509 dev->miscdev.name = dev->name;
2510 dev->miscdev.fops = &nvme_dev_fops;
2511 result = misc_register(&dev->miscdev);
2515 dev->initialized = 1;
2519 nvme_dev_remove(dev);
2520 nvme_free_namespaces(dev);
2522 nvme_dev_shutdown(dev);
2524 nvme_free_queues(dev, 0);
2525 nvme_release_prp_pools(dev);
2527 nvme_release_instance(dev);
2535 static void nvme_shutdown(struct pci_dev *pdev)
2537 struct nvme_dev *dev = pci_get_drvdata(pdev);
2538 nvme_dev_shutdown(dev);
2541 static void nvme_remove(struct pci_dev *pdev)
2543 struct nvme_dev *dev = pci_get_drvdata(pdev);
2545 spin_lock(&dev_list_lock);
2546 list_del_init(&dev->node);
2547 spin_unlock(&dev_list_lock);
2549 pci_set_drvdata(pdev, NULL);
2550 flush_work(&dev->reset_work);
2551 misc_deregister(&dev->miscdev);
2552 nvme_dev_remove(dev);
2553 nvme_dev_shutdown(dev);
2554 nvme_free_queues(dev, 0);
2556 nvme_release_instance(dev);
2557 nvme_release_prp_pools(dev);
2558 kref_put(&dev->kref, nvme_free_dev);
2561 /* These functions are yet to be implemented */
2562 #define nvme_error_detected NULL
2563 #define nvme_dump_registers NULL
2564 #define nvme_link_reset NULL
2565 #define nvme_slot_reset NULL
2566 #define nvme_error_resume NULL
2568 #ifdef CONFIG_PM_SLEEP
2569 static int nvme_suspend(struct device *dev)
2571 struct pci_dev *pdev = to_pci_dev(dev);
2572 struct nvme_dev *ndev = pci_get_drvdata(pdev);
2574 nvme_dev_shutdown(ndev);
2578 static int nvme_resume(struct device *dev)
2580 struct pci_dev *pdev = to_pci_dev(dev);
2581 struct nvme_dev *ndev = pci_get_drvdata(pdev);
2583 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2584 PREPARE_WORK(&ndev->reset_work, nvme_reset_failed_dev);
2585 queue_work(nvme_workq, &ndev->reset_work);
2591 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2593 static const struct pci_error_handlers nvme_err_handler = {
2594 .error_detected = nvme_error_detected,
2595 .mmio_enabled = nvme_dump_registers,
2596 .link_reset = nvme_link_reset,
2597 .slot_reset = nvme_slot_reset,
2598 .resume = nvme_error_resume,
2601 /* Move to pci_ids.h later */
2602 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2604 static DEFINE_PCI_DEVICE_TABLE(nvme_id_table) = {
2605 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2608 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2610 static struct pci_driver nvme_driver = {
2612 .id_table = nvme_id_table,
2613 .probe = nvme_probe,
2614 .remove = nvme_remove,
2615 .shutdown = nvme_shutdown,
2617 .pm = &nvme_dev_pm_ops,
2619 .err_handler = &nvme_err_handler,
2622 static int __init nvme_init(void)
2626 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2627 if (IS_ERR(nvme_thread))
2628 return PTR_ERR(nvme_thread);
2631 nvme_workq = create_singlethread_workqueue("nvme");
2635 result = register_blkdev(nvme_major, "nvme");
2638 else if (result > 0)
2639 nvme_major = result;
2641 result = pci_register_driver(&nvme_driver);
2643 goto unregister_blkdev;
2647 unregister_blkdev(nvme_major, "nvme");
2649 destroy_workqueue(nvme_workq);
2651 kthread_stop(nvme_thread);
2655 static void __exit nvme_exit(void)
2657 pci_unregister_driver(&nvme_driver);
2658 unregister_blkdev(nvme_major, "nvme");
2659 destroy_workqueue(nvme_workq);
2660 kthread_stop(nvme_thread);
2663 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2664 MODULE_LICENSE("GPL");
2665 MODULE_VERSION("0.8");
2666 module_init(nvme_init);
2667 module_exit(nvme_exit);