2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
11 * Modified to work with little-endian systems.
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * 01/20/2004 - combined variants of original driver.
33 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35 * 01/27/2004 - Little endian support Ed Okerson
37 * Tested Architectures
38 * Port Width Chip Width # of banks Flash Chip Board
39 * 32 16 1 28F128J3 seranoa/eagle
40 * 64 16 1 28F128J3 seranoa/falcon
44 /* The DEBUG define must be before common to enable debugging */
48 #include <asm/processor.h>
49 #include <asm/byteorder.h>
50 #include <environment.h>
51 #ifdef CFG_FLASH_CFI_DRIVER
54 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
55 * The width of the port and the width of the chips are determined at initialization.
56 * These widths are used to calculate the address for access CFI data structures.
57 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
60 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
61 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
62 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
63 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
67 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
68 * Table (ALT) to determine if protection is available
70 * Add support for other command sets Use the PRI and ALT to determine command set
71 * Verify erase and program timeouts.
74 #ifndef CFG_FLASH_BANKS_LIST
75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
78 #define FLASH_CMD_CFI 0x98
79 #define FLASH_CMD_READ_ID 0x90
80 #define FLASH_CMD_RESET 0xff
81 #define FLASH_CMD_BLOCK_ERASE 0x20
82 #define FLASH_CMD_ERASE_CONFIRM 0xD0
83 #define FLASH_CMD_WRITE 0x40
84 #define FLASH_CMD_PROTECT 0x60
85 #define FLASH_CMD_PROTECT_SET 0x01
86 #define FLASH_CMD_PROTECT_CLEAR 0xD0
87 #define FLASH_CMD_CLEAR_STATUS 0x50
88 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
91 #define FLASH_STATUS_DONE 0x80
92 #define FLASH_STATUS_ESS 0x40
93 #define FLASH_STATUS_ECLBS 0x20
94 #define FLASH_STATUS_PSLBS 0x10
95 #define FLASH_STATUS_VPENS 0x08
96 #define FLASH_STATUS_PSS 0x04
97 #define FLASH_STATUS_DPS 0x02
98 #define FLASH_STATUS_R 0x01
99 #define FLASH_STATUS_PROTECT 0x01
101 #define AMD_CMD_RESET 0xF0
102 #define AMD_CMD_WRITE 0xA0
103 #define AMD_CMD_ERASE_START 0x80
104 #define AMD_CMD_ERASE_SECTOR 0x30
105 #define AMD_CMD_UNLOCK_START 0xAA
106 #define AMD_CMD_UNLOCK_ACK 0x55
108 #define AMD_STATUS_TOGGLE 0x40
109 #define AMD_STATUS_ERROR 0x20
110 #define AMD_ADDR_ERASE_START 0x555
111 #define AMD_ADDR_START 0x555
112 #define AMD_ADDR_ACK 0x2AA
114 #define FLASH_OFFSET_CFI 0x55
115 #define FLASH_OFFSET_CFI_RESP 0x10
116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
117 #define FLASH_OFFSET_WTOUT 0x1F
118 #define FLASH_OFFSET_WBTOUT 0x20
119 #define FLASH_OFFSET_ETOUT 0x21
120 #define FLASH_OFFSET_CETOUT 0x22
121 #define FLASH_OFFSET_WMAX_TOUT 0x23
122 #define FLASH_OFFSET_WBMAX_TOUT 0x24
123 #define FLASH_OFFSET_EMAX_TOUT 0x25
124 #define FLASH_OFFSET_CEMAX_TOUT 0x26
125 #define FLASH_OFFSET_SIZE 0x27
126 #define FLASH_OFFSET_INTERFACE 0x28
127 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
128 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
129 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
130 #define FLASH_OFFSET_PROTECT 0x02
131 #define FLASH_OFFSET_USER_PROTECTION 0x85
132 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
135 #define FLASH_MAN_CFI 0x01000000
137 #define CFI_CMDSET_NONE 0
138 #define CFI_CMDSET_INTEL_EXTENDED 1
139 #define CFI_CMDSET_AMD_STANDARD 2
140 #define CFI_CMDSET_INTEL_STANDARD 3
141 #define CFI_CMDSET_AMD_EXTENDED 4
142 #define CFI_CMDSET_MITSU_STANDARD 256
143 #define CFI_CMDSET_MITSU_EXTENDED 257
144 #define CFI_CMDSET_SST 258
147 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
148 # undef FLASH_CMD_RESET
149 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
157 unsigned long long ll;
161 volatile unsigned char *cp;
162 volatile unsigned short *wp;
163 volatile unsigned long *lp;
164 volatile unsigned long long *llp;
167 #define NUM_ERASE_REGIONS 4
169 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
170 #ifdef CFG_MAX_FLASH_BANKS_DETECT
171 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
172 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
174 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
175 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
179 /*-----------------------------------------------------------------------
183 typedef unsigned long flash_sect_t;
185 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
186 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
187 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
188 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
189 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
190 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
191 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
192 static int flash_detect_cfi (flash_info_t * info);
193 ulong flash_get_size (ulong base, int banknum);
194 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
195 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
196 ulong tout, char *prompt);
197 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
198 static flash_info_t *flash_get_info(ulong base);
200 #ifdef CFG_FLASH_USE_BUFFER_WRITE
201 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
204 /*-----------------------------------------------------------------------
205 * create an address based on the offset and the port width
207 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
209 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
213 /*-----------------------------------------------------------------------
216 void print_longlong (char *str, unsigned long long data)
221 cp = (unsigned char *) &data;
222 for (i = 0; i < 8; i++)
223 sprintf (&str[i * 2], "%2.2x", *cp++);
225 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
230 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
232 flash_make_addr (info, sect,
233 x + FLASH_OFFSET_CFI_RESP);
234 debug ("%p : ", cptr.cp);
235 for (y = 0; y < 16; y++) {
236 debug ("%2.2x ", cptr.cp[y]);
239 for (y = 0; y < 16; y++) {
240 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
241 debug ("%c", cptr.cp[y]);
252 /*-----------------------------------------------------------------------
253 * read a character at a port width address
255 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
259 cp = flash_make_addr (info, 0, offset);
260 #if defined(__LITTLE_ENDIAN)
263 return (cp[info->portwidth - 1]);
267 /*-----------------------------------------------------------------------
268 * read a short word by swapping for ppc format.
270 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
278 addr = flash_make_addr (info, sect, offset);
281 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
283 for (x = 0; x < 2 * info->portwidth; x++) {
284 debug ("addr[%x] = 0x%x\n", x, addr[x]);
287 #if defined(__LITTLE_ENDIAN)
288 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
290 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
291 addr[info->portwidth - 1]);
294 debug ("retval = 0x%x\n", retval);
298 /*-----------------------------------------------------------------------
299 * read a long word by picking the least significant byte of each maiximum
300 * port size word. Swap for ppc format.
302 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
310 addr = flash_make_addr (info, sect, offset);
313 debug ("long addr is at %p info->portwidth = %d\n", addr,
315 for (x = 0; x < 4 * info->portwidth; x++) {
316 debug ("addr[%x] = 0x%x\n", x, addr[x]);
319 #if defined(__LITTLE_ENDIAN)
320 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
321 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
323 retval = (addr[(2 * info->portwidth) - 1] << 24) |
324 (addr[(info->portwidth) - 1] << 16) |
325 (addr[(4 * info->portwidth) - 1] << 8) |
326 addr[(3 * info->portwidth) - 1];
331 /*-----------------------------------------------------------------------
333 unsigned long flash_init (void)
335 unsigned long size = 0;
338 /* Init: no FLASHes known */
339 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
340 flash_info[i].flash_id = FLASH_UNKNOWN;
341 size += flash_info[i].size = flash_get_size (bank_base[i], i);
342 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
343 #ifndef CFG_FLASH_QUIET_TEST
344 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
345 i, flash_info[i].size, flash_info[i].size << 20);
346 #endif /* CFG_FLASH_QUIET_TEST */
350 /* Monitor protection ON by default */
351 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
352 flash_protect (FLAG_PROTECT_SET,
354 CFG_MONITOR_BASE + monitor_flash_len - 1,
355 flash_get_info(CFG_MONITOR_BASE));
358 /* Environment protection ON by default */
359 #ifdef CFG_ENV_IS_IN_FLASH
360 flash_protect (FLAG_PROTECT_SET,
362 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
363 flash_get_info(CFG_ENV_ADDR));
366 /* Redundant environment protection ON by default */
367 #ifdef CFG_ENV_ADDR_REDUND
368 flash_protect (FLAG_PROTECT_SET,
370 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
371 flash_get_info(CFG_ENV_ADDR_REDUND));
376 /*-----------------------------------------------------------------------
378 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
379 static flash_info_t *flash_get_info(ulong base)
382 flash_info_t * info = 0;
384 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
385 info = & flash_info[i];
386 if (info->size && info->start[0] <= base &&
387 base <= info->start[0] + info->size - 1)
391 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
395 /*-----------------------------------------------------------------------
397 int flash_erase (flash_info_t * info, int s_first, int s_last)
403 if (info->flash_id != FLASH_MAN_CFI) {
404 puts ("Can't erase unknown flash type - aborted\n");
407 if ((s_first < 0) || (s_first > s_last)) {
408 puts ("- no sectors to erase\n");
413 for (sect = s_first; sect <= s_last; ++sect) {
414 if (info->protect[sect]) {
419 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
425 for (sect = s_first; sect <= s_last; sect++) {
426 if (info->protect[sect] == 0) { /* not protected */
427 switch (info->vendor) {
428 case CFI_CMDSET_INTEL_STANDARD:
429 case CFI_CMDSET_INTEL_EXTENDED:
430 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
431 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
432 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
434 case CFI_CMDSET_AMD_STANDARD:
435 case CFI_CMDSET_AMD_EXTENDED:
436 flash_unlock_seq (info, sect);
437 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
438 AMD_CMD_ERASE_START);
439 flash_unlock_seq (info, sect);
440 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
443 debug ("Unkown flash vendor %d\n",
448 if (flash_full_status_check
449 (info, sect, info->erase_blk_tout, "erase")) {
459 /*-----------------------------------------------------------------------
461 void flash_print_info (flash_info_t * info)
465 if (info->flash_id != FLASH_MAN_CFI) {
466 puts ("missing or unknown FLASH type\n");
470 printf ("CFI conformant FLASH (%d x %d)",
471 (info->portwidth << 3), (info->chipwidth << 3));
472 printf (" Size: %ld MB in %d Sectors\n",
473 info->size >> 20, info->sector_count);
474 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
475 info->erase_blk_tout,
477 info->buffer_write_tout,
480 puts (" Sector Start Addresses:");
481 for (i = 0; i < info->sector_count; ++i) {
482 #ifdef CFG_FLASH_EMPTY_INFO
486 volatile unsigned long *flash;
489 * Check if whole sector is erased
491 if (i != (info->sector_count - 1))
492 size = info->start[i + 1] - info->start[i];
494 size = info->start[0] + info->size - info->start[i];
496 flash = (volatile unsigned long *) info->start[i];
497 size = size >> 2; /* divide by 4 for longword access */
498 for (k = 0; k < size; k++) {
499 if (*flash++ != 0xffffffff) {
507 /* print empty and read-only info */
508 printf (" %08lX%s%s",
511 info->protect[i] ? "RO " : " ");
512 #else /* ! CFG_FLASH_EMPTY_INFO */
516 info->start[i], info->protect[i] ? " (RO)" : " ");
523 /*-----------------------------------------------------------------------
524 * Copy memory to flash, returns:
527 * 2 - Flash not erased
529 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
537 #ifdef CFG_FLASH_USE_BUFFER_WRITE
540 /* get lower aligned address */
541 /* get lower aligned address */
542 wp = (addr & ~(info->portwidth - 1));
544 /* handle unaligned start */
545 if ((aln = addr - wp) != 0) {
548 for (i = 0; i < aln; ++i, ++cp)
549 flash_add_byte (info, &cword, (*(uchar *) cp));
551 for (; (i < info->portwidth) && (cnt > 0); i++) {
552 flash_add_byte (info, &cword, *src++);
556 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
557 flash_add_byte (info, &cword, (*(uchar *) cp));
558 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
563 /* handle the aligned part */
564 #ifdef CFG_FLASH_USE_BUFFER_WRITE
565 buffered_size = (info->portwidth / info->chipwidth);
566 buffered_size *= info->buffer_size;
567 while (cnt >= info->portwidth) {
568 i = buffered_size > cnt ? cnt : buffered_size;
569 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
571 i -= i & (info->portwidth - 1);
577 while (cnt >= info->portwidth) {
579 for (i = 0; i < info->portwidth; i++) {
580 flash_add_byte (info, &cword, *src++);
582 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
584 wp += info->portwidth;
585 cnt -= info->portwidth;
587 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
593 * handle unaligned tail bytes
596 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
597 flash_add_byte (info, &cword, *src++);
600 for (; i < info->portwidth; ++i, ++cp) {
601 flash_add_byte (info, &cword, (*(uchar *) cp));
604 return flash_write_cfiword (info, wp, cword);
607 /*-----------------------------------------------------------------------
609 #ifdef CFG_FLASH_PROTECTION
611 int flash_real_protect (flash_info_t * info, long sector, int prot)
615 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
616 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
618 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
620 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
623 flash_full_status_check (info, sector, info->erase_blk_tout,
624 prot ? "protect" : "unprotect")) == 0) {
626 info->protect[sector] = prot;
627 /* Intel's unprotect unprotects all locking */
631 for (i = 0; i < info->sector_count; i++) {
632 if (info->protect[i])
633 flash_real_protect (info, i, 1);
640 /*-----------------------------------------------------------------------
641 * flash_read_user_serial - read the OneTimeProgramming cells
643 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
650 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
651 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
652 memcpy (dst, src + offset, len);
653 flash_write_cmd (info, 0, 0, info->cmd_reset);
657 * flash_read_factory_serial - read the device Id from the protection area
659 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
664 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
665 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
666 memcpy (buffer, src + offset, len);
667 flash_write_cmd (info, 0, 0, info->cmd_reset);
670 #endif /* CFG_FLASH_PROTECTION */
673 * flash_is_busy - check to see if the flash is busy
674 * This routine checks the status of the chip and returns true if the chip is busy
676 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
680 switch (info->vendor) {
681 case CFI_CMDSET_INTEL_STANDARD:
682 case CFI_CMDSET_INTEL_EXTENDED:
683 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
685 case CFI_CMDSET_AMD_STANDARD:
686 case CFI_CMDSET_AMD_EXTENDED:
687 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
692 debug ("flash_is_busy: %d\n", retval);
696 /*-----------------------------------------------------------------------
697 * wait for XSR.7 to be set. Time out with an error if it does not.
698 * This routine does not set the flash to read-array mode.
700 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
701 ulong tout, char *prompt)
705 /* Wait for command completion */
706 start = get_timer (0);
707 while (flash_is_busy (info, sector)) {
708 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
709 printf ("Flash %s timeout at address %lx data %lx\n",
710 prompt, info->start[sector],
711 flash_read_long (info, sector, 0));
712 flash_write_cmd (info, sector, 0, info->cmd_reset);
719 /*-----------------------------------------------------------------------
720 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
721 * This routine sets the flash to read-array mode.
723 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
724 ulong tout, char *prompt)
728 retcode = flash_status_check (info, sector, tout, prompt);
729 switch (info->vendor) {
730 case CFI_CMDSET_INTEL_EXTENDED:
731 case CFI_CMDSET_INTEL_STANDARD:
732 if ((retcode != ERR_OK)
733 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
735 printf ("Flash %s error at address %lx\n", prompt,
736 info->start[sector]);
737 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
738 puts ("Command Sequence Error.\n");
739 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
740 puts ("Block Erase Error.\n");
741 retcode = ERR_NOT_ERASED;
742 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
743 puts ("Locking Error\n");
745 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
746 puts ("Block locked.\n");
747 retcode = ERR_PROTECTED;
749 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
750 puts ("Vpp Low Error.\n");
752 flash_write_cmd (info, sector, 0, info->cmd_reset);
760 /*-----------------------------------------------------------------------
762 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
764 #if defined(__LITTLE_ENDIAN)
767 unsigned long long ll;
770 switch (info->portwidth) {
774 case FLASH_CFI_16BIT:
775 #if defined(__LITTLE_ENDIAN)
778 cword->w = (cword->w >> 8) | w;
780 cword->w = (cword->w << 8) | c;
783 case FLASH_CFI_32BIT:
784 #if defined(__LITTLE_ENDIAN)
787 cword->l = (cword->l >> 8) | l;
789 cword->l = (cword->l << 8) | c;
792 case FLASH_CFI_64BIT:
793 #if defined(__LITTLE_ENDIAN)
796 cword->ll = (cword->ll >> 8) | ll;
798 cword->ll = (cword->ll << 8) | c;
805 /*-----------------------------------------------------------------------
806 * make a proper sized command based on the port and chip widths
808 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
811 uchar *cp = (uchar *) cmdbuf;
813 #if defined(__LITTLE_ENDIAN)
814 for (i = info->portwidth; i > 0; i--)
816 for (i = 1; i <= info->portwidth; i++)
818 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
822 * Write a proper sized command to the correct address
824 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
827 volatile cfiptr_t addr;
830 addr.cp = flash_make_addr (info, sect, offset);
831 flash_make_cmd (info, cmd, &cword);
832 switch (info->portwidth) {
834 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
835 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
838 case FLASH_CFI_16BIT:
839 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
841 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
844 case FLASH_CFI_32BIT:
845 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
847 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
850 case FLASH_CFI_64BIT:
855 print_longlong (str, cword.ll);
857 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
859 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
862 *addr.llp = cword.ll;
867 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
869 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
870 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
873 /*-----------------------------------------------------------------------
875 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
881 cptr.cp = flash_make_addr (info, sect, offset);
882 flash_make_cmd (info, cmd, &cword);
884 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
885 switch (info->portwidth) {
887 debug ("is= %x %x\n", cptr.cp[0], cword.c);
888 retval = (cptr.cp[0] == cword.c);
890 case FLASH_CFI_16BIT:
891 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
892 retval = (cptr.wp[0] == cword.w);
894 case FLASH_CFI_32BIT:
895 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
896 retval = (cptr.lp[0] == cword.l);
898 case FLASH_CFI_64BIT:
904 print_longlong (str1, cptr.llp[0]);
905 print_longlong (str2, cword.ll);
906 debug ("is= %s %s\n", str1, str2);
909 retval = (cptr.llp[0] == cword.ll);
918 /*-----------------------------------------------------------------------
920 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
926 cptr.cp = flash_make_addr (info, sect, offset);
927 flash_make_cmd (info, cmd, &cword);
928 switch (info->portwidth) {
930 retval = ((cptr.cp[0] & cword.c) == cword.c);
932 case FLASH_CFI_16BIT:
933 retval = ((cptr.wp[0] & cword.w) == cword.w);
935 case FLASH_CFI_32BIT:
936 retval = ((cptr.lp[0] & cword.l) == cword.l);
938 case FLASH_CFI_64BIT:
939 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
948 /*-----------------------------------------------------------------------
950 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
956 cptr.cp = flash_make_addr (info, sect, offset);
957 flash_make_cmd (info, cmd, &cword);
958 switch (info->portwidth) {
960 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
962 case FLASH_CFI_16BIT:
963 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
965 case FLASH_CFI_32BIT:
966 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
968 case FLASH_CFI_64BIT:
969 retval = ((cptr.llp[0] & cword.ll) !=
970 (cptr.llp[0] & cword.ll));
979 /*-----------------------------------------------------------------------
980 * detect if flash is compatible with the Common Flash Interface (CFI)
981 * http://www.jedec.org/download/search/jesd68.pdf
984 static int flash_detect_cfi (flash_info_t * info)
986 debug ("flash detect cfi\n");
988 for (info->portwidth = FLASH_CFI_8BIT;
989 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
990 for (info->chipwidth = FLASH_CFI_BY8;
991 info->chipwidth <= info->portwidth;
992 info->chipwidth <<= 1) {
993 flash_write_cmd (info, 0, 0, info->cmd_reset);
994 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
995 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
996 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
997 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
998 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
999 debug ("device interface is %d\n",
1001 debug ("found port %d chip %d ",
1002 info->portwidth, info->chipwidth);
1003 debug ("port %d bits chip %d bits\n",
1004 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1005 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1010 debug ("not found\n");
1015 * The following code cannot be run from FLASH!
1018 ulong flash_get_size (ulong base, int banknum)
1020 flash_info_t *info = &flash_info[banknum];
1022 flash_sect_t sect_cnt;
1023 unsigned long sector;
1026 uchar num_erase_regions;
1027 int erase_region_size;
1028 int erase_region_count;
1030 info->start[0] = base;
1032 if (flash_detect_cfi (info)) {
1033 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1035 flash_printqry (info, 0);
1037 switch (info->vendor) {
1038 case CFI_CMDSET_INTEL_STANDARD:
1039 case CFI_CMDSET_INTEL_EXTENDED:
1041 info->cmd_reset = FLASH_CMD_RESET;
1043 case CFI_CMDSET_AMD_STANDARD:
1044 case CFI_CMDSET_AMD_EXTENDED:
1045 info->cmd_reset = AMD_CMD_RESET;
1049 debug ("manufacturer is %d\n", info->vendor);
1050 size_ratio = info->portwidth / info->chipwidth;
1051 /* if the chip is x8/x16 reduce the ratio by half */
1052 if ((info->interface == FLASH_CFI_X8X16)
1053 && (info->chipwidth == FLASH_CFI_BY8)) {
1056 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1057 debug ("size_ratio %d port %d bits chip %d bits\n",
1058 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1059 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1060 debug ("found %d erase regions\n", num_erase_regions);
1063 for (i = 0; i < num_erase_regions; i++) {
1064 if (i > NUM_ERASE_REGIONS) {
1065 printf ("%d erase regions found, only %d used\n",
1066 num_erase_regions, NUM_ERASE_REGIONS);
1069 tmp = flash_read_long (info, 0,
1070 FLASH_OFFSET_ERASE_REGIONS +
1073 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1075 erase_region_count = (tmp & 0xffff) + 1;
1076 debug ("erase_region_count = %d erase_region_size = %d\n",
1077 erase_region_count, erase_region_size);
1078 for (j = 0; j < erase_region_count; j++) {
1079 info->start[sect_cnt] = sector;
1080 sector += (erase_region_size * size_ratio);
1083 * Only read protection status from supported devices (intel...)
1085 switch (info->vendor) {
1086 case CFI_CMDSET_INTEL_EXTENDED:
1087 case CFI_CMDSET_INTEL_STANDARD:
1088 info->protect[sect_cnt] =
1089 flash_isset (info, sect_cnt,
1090 FLASH_OFFSET_PROTECT,
1091 FLASH_STATUS_PROTECT);
1094 info->protect[sect_cnt] = 0; /* default: not protected */
1101 info->sector_count = sect_cnt;
1102 /* multiply the size by the number of chips */
1103 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1104 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1105 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1106 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1107 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1108 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1109 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1110 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1111 info->flash_id = FLASH_MAN_CFI;
1112 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1113 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1117 flash_write_cmd (info, 0, 0, info->cmd_reset);
1118 return (info->size);
1122 /*-----------------------------------------------------------------------
1124 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1132 ctladdr.cp = flash_make_addr (info, 0, 0);
1133 cptr.cp = (uchar *) dest;
1136 /* Check if Flash is (sufficiently) erased */
1137 switch (info->portwidth) {
1138 case FLASH_CFI_8BIT:
1139 flag = ((cptr.cp[0] & cword.c) == cword.c);
1141 case FLASH_CFI_16BIT:
1142 flag = ((cptr.wp[0] & cword.w) == cword.w);
1144 case FLASH_CFI_32BIT:
1145 flag = ((cptr.lp[0] & cword.l) == cword.l);
1147 case FLASH_CFI_64BIT:
1148 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1156 /* Disable interrupts which might cause a timeout here */
1157 flag = disable_interrupts ();
1159 switch (info->vendor) {
1160 case CFI_CMDSET_INTEL_EXTENDED:
1161 case CFI_CMDSET_INTEL_STANDARD:
1162 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1163 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1165 case CFI_CMDSET_AMD_EXTENDED:
1166 case CFI_CMDSET_AMD_STANDARD:
1167 flash_unlock_seq (info, 0);
1168 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1172 switch (info->portwidth) {
1173 case FLASH_CFI_8BIT:
1174 cptr.cp[0] = cword.c;
1176 case FLASH_CFI_16BIT:
1177 cptr.wp[0] = cword.w;
1179 case FLASH_CFI_32BIT:
1180 cptr.lp[0] = cword.l;
1182 case FLASH_CFI_64BIT:
1183 cptr.llp[0] = cword.ll;
1187 /* re-enable interrupts if necessary */
1189 enable_interrupts ();
1191 return flash_full_status_check (info, 0, info->write_tout, "write");
1194 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1196 /* loop through the sectors from the highest address
1197 * when the passed address is greater or equal to the sector address
1200 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1202 flash_sect_t sector;
1204 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1205 if (addr >= info->start[sector])
1211 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1214 flash_sect_t sector;
1217 volatile cfiptr_t src;
1218 volatile cfiptr_t dst;
1219 /* buffered writes in the AMD chip set is not supported yet */
1220 if((info->vendor == CFI_CMDSET_AMD_STANDARD) ||
1221 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1225 dst.cp = (uchar *) dest;
1226 sector = find_sector (info, dest);
1227 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1228 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1230 flash_status_check (info, sector, info->buffer_write_tout,
1231 "write to buffer")) == ERR_OK) {
1232 /* reduce the number of loops by the width of the port */
1233 switch (info->portwidth) {
1234 case FLASH_CFI_8BIT:
1237 case FLASH_CFI_16BIT:
1240 case FLASH_CFI_32BIT:
1243 case FLASH_CFI_64BIT:
1250 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1252 switch (info->portwidth) {
1253 case FLASH_CFI_8BIT:
1254 *dst.cp++ = *src.cp++;
1256 case FLASH_CFI_16BIT:
1257 *dst.wp++ = *src.wp++;
1259 case FLASH_CFI_32BIT:
1260 *dst.lp++ = *src.lp++;
1262 case FLASH_CFI_64BIT:
1263 *dst.llp++ = *src.llp++;
1270 flash_write_cmd (info, sector, 0,
1271 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1273 flash_full_status_check (info, sector,
1274 info->buffer_write_tout,
1277 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1280 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1281 #endif /* CFG_FLASH_CFI */