2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/miscdevice.h>
19 #include <linux/major.h>
20 #include <linux/ioport.h>
21 #include <linux/fcntl.h>
22 #include <linux/init.h>
23 #include <linux/poll.h>
25 #include <linux/proc_fs.h>
26 #include <linux/spinlock.h>
27 #include <linux/sysctl.h>
28 #include <linux/wait.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/compat.h>
33 #include <linux/clocksource.h>
34 #include <linux/uaccess.h>
35 #include <linux/slab.h>
38 #include <asm/current.h>
40 #include <asm/div64.h>
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
69 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
70 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
72 /* This clocksource driver currently only works on ia64 */
74 static void __iomem *hpet_mctr;
76 static cycle_t read_hpet(struct clocksource *cs)
78 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
81 static struct clocksource clocksource_hpet = {
85 .mask = CLOCKSOURCE_MASK(64),
86 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
88 static struct clocksource *hpet_clocksource;
91 /* A lock for concurrent access by app and isr hpet activity. */
92 static DEFINE_SPINLOCK(hpet_lock);
94 #define HPET_DEV_NAME (7)
97 struct hpets *hd_hpets;
98 struct hpet __iomem *hd_hpet;
99 struct hpet_timer __iomem *hd_timer;
100 unsigned long hd_ireqfreq;
101 unsigned long hd_irqdata;
102 wait_queue_head_t hd_waitqueue;
103 struct fasync_struct *hd_async_queue;
104 unsigned int hd_flags;
106 unsigned int hd_hdwirq;
107 char hd_name[HPET_DEV_NAME];
111 struct hpets *hp_next;
112 struct hpet __iomem *hp_hpet;
113 unsigned long hp_hpet_phys;
114 struct clocksource *hp_clocksource;
115 unsigned long long hp_tick_freq;
116 unsigned long hp_delta;
117 unsigned int hp_ntimer;
118 unsigned int hp_which;
119 struct hpet_dev hp_dev[1];
122 static struct hpets *hpets;
124 #define HPET_OPEN 0x0001
125 #define HPET_IE 0x0002 /* interrupt enabled */
126 #define HPET_PERIODIC 0x0004
127 #define HPET_SHARED_IRQ 0x0008
131 static inline unsigned long long readq(void __iomem *addr)
133 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
138 static inline void writeq(unsigned long long v, void __iomem *addr)
140 writel(v & 0xffffffff, addr);
141 writel(v >> 32, addr + 4);
145 static irqreturn_t hpet_interrupt(int irq, void *data)
147 struct hpet_dev *devp;
151 isr = 1 << (devp - devp->hd_hpets->hp_dev);
153 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
154 !(isr & readl(&devp->hd_hpet->hpet_isr)))
157 spin_lock(&hpet_lock);
161 * For non-periodic timers, increment the accumulator.
162 * This has the effect of treating non-periodic like periodic.
164 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
165 unsigned long m, t, mc, base, k;
166 struct hpet __iomem *hpet = devp->hd_hpet;
167 struct hpets *hpetp = devp->hd_hpets;
169 t = devp->hd_ireqfreq;
170 m = read_counter(&devp->hd_timer->hpet_compare);
171 mc = read_counter(&hpet->hpet_mc);
172 /* The time for the next interrupt would logically be t + m,
173 * however, if we are very unlucky and the interrupt is delayed
174 * for longer than t then we will completely miss the next
175 * interrupt if we set t + m and an application will hang.
176 * Therefore we need to make a more complex computation assuming
177 * that there exists a k for which the following is true:
178 * k * t + base < mc + delta
179 * (k + 1) * t + base > mc + delta
180 * where t is the interval in hpet ticks for the given freq,
181 * base is the theoretical start value 0 < base < t,
182 * mc is the main counter value at the time of the interrupt,
183 * delta is the time it takes to write the a value to the
185 * k may then be computed as (mc - base + delta) / t .
188 k = (mc - base + hpetp->hp_delta) / t;
189 write_counter(t * (k + 1) + base,
190 &devp->hd_timer->hpet_compare);
193 if (devp->hd_flags & HPET_SHARED_IRQ)
194 writel(isr, &devp->hd_hpet->hpet_isr);
195 spin_unlock(&hpet_lock);
197 wake_up_interruptible(&devp->hd_waitqueue);
199 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
204 static void hpet_timer_set_irq(struct hpet_dev *devp)
208 struct hpet_timer __iomem *timer;
210 spin_lock_irq(&hpet_lock);
211 if (devp->hd_hdwirq) {
212 spin_unlock_irq(&hpet_lock);
216 timer = devp->hd_timer;
218 /* we prefer level triggered mode */
219 v = readl(&timer->hpet_config);
220 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
221 v |= Tn_INT_TYPE_CNF_MASK;
222 writel(v, &timer->hpet_config);
224 spin_unlock_irq(&hpet_lock);
226 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
227 Tn_INT_ROUTE_CAP_SHIFT;
230 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
231 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
233 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
238 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
239 if (irq >= nr_irqs) {
244 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
249 /* FIXME: Setup interrupt source table */
252 if (irq < HPET_MAX_IRQ) {
253 spin_lock_irq(&hpet_lock);
254 v = readl(&timer->hpet_config);
255 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
256 writel(v, &timer->hpet_config);
257 devp->hd_hdwirq = gsi;
258 spin_unlock_irq(&hpet_lock);
263 static int hpet_open(struct inode *inode, struct file *file)
265 struct hpet_dev *devp;
269 if (file->f_mode & FMODE_WRITE)
272 mutex_lock(&hpet_mutex);
273 spin_lock_irq(&hpet_lock);
275 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
276 for (i = 0; i < hpetp->hp_ntimer; i++)
277 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
280 devp = &hpetp->hp_dev[i];
285 spin_unlock_irq(&hpet_lock);
286 mutex_unlock(&hpet_mutex);
290 file->private_data = devp;
291 devp->hd_irqdata = 0;
292 devp->hd_flags |= HPET_OPEN;
293 spin_unlock_irq(&hpet_lock);
294 mutex_unlock(&hpet_mutex);
296 hpet_timer_set_irq(devp);
302 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
304 DECLARE_WAITQUEUE(wait, current);
307 struct hpet_dev *devp;
309 devp = file->private_data;
310 if (!devp->hd_ireqfreq)
313 if (count < sizeof(unsigned long))
316 add_wait_queue(&devp->hd_waitqueue, &wait);
319 set_current_state(TASK_INTERRUPTIBLE);
321 spin_lock_irq(&hpet_lock);
322 data = devp->hd_irqdata;
323 devp->hd_irqdata = 0;
324 spin_unlock_irq(&hpet_lock);
328 else if (file->f_flags & O_NONBLOCK) {
331 } else if (signal_pending(current)) {
332 retval = -ERESTARTSYS;
338 retval = put_user(data, (unsigned long __user *)buf);
340 retval = sizeof(unsigned long);
342 __set_current_state(TASK_RUNNING);
343 remove_wait_queue(&devp->hd_waitqueue, &wait);
348 static unsigned int hpet_poll(struct file *file, poll_table * wait)
351 struct hpet_dev *devp;
353 devp = file->private_data;
355 if (!devp->hd_ireqfreq)
358 poll_wait(file, &devp->hd_waitqueue, wait);
360 spin_lock_irq(&hpet_lock);
361 v = devp->hd_irqdata;
362 spin_unlock_irq(&hpet_lock);
365 return POLLIN | POLLRDNORM;
370 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
372 #ifdef CONFIG_HPET_MMAP
373 struct hpet_dev *devp;
376 devp = file->private_data;
377 addr = devp->hd_hpets->hp_hpet_phys;
379 if (addr & (PAGE_SIZE - 1))
382 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
383 return vm_iomap_memory(vma, addr, PAGE_SIZE);
389 static int hpet_fasync(int fd, struct file *file, int on)
391 struct hpet_dev *devp;
393 devp = file->private_data;
395 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
401 static int hpet_release(struct inode *inode, struct file *file)
403 struct hpet_dev *devp;
404 struct hpet_timer __iomem *timer;
407 devp = file->private_data;
408 timer = devp->hd_timer;
410 spin_lock_irq(&hpet_lock);
412 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
413 &timer->hpet_config);
418 devp->hd_ireqfreq = 0;
420 if (devp->hd_flags & HPET_PERIODIC
421 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
424 v = readq(&timer->hpet_config);
425 v ^= Tn_TYPE_CNF_MASK;
426 writeq(v, &timer->hpet_config);
429 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
430 spin_unlock_irq(&hpet_lock);
435 file->private_data = NULL;
439 static int hpet_ioctl_ieon(struct hpet_dev *devp)
441 struct hpet_timer __iomem *timer;
442 struct hpet __iomem *hpet;
445 unsigned long g, v, t, m;
446 unsigned long flags, isr;
448 timer = devp->hd_timer;
449 hpet = devp->hd_hpet;
450 hpetp = devp->hd_hpets;
452 if (!devp->hd_ireqfreq)
455 spin_lock_irq(&hpet_lock);
457 if (devp->hd_flags & HPET_IE) {
458 spin_unlock_irq(&hpet_lock);
462 devp->hd_flags |= HPET_IE;
464 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
465 devp->hd_flags |= HPET_SHARED_IRQ;
466 spin_unlock_irq(&hpet_lock);
468 irq = devp->hd_hdwirq;
471 unsigned long irq_flags;
473 if (devp->hd_flags & HPET_SHARED_IRQ) {
475 * To prevent the interrupt handler from seeing an
476 * unwanted interrupt status bit, program the timer
477 * so that it will not fire in the near future ...
479 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
480 &timer->hpet_config);
481 write_counter(read_counter(&hpet->hpet_mc),
482 &timer->hpet_compare);
483 /* ... and clear any left-over status. */
484 isr = 1 << (devp - devp->hd_hpets->hp_dev);
485 writel(isr, &hpet->hpet_isr);
488 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
489 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
490 if (request_irq(irq, hpet_interrupt, irq_flags,
491 devp->hd_name, (void *)devp)) {
492 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
498 spin_lock_irq(&hpet_lock);
499 devp->hd_flags ^= HPET_IE;
500 spin_unlock_irq(&hpet_lock);
505 t = devp->hd_ireqfreq;
506 v = readq(&timer->hpet_config);
508 /* 64-bit comparators are not yet supported through the ioctls,
509 * so force this into 32-bit mode if it supports both modes
511 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
513 if (devp->hd_flags & HPET_PERIODIC) {
514 g |= Tn_TYPE_CNF_MASK;
515 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
516 writeq(v, &timer->hpet_config);
517 local_irq_save(flags);
520 * NOTE: First we modify the hidden accumulator
521 * register supported by periodic-capable comparators.
522 * We never want to modify the (single) counter; that
523 * would affect all the comparators. The value written
524 * is the counter value when the first interrupt is due.
526 m = read_counter(&hpet->hpet_mc);
527 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
529 * Then we modify the comparator, indicating the period
530 * for subsequent interrupt.
532 write_counter(t, &timer->hpet_compare);
534 local_irq_save(flags);
535 m = read_counter(&hpet->hpet_mc);
536 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
539 if (devp->hd_flags & HPET_SHARED_IRQ) {
540 isr = 1 << (devp - devp->hd_hpets->hp_dev);
541 writel(isr, &hpet->hpet_isr);
543 writeq(g, &timer->hpet_config);
544 local_irq_restore(flags);
549 /* converts Hz to number of timer ticks */
550 static inline unsigned long hpet_time_div(struct hpets *hpets,
553 unsigned long long m;
555 m = hpets->hp_tick_freq + (dis >> 1);
557 return (unsigned long)m;
561 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
562 struct hpet_info *info)
564 struct hpet_timer __iomem *timer;
565 struct hpet __iomem *hpet;
576 timer = devp->hd_timer;
577 hpet = devp->hd_hpet;
578 hpetp = devp->hd_hpets;
581 return hpet_ioctl_ieon(devp);
590 if ((devp->hd_flags & HPET_IE) == 0)
592 v = readq(&timer->hpet_config);
593 v &= ~Tn_INT_ENB_CNF_MASK;
594 writeq(v, &timer->hpet_config);
596 free_irq(devp->hd_irq, devp);
599 devp->hd_flags ^= HPET_IE;
603 memset(info, 0, sizeof(*info));
604 if (devp->hd_ireqfreq)
606 hpet_time_div(hpetp, devp->hd_ireqfreq);
608 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
609 info->hi_hpet = hpetp->hp_which;
610 info->hi_timer = devp - hpetp->hp_dev;
614 v = readq(&timer->hpet_config);
615 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
619 devp->hd_flags |= HPET_PERIODIC;
622 v = readq(&timer->hpet_config);
623 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
627 if (devp->hd_flags & HPET_PERIODIC &&
628 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
629 v = readq(&timer->hpet_config);
630 v ^= Tn_TYPE_CNF_MASK;
631 writeq(v, &timer->hpet_config);
633 devp->hd_flags &= ~HPET_PERIODIC;
636 if ((arg > hpet_max_freq) &&
637 !capable(CAP_SYS_RESOURCE)) {
647 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
654 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
656 struct hpet_info info;
659 mutex_lock(&hpet_mutex);
660 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
661 mutex_unlock(&hpet_mutex);
663 if ((cmd == HPET_INFO) && !err &&
664 (copy_to_user((void __user *)arg, &info, sizeof(info))))
671 struct compat_hpet_info {
672 compat_ulong_t hi_ireqfreq; /* Hz */
673 compat_ulong_t hi_flags; /* information */
674 unsigned short hi_hpet;
675 unsigned short hi_timer;
679 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
681 struct hpet_info info;
684 mutex_lock(&hpet_mutex);
685 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
686 mutex_unlock(&hpet_mutex);
688 if ((cmd == HPET_INFO) && !err) {
689 struct compat_hpet_info __user *u = compat_ptr(arg);
690 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
691 put_user(info.hi_flags, &u->hi_flags) ||
692 put_user(info.hi_hpet, &u->hi_hpet) ||
693 put_user(info.hi_timer, &u->hi_timer))
701 static const struct file_operations hpet_fops = {
702 .owner = THIS_MODULE,
706 .unlocked_ioctl = hpet_ioctl,
708 .compat_ioctl = hpet_compat_ioctl,
711 .release = hpet_release,
712 .fasync = hpet_fasync,
716 static int hpet_is_known(struct hpet_data *hdp)
720 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
721 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
727 static struct ctl_table hpet_table[] = {
729 .procname = "max-user-freq",
730 .data = &hpet_max_freq,
731 .maxlen = sizeof(int),
733 .proc_handler = proc_dointvec,
738 static struct ctl_table hpet_root[] = {
748 static struct ctl_table dev_root[] = {
758 static struct ctl_table_header *sysctl_header;
761 * Adjustment for when arming the timer with
762 * initial conditions. That is, main counter
763 * ticks expired before interrupts are enabled.
765 #define TICK_CALIBRATE (1000UL)
767 static unsigned long __hpet_calibrate(struct hpets *hpetp)
769 struct hpet_timer __iomem *timer = NULL;
770 unsigned long t, m, count, i, flags, start;
771 struct hpet_dev *devp;
773 struct hpet __iomem *hpet;
775 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
776 if ((devp->hd_flags & HPET_OPEN) == 0) {
777 timer = devp->hd_timer;
784 hpet = hpetp->hp_hpet;
785 t = read_counter(&timer->hpet_compare);
788 count = hpet_time_div(hpetp, TICK_CALIBRATE);
790 local_irq_save(flags);
792 start = read_counter(&hpet->hpet_mc);
795 m = read_counter(&hpet->hpet_mc);
796 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
797 } while (i++, (m - start) < count);
799 local_irq_restore(flags);
801 return (m - start) / i;
804 static unsigned long hpet_calibrate(struct hpets *hpetp)
806 unsigned long ret = ~0UL;
810 * Try to calibrate until return value becomes stable small value.
811 * If SMI interruption occurs in calibration loop, the return value
812 * will be big. This avoids its impact.
815 tmp = __hpet_calibrate(hpetp);
824 int hpet_alloc(struct hpet_data *hdp)
827 struct hpet_dev *devp;
831 struct hpet __iomem *hpet;
832 static struct hpets *last;
833 unsigned long period;
834 unsigned long long temp;
838 * hpet_alloc can be called by platform dependent code.
839 * If platform dependent code has allocated the hpet that
840 * ACPI has also reported, then we catch it here.
842 if (hpet_is_known(hdp)) {
843 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
848 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
849 sizeof(struct hpet_dev));
851 hpetp = kzalloc(siz, GFP_KERNEL);
856 hpetp->hp_which = hpet_nhpet++;
857 hpetp->hp_hpet = hdp->hd_address;
858 hpetp->hp_hpet_phys = hdp->hd_phys_address;
860 hpetp->hp_ntimer = hdp->hd_nirqs;
862 for (i = 0; i < hdp->hd_nirqs; i++)
863 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
865 hpet = hpetp->hp_hpet;
867 cap = readq(&hpet->hpet_cap);
869 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
871 if (hpetp->hp_ntimer != ntimer) {
872 printk(KERN_WARNING "hpet: number irqs doesn't agree"
873 " with number of timers\n");
879 last->hp_next = hpetp;
885 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
886 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
887 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
888 temp += period >> 1; /* round */
889 do_div(temp, period);
890 hpetp->hp_tick_freq = temp; /* ticks per second */
892 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
893 hpetp->hp_which, hdp->hd_phys_address,
894 hpetp->hp_ntimer > 1 ? "s" : "");
895 for (i = 0; i < hpetp->hp_ntimer; i++)
896 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
897 printk(KERN_CONT "\n");
899 temp = hpetp->hp_tick_freq;
900 remainder = do_div(temp, 1000000);
902 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
903 hpetp->hp_which, hpetp->hp_ntimer,
904 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
905 (unsigned) temp, remainder);
907 mcfg = readq(&hpet->hpet_config);
908 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
909 write_counter(0L, &hpet->hpet_mc);
910 mcfg |= HPET_ENABLE_CNF_MASK;
911 writeq(mcfg, &hpet->hpet_config);
914 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
915 struct hpet_timer __iomem *timer;
917 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
919 devp->hd_hpets = hpetp;
920 devp->hd_hpet = hpet;
921 devp->hd_timer = timer;
924 * If the timer was reserved by platform code,
925 * then make timer unavailable for opens.
927 if (hdp->hd_state & (1 << i)) {
928 devp->hd_flags = HPET_OPEN;
932 init_waitqueue_head(&devp->hd_waitqueue);
935 hpetp->hp_delta = hpet_calibrate(hpetp);
937 /* This clocksource driver currently only works on ia64 */
939 if (!hpet_clocksource) {
940 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
941 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
942 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
943 hpetp->hp_clocksource = &clocksource_hpet;
944 hpet_clocksource = &clocksource_hpet;
951 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
953 struct hpet_data *hdp;
955 struct acpi_resource_address64 addr;
959 status = acpi_resource_to_address64(res, &addr);
961 if (ACPI_SUCCESS(status)) {
962 hdp->hd_phys_address = addr.minimum;
963 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
965 if (hpet_is_known(hdp)) {
966 iounmap(hdp->hd_address);
967 return AE_ALREADY_EXISTS;
969 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
970 struct acpi_resource_fixed_memory32 *fixmem32;
972 fixmem32 = &res->data.fixed_memory32;
974 hdp->hd_phys_address = fixmem32->address;
975 hdp->hd_address = ioremap(fixmem32->address,
978 if (hpet_is_known(hdp)) {
979 iounmap(hdp->hd_address);
980 return AE_ALREADY_EXISTS;
982 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
983 struct acpi_resource_extended_irq *irqp;
986 irqp = &res->data.extended_irq;
988 for (i = 0; i < irqp->interrupt_count; i++) {
989 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
992 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
993 irqp->triggering, irqp->polarity);
997 hdp->hd_irq[hdp->hd_nirqs] = irq;
1005 static int hpet_acpi_add(struct acpi_device *device)
1008 struct hpet_data data;
1010 memset(&data, 0, sizeof(data));
1013 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
1014 hpet_resources, &data);
1016 if (ACPI_FAILURE(result))
1019 if (!data.hd_address || !data.hd_nirqs) {
1020 if (data.hd_address)
1021 iounmap(data.hd_address);
1022 printk("%s: no address or irqs in _CRS\n", __func__);
1026 return hpet_alloc(&data);
1029 static int hpet_acpi_remove(struct acpi_device *device)
1031 /* XXX need to unregister clocksource, dealloc mem, etc */
1035 static const struct acpi_device_id hpet_device_ids[] = {
1039 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1041 static struct acpi_driver hpet_acpi_driver = {
1043 .ids = hpet_device_ids,
1045 .add = hpet_acpi_add,
1046 .remove = hpet_acpi_remove,
1050 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1052 static int __init hpet_init(void)
1056 result = misc_register(&hpet_misc);
1060 sysctl_header = register_sysctl_table(dev_root);
1062 result = acpi_bus_register_driver(&hpet_acpi_driver);
1065 unregister_sysctl_table(sysctl_header);
1066 misc_deregister(&hpet_misc);
1073 static void __exit hpet_exit(void)
1075 acpi_bus_unregister_driver(&hpet_acpi_driver);
1078 unregister_sysctl_table(sysctl_header);
1079 misc_deregister(&hpet_misc);
1084 module_init(hpet_init);
1085 module_exit(hpet_exit);
1086 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1087 MODULE_LICENSE("GPL");