2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
34 #include <linux/slab.h>
36 #include <asm/current.h>
37 #include <asm/uaccess.h>
38 #include <asm/system.h>
41 #include <asm/div64.h>
43 #include <linux/acpi.h>
44 #include <acpi/acpi_bus.h>
45 #include <linux/hpet.h>
48 * The High Precision Event Timer driver.
49 * This driver is closely modelled after the rtc.c driver.
50 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
52 #define HPET_USER_FREQ (64)
53 #define HPET_DRIFT (500)
55 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
58 /* WARNING -- don't get confused. These macros are never used
59 * to write the (single) counter, and rarely to read it.
60 * They're badly named; to fix, someday.
62 #if BITS_PER_LONG == 64
63 #define write_counter(V, MC) writeq(V, MC)
64 #define read_counter(MC) readq(MC)
66 #define write_counter(V, MC) writel(V, MC)
67 #define read_counter(MC) readl(MC)
70 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
72 /* This clocksource driver currently only works on ia64 */
74 static void __iomem *hpet_mctr;
76 static cycle_t read_hpet(struct clocksource *cs)
78 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
81 static struct clocksource clocksource_hpet = {
85 .mask = CLOCKSOURCE_MASK(64),
86 .mult = 0, /* to be calculated */
88 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
90 static struct clocksource *hpet_clocksource;
93 /* A lock for concurrent access by app and isr hpet activity. */
94 static DEFINE_SPINLOCK(hpet_lock);
96 #define HPET_DEV_NAME (7)
99 struct hpets *hd_hpets;
100 struct hpet __iomem *hd_hpet;
101 struct hpet_timer __iomem *hd_timer;
102 unsigned long hd_ireqfreq;
103 unsigned long hd_irqdata;
104 wait_queue_head_t hd_waitqueue;
105 struct fasync_struct *hd_async_queue;
106 unsigned int hd_flags;
108 unsigned int hd_hdwirq;
109 char hd_name[HPET_DEV_NAME];
113 struct hpets *hp_next;
114 struct hpet __iomem *hp_hpet;
115 unsigned long hp_hpet_phys;
116 struct clocksource *hp_clocksource;
117 unsigned long long hp_tick_freq;
118 unsigned long hp_delta;
119 unsigned int hp_ntimer;
120 unsigned int hp_which;
121 struct hpet_dev hp_dev[1];
124 static struct hpets *hpets;
126 #define HPET_OPEN 0x0001
127 #define HPET_IE 0x0002 /* interrupt enabled */
128 #define HPET_PERIODIC 0x0004
129 #define HPET_SHARED_IRQ 0x0008
133 static inline unsigned long long readq(void __iomem *addr)
135 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
140 static inline void writeq(unsigned long long v, void __iomem *addr)
142 writel(v & 0xffffffff, addr);
143 writel(v >> 32, addr + 4);
147 static irqreturn_t hpet_interrupt(int irq, void *data)
149 struct hpet_dev *devp;
153 isr = 1 << (devp - devp->hd_hpets->hp_dev);
155 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
156 !(isr & readl(&devp->hd_hpet->hpet_isr)))
159 spin_lock(&hpet_lock);
163 * For non-periodic timers, increment the accumulator.
164 * This has the effect of treating non-periodic like periodic.
166 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
169 t = devp->hd_ireqfreq;
170 m = read_counter(&devp->hd_timer->hpet_compare);
171 write_counter(t + m, &devp->hd_timer->hpet_compare);
174 if (devp->hd_flags & HPET_SHARED_IRQ)
175 writel(isr, &devp->hd_hpet->hpet_isr);
176 spin_unlock(&hpet_lock);
178 wake_up_interruptible(&devp->hd_waitqueue);
180 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
185 static void hpet_timer_set_irq(struct hpet_dev *devp)
189 struct hpet_timer __iomem *timer;
191 spin_lock_irq(&hpet_lock);
192 if (devp->hd_hdwirq) {
193 spin_unlock_irq(&hpet_lock);
197 timer = devp->hd_timer;
199 /* we prefer level triggered mode */
200 v = readl(&timer->hpet_config);
201 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
202 v |= Tn_INT_TYPE_CNF_MASK;
203 writel(v, &timer->hpet_config);
205 spin_unlock_irq(&hpet_lock);
207 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
208 Tn_INT_ROUTE_CAP_SHIFT;
211 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
212 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
214 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
219 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
220 if (irq >= nr_irqs) {
225 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
230 /* FIXME: Setup interrupt source table */
233 if (irq < HPET_MAX_IRQ) {
234 spin_lock_irq(&hpet_lock);
235 v = readl(&timer->hpet_config);
236 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
237 writel(v, &timer->hpet_config);
238 devp->hd_hdwirq = gsi;
239 spin_unlock_irq(&hpet_lock);
244 static int hpet_open(struct inode *inode, struct file *file)
246 struct hpet_dev *devp;
250 if (file->f_mode & FMODE_WRITE)
254 spin_lock_irq(&hpet_lock);
256 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
257 for (i = 0; i < hpetp->hp_ntimer; i++)
258 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
261 devp = &hpetp->hp_dev[i];
266 spin_unlock_irq(&hpet_lock);
271 file->private_data = devp;
272 devp->hd_irqdata = 0;
273 devp->hd_flags |= HPET_OPEN;
274 spin_unlock_irq(&hpet_lock);
277 hpet_timer_set_irq(devp);
283 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
285 DECLARE_WAITQUEUE(wait, current);
288 struct hpet_dev *devp;
290 devp = file->private_data;
291 if (!devp->hd_ireqfreq)
294 if (count < sizeof(unsigned long))
297 add_wait_queue(&devp->hd_waitqueue, &wait);
300 set_current_state(TASK_INTERRUPTIBLE);
302 spin_lock_irq(&hpet_lock);
303 data = devp->hd_irqdata;
304 devp->hd_irqdata = 0;
305 spin_unlock_irq(&hpet_lock);
309 else if (file->f_flags & O_NONBLOCK) {
312 } else if (signal_pending(current)) {
313 retval = -ERESTARTSYS;
319 retval = put_user(data, (unsigned long __user *)buf);
321 retval = sizeof(unsigned long);
323 __set_current_state(TASK_RUNNING);
324 remove_wait_queue(&devp->hd_waitqueue, &wait);
329 static unsigned int hpet_poll(struct file *file, poll_table * wait)
332 struct hpet_dev *devp;
334 devp = file->private_data;
336 if (!devp->hd_ireqfreq)
339 poll_wait(file, &devp->hd_waitqueue, wait);
341 spin_lock_irq(&hpet_lock);
342 v = devp->hd_irqdata;
343 spin_unlock_irq(&hpet_lock);
346 return POLLIN | POLLRDNORM;
351 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
353 #ifdef CONFIG_HPET_MMAP
354 struct hpet_dev *devp;
357 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
360 devp = file->private_data;
361 addr = devp->hd_hpets->hp_hpet_phys;
363 if (addr & (PAGE_SIZE - 1))
366 vma->vm_flags |= VM_IO;
367 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
369 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
370 PAGE_SIZE, vma->vm_page_prot)) {
371 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
382 static int hpet_fasync(int fd, struct file *file, int on)
384 struct hpet_dev *devp;
386 devp = file->private_data;
388 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
394 static int hpet_release(struct inode *inode, struct file *file)
396 struct hpet_dev *devp;
397 struct hpet_timer __iomem *timer;
400 devp = file->private_data;
401 timer = devp->hd_timer;
403 spin_lock_irq(&hpet_lock);
405 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
406 &timer->hpet_config);
411 devp->hd_ireqfreq = 0;
413 if (devp->hd_flags & HPET_PERIODIC
414 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
417 v = readq(&timer->hpet_config);
418 v ^= Tn_TYPE_CNF_MASK;
419 writeq(v, &timer->hpet_config);
422 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
423 spin_unlock_irq(&hpet_lock);
428 file->private_data = NULL;
432 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
435 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
438 struct hpet_dev *devp;
440 devp = file->private_data;
441 return hpet_ioctl_common(devp, cmd, arg, 0);
444 static int hpet_ioctl_ieon(struct hpet_dev *devp)
446 struct hpet_timer __iomem *timer;
447 struct hpet __iomem *hpet;
450 unsigned long g, v, t, m;
451 unsigned long flags, isr;
453 timer = devp->hd_timer;
454 hpet = devp->hd_hpet;
455 hpetp = devp->hd_hpets;
457 if (!devp->hd_ireqfreq)
460 spin_lock_irq(&hpet_lock);
462 if (devp->hd_flags & HPET_IE) {
463 spin_unlock_irq(&hpet_lock);
467 devp->hd_flags |= HPET_IE;
469 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
470 devp->hd_flags |= HPET_SHARED_IRQ;
471 spin_unlock_irq(&hpet_lock);
473 irq = devp->hd_hdwirq;
476 unsigned long irq_flags;
478 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
479 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
480 ? IRQF_SHARED : IRQF_DISABLED;
481 if (request_irq(irq, hpet_interrupt, irq_flags,
482 devp->hd_name, (void *)devp)) {
483 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
489 spin_lock_irq(&hpet_lock);
490 devp->hd_flags ^= HPET_IE;
491 spin_unlock_irq(&hpet_lock);
496 t = devp->hd_ireqfreq;
497 v = readq(&timer->hpet_config);
499 /* 64-bit comparators are not yet supported through the ioctls,
500 * so force this into 32-bit mode if it supports both modes
502 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
504 if (devp->hd_flags & HPET_PERIODIC) {
505 g |= Tn_TYPE_CNF_MASK;
506 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
507 writeq(v, &timer->hpet_config);
508 local_irq_save(flags);
511 * NOTE: First we modify the hidden accumulator
512 * register supported by periodic-capable comparators.
513 * We never want to modify the (single) counter; that
514 * would affect all the comparators. The value written
515 * is the counter value when the first interrupt is due.
517 m = read_counter(&hpet->hpet_mc);
518 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
520 * Then we modify the comparator, indicating the period
521 * for subsequent interrupt.
523 write_counter(t, &timer->hpet_compare);
525 local_irq_save(flags);
526 m = read_counter(&hpet->hpet_mc);
527 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
530 if (devp->hd_flags & HPET_SHARED_IRQ) {
531 isr = 1 << (devp - devp->hd_hpets->hp_dev);
532 writel(isr, &hpet->hpet_isr);
534 writeq(g, &timer->hpet_config);
535 local_irq_restore(flags);
540 /* converts Hz to number of timer ticks */
541 static inline unsigned long hpet_time_div(struct hpets *hpets,
544 unsigned long long m;
546 m = hpets->hp_tick_freq + (dis >> 1);
548 return (unsigned long)m;
552 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
554 struct hpet_timer __iomem *timer;
555 struct hpet __iomem *hpet;
566 timer = devp->hd_timer;
567 hpet = devp->hd_hpet;
568 hpetp = devp->hd_hpets;
571 return hpet_ioctl_ieon(devp);
580 if ((devp->hd_flags & HPET_IE) == 0)
582 v = readq(&timer->hpet_config);
583 v &= ~Tn_INT_ENB_CNF_MASK;
584 writeq(v, &timer->hpet_config);
586 free_irq(devp->hd_irq, devp);
589 devp->hd_flags ^= HPET_IE;
593 struct hpet_info info;
595 if (devp->hd_ireqfreq)
597 hpet_time_div(hpetp, devp->hd_ireqfreq);
599 info.hi_ireqfreq = 0;
601 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
602 info.hi_hpet = hpetp->hp_which;
603 info.hi_timer = devp - hpetp->hp_dev;
605 memcpy((void *)arg, &info, sizeof(info));
607 if (copy_to_user((void __user *)arg, &info,
613 v = readq(&timer->hpet_config);
614 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
618 devp->hd_flags |= HPET_PERIODIC;
621 v = readq(&timer->hpet_config);
622 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
626 if (devp->hd_flags & HPET_PERIODIC &&
627 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
628 v = readq(&timer->hpet_config);
629 v ^= Tn_TYPE_CNF_MASK;
630 writeq(v, &timer->hpet_config);
632 devp->hd_flags &= ~HPET_PERIODIC;
635 if (!kernel && (arg > hpet_max_freq) &&
636 !capable(CAP_SYS_RESOURCE)) {
646 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
652 static const struct file_operations hpet_fops = {
653 .owner = THIS_MODULE,
659 .release = hpet_release,
660 .fasync = hpet_fasync,
664 static int hpet_is_known(struct hpet_data *hdp)
668 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
669 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
675 static ctl_table hpet_table[] = {
677 .procname = "max-user-freq",
678 .data = &hpet_max_freq,
679 .maxlen = sizeof(int),
681 .proc_handler = proc_dointvec,
686 static ctl_table hpet_root[] = {
696 static ctl_table dev_root[] = {
706 static struct ctl_table_header *sysctl_header;
709 * Adjustment for when arming the timer with
710 * initial conditions. That is, main counter
711 * ticks expired before interrupts are enabled.
713 #define TICK_CALIBRATE (1000UL)
715 static unsigned long __hpet_calibrate(struct hpets *hpetp)
717 struct hpet_timer __iomem *timer = NULL;
718 unsigned long t, m, count, i, flags, start;
719 struct hpet_dev *devp;
721 struct hpet __iomem *hpet;
723 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
724 if ((devp->hd_flags & HPET_OPEN) == 0) {
725 timer = devp->hd_timer;
732 hpet = hpetp->hp_hpet;
733 t = read_counter(&timer->hpet_compare);
736 count = hpet_time_div(hpetp, TICK_CALIBRATE);
738 local_irq_save(flags);
740 start = read_counter(&hpet->hpet_mc);
743 m = read_counter(&hpet->hpet_mc);
744 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
745 } while (i++, (m - start) < count);
747 local_irq_restore(flags);
749 return (m - start) / i;
752 static unsigned long hpet_calibrate(struct hpets *hpetp)
754 unsigned long ret = -1;
758 * Try to calibrate until return value becomes stable small value.
759 * If SMI interruption occurs in calibration loop, the return value
760 * will be big. This avoids its impact.
763 tmp = __hpet_calibrate(hpetp);
772 int hpet_alloc(struct hpet_data *hdp)
775 struct hpet_dev *devp;
779 struct hpet __iomem *hpet;
780 static struct hpets *last = NULL;
781 unsigned long period;
782 unsigned long long temp;
786 * hpet_alloc can be called by platform dependent code.
787 * If platform dependent code has allocated the hpet that
788 * ACPI has also reported, then we catch it here.
790 if (hpet_is_known(hdp)) {
791 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
796 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
797 sizeof(struct hpet_dev));
799 hpetp = kzalloc(siz, GFP_KERNEL);
804 hpetp->hp_which = hpet_nhpet++;
805 hpetp->hp_hpet = hdp->hd_address;
806 hpetp->hp_hpet_phys = hdp->hd_phys_address;
808 hpetp->hp_ntimer = hdp->hd_nirqs;
810 for (i = 0; i < hdp->hd_nirqs; i++)
811 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
813 hpet = hpetp->hp_hpet;
815 cap = readq(&hpet->hpet_cap);
817 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
819 if (hpetp->hp_ntimer != ntimer) {
820 printk(KERN_WARNING "hpet: number irqs doesn't agree"
821 " with number of timers\n");
827 last->hp_next = hpetp;
833 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
834 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
835 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
836 temp += period >> 1; /* round */
837 do_div(temp, period);
838 hpetp->hp_tick_freq = temp; /* ticks per second */
840 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
841 hpetp->hp_which, hdp->hd_phys_address,
842 hpetp->hp_ntimer > 1 ? "s" : "");
843 for (i = 0; i < hpetp->hp_ntimer; i++)
844 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
847 temp = hpetp->hp_tick_freq;
848 remainder = do_div(temp, 1000000);
850 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
851 hpetp->hp_which, hpetp->hp_ntimer,
852 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
853 (unsigned) temp, remainder);
855 mcfg = readq(&hpet->hpet_config);
856 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
857 write_counter(0L, &hpet->hpet_mc);
858 mcfg |= HPET_ENABLE_CNF_MASK;
859 writeq(mcfg, &hpet->hpet_config);
862 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
863 struct hpet_timer __iomem *timer;
865 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
867 devp->hd_hpets = hpetp;
868 devp->hd_hpet = hpet;
869 devp->hd_timer = timer;
872 * If the timer was reserved by platform code,
873 * then make timer unavailable for opens.
875 if (hdp->hd_state & (1 << i)) {
876 devp->hd_flags = HPET_OPEN;
880 init_waitqueue_head(&devp->hd_waitqueue);
883 hpetp->hp_delta = hpet_calibrate(hpetp);
885 /* This clocksource driver currently only works on ia64 */
887 if (!hpet_clocksource) {
888 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
889 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
890 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
891 clocksource_hpet.shift);
892 clocksource_register(&clocksource_hpet);
893 hpetp->hp_clocksource = &clocksource_hpet;
894 hpet_clocksource = &clocksource_hpet;
901 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
903 struct hpet_data *hdp;
905 struct acpi_resource_address64 addr;
909 status = acpi_resource_to_address64(res, &addr);
911 if (ACPI_SUCCESS(status)) {
912 hdp->hd_phys_address = addr.minimum;
913 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
915 if (hpet_is_known(hdp)) {
916 iounmap(hdp->hd_address);
917 return AE_ALREADY_EXISTS;
919 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
920 struct acpi_resource_fixed_memory32 *fixmem32;
922 fixmem32 = &res->data.fixed_memory32;
926 hdp->hd_phys_address = fixmem32->address;
927 hdp->hd_address = ioremap(fixmem32->address,
930 if (hpet_is_known(hdp)) {
931 iounmap(hdp->hd_address);
932 return AE_ALREADY_EXISTS;
934 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
935 struct acpi_resource_extended_irq *irqp;
938 irqp = &res->data.extended_irq;
940 for (i = 0; i < irqp->interrupt_count; i++) {
941 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
942 irqp->triggering, irqp->polarity);
946 hdp->hd_irq[hdp->hd_nirqs] = irq;
954 static int hpet_acpi_add(struct acpi_device *device)
957 struct hpet_data data;
959 memset(&data, 0, sizeof(data));
962 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
963 hpet_resources, &data);
965 if (ACPI_FAILURE(result))
968 if (!data.hd_address || !data.hd_nirqs) {
969 printk("%s: no address or irqs in _CRS\n", __func__);
973 return hpet_alloc(&data);
976 static int hpet_acpi_remove(struct acpi_device *device, int type)
978 /* XXX need to unregister clocksource, dealloc mem, etc */
982 static const struct acpi_device_id hpet_device_ids[] = {
986 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
988 static struct acpi_driver hpet_acpi_driver = {
990 .ids = hpet_device_ids,
992 .add = hpet_acpi_add,
993 .remove = hpet_acpi_remove,
997 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
999 static int __init hpet_init(void)
1003 result = misc_register(&hpet_misc);
1007 sysctl_header = register_sysctl_table(dev_root);
1009 result = acpi_bus_register_driver(&hpet_acpi_driver);
1012 unregister_sysctl_table(sysctl_header);
1013 misc_deregister(&hpet_misc);
1020 static void __exit hpet_exit(void)
1022 acpi_bus_unregister_driver(&hpet_acpi_driver);
1025 unregister_sysctl_table(sysctl_header);
1026 misc_deregister(&hpet_misc);
1031 module_init(hpet_init);
1032 module_exit(hpet_exit);
1033 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1034 MODULE_LICENSE("GPL");