2 * $Id: synclink_gt.c,v 4.20 2005/11/08 19:51:55 paulkf Exp $
4 * Device driver for Microgate SyncLink GT serial adapters.
6 * written by Paul Fulghum for Microgate Corporation
9 * Microgate and SyncLink are trademarks of Microgate Corporation
11 * This code is released under the GNU General Public License (GPL)
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
16 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
17 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
23 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 * DEBUG OUTPUT DEFINITIONS
29 * uncomment lines below to enable specific types of debug output
31 * DBGINFO information - most verbose output
32 * DBGERR serious errors
33 * DBGBH bottom half service routine debugging
34 * DBGISR interrupt service routine debugging
35 * DBGDATA output receive and transmit data
36 * DBGTBUF output transmit DMA buffers and registers
37 * DBGRBUF output receive DMA buffers and registers
40 #define DBGINFO(fmt) if (debug_level >= DEBUG_LEVEL_INFO) printk fmt
41 #define DBGERR(fmt) if (debug_level >= DEBUG_LEVEL_ERROR) printk fmt
42 #define DBGBH(fmt) if (debug_level >= DEBUG_LEVEL_BH) printk fmt
43 #define DBGISR(fmt) if (debug_level >= DEBUG_LEVEL_ISR) printk fmt
44 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
45 //#define DBGTBUF(info) dump_tbufs(info)
46 //#define DBGRBUF(info) dump_rbufs(info)
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/version.h>
52 #include <linux/errno.h>
53 #include <linux/signal.h>
54 #include <linux/sched.h>
55 #include <linux/timer.h>
56 #include <linux/interrupt.h>
57 #include <linux/pci.h>
58 #include <linux/tty.h>
59 #include <linux/tty_flip.h>
60 #include <linux/serial.h>
61 #include <linux/major.h>
62 #include <linux/string.h>
63 #include <linux/fcntl.h>
64 #include <linux/ptrace.h>
65 #include <linux/ioport.h>
67 #include <linux/slab.h>
68 #include <linux/netdevice.h>
69 #include <linux/vmalloc.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/ioctl.h>
73 #include <linux/termios.h>
74 #include <linux/bitops.h>
75 #include <linux/workqueue.h>
76 #include <linux/hdlc.h>
78 #include <asm/serial.h>
79 #include <asm/system.h>
83 #include <asm/types.h>
84 #include <asm/uaccess.h>
86 #include "linux/synclink.h"
88 #ifdef CONFIG_HDLC_MODULE
93 * module identification
95 static char *driver_name = "SyncLink GT";
96 static char *driver_version = "$Revision: 4.20 $";
97 static char *tty_driver_name = "synclink_gt";
98 static char *tty_dev_prefix = "ttySLG";
99 MODULE_LICENSE("GPL");
100 #define MGSL_MAGIC 0x5401
101 #define MAX_DEVICES 12
103 static struct pci_device_id pci_table[] = {
104 {PCI_VENDOR_ID_MICROGATE, SYNCLINK_GT_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
105 {PCI_VENDOR_ID_MICROGATE, SYNCLINK_GT4_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
106 {PCI_VENDOR_ID_MICROGATE, SYNCLINK_AC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
107 {0,}, /* terminate list */
109 MODULE_DEVICE_TABLE(pci, pci_table);
111 static int init_one(struct pci_dev *dev,const struct pci_device_id *ent);
112 static void remove_one(struct pci_dev *dev);
113 static struct pci_driver pci_driver = {
114 .name = "synclink_gt",
115 .id_table = pci_table,
117 .remove = __devexit_p(remove_one),
120 static int pci_registered;
123 * module configuration and status
125 static struct slgt_info *slgt_device_list;
126 static int slgt_device_count;
129 static int debug_level;
130 static int maxframe[MAX_DEVICES];
131 static int dosyncppp[MAX_DEVICES];
133 module_param(ttymajor, int, 0);
134 module_param(debug_level, int, 0);
135 module_param_array(maxframe, int, NULL, 0);
136 module_param_array(dosyncppp, int, NULL, 0);
138 MODULE_PARM_DESC(ttymajor, "TTY major device number override: 0=auto assigned");
139 MODULE_PARM_DESC(debug_level, "Debug syslog output: 0=disabled, 1 to 5=increasing detail");
140 MODULE_PARM_DESC(maxframe, "Maximum frame size used by device (4096 to 65535)");
141 MODULE_PARM_DESC(dosyncppp, "Enable synchronous net device, 0=disable 1=enable");
144 * tty support and callbacks
146 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
148 static struct tty_driver *serial_driver;
150 static int open(struct tty_struct *tty, struct file * filp);
151 static void close(struct tty_struct *tty, struct file * filp);
152 static void hangup(struct tty_struct *tty);
153 static void set_termios(struct tty_struct *tty, struct termios *old_termios);
155 static int write(struct tty_struct *tty, const unsigned char *buf, int count);
156 static void put_char(struct tty_struct *tty, unsigned char ch);
157 static void send_xchar(struct tty_struct *tty, char ch);
158 static void wait_until_sent(struct tty_struct *tty, int timeout);
159 static int write_room(struct tty_struct *tty);
160 static void flush_chars(struct tty_struct *tty);
161 static void flush_buffer(struct tty_struct *tty);
162 static void tx_hold(struct tty_struct *tty);
163 static void tx_release(struct tty_struct *tty);
165 static int ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg);
166 static int read_proc(char *page, char **start, off_t off, int count,int *eof, void *data);
167 static int chars_in_buffer(struct tty_struct *tty);
168 static void throttle(struct tty_struct * tty);
169 static void unthrottle(struct tty_struct * tty);
170 static void set_break(struct tty_struct *tty, int break_state);
173 * generic HDLC support and callbacks
176 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
177 static void hdlcdev_tx_done(struct slgt_info *info);
178 static void hdlcdev_rx(struct slgt_info *info, char *buf, int size);
179 static int hdlcdev_init(struct slgt_info *info);
180 static void hdlcdev_exit(struct slgt_info *info);
185 * device specific structures, macros and functions
188 #define SLGT_MAX_PORTS 4
189 #define SLGT_REG_SIZE 256
192 * DMA buffer descriptor and access macros
196 unsigned short count;
197 unsigned short status;
198 unsigned int pbuf; /* physical address of data buffer */
199 unsigned int next; /* physical address of next descriptor */
201 /* driver book keeping */
202 char *buf; /* virtual address of data buffer */
203 unsigned int pdesc; /* physical address of this descriptor */
204 dma_addr_t buf_dma_addr;
207 #define set_desc_buffer(a,b) (a).pbuf = cpu_to_le32((unsigned int)(b))
208 #define set_desc_next(a,b) (a).next = cpu_to_le32((unsigned int)(b))
209 #define set_desc_count(a,b)(a).count = cpu_to_le16((unsigned short)(b))
210 #define set_desc_eof(a,b) (a).status = cpu_to_le16((b) ? (le16_to_cpu((a).status) | BIT0) : (le16_to_cpu((a).status) & ~BIT0))
211 #define desc_count(a) (le16_to_cpu((a).count))
212 #define desc_status(a) (le16_to_cpu((a).status))
213 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
214 #define desc_eof(a) (le16_to_cpu((a).status) & BIT2)
215 #define desc_crc_error(a) (le16_to_cpu((a).status) & BIT1)
216 #define desc_abort(a) (le16_to_cpu((a).status) & BIT0)
217 #define desc_residue(a) ((le16_to_cpu((a).status) & 0x38) >> 3)
219 struct _input_signal_events {
231 * device instance data structure
234 void *if_ptr; /* General purpose pointer (used by SPPP) */
236 struct slgt_info *next_device; /* device list link */
241 char device_name[25];
242 struct pci_dev *pdev;
244 int port_count; /* count of ports on adapter */
245 int adapter_num; /* adapter instance number */
246 int port_num; /* port instance number */
248 /* array of pointers to port contexts on this adapter */
249 struct slgt_info *port_array[SLGT_MAX_PORTS];
251 int count; /* count of opens */
252 int line; /* tty line instance number */
253 unsigned short close_delay;
254 unsigned short closing_wait; /* time to wait before closing */
256 struct mgsl_icount icount;
258 struct tty_struct *tty;
260 int x_char; /* xon/xoff character */
261 int blocked_open; /* # of blocked opens */
262 unsigned int read_status_mask;
263 unsigned int ignore_status_mask;
265 wait_queue_head_t open_wait;
266 wait_queue_head_t close_wait;
268 wait_queue_head_t status_event_wait_q;
269 wait_queue_head_t event_wait_q;
270 struct timer_list tx_timer;
271 struct timer_list rx_timer;
273 spinlock_t lock; /* spinlock for synchronizing with ISR */
275 struct work_struct task;
281 int irq_requested; /* nonzero if IRQ requested */
282 int irq_occurred; /* for diagnostics use */
284 /* device configuration */
286 unsigned int bus_type;
287 unsigned int irq_level;
288 unsigned long irq_flags;
290 unsigned char __iomem * reg_addr; /* memory mapped registers address */
293 int reg_addr_requested;
295 MGSL_PARAMS params; /* communications parameters */
297 u32 max_frame_size; /* as set by device config */
299 unsigned int raw_rx_size;
300 unsigned int if_mode;
310 unsigned char signals; /* serial signal states */
311 unsigned int init_error; /* initialization error */
313 unsigned char *tx_buf;
316 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
317 char char_buf[MAX_ASYNC_BUFFER_SIZE];
318 BOOLEAN drop_rts_on_tx_done;
319 struct _input_signal_events input_signal_events;
321 int dcd_chkcount; /* check counts to prevent */
322 int cts_chkcount; /* too many IRQs if a signal */
323 int dsr_chkcount; /* is floating */
326 char *bufs; /* virtual address of DMA buffer lists */
327 dma_addr_t bufs_dma_addr; /* physical address of buffer descriptors */
329 unsigned int rbuf_count;
330 struct slgt_desc *rbufs;
331 unsigned int rbuf_current;
332 unsigned int rbuf_index;
334 unsigned int tbuf_count;
335 struct slgt_desc *tbufs;
336 unsigned int tbuf_current;
337 unsigned int tbuf_start;
339 unsigned char *tmp_rbuf;
340 unsigned int tmp_rbuf_count;
342 /* SPPP/Cisco HDLC device parts */
348 struct net_device *netdev;
353 static MGSL_PARAMS default_params = {
354 .mode = MGSL_MODE_HDLC,
356 .flags = HDLC_FLAG_UNDERRUN_ABORT15,
357 .encoding = HDLC_ENCODING_NRZI_SPACE,
360 .crc_type = HDLC_CRC_16_CCITT,
361 .preamble_length = HDLC_PREAMBLE_LENGTH_8BITS,
362 .preamble = HDLC_PREAMBLE_PATTERN_NONE,
366 .parity = ASYNC_PARITY_NONE
371 #define BH_TRANSMIT 2
373 #define IO_PIN_SHUTDOWN_LIMIT 100
375 #define DMABUFSIZE 256
376 #define DESC_LIST_SIZE 4096
378 #define MASK_PARITY BIT1
379 #define MASK_FRAMING BIT2
380 #define MASK_BREAK BIT3
381 #define MASK_OVERRUN BIT4
383 #define GSR 0x00 /* global status */
384 #define TDR 0x80 /* tx data */
385 #define RDR 0x80 /* rx data */
386 #define TCR 0x82 /* tx control */
387 #define TIR 0x84 /* tx idle */
388 #define TPR 0x85 /* tx preamble */
389 #define RCR 0x86 /* rx control */
390 #define VCR 0x88 /* V.24 control */
391 #define CCR 0x89 /* clock control */
392 #define BDR 0x8a /* baud divisor */
393 #define SCR 0x8c /* serial control */
394 #define SSR 0x8e /* serial status */
395 #define RDCSR 0x90 /* rx DMA control/status */
396 #define TDCSR 0x94 /* tx DMA control/status */
397 #define RDDAR 0x98 /* rx DMA descriptor address */
398 #define TDDAR 0x9c /* tx DMA descriptor address */
401 #define RXBREAK BIT14
402 #define IRQ_TXDATA BIT13
403 #define IRQ_TXIDLE BIT12
404 #define IRQ_TXUNDER BIT11 /* HDLC */
405 #define IRQ_RXDATA BIT10
406 #define IRQ_RXIDLE BIT9 /* HDLC */
407 #define IRQ_RXBREAK BIT9 /* async */
408 #define IRQ_RXOVER BIT8
413 #define IRQ_ALL 0x3ff0
414 #define IRQ_MASTER BIT0
416 #define slgt_irq_on(info, mask) \
417 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
418 #define slgt_irq_off(info, mask) \
419 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
421 static __u8 rd_reg8(struct slgt_info *info, unsigned int addr);
422 static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value);
423 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr);
424 static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value);
425 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr);
426 static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value);
428 static void msc_set_vcr(struct slgt_info *info);
430 static int startup(struct slgt_info *info);
431 static int block_til_ready(struct tty_struct *tty, struct file * filp,struct slgt_info *info);
432 static void shutdown(struct slgt_info *info);
433 static void program_hw(struct slgt_info *info);
434 static void change_params(struct slgt_info *info);
436 static int register_test(struct slgt_info *info);
437 static int irq_test(struct slgt_info *info);
438 static int loopback_test(struct slgt_info *info);
439 static int adapter_test(struct slgt_info *info);
441 static void reset_adapter(struct slgt_info *info);
442 static void reset_port(struct slgt_info *info);
443 static void async_mode(struct slgt_info *info);
444 static void hdlc_mode(struct slgt_info *info);
446 static void rx_stop(struct slgt_info *info);
447 static void rx_start(struct slgt_info *info);
448 static void reset_rbufs(struct slgt_info *info);
449 static void free_rbufs(struct slgt_info *info, unsigned int first, unsigned int last);
450 static void rdma_reset(struct slgt_info *info);
451 static int rx_get_frame(struct slgt_info *info);
452 static int rx_get_buf(struct slgt_info *info);
454 static void tx_start(struct slgt_info *info);
455 static void tx_stop(struct slgt_info *info);
456 static void tx_set_idle(struct slgt_info *info);
457 static unsigned int free_tbuf_count(struct slgt_info *info);
458 static void reset_tbufs(struct slgt_info *info);
459 static void tdma_reset(struct slgt_info *info);
460 static void tx_load(struct slgt_info *info, const char *buf, unsigned int count);
462 static void get_signals(struct slgt_info *info);
463 static void set_signals(struct slgt_info *info);
464 static void enable_loopback(struct slgt_info *info);
465 static void set_rate(struct slgt_info *info, u32 data_rate);
467 static int bh_action(struct slgt_info *info);
468 static void bh_handler(void* context);
469 static void bh_transmit(struct slgt_info *info);
470 static void isr_serial(struct slgt_info *info);
471 static void isr_rdma(struct slgt_info *info);
472 static void isr_txeom(struct slgt_info *info, unsigned short status);
473 static void isr_tdma(struct slgt_info *info);
474 static irqreturn_t slgt_interrupt(int irq, void *dev_id, struct pt_regs * regs);
476 static int alloc_dma_bufs(struct slgt_info *info);
477 static void free_dma_bufs(struct slgt_info *info);
478 static int alloc_desc(struct slgt_info *info);
479 static void free_desc(struct slgt_info *info);
480 static int alloc_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count);
481 static void free_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count);
483 static int alloc_tmp_rbuf(struct slgt_info *info);
484 static void free_tmp_rbuf(struct slgt_info *info);
486 static void tx_timeout(unsigned long context);
487 static void rx_timeout(unsigned long context);
492 static int get_stats(struct slgt_info *info, struct mgsl_icount __user *user_icount);
493 static int get_params(struct slgt_info *info, MGSL_PARAMS __user *params);
494 static int set_params(struct slgt_info *info, MGSL_PARAMS __user *params);
495 static int get_txidle(struct slgt_info *info, int __user *idle_mode);
496 static int set_txidle(struct slgt_info *info, int idle_mode);
497 static int tx_enable(struct slgt_info *info, int enable);
498 static int tx_abort(struct slgt_info *info);
499 static int rx_enable(struct slgt_info *info, int enable);
500 static int modem_input_wait(struct slgt_info *info,int arg);
501 static int wait_mgsl_event(struct slgt_info *info, int __user *mask_ptr);
502 static int tiocmget(struct tty_struct *tty, struct file *file);
503 static int tiocmset(struct tty_struct *tty, struct file *file,
504 unsigned int set, unsigned int clear);
505 static void set_break(struct tty_struct *tty, int break_state);
506 static int get_interface(struct slgt_info *info, int __user *if_mode);
507 static int set_interface(struct slgt_info *info, int if_mode);
512 static void add_device(struct slgt_info *info);
513 static void device_init(int adapter_num, struct pci_dev *pdev);
514 static int claim_resources(struct slgt_info *info);
515 static void release_resources(struct slgt_info *info);
534 static void trace_block(struct slgt_info *info, const char *data, int count, const char *label)
538 printk("%s %s data:\n",info->device_name, label);
540 linecount = (count > 16) ? 16 : count;
541 for(i=0; i < linecount; i++)
542 printk("%02X ",(unsigned char)data[i]);
545 for(i=0;i<linecount;i++) {
546 if (data[i]>=040 && data[i]<=0176)
547 printk("%c",data[i]);
557 #define DBGDATA(info, buf, size, label)
561 static void dump_tbufs(struct slgt_info *info)
564 printk("tbuf_current=%d\n", info->tbuf_current);
565 for (i=0 ; i < info->tbuf_count ; i++) {
566 printk("%d: count=%04X status=%04X\n",
567 i, le16_to_cpu(info->tbufs[i].count), le16_to_cpu(info->tbufs[i].status));
571 #define DBGTBUF(info)
575 static void dump_rbufs(struct slgt_info *info)
578 printk("rbuf_current=%d\n", info->rbuf_current);
579 for (i=0 ; i < info->rbuf_count ; i++) {
580 printk("%d: count=%04X status=%04X\n",
581 i, le16_to_cpu(info->rbufs[i].count), le16_to_cpu(info->rbufs[i].status));
585 #define DBGRBUF(info)
588 static inline int sanity_check(struct slgt_info *info, char *devname, const char *name)
592 printk("null struct slgt_info for (%s) in %s\n", devname, name);
595 if (info->magic != MGSL_MAGIC) {
596 printk("bad magic number struct slgt_info (%s) in %s\n", devname, name);
607 * line discipline callback wrappers
609 * The wrappers maintain line discipline references
610 * while calling into the line discipline.
612 * ldisc_receive_buf - pass receive data to line discipline
614 static void ldisc_receive_buf(struct tty_struct *tty,
615 const __u8 *data, char *flags, int count)
617 struct tty_ldisc *ld;
620 ld = tty_ldisc_ref(tty);
623 ld->receive_buf(tty, data, flags, count);
630 static int open(struct tty_struct *tty, struct file *filp)
632 struct slgt_info *info;
637 if ((line < 0) || (line >= slgt_device_count)) {
638 DBGERR(("%s: open with invalid line #%d.\n", driver_name, line));
642 info = slgt_device_list;
643 while(info && info->line != line)
644 info = info->next_device;
645 if (sanity_check(info, tty->name, "open"))
647 if (info->init_error) {
648 DBGERR(("%s init error=%d\n", info->device_name, info->init_error));
652 tty->driver_data = info;
655 DBGINFO(("%s open, old ref count = %d\n", info->device_name, info->count));
657 /* If port is closing, signal caller to try again */
658 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
659 if (info->flags & ASYNC_CLOSING)
660 interruptible_sleep_on(&info->close_wait);
661 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
662 -EAGAIN : -ERESTARTSYS);
666 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
668 spin_lock_irqsave(&info->netlock, flags);
669 if (info->netcount) {
671 spin_unlock_irqrestore(&info->netlock, flags);
675 spin_unlock_irqrestore(&info->netlock, flags);
677 if (info->count == 1) {
678 /* 1st open on this device, init hardware */
679 retval = startup(info);
684 retval = block_til_ready(tty, filp, info);
686 DBGINFO(("%s block_til_ready rc=%d\n", info->device_name, retval));
695 info->tty = NULL; /* tty layer will release tty struct */
700 DBGINFO(("%s open rc=%d\n", info->device_name, retval));
704 static void close(struct tty_struct *tty, struct file *filp)
706 struct slgt_info *info = tty->driver_data;
708 if (sanity_check(info, tty->name, "close"))
710 DBGINFO(("%s close entry, count=%d\n", info->device_name, info->count));
715 if (tty_hung_up_p(filp))
718 if ((tty->count == 1) && (info->count != 1)) {
720 * tty->count is 1 and the tty structure will be freed.
721 * info->count should be one in this case.
722 * if it's not, correct it so that the port is shutdown.
724 DBGERR(("%s close: bad refcount; tty->count=1, "
725 "info->count=%d\n", info->device_name, info->count));
731 /* if at least one open remaining, leave hardware active */
735 info->flags |= ASYNC_CLOSING;
737 /* set tty->closing to notify line discipline to
738 * only process XON/XOFF characters. Only the N_TTY
739 * discipline appears to use this (ppp does not).
743 /* wait for transmit data to clear all layers */
745 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
746 DBGINFO(("%s call tty_wait_until_sent\n", info->device_name));
747 tty_wait_until_sent(tty, info->closing_wait);
750 if (info->flags & ASYNC_INITIALIZED)
751 wait_until_sent(tty, info->timeout);
752 if (tty->driver->flush_buffer)
753 tty->driver->flush_buffer(tty);
754 tty_ldisc_flush(tty);
761 if (info->blocked_open) {
762 if (info->close_delay) {
763 msleep_interruptible(jiffies_to_msecs(info->close_delay));
765 wake_up_interruptible(&info->open_wait);
768 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
770 wake_up_interruptible(&info->close_wait);
773 DBGINFO(("%s close exit, count=%d\n", tty->driver->name, info->count));
776 static void hangup(struct tty_struct *tty)
778 struct slgt_info *info = tty->driver_data;
780 if (sanity_check(info, tty->name, "hangup"))
782 DBGINFO(("%s hangup\n", info->device_name));
788 info->flags &= ~ASYNC_NORMAL_ACTIVE;
791 wake_up_interruptible(&info->open_wait);
794 static void set_termios(struct tty_struct *tty, struct termios *old_termios)
796 struct slgt_info *info = tty->driver_data;
799 DBGINFO(("%s set_termios\n", tty->driver->name));
801 /* just return if nothing has changed */
802 if ((tty->termios->c_cflag == old_termios->c_cflag)
803 && (RELEVANT_IFLAG(tty->termios->c_iflag)
804 == RELEVANT_IFLAG(old_termios->c_iflag)))
809 /* Handle transition to B0 status */
810 if (old_termios->c_cflag & CBAUD &&
811 !(tty->termios->c_cflag & CBAUD)) {
812 info->signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
813 spin_lock_irqsave(&info->lock,flags);
815 spin_unlock_irqrestore(&info->lock,flags);
818 /* Handle transition away from B0 status */
819 if (!(old_termios->c_cflag & CBAUD) &&
820 tty->termios->c_cflag & CBAUD) {
821 info->signals |= SerialSignal_DTR;
822 if (!(tty->termios->c_cflag & CRTSCTS) ||
823 !test_bit(TTY_THROTTLED, &tty->flags)) {
824 info->signals |= SerialSignal_RTS;
826 spin_lock_irqsave(&info->lock,flags);
828 spin_unlock_irqrestore(&info->lock,flags);
831 /* Handle turning off CRTSCTS */
832 if (old_termios->c_cflag & CRTSCTS &&
833 !(tty->termios->c_cflag & CRTSCTS)) {
839 static int write(struct tty_struct *tty,
840 const unsigned char *buf, int count)
843 struct slgt_info *info = tty->driver_data;
846 if (sanity_check(info, tty->name, "write"))
848 DBGINFO(("%s write count=%d\n", info->device_name, count));
850 if (!tty || !info->tx_buf)
853 if (count > info->max_frame_size) {
861 if (info->params.mode == MGSL_MODE_RAW) {
862 unsigned int bufs_needed = (count/DMABUFSIZE);
863 unsigned int bufs_free = free_tbuf_count(info);
864 if (count % DMABUFSIZE)
866 if (bufs_needed > bufs_free)
871 if (info->tx_count) {
872 /* send accumulated data from send_char() calls */
873 /* as frame and wait before accepting more data. */
874 tx_load(info, info->tx_buf, info->tx_count);
879 ret = info->tx_count = count;
880 tx_load(info, buf, count);
884 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
885 spin_lock_irqsave(&info->lock,flags);
886 if (!info->tx_active)
888 spin_unlock_irqrestore(&info->lock,flags);
892 DBGINFO(("%s write rc=%d\n", info->device_name, ret));
896 static void put_char(struct tty_struct *tty, unsigned char ch)
898 struct slgt_info *info = tty->driver_data;
901 if (sanity_check(info, tty->name, "put_char"))
903 DBGINFO(("%s put_char(%d)\n", info->device_name, ch));
904 if (!tty || !info->tx_buf)
906 spin_lock_irqsave(&info->lock,flags);
907 if (!info->tx_active && (info->tx_count < info->max_frame_size))
908 info->tx_buf[info->tx_count++] = ch;
909 spin_unlock_irqrestore(&info->lock,flags);
912 static void send_xchar(struct tty_struct *tty, char ch)
914 struct slgt_info *info = tty->driver_data;
917 if (sanity_check(info, tty->name, "send_xchar"))
919 DBGINFO(("%s send_xchar(%d)\n", info->device_name, ch));
922 spin_lock_irqsave(&info->lock,flags);
923 if (!info->tx_enabled)
925 spin_unlock_irqrestore(&info->lock,flags);
929 static void wait_until_sent(struct tty_struct *tty, int timeout)
931 struct slgt_info *info = tty->driver_data;
932 unsigned long orig_jiffies, char_time;
936 if (sanity_check(info, tty->name, "wait_until_sent"))
938 DBGINFO(("%s wait_until_sent entry\n", info->device_name));
939 if (!(info->flags & ASYNC_INITIALIZED))
942 orig_jiffies = jiffies;
944 /* Set check interval to 1/5 of estimated time to
945 * send a character, and make it at least 1. The check
946 * interval should also be less than the timeout.
947 * Note: use tight timings here to satisfy the NIST-PCTS.
950 if (info->params.data_rate) {
951 char_time = info->timeout/(32 * 5);
958 char_time = min_t(unsigned long, char_time, timeout);
960 while (info->tx_active) {
961 msleep_interruptible(jiffies_to_msecs(char_time));
962 if (signal_pending(current))
964 if (timeout && time_after(jiffies, orig_jiffies + timeout))
969 DBGINFO(("%s wait_until_sent exit\n", info->device_name));
972 static int write_room(struct tty_struct *tty)
974 struct slgt_info *info = tty->driver_data;
977 if (sanity_check(info, tty->name, "write_room"))
979 ret = (info->tx_active) ? 0 : HDLC_MAX_FRAME_SIZE;
980 DBGINFO(("%s write_room=%d\n", info->device_name, ret));
984 static void flush_chars(struct tty_struct *tty)
986 struct slgt_info *info = tty->driver_data;
989 if (sanity_check(info, tty->name, "flush_chars"))
991 DBGINFO(("%s flush_chars entry tx_count=%d\n", info->device_name, info->tx_count));
993 if (info->tx_count <= 0 || tty->stopped ||
994 tty->hw_stopped || !info->tx_buf)
997 DBGINFO(("%s flush_chars start transmit\n", info->device_name));
999 spin_lock_irqsave(&info->lock,flags);
1000 if (!info->tx_active && info->tx_count) {
1001 tx_load(info, info->tx_buf,info->tx_count);
1004 spin_unlock_irqrestore(&info->lock,flags);
1007 static void flush_buffer(struct tty_struct *tty)
1009 struct slgt_info *info = tty->driver_data;
1010 unsigned long flags;
1012 if (sanity_check(info, tty->name, "flush_buffer"))
1014 DBGINFO(("%s flush_buffer\n", info->device_name));
1016 spin_lock_irqsave(&info->lock,flags);
1017 if (!info->tx_active)
1019 spin_unlock_irqrestore(&info->lock,flags);
1021 wake_up_interruptible(&tty->write_wait);
1026 * throttle (stop) transmitter
1028 static void tx_hold(struct tty_struct *tty)
1030 struct slgt_info *info = tty->driver_data;
1031 unsigned long flags;
1033 if (sanity_check(info, tty->name, "tx_hold"))
1035 DBGINFO(("%s tx_hold\n", info->device_name));
1036 spin_lock_irqsave(&info->lock,flags);
1037 if (info->tx_enabled && info->params.mode == MGSL_MODE_ASYNC)
1039 spin_unlock_irqrestore(&info->lock,flags);
1043 * release (start) transmitter
1045 static void tx_release(struct tty_struct *tty)
1047 struct slgt_info *info = tty->driver_data;
1048 unsigned long flags;
1050 if (sanity_check(info, tty->name, "tx_release"))
1052 DBGINFO(("%s tx_release\n", info->device_name));
1053 spin_lock_irqsave(&info->lock,flags);
1054 if (!info->tx_active && info->tx_count) {
1055 tx_load(info, info->tx_buf, info->tx_count);
1058 spin_unlock_irqrestore(&info->lock,flags);
1062 * Service an IOCTL request
1066 * tty pointer to tty instance data
1067 * file pointer to associated file object for device
1068 * cmd IOCTL command code
1069 * arg command argument/context
1071 * Return 0 if success, otherwise error code
1073 static int ioctl(struct tty_struct *tty, struct file *file,
1074 unsigned int cmd, unsigned long arg)
1076 struct slgt_info *info = tty->driver_data;
1077 struct mgsl_icount cnow; /* kernel counter temps */
1078 struct serial_icounter_struct __user *p_cuser; /* user space */
1079 unsigned long flags;
1080 void __user *argp = (void __user *)arg;
1082 if (sanity_check(info, tty->name, "ioctl"))
1084 DBGINFO(("%s ioctl() cmd=%08X\n", info->device_name, cmd));
1086 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1087 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1088 if (tty->flags & (1 << TTY_IO_ERROR))
1093 case MGSL_IOCGPARAMS:
1094 return get_params(info, argp);
1095 case MGSL_IOCSPARAMS:
1096 return set_params(info, argp);
1097 case MGSL_IOCGTXIDLE:
1098 return get_txidle(info, argp);
1099 case MGSL_IOCSTXIDLE:
1100 return set_txidle(info, (int)arg);
1101 case MGSL_IOCTXENABLE:
1102 return tx_enable(info, (int)arg);
1103 case MGSL_IOCRXENABLE:
1104 return rx_enable(info, (int)arg);
1105 case MGSL_IOCTXABORT:
1106 return tx_abort(info);
1107 case MGSL_IOCGSTATS:
1108 return get_stats(info, argp);
1109 case MGSL_IOCWAITEVENT:
1110 return wait_mgsl_event(info, argp);
1112 return modem_input_wait(info,(int)arg);
1114 return get_interface(info, argp);
1116 return set_interface(info,(int)arg);
1118 spin_lock_irqsave(&info->lock,flags);
1119 cnow = info->icount;
1120 spin_unlock_irqrestore(&info->lock,flags);
1122 if (put_user(cnow.cts, &p_cuser->cts) ||
1123 put_user(cnow.dsr, &p_cuser->dsr) ||
1124 put_user(cnow.rng, &p_cuser->rng) ||
1125 put_user(cnow.dcd, &p_cuser->dcd) ||
1126 put_user(cnow.rx, &p_cuser->rx) ||
1127 put_user(cnow.tx, &p_cuser->tx) ||
1128 put_user(cnow.frame, &p_cuser->frame) ||
1129 put_user(cnow.overrun, &p_cuser->overrun) ||
1130 put_user(cnow.parity, &p_cuser->parity) ||
1131 put_user(cnow.brk, &p_cuser->brk) ||
1132 put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1136 return -ENOIOCTLCMD;
1144 static inline int line_info(char *buf, struct slgt_info *info)
1148 unsigned long flags;
1150 ret = sprintf(buf, "%s: IO=%08X IRQ=%d MaxFrameSize=%u\n",
1151 info->device_name, info->phys_reg_addr,
1152 info->irq_level, info->max_frame_size);
1154 /* output current serial signal states */
1155 spin_lock_irqsave(&info->lock,flags);
1157 spin_unlock_irqrestore(&info->lock,flags);
1161 if (info->signals & SerialSignal_RTS)
1162 strcat(stat_buf, "|RTS");
1163 if (info->signals & SerialSignal_CTS)
1164 strcat(stat_buf, "|CTS");
1165 if (info->signals & SerialSignal_DTR)
1166 strcat(stat_buf, "|DTR");
1167 if (info->signals & SerialSignal_DSR)
1168 strcat(stat_buf, "|DSR");
1169 if (info->signals & SerialSignal_DCD)
1170 strcat(stat_buf, "|CD");
1171 if (info->signals & SerialSignal_RI)
1172 strcat(stat_buf, "|RI");
1174 if (info->params.mode != MGSL_MODE_ASYNC) {
1175 ret += sprintf(buf+ret, "\tHDLC txok:%d rxok:%d",
1176 info->icount.txok, info->icount.rxok);
1177 if (info->icount.txunder)
1178 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
1179 if (info->icount.txabort)
1180 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
1181 if (info->icount.rxshort)
1182 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
1183 if (info->icount.rxlong)
1184 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
1185 if (info->icount.rxover)
1186 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
1187 if (info->icount.rxcrc)
1188 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
1190 ret += sprintf(buf+ret, "\tASYNC tx:%d rx:%d",
1191 info->icount.tx, info->icount.rx);
1192 if (info->icount.frame)
1193 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
1194 if (info->icount.parity)
1195 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
1196 if (info->icount.brk)
1197 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
1198 if (info->icount.overrun)
1199 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
1202 /* Append serial signal status to end */
1203 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
1205 ret += sprintf(buf+ret, "\ttxactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
1206 info->tx_active,info->bh_requested,info->bh_running,
1212 /* Called to print information about devices
1214 static int read_proc(char *page, char **start, off_t off, int count,
1215 int *eof, void *data)
1219 struct slgt_info *info;
1221 len += sprintf(page, "synclink_gt driver:%s\n", driver_version);
1223 info = slgt_device_list;
1225 l = line_info(page + len, info);
1227 if (len+begin > off+count)
1229 if (len+begin < off) {
1233 info = info->next_device;
1238 if (off >= len+begin)
1240 *start = page + (off-begin);
1241 return ((count < begin+len-off) ? count : begin+len-off);
1245 * return count of bytes in transmit buffer
1247 static int chars_in_buffer(struct tty_struct *tty)
1249 struct slgt_info *info = tty->driver_data;
1250 if (sanity_check(info, tty->name, "chars_in_buffer"))
1252 DBGINFO(("%s chars_in_buffer()=%d\n", info->device_name, info->tx_count));
1253 return info->tx_count;
1257 * signal remote device to throttle send data (our receive data)
1259 static void throttle(struct tty_struct * tty)
1261 struct slgt_info *info = tty->driver_data;
1262 unsigned long flags;
1264 if (sanity_check(info, tty->name, "throttle"))
1266 DBGINFO(("%s throttle\n", info->device_name));
1268 send_xchar(tty, STOP_CHAR(tty));
1269 if (tty->termios->c_cflag & CRTSCTS) {
1270 spin_lock_irqsave(&info->lock,flags);
1271 info->signals &= ~SerialSignal_RTS;
1273 spin_unlock_irqrestore(&info->lock,flags);
1278 * signal remote device to stop throttling send data (our receive data)
1280 static void unthrottle(struct tty_struct * tty)
1282 struct slgt_info *info = tty->driver_data;
1283 unsigned long flags;
1285 if (sanity_check(info, tty->name, "unthrottle"))
1287 DBGINFO(("%s unthrottle\n", info->device_name));
1292 send_xchar(tty, START_CHAR(tty));
1294 if (tty->termios->c_cflag & CRTSCTS) {
1295 spin_lock_irqsave(&info->lock,flags);
1296 info->signals |= SerialSignal_RTS;
1298 spin_unlock_irqrestore(&info->lock,flags);
1303 * set or clear transmit break condition
1304 * break_state -1=set break condition, 0=clear
1306 static void set_break(struct tty_struct *tty, int break_state)
1308 struct slgt_info *info = tty->driver_data;
1309 unsigned short value;
1310 unsigned long flags;
1312 if (sanity_check(info, tty->name, "set_break"))
1314 DBGINFO(("%s set_break(%d)\n", info->device_name, break_state));
1316 spin_lock_irqsave(&info->lock,flags);
1317 value = rd_reg16(info, TCR);
1318 if (break_state == -1)
1322 wr_reg16(info, TCR, value);
1323 spin_unlock_irqrestore(&info->lock,flags);
1329 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
1330 * set encoding and frame check sequence (FCS) options
1332 * dev pointer to network device structure
1333 * encoding serial encoding setting
1334 * parity FCS setting
1336 * returns 0 if success, otherwise error code
1338 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
1339 unsigned short parity)
1341 struct slgt_info *info = dev_to_port(dev);
1342 unsigned char new_encoding;
1343 unsigned short new_crctype;
1345 /* return error if TTY interface open */
1349 DBGINFO(("%s hdlcdev_attach\n", info->device_name));
1353 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
1354 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
1355 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
1356 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
1357 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
1358 default: return -EINVAL;
1363 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
1364 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
1365 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
1366 default: return -EINVAL;
1369 info->params.encoding = new_encoding;
1370 info->params.crc_type = new_crctype;;
1372 /* if network interface up, reprogram hardware */
1380 * called by generic HDLC layer to send frame
1382 * skb socket buffer containing HDLC frame
1383 * dev pointer to network device structure
1385 * returns 0 if success, otherwise error code
1387 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
1389 struct slgt_info *info = dev_to_port(dev);
1390 struct net_device_stats *stats = hdlc_stats(dev);
1391 unsigned long flags;
1393 DBGINFO(("%s hdlc_xmit\n", dev->name));
1395 /* stop sending until this frame completes */
1396 netif_stop_queue(dev);
1398 /* copy data to device buffers */
1399 info->tx_count = skb->len;
1400 tx_load(info, skb->data, skb->len);
1402 /* update network statistics */
1403 stats->tx_packets++;
1404 stats->tx_bytes += skb->len;
1406 /* done with socket buffer, so free it */
1409 /* save start time for transmit timeout detection */
1410 dev->trans_start = jiffies;
1412 /* start hardware transmitter if necessary */
1413 spin_lock_irqsave(&info->lock,flags);
1414 if (!info->tx_active)
1416 spin_unlock_irqrestore(&info->lock,flags);
1422 * called by network layer when interface enabled
1423 * claim resources and initialize hardware
1425 * dev pointer to network device structure
1427 * returns 0 if success, otherwise error code
1429 static int hdlcdev_open(struct net_device *dev)
1431 struct slgt_info *info = dev_to_port(dev);
1433 unsigned long flags;
1435 DBGINFO(("%s hdlcdev_open\n", dev->name));
1437 /* generic HDLC layer open processing */
1438 if ((rc = hdlc_open(dev)))
1441 /* arbitrate between network and tty opens */
1442 spin_lock_irqsave(&info->netlock, flags);
1443 if (info->count != 0 || info->netcount != 0) {
1444 DBGINFO(("%s hdlc_open busy\n", dev->name));
1445 spin_unlock_irqrestore(&info->netlock, flags);
1449 spin_unlock_irqrestore(&info->netlock, flags);
1451 /* claim resources and init adapter */
1452 if ((rc = startup(info)) != 0) {
1453 spin_lock_irqsave(&info->netlock, flags);
1455 spin_unlock_irqrestore(&info->netlock, flags);
1459 /* assert DTR and RTS, apply hardware settings */
1460 info->signals |= SerialSignal_RTS + SerialSignal_DTR;
1463 /* enable network layer transmit */
1464 dev->trans_start = jiffies;
1465 netif_start_queue(dev);
1467 /* inform generic HDLC layer of current DCD status */
1468 spin_lock_irqsave(&info->lock, flags);
1470 spin_unlock_irqrestore(&info->lock, flags);
1471 hdlc_set_carrier(info->signals & SerialSignal_DCD, dev);
1477 * called by network layer when interface is disabled
1478 * shutdown hardware and release resources
1480 * dev pointer to network device structure
1482 * returns 0 if success, otherwise error code
1484 static int hdlcdev_close(struct net_device *dev)
1486 struct slgt_info *info = dev_to_port(dev);
1487 unsigned long flags;
1489 DBGINFO(("%s hdlcdev_close\n", dev->name));
1491 netif_stop_queue(dev);
1493 /* shutdown adapter and release resources */
1498 spin_lock_irqsave(&info->netlock, flags);
1500 spin_unlock_irqrestore(&info->netlock, flags);
1506 * called by network layer to process IOCTL call to network device
1508 * dev pointer to network device structure
1509 * ifr pointer to network interface request structure
1510 * cmd IOCTL command code
1512 * returns 0 if success, otherwise error code
1514 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1516 const size_t size = sizeof(sync_serial_settings);
1517 sync_serial_settings new_line;
1518 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
1519 struct slgt_info *info = dev_to_port(dev);
1522 DBGINFO(("%s hdlcdev_ioctl\n", dev->name));
1524 /* return error if TTY interface open */
1528 if (cmd != SIOCWANDEV)
1529 return hdlc_ioctl(dev, ifr, cmd);
1531 switch(ifr->ifr_settings.type) {
1532 case IF_GET_IFACE: /* return current sync_serial_settings */
1534 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
1535 if (ifr->ifr_settings.size < size) {
1536 ifr->ifr_settings.size = size; /* data size wanted */
1540 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1541 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
1542 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
1543 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
1546 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
1547 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
1548 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
1549 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
1550 default: new_line.clock_type = CLOCK_DEFAULT;
1553 new_line.clock_rate = info->params.clock_speed;
1554 new_line.loopback = info->params.loopback ? 1:0;
1556 if (copy_to_user(line, &new_line, size))
1560 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
1562 if(!capable(CAP_NET_ADMIN))
1564 if (copy_from_user(&new_line, line, size))
1567 switch (new_line.clock_type)
1569 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
1570 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
1571 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
1572 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
1573 case CLOCK_DEFAULT: flags = info->params.flags &
1574 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1575 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
1576 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
1577 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
1578 default: return -EINVAL;
1581 if (new_line.loopback != 0 && new_line.loopback != 1)
1584 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1585 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
1586 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
1587 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
1588 info->params.flags |= flags;
1590 info->params.loopback = new_line.loopback;
1592 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
1593 info->params.clock_speed = new_line.clock_rate;
1595 info->params.clock_speed = 0;
1597 /* if network interface up, reprogram hardware */
1603 return hdlc_ioctl(dev, ifr, cmd);
1608 * called by network layer when transmit timeout is detected
1610 * dev pointer to network device structure
1612 static void hdlcdev_tx_timeout(struct net_device *dev)
1614 struct slgt_info *info = dev_to_port(dev);
1615 struct net_device_stats *stats = hdlc_stats(dev);
1616 unsigned long flags;
1618 DBGINFO(("%s hdlcdev_tx_timeout\n", dev->name));
1621 stats->tx_aborted_errors++;
1623 spin_lock_irqsave(&info->lock,flags);
1625 spin_unlock_irqrestore(&info->lock,flags);
1627 netif_wake_queue(dev);
1631 * called by device driver when transmit completes
1632 * reenable network layer transmit if stopped
1634 * info pointer to device instance information
1636 static void hdlcdev_tx_done(struct slgt_info *info)
1638 if (netif_queue_stopped(info->netdev))
1639 netif_wake_queue(info->netdev);
1643 * called by device driver when frame received
1644 * pass frame to network layer
1646 * info pointer to device instance information
1647 * buf pointer to buffer contianing frame data
1648 * size count of data bytes in buf
1650 static void hdlcdev_rx(struct slgt_info *info, char *buf, int size)
1652 struct sk_buff *skb = dev_alloc_skb(size);
1653 struct net_device *dev = info->netdev;
1654 struct net_device_stats *stats = hdlc_stats(dev);
1656 DBGINFO(("%s hdlcdev_rx\n", dev->name));
1659 DBGERR(("%s: can't alloc skb, drop packet\n", dev->name));
1660 stats->rx_dropped++;
1664 memcpy(skb_put(skb, size),buf,size);
1666 skb->protocol = hdlc_type_trans(skb, info->netdev);
1668 stats->rx_packets++;
1669 stats->rx_bytes += size;
1673 info->netdev->last_rx = jiffies;
1677 * called by device driver when adding device instance
1678 * do generic HDLC initialization
1680 * info pointer to device instance information
1682 * returns 0 if success, otherwise error code
1684 static int hdlcdev_init(struct slgt_info *info)
1687 struct net_device *dev;
1690 /* allocate and initialize network and HDLC layer objects */
1692 if (!(dev = alloc_hdlcdev(info))) {
1693 printk(KERN_ERR "%s hdlc device alloc failure\n", info->device_name);
1697 /* for network layer reporting purposes only */
1698 dev->mem_start = info->phys_reg_addr;
1699 dev->mem_end = info->phys_reg_addr + SLGT_REG_SIZE - 1;
1700 dev->irq = info->irq_level;
1702 /* network layer callbacks and settings */
1703 dev->do_ioctl = hdlcdev_ioctl;
1704 dev->open = hdlcdev_open;
1705 dev->stop = hdlcdev_close;
1706 dev->tx_timeout = hdlcdev_tx_timeout;
1707 dev->watchdog_timeo = 10*HZ;
1708 dev->tx_queue_len = 50;
1710 /* generic HDLC layer callbacks and settings */
1711 hdlc = dev_to_hdlc(dev);
1712 hdlc->attach = hdlcdev_attach;
1713 hdlc->xmit = hdlcdev_xmit;
1715 /* register objects with HDLC layer */
1716 if ((rc = register_hdlc_device(dev))) {
1717 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
1727 * called by device driver when removing device instance
1728 * do generic HDLC cleanup
1730 * info pointer to device instance information
1732 static void hdlcdev_exit(struct slgt_info *info)
1734 unregister_hdlc_device(info->netdev);
1735 free_netdev(info->netdev);
1736 info->netdev = NULL;
1739 #endif /* ifdef CONFIG_HDLC */
1742 * get async data from rx DMA buffers
1744 static void rx_async(struct slgt_info *info)
1746 struct tty_struct *tty = info->tty;
1747 struct mgsl_icount *icount = &info->icount;
1748 unsigned int start, end;
1750 unsigned char status;
1751 struct slgt_desc *bufs = info->rbufs;
1754 start = end = info->rbuf_current;
1756 while(desc_complete(bufs[end])) {
1757 count = desc_count(bufs[end]) - info->rbuf_index;
1758 p = bufs[end].buf + info->rbuf_index;
1760 DBGISR(("%s rx_async count=%d\n", info->device_name, count));
1761 DBGDATA(info, p, count, "rx");
1763 for(i=0 ; i < count; i+=2, p+=2) {
1765 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
1766 tty_flip_buffer_push(tty);
1767 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
1769 *tty->flip.char_buf_ptr = *p;
1770 *tty->flip.flag_buf_ptr = 0;
1774 if ((status = *(p+1) & (BIT9 + BIT8))) {
1777 else if (status & BIT8)
1779 /* discard char if tty control flags say so */
1780 if (status & info->ignore_status_mask)
1784 *tty->flip.flag_buf_ptr = TTY_PARITY;
1785 else if (status & BIT8)
1786 *tty->flip.flag_buf_ptr = TTY_FRAME;
1790 tty->flip.flag_buf_ptr++;
1791 tty->flip.char_buf_ptr++;
1797 /* receive buffer not completed */
1798 info->rbuf_index += i;
1799 info->rx_timer.expires = jiffies + 1;
1800 add_timer(&info->rx_timer);
1804 info->rbuf_index = 0;
1805 free_rbufs(info, end, end);
1807 if (++end == info->rbuf_count)
1810 /* if entire list searched then no frame available */
1815 if (tty && tty->flip.count)
1816 tty_flip_buffer_push(tty);
1820 * return next bottom half action to perform
1822 static int bh_action(struct slgt_info *info)
1824 unsigned long flags;
1827 spin_lock_irqsave(&info->lock,flags);
1829 if (info->pending_bh & BH_RECEIVE) {
1830 info->pending_bh &= ~BH_RECEIVE;
1832 } else if (info->pending_bh & BH_TRANSMIT) {
1833 info->pending_bh &= ~BH_TRANSMIT;
1835 } else if (info->pending_bh & BH_STATUS) {
1836 info->pending_bh &= ~BH_STATUS;
1839 /* Mark BH routine as complete */
1840 info->bh_running = 0;
1841 info->bh_requested = 0;
1845 spin_unlock_irqrestore(&info->lock,flags);
1851 * perform bottom half processing
1853 static void bh_handler(void* context)
1855 struct slgt_info *info = context;
1860 info->bh_running = 1;
1862 while((action = bh_action(info))) {
1865 DBGBH(("%s bh receive\n", info->device_name));
1866 switch(info->params.mode) {
1867 case MGSL_MODE_ASYNC:
1870 case MGSL_MODE_HDLC:
1871 while(rx_get_frame(info));
1874 while(rx_get_buf(info));
1877 /* restart receiver if rx DMA buffers exhausted */
1878 if (info->rx_restart)
1885 DBGBH(("%s bh status\n", info->device_name));
1886 info->ri_chkcount = 0;
1887 info->dsr_chkcount = 0;
1888 info->dcd_chkcount = 0;
1889 info->cts_chkcount = 0;
1892 DBGBH(("%s unknown action\n", info->device_name));
1896 DBGBH(("%s bh_handler exit\n", info->device_name));
1899 static void bh_transmit(struct slgt_info *info)
1901 struct tty_struct *tty = info->tty;
1903 DBGBH(("%s bh_transmit\n", info->device_name));
1906 wake_up_interruptible(&tty->write_wait);
1910 static void dsr_change(struct slgt_info *info)
1913 DBGISR(("dsr_change %s signals=%04X\n", info->device_name, info->signals));
1914 if ((info->dsr_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1915 slgt_irq_off(info, IRQ_DSR);
1919 if (info->signals & SerialSignal_DSR)
1920 info->input_signal_events.dsr_up++;
1922 info->input_signal_events.dsr_down++;
1923 wake_up_interruptible(&info->status_event_wait_q);
1924 wake_up_interruptible(&info->event_wait_q);
1925 info->pending_bh |= BH_STATUS;
1928 static void cts_change(struct slgt_info *info)
1931 DBGISR(("cts_change %s signals=%04X\n", info->device_name, info->signals));
1932 if ((info->cts_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1933 slgt_irq_off(info, IRQ_CTS);
1937 if (info->signals & SerialSignal_CTS)
1938 info->input_signal_events.cts_up++;
1940 info->input_signal_events.cts_down++;
1941 wake_up_interruptible(&info->status_event_wait_q);
1942 wake_up_interruptible(&info->event_wait_q);
1943 info->pending_bh |= BH_STATUS;
1945 if (info->flags & ASYNC_CTS_FLOW) {
1947 if (info->tty->hw_stopped) {
1948 if (info->signals & SerialSignal_CTS) {
1949 info->tty->hw_stopped = 0;
1950 info->pending_bh |= BH_TRANSMIT;
1954 if (!(info->signals & SerialSignal_CTS))
1955 info->tty->hw_stopped = 1;
1961 static void dcd_change(struct slgt_info *info)
1964 DBGISR(("dcd_change %s signals=%04X\n", info->device_name, info->signals));
1965 if ((info->dcd_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1966 slgt_irq_off(info, IRQ_DCD);
1970 if (info->signals & SerialSignal_DCD) {
1971 info->input_signal_events.dcd_up++;
1973 info->input_signal_events.dcd_down++;
1977 hdlc_set_carrier(info->signals & SerialSignal_DCD, info->netdev);
1979 wake_up_interruptible(&info->status_event_wait_q);
1980 wake_up_interruptible(&info->event_wait_q);
1981 info->pending_bh |= BH_STATUS;
1983 if (info->flags & ASYNC_CHECK_CD) {
1984 if (info->signals & SerialSignal_DCD)
1985 wake_up_interruptible(&info->open_wait);
1988 tty_hangup(info->tty);
1993 static void ri_change(struct slgt_info *info)
1996 DBGISR(("ri_change %s signals=%04X\n", info->device_name, info->signals));
1997 if ((info->ri_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1998 slgt_irq_off(info, IRQ_RI);
2002 if (info->signals & SerialSignal_RI) {
2003 info->input_signal_events.ri_up++;
2005 info->input_signal_events.ri_down++;
2007 wake_up_interruptible(&info->status_event_wait_q);
2008 wake_up_interruptible(&info->event_wait_q);
2009 info->pending_bh |= BH_STATUS;
2012 static void isr_serial(struct slgt_info *info)
2014 unsigned short status = rd_reg16(info, SSR);
2016 DBGISR(("%s isr_serial status=%04X\n", info->device_name, status));
2018 wr_reg16(info, SSR, status); /* clear pending */
2020 info->irq_occurred = 1;
2022 if (info->params.mode == MGSL_MODE_ASYNC) {
2023 if (status & IRQ_TXIDLE) {
2025 isr_txeom(info, status);
2027 if ((status & IRQ_RXBREAK) && (status & RXBREAK)) {
2029 /* process break detection if tty control allows */
2031 if (!(status & info->ignore_status_mask)) {
2032 if (info->read_status_mask & MASK_BREAK) {
2033 *info->tty->flip.flag_buf_ptr = TTY_BREAK;
2034 if (info->flags & ASYNC_SAK)
2041 if (status & (IRQ_TXIDLE + IRQ_TXUNDER))
2042 isr_txeom(info, status);
2044 if (status & IRQ_RXIDLE) {
2045 if (status & RXIDLE)
2046 info->icount.rxidle++;
2048 info->icount.exithunt++;
2049 wake_up_interruptible(&info->event_wait_q);
2052 if (status & IRQ_RXOVER)
2056 if (status & IRQ_DSR)
2058 if (status & IRQ_CTS)
2060 if (status & IRQ_DCD)
2062 if (status & IRQ_RI)
2066 static void isr_rdma(struct slgt_info *info)
2068 unsigned int status = rd_reg32(info, RDCSR);
2070 DBGISR(("%s isr_rdma status=%08x\n", info->device_name, status));
2072 /* RDCSR (rx DMA control/status)
2075 * 06 save status byte to DMA buffer
2077 * 04 eol (end of list)
2078 * 03 eob (end of buffer)
2083 wr_reg32(info, RDCSR, status); /* clear pending */
2085 if (status & (BIT5 + BIT4)) {
2086 DBGISR(("%s isr_rdma rx_restart=1\n", info->device_name));
2087 info->rx_restart = 1;
2089 info->pending_bh |= BH_RECEIVE;
2092 static void isr_tdma(struct slgt_info *info)
2094 unsigned int status = rd_reg32(info, TDCSR);
2096 DBGISR(("%s isr_tdma status=%08x\n", info->device_name, status));
2098 /* TDCSR (tx DMA control/status)
2102 * 04 eol (end of list)
2103 * 03 eob (end of buffer)
2108 wr_reg32(info, TDCSR, status); /* clear pending */
2110 if (status & (BIT5 + BIT4 + BIT3)) {
2111 // another transmit buffer has completed
2112 // run bottom half to get more send data from user
2113 info->pending_bh |= BH_TRANSMIT;
2117 static void isr_txeom(struct slgt_info *info, unsigned short status)
2119 DBGISR(("%s txeom status=%04x\n", info->device_name, status));
2121 slgt_irq_off(info, IRQ_TXDATA + IRQ_TXIDLE + IRQ_TXUNDER);
2124 if (status & IRQ_TXUNDER) {
2125 unsigned short val = rd_reg16(info, TCR);
2126 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
2127 wr_reg16(info, TCR, val); /* clear reset bit */
2130 if (info->tx_active) {
2131 if (info->params.mode != MGSL_MODE_ASYNC) {
2132 if (status & IRQ_TXUNDER)
2133 info->icount.txunder++;
2134 else if (status & IRQ_TXIDLE)
2135 info->icount.txok++;
2138 info->tx_active = 0;
2141 del_timer(&info->tx_timer);
2143 if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done) {
2144 info->signals &= ~SerialSignal_RTS;
2145 info->drop_rts_on_tx_done = 0;
2151 hdlcdev_tx_done(info);
2155 if (info->tty && (info->tty->stopped || info->tty->hw_stopped)) {
2159 info->pending_bh |= BH_TRANSMIT;
2164 /* interrupt service routine
2166 * irq interrupt number
2167 * dev_id device ID supplied during interrupt registration
2168 * regs interrupted processor context
2170 static irqreturn_t slgt_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2172 struct slgt_info *info;
2176 DBGISR(("slgt_interrupt irq=%d entry\n", irq));
2182 spin_lock(&info->lock);
2184 while((gsr = rd_reg32(info, GSR) & 0xffffff00)) {
2185 DBGISR(("%s gsr=%08x\n", info->device_name, gsr));
2186 info->irq_occurred = 1;
2187 for(i=0; i < info->port_count ; i++) {
2188 if (info->port_array[i] == NULL)
2190 if (gsr & (BIT8 << i))
2191 isr_serial(info->port_array[i]);
2192 if (gsr & (BIT16 << (i*2)))
2193 isr_rdma(info->port_array[i]);
2194 if (gsr & (BIT17 << (i*2)))
2195 isr_tdma(info->port_array[i]);
2199 for(i=0; i < info->port_count ; i++) {
2200 struct slgt_info *port = info->port_array[i];
2202 if (port && (port->count || port->netcount) &&
2203 port->pending_bh && !port->bh_running &&
2204 !port->bh_requested) {
2205 DBGISR(("%s bh queued\n", port->device_name));
2206 schedule_work(&port->task);
2207 port->bh_requested = 1;
2211 spin_unlock(&info->lock);
2213 DBGISR(("slgt_interrupt irq=%d exit\n", irq));
2217 static int startup(struct slgt_info *info)
2219 DBGINFO(("%s startup\n", info->device_name));
2221 if (info->flags & ASYNC_INITIALIZED)
2224 if (!info->tx_buf) {
2225 info->tx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
2226 if (!info->tx_buf) {
2227 DBGERR(("%s can't allocate tx buffer\n", info->device_name));
2232 info->pending_bh = 0;
2234 memset(&info->icount, 0, sizeof(info->icount));
2236 /* program hardware for current parameters */
2237 change_params(info);
2240 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2242 info->flags |= ASYNC_INITIALIZED;
2248 * called by close() and hangup() to shutdown hardware
2250 static void shutdown(struct slgt_info *info)
2252 unsigned long flags;
2254 if (!(info->flags & ASYNC_INITIALIZED))
2257 DBGINFO(("%s shutdown\n", info->device_name));
2259 /* clear status wait queue because status changes */
2260 /* can't happen after shutting down the hardware */
2261 wake_up_interruptible(&info->status_event_wait_q);
2262 wake_up_interruptible(&info->event_wait_q);
2264 del_timer_sync(&info->tx_timer);
2265 del_timer_sync(&info->rx_timer);
2267 kfree(info->tx_buf);
2268 info->tx_buf = NULL;
2270 spin_lock_irqsave(&info->lock,flags);
2275 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
2277 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
2278 info->signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
2282 spin_unlock_irqrestore(&info->lock,flags);
2285 set_bit(TTY_IO_ERROR, &info->tty->flags);
2287 info->flags &= ~ASYNC_INITIALIZED;
2290 static void program_hw(struct slgt_info *info)
2292 unsigned long flags;
2294 spin_lock_irqsave(&info->lock,flags);
2299 if (info->params.mode == MGSL_MODE_HDLC ||
2300 info->params.mode == MGSL_MODE_RAW ||
2308 info->dcd_chkcount = 0;
2309 info->cts_chkcount = 0;
2310 info->ri_chkcount = 0;
2311 info->dsr_chkcount = 0;
2313 slgt_irq_on(info, IRQ_DCD | IRQ_CTS | IRQ_DSR);
2316 if (info->netcount ||
2317 (info->tty && info->tty->termios->c_cflag & CREAD))
2320 spin_unlock_irqrestore(&info->lock,flags);
2324 * reconfigure adapter based on new parameters
2326 static void change_params(struct slgt_info *info)
2331 if (!info->tty || !info->tty->termios)
2333 DBGINFO(("%s change_params\n", info->device_name));
2335 cflag = info->tty->termios->c_cflag;
2337 /* if B0 rate (hangup) specified then negate DTR and RTS */
2338 /* otherwise assert DTR and RTS */
2340 info->signals |= SerialSignal_RTS + SerialSignal_DTR;
2342 info->signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2344 /* byte size and parity */
2346 switch (cflag & CSIZE) {
2347 case CS5: info->params.data_bits = 5; break;
2348 case CS6: info->params.data_bits = 6; break;
2349 case CS7: info->params.data_bits = 7; break;
2350 case CS8: info->params.data_bits = 8; break;
2351 default: info->params.data_bits = 7; break;
2354 info->params.stop_bits = (cflag & CSTOPB) ? 2 : 1;
2357 info->params.parity = (cflag & PARODD) ? ASYNC_PARITY_ODD : ASYNC_PARITY_EVEN;
2359 info->params.parity = ASYNC_PARITY_NONE;
2361 /* calculate number of jiffies to transmit a full
2362 * FIFO (32 bytes) at specified data rate
2364 bits_per_char = info->params.data_bits +
2365 info->params.stop_bits + 1;
2367 info->params.data_rate = tty_get_baud_rate(info->tty);
2369 if (info->params.data_rate) {
2370 info->timeout = (32*HZ*bits_per_char) /
2371 info->params.data_rate;
2373 info->timeout += HZ/50; /* Add .02 seconds of slop */
2375 if (cflag & CRTSCTS)
2376 info->flags |= ASYNC_CTS_FLOW;
2378 info->flags &= ~ASYNC_CTS_FLOW;
2381 info->flags &= ~ASYNC_CHECK_CD;
2383 info->flags |= ASYNC_CHECK_CD;
2385 /* process tty input control flags */
2387 info->read_status_mask = IRQ_RXOVER;
2388 if (I_INPCK(info->tty))
2389 info->read_status_mask |= MASK_PARITY | MASK_FRAMING;
2390 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2391 info->read_status_mask |= MASK_BREAK;
2392 if (I_IGNPAR(info->tty))
2393 info->ignore_status_mask |= MASK_PARITY | MASK_FRAMING;
2394 if (I_IGNBRK(info->tty)) {
2395 info->ignore_status_mask |= MASK_BREAK;
2396 /* If ignoring parity and break indicators, ignore
2397 * overruns too. (For real raw support).
2399 if (I_IGNPAR(info->tty))
2400 info->ignore_status_mask |= MASK_OVERRUN;
2406 static int get_stats(struct slgt_info *info, struct mgsl_icount __user *user_icount)
2408 DBGINFO(("%s get_stats\n", info->device_name));
2410 memset(&info->icount, 0, sizeof(info->icount));
2412 if (copy_to_user(user_icount, &info->icount, sizeof(struct mgsl_icount)))
2418 static int get_params(struct slgt_info *info, MGSL_PARAMS __user *user_params)
2420 DBGINFO(("%s get_params\n", info->device_name));
2421 if (copy_to_user(user_params, &info->params, sizeof(MGSL_PARAMS)))
2426 static int set_params(struct slgt_info *info, MGSL_PARAMS __user *new_params)
2428 unsigned long flags;
2429 MGSL_PARAMS tmp_params;
2431 DBGINFO(("%s set_params\n", info->device_name));
2432 if (copy_from_user(&tmp_params, new_params, sizeof(MGSL_PARAMS)))
2435 spin_lock_irqsave(&info->lock, flags);
2436 memcpy(&info->params, &tmp_params, sizeof(MGSL_PARAMS));
2437 spin_unlock_irqrestore(&info->lock, flags);
2439 change_params(info);
2444 static int get_txidle(struct slgt_info *info, int __user *idle_mode)
2446 DBGINFO(("%s get_txidle=%d\n", info->device_name, info->idle_mode));
2447 if (put_user(info->idle_mode, idle_mode))
2452 static int set_txidle(struct slgt_info *info, int idle_mode)
2454 unsigned long flags;
2455 DBGINFO(("%s set_txidle(%d)\n", info->device_name, idle_mode));
2456 spin_lock_irqsave(&info->lock,flags);
2457 info->idle_mode = idle_mode;
2459 spin_unlock_irqrestore(&info->lock,flags);
2463 static int tx_enable(struct slgt_info *info, int enable)
2465 unsigned long flags;
2466 DBGINFO(("%s tx_enable(%d)\n", info->device_name, enable));
2467 spin_lock_irqsave(&info->lock,flags);
2469 if (!info->tx_enabled)
2472 if (info->tx_enabled)
2475 spin_unlock_irqrestore(&info->lock,flags);
2480 * abort transmit HDLC frame
2482 static int tx_abort(struct slgt_info *info)
2484 unsigned long flags;
2485 DBGINFO(("%s tx_abort\n", info->device_name));
2486 spin_lock_irqsave(&info->lock,flags);
2488 spin_unlock_irqrestore(&info->lock,flags);
2492 static int rx_enable(struct slgt_info *info, int enable)
2494 unsigned long flags;
2495 DBGINFO(("%s rx_enable(%d)\n", info->device_name, enable));
2496 spin_lock_irqsave(&info->lock,flags);
2498 if (!info->rx_enabled)
2501 if (info->rx_enabled)
2504 spin_unlock_irqrestore(&info->lock,flags);
2509 * wait for specified event to occur
2511 static int wait_mgsl_event(struct slgt_info *info, int __user *mask_ptr)
2513 unsigned long flags;
2516 struct mgsl_icount cprev, cnow;
2519 struct _input_signal_events oldsigs, newsigs;
2520 DECLARE_WAITQUEUE(wait, current);
2522 if (get_user(mask, mask_ptr))
2525 DBGINFO(("%s wait_mgsl_event(%d)\n", info->device_name, mask));
2527 spin_lock_irqsave(&info->lock,flags);
2529 /* return immediately if state matches requested events */
2534 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2535 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2536 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2537 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2539 spin_unlock_irqrestore(&info->lock,flags);
2543 /* save current irq counts */
2544 cprev = info->icount;
2545 oldsigs = info->input_signal_events;
2547 /* enable hunt and idle irqs if needed */
2548 if (mask & (MgslEvent_ExitHuntMode+MgslEvent_IdleReceived)) {
2549 unsigned short val = rd_reg16(info, SCR);
2550 if (!(val & IRQ_RXIDLE))
2551 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE));
2554 set_current_state(TASK_INTERRUPTIBLE);
2555 add_wait_queue(&info->event_wait_q, &wait);
2557 spin_unlock_irqrestore(&info->lock,flags);
2561 if (signal_pending(current)) {
2566 /* get current irq counts */
2567 spin_lock_irqsave(&info->lock,flags);
2568 cnow = info->icount;
2569 newsigs = info->input_signal_events;
2570 set_current_state(TASK_INTERRUPTIBLE);
2571 spin_unlock_irqrestore(&info->lock,flags);
2573 /* if no change, wait aborted for some reason */
2574 if (newsigs.dsr_up == oldsigs.dsr_up &&
2575 newsigs.dsr_down == oldsigs.dsr_down &&
2576 newsigs.dcd_up == oldsigs.dcd_up &&
2577 newsigs.dcd_down == oldsigs.dcd_down &&
2578 newsigs.cts_up == oldsigs.cts_up &&
2579 newsigs.cts_down == oldsigs.cts_down &&
2580 newsigs.ri_up == oldsigs.ri_up &&
2581 newsigs.ri_down == oldsigs.ri_down &&
2582 cnow.exithunt == cprev.exithunt &&
2583 cnow.rxidle == cprev.rxidle) {
2589 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2590 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2591 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2592 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2593 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2594 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2595 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2596 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2597 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2598 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2606 remove_wait_queue(&info->event_wait_q, &wait);
2607 set_current_state(TASK_RUNNING);
2610 if (mask & (MgslEvent_ExitHuntMode + MgslEvent_IdleReceived)) {
2611 spin_lock_irqsave(&info->lock,flags);
2612 if (!waitqueue_active(&info->event_wait_q)) {
2613 /* disable enable exit hunt mode/idle rcvd IRQs */
2615 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE));
2617 spin_unlock_irqrestore(&info->lock,flags);
2621 rc = put_user(events, mask_ptr);
2625 static int get_interface(struct slgt_info *info, int __user *if_mode)
2627 DBGINFO(("%s get_interface=%x\n", info->device_name, info->if_mode));
2628 if (put_user(info->if_mode, if_mode))
2633 static int set_interface(struct slgt_info *info, int if_mode)
2635 unsigned long flags;
2638 DBGINFO(("%s set_interface=%x)\n", info->device_name, if_mode));
2639 spin_lock_irqsave(&info->lock,flags);
2640 info->if_mode = if_mode;
2644 /* TCR (tx control) 07 1=RTS driver control */
2645 val = rd_reg16(info, TCR);
2646 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
2650 wr_reg16(info, TCR, val);
2652 spin_unlock_irqrestore(&info->lock,flags);
2656 static int modem_input_wait(struct slgt_info *info,int arg)
2658 unsigned long flags;
2660 struct mgsl_icount cprev, cnow;
2661 DECLARE_WAITQUEUE(wait, current);
2663 /* save current irq counts */
2664 spin_lock_irqsave(&info->lock,flags);
2665 cprev = info->icount;
2666 add_wait_queue(&info->status_event_wait_q, &wait);
2667 set_current_state(TASK_INTERRUPTIBLE);
2668 spin_unlock_irqrestore(&info->lock,flags);
2672 if (signal_pending(current)) {
2677 /* get new irq counts */
2678 spin_lock_irqsave(&info->lock,flags);
2679 cnow = info->icount;
2680 set_current_state(TASK_INTERRUPTIBLE);
2681 spin_unlock_irqrestore(&info->lock,flags);
2683 /* if no change, wait aborted for some reason */
2684 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2685 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2690 /* check for change in caller specified modem input */
2691 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2692 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2693 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2694 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2701 remove_wait_queue(&info->status_event_wait_q, &wait);
2702 set_current_state(TASK_RUNNING);
2707 * return state of serial control and status signals
2709 static int tiocmget(struct tty_struct *tty, struct file *file)
2711 struct slgt_info *info = tty->driver_data;
2712 unsigned int result;
2713 unsigned long flags;
2715 spin_lock_irqsave(&info->lock,flags);
2717 spin_unlock_irqrestore(&info->lock,flags);
2719 result = ((info->signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2720 ((info->signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2721 ((info->signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2722 ((info->signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2723 ((info->signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2724 ((info->signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2726 DBGINFO(("%s tiocmget value=%08X\n", info->device_name, result));
2731 * set modem control signals (DTR/RTS)
2733 * cmd signal command: TIOCMBIS = set bit TIOCMBIC = clear bit
2734 * TIOCMSET = set/clear signal values
2735 * value bit mask for command
2737 static int tiocmset(struct tty_struct *tty, struct file *file,
2738 unsigned int set, unsigned int clear)
2740 struct slgt_info *info = tty->driver_data;
2741 unsigned long flags;
2743 DBGINFO(("%s tiocmset(%x,%x)\n", info->device_name, set, clear));
2745 if (set & TIOCM_RTS)
2746 info->signals |= SerialSignal_RTS;
2747 if (set & TIOCM_DTR)
2748 info->signals |= SerialSignal_DTR;
2749 if (clear & TIOCM_RTS)
2750 info->signals &= ~SerialSignal_RTS;
2751 if (clear & TIOCM_DTR)
2752 info->signals &= ~SerialSignal_DTR;
2754 spin_lock_irqsave(&info->lock,flags);
2756 spin_unlock_irqrestore(&info->lock,flags);
2761 * block current process until the device is ready to open
2763 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2764 struct slgt_info *info)
2766 DECLARE_WAITQUEUE(wait, current);
2768 int do_clocal = 0, extra_count = 0;
2769 unsigned long flags;
2771 DBGINFO(("%s block_til_ready\n", tty->driver->name));
2773 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2774 /* nonblock mode is set or port is not enabled */
2775 info->flags |= ASYNC_NORMAL_ACTIVE;
2779 if (tty->termios->c_cflag & CLOCAL)
2782 /* Wait for carrier detect and the line to become
2783 * free (i.e., not in use by the callout). While we are in
2784 * this loop, info->count is dropped by one, so that
2785 * close() knows when to free things. We restore it upon
2786 * exit, either normal or abnormal.
2790 add_wait_queue(&info->open_wait, &wait);
2792 spin_lock_irqsave(&info->lock, flags);
2793 if (!tty_hung_up_p(filp)) {
2797 spin_unlock_irqrestore(&info->lock, flags);
2798 info->blocked_open++;
2801 if ((tty->termios->c_cflag & CBAUD)) {
2802 spin_lock_irqsave(&info->lock,flags);
2803 info->signals |= SerialSignal_RTS + SerialSignal_DTR;
2805 spin_unlock_irqrestore(&info->lock,flags);
2808 set_current_state(TASK_INTERRUPTIBLE);
2810 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2811 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2812 -EAGAIN : -ERESTARTSYS;
2816 spin_lock_irqsave(&info->lock,flags);
2818 spin_unlock_irqrestore(&info->lock,flags);
2820 if (!(info->flags & ASYNC_CLOSING) &&
2821 (do_clocal || (info->signals & SerialSignal_DCD)) ) {
2825 if (signal_pending(current)) {
2826 retval = -ERESTARTSYS;
2830 DBGINFO(("%s block_til_ready wait\n", tty->driver->name));
2834 set_current_state(TASK_RUNNING);
2835 remove_wait_queue(&info->open_wait, &wait);
2839 info->blocked_open--;
2842 info->flags |= ASYNC_NORMAL_ACTIVE;
2844 DBGINFO(("%s block_til_ready ready, rc=%d\n", tty->driver->name, retval));
2848 static int alloc_tmp_rbuf(struct slgt_info *info)
2850 info->tmp_rbuf = kmalloc(info->max_frame_size, GFP_KERNEL);
2851 if (info->tmp_rbuf == NULL)
2856 static void free_tmp_rbuf(struct slgt_info *info)
2858 kfree(info->tmp_rbuf);
2859 info->tmp_rbuf = NULL;
2863 * allocate DMA descriptor lists.
2865 static int alloc_desc(struct slgt_info *info)
2870 /* allocate memory to hold descriptor lists */
2871 info->bufs = pci_alloc_consistent(info->pdev, DESC_LIST_SIZE, &info->bufs_dma_addr);
2872 if (info->bufs == NULL)
2875 memset(info->bufs, 0, DESC_LIST_SIZE);
2877 info->rbufs = (struct slgt_desc*)info->bufs;
2878 info->tbufs = ((struct slgt_desc*)info->bufs) + info->rbuf_count;
2880 pbufs = (unsigned int)info->bufs_dma_addr;
2883 * Build circular lists of descriptors
2886 for (i=0; i < info->rbuf_count; i++) {
2887 /* physical address of this descriptor */
2888 info->rbufs[i].pdesc = pbufs + (i * sizeof(struct slgt_desc));
2890 /* physical address of next descriptor */
2891 if (i == info->rbuf_count - 1)
2892 info->rbufs[i].next = cpu_to_le32(pbufs);
2894 info->rbufs[i].next = cpu_to_le32(pbufs + ((i+1) * sizeof(struct slgt_desc)));
2895 set_desc_count(info->rbufs[i], DMABUFSIZE);
2898 for (i=0; i < info->tbuf_count; i++) {
2899 /* physical address of this descriptor */
2900 info->tbufs[i].pdesc = pbufs + ((info->rbuf_count + i) * sizeof(struct slgt_desc));
2902 /* physical address of next descriptor */
2903 if (i == info->tbuf_count - 1)
2904 info->tbufs[i].next = cpu_to_le32(pbufs + info->rbuf_count * sizeof(struct slgt_desc));
2906 info->tbufs[i].next = cpu_to_le32(pbufs + ((info->rbuf_count + i + 1) * sizeof(struct slgt_desc)));
2912 static void free_desc(struct slgt_info *info)
2914 if (info->bufs != NULL) {
2915 pci_free_consistent(info->pdev, DESC_LIST_SIZE, info->bufs, info->bufs_dma_addr);
2922 static int alloc_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count)
2925 for (i=0; i < count; i++) {
2926 if ((bufs[i].buf = pci_alloc_consistent(info->pdev, DMABUFSIZE, &bufs[i].buf_dma_addr)) == NULL)
2928 bufs[i].pbuf = cpu_to_le32((unsigned int)bufs[i].buf_dma_addr);
2933 static void free_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count)
2936 for (i=0; i < count; i++) {
2937 if (bufs[i].buf == NULL)
2939 pci_free_consistent(info->pdev, DMABUFSIZE, bufs[i].buf, bufs[i].buf_dma_addr);
2944 static int alloc_dma_bufs(struct slgt_info *info)
2946 info->rbuf_count = 32;
2947 info->tbuf_count = 32;
2949 if (alloc_desc(info) < 0 ||
2950 alloc_bufs(info, info->rbufs, info->rbuf_count) < 0 ||
2951 alloc_bufs(info, info->tbufs, info->tbuf_count) < 0 ||
2952 alloc_tmp_rbuf(info) < 0) {
2953 DBGERR(("%s DMA buffer alloc fail\n", info->device_name));
2960 static void free_dma_bufs(struct slgt_info *info)
2963 free_bufs(info, info->rbufs, info->rbuf_count);
2964 free_bufs(info, info->tbufs, info->tbuf_count);
2967 free_tmp_rbuf(info);
2970 static int claim_resources(struct slgt_info *info)
2972 if (request_mem_region(info->phys_reg_addr, SLGT_REG_SIZE, "synclink_gt") == NULL) {
2973 DBGERR(("%s reg addr conflict, addr=%08X\n",
2974 info->device_name, info->phys_reg_addr));
2975 info->init_error = DiagStatus_AddressConflict;
2979 info->reg_addr_requested = 1;
2981 info->reg_addr = ioremap(info->phys_reg_addr, PAGE_SIZE);
2982 if (!info->reg_addr) {
2983 DBGERR(("%s cant map device registers, addr=%08X\n",
2984 info->device_name, info->phys_reg_addr));
2985 info->init_error = DiagStatus_CantAssignPciResources;
2988 info->reg_addr += info->reg_offset;
2992 release_resources(info);
2996 static void release_resources(struct slgt_info *info)
2998 if (info->irq_requested) {
2999 free_irq(info->irq_level, info);
3000 info->irq_requested = 0;
3003 if (info->reg_addr_requested) {
3004 release_mem_region(info->phys_reg_addr, SLGT_REG_SIZE);
3005 info->reg_addr_requested = 0;
3008 if (info->reg_addr) {
3009 iounmap(info->reg_addr - info->reg_offset);
3010 info->reg_addr = NULL;
3014 /* Add the specified device instance data structure to the
3015 * global linked list of devices and increment the device count.
3017 static void add_device(struct slgt_info *info)
3021 info->next_device = NULL;
3022 info->line = slgt_device_count;
3023 sprintf(info->device_name, "%s%d", tty_dev_prefix, info->line);
3025 if (info->line < MAX_DEVICES) {
3026 if (maxframe[info->line])
3027 info->max_frame_size = maxframe[info->line];
3028 info->dosyncppp = dosyncppp[info->line];
3031 slgt_device_count++;
3033 if (!slgt_device_list)
3034 slgt_device_list = info;
3036 struct slgt_info *current_dev = slgt_device_list;
3037 while(current_dev->next_device)
3038 current_dev = current_dev->next_device;
3039 current_dev->next_device = info;
3042 if (info->max_frame_size < 4096)
3043 info->max_frame_size = 4096;
3044 else if (info->max_frame_size > 65535)
3045 info->max_frame_size = 65535;
3047 switch(info->pdev->device) {
3048 case SYNCLINK_GT_DEVICE_ID:
3051 case SYNCLINK_GT4_DEVICE_ID:
3054 case SYNCLINK_AC_DEVICE_ID:
3056 info->params.mode = MGSL_MODE_ASYNC;
3059 devstr = "(unknown model)";
3061 printk("SyncLink %s %s IO=%08x IRQ=%d MaxFrameSize=%u\n",
3062 devstr, info->device_name, info->phys_reg_addr,
3063 info->irq_level, info->max_frame_size);
3071 * allocate device instance structure, return NULL on failure
3073 static struct slgt_info *alloc_dev(int adapter_num, int port_num, struct pci_dev *pdev)
3075 struct slgt_info *info;
3077 info = kmalloc(sizeof(struct slgt_info), GFP_KERNEL);
3080 DBGERR(("%s device alloc failed adapter=%d port=%d\n",
3081 driver_name, adapter_num, port_num));
3083 memset(info, 0, sizeof(struct slgt_info));
3084 info->magic = MGSL_MAGIC;
3085 INIT_WORK(&info->task, bh_handler, info);
3086 info->max_frame_size = 4096;
3087 info->raw_rx_size = DMABUFSIZE;
3088 info->close_delay = 5*HZ/10;
3089 info->closing_wait = 30*HZ;
3090 init_waitqueue_head(&info->open_wait);
3091 init_waitqueue_head(&info->close_wait);
3092 init_waitqueue_head(&info->status_event_wait_q);
3093 init_waitqueue_head(&info->event_wait_q);
3094 spin_lock_init(&info->netlock);
3095 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
3096 info->idle_mode = HDLC_TXIDLE_FLAGS;
3097 info->adapter_num = adapter_num;
3098 info->port_num = port_num;
3100 init_timer(&info->tx_timer);
3101 info->tx_timer.data = (unsigned long)info;
3102 info->tx_timer.function = tx_timeout;
3104 init_timer(&info->rx_timer);
3105 info->rx_timer.data = (unsigned long)info;
3106 info->rx_timer.function = rx_timeout;
3108 /* Copy configuration info to device instance data */
3110 info->irq_level = pdev->irq;
3111 info->phys_reg_addr = pci_resource_start(pdev,0);
3113 /* veremap works on page boundaries
3114 * map full page starting at the page boundary
3116 info->reg_offset = info->phys_reg_addr & (PAGE_SIZE-1);
3117 info->phys_reg_addr &= ~(PAGE_SIZE-1);
3119 info->bus_type = MGSL_BUS_TYPE_PCI;
3120 info->irq_flags = SA_SHIRQ;
3122 info->init_error = -1; /* assume error, set to 0 on successful init */
3128 static void device_init(int adapter_num, struct pci_dev *pdev)
3130 struct slgt_info *port_array[SLGT_MAX_PORTS];
3134 if (pdev->device == SYNCLINK_GT4_DEVICE_ID)
3137 /* allocate device instances for all ports */
3138 for (i=0; i < port_count; ++i) {
3139 port_array[i] = alloc_dev(adapter_num, i, pdev);
3140 if (port_array[i] == NULL) {
3141 for (--i; i >= 0; --i)
3142 kfree(port_array[i]);
3147 /* give copy of port_array to all ports and add to device list */
3148 for (i=0; i < port_count; ++i) {
3149 memcpy(port_array[i]->port_array, port_array, sizeof(port_array));
3150 add_device(port_array[i]);
3151 port_array[i]->port_count = port_count;
3152 spin_lock_init(&port_array[i]->lock);
3155 /* Allocate and claim adapter resources */
3156 if (!claim_resources(port_array[0])) {
3158 alloc_dma_bufs(port_array[0]);
3160 /* copy resource information from first port to others */
3161 for (i = 1; i < port_count; ++i) {
3162 port_array[i]->lock = port_array[0]->lock;
3163 port_array[i]->irq_level = port_array[0]->irq_level;
3164 port_array[i]->reg_addr = port_array[0]->reg_addr;
3165 alloc_dma_bufs(port_array[i]);
3168 if (request_irq(port_array[0]->irq_level,
3170 port_array[0]->irq_flags,
3171 port_array[0]->device_name,
3172 port_array[0]) < 0) {
3173 DBGERR(("%s request_irq failed IRQ=%d\n",
3174 port_array[0]->device_name,
3175 port_array[0]->irq_level));
3177 port_array[0]->irq_requested = 1;
3178 adapter_test(port_array[0]);
3179 for (i=1 ; i < port_count ; i++)
3180 port_array[i]->init_error = port_array[0]->init_error;
3185 static int __devinit init_one(struct pci_dev *dev,
3186 const struct pci_device_id *ent)
3188 if (pci_enable_device(dev)) {
3189 printk("error enabling pci device %p\n", dev);
3192 pci_set_master(dev);
3193 device_init(slgt_device_count, dev);
3197 static void __devexit remove_one(struct pci_dev *dev)
3201 static struct tty_operations ops = {
3205 .put_char = put_char,
3206 .flush_chars = flush_chars,
3207 .write_room = write_room,
3208 .chars_in_buffer = chars_in_buffer,
3209 .flush_buffer = flush_buffer,
3211 .throttle = throttle,
3212 .unthrottle = unthrottle,
3213 .send_xchar = send_xchar,
3214 .break_ctl = set_break,
3215 .wait_until_sent = wait_until_sent,
3216 .read_proc = read_proc,
3217 .set_termios = set_termios,
3219 .start = tx_release,
3221 .tiocmget = tiocmget,
3222 .tiocmset = tiocmset,
3225 static void slgt_cleanup(void)
3228 struct slgt_info *info;
3229 struct slgt_info *tmp;
3231 printk("unload %s %s\n", driver_name, driver_version);
3233 if (serial_driver) {
3234 if ((rc = tty_unregister_driver(serial_driver)))
3235 DBGERR(("tty_unregister_driver error=%d\n", rc));
3236 put_tty_driver(serial_driver);
3240 info = slgt_device_list;
3243 info = info->next_device;
3246 /* release devices */
3247 info = slgt_device_list;
3252 free_dma_bufs(info);
3253 free_tmp_rbuf(info);
3254 if (info->port_num == 0)
3255 release_resources(info);
3257 info = info->next_device;
3262 pci_unregister_driver(&pci_driver);
3266 * Driver initialization entry point.
3268 static int __init slgt_init(void)
3272 printk("%s %s\n", driver_name, driver_version);
3274 slgt_device_count = 0;
3275 if ((rc = pci_register_driver(&pci_driver)) < 0) {
3276 printk("%s pci_register_driver error=%d\n", driver_name, rc);
3281 if (!slgt_device_list) {
3282 printk("%s no devices found\n",driver_name);
3286 serial_driver = alloc_tty_driver(MAX_DEVICES);
3287 if (!serial_driver) {
3292 /* Initialize the tty_driver structure */
3294 serial_driver->owner = THIS_MODULE;
3295 serial_driver->driver_name = tty_driver_name;
3296 serial_driver->name = tty_dev_prefix;
3297 serial_driver->major = ttymajor;
3298 serial_driver->minor_start = 64;
3299 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3300 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3301 serial_driver->init_termios = tty_std_termios;
3302 serial_driver->init_termios.c_cflag =
3303 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3304 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3305 tty_set_operations(serial_driver, &ops);
3306 if ((rc = tty_register_driver(serial_driver)) < 0) {
3307 DBGERR(("%s can't register serial driver\n", driver_name));
3308 put_tty_driver(serial_driver);
3309 serial_driver = NULL;
3313 printk("%s %s, tty major#%d\n",
3314 driver_name, driver_version,
3315 serial_driver->major);
3324 static void __exit slgt_exit(void)
3329 module_init(slgt_init);
3330 module_exit(slgt_exit);
3333 * register access routines
3336 #define CALC_REGADDR() \
3337 unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \
3339 reg_addr += (info->port_num) * 32;
3341 static __u8 rd_reg8(struct slgt_info *info, unsigned int addr)
3344 return readb((void __iomem *)reg_addr);
3347 static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value)
3350 writeb(value, (void __iomem *)reg_addr);
3353 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr)
3356 return readw((void __iomem *)reg_addr);
3359 static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value)
3362 writew(value, (void __iomem *)reg_addr);
3365 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr)
3368 return readl((void __iomem *)reg_addr);
3371 static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value)
3374 writel(value, (void __iomem *)reg_addr);
3377 static void rdma_reset(struct slgt_info *info)
3382 wr_reg32(info, RDCSR, BIT1);
3384 /* wait for enable bit cleared */
3385 for(i=0 ; i < 1000 ; i++)
3386 if (!(rd_reg32(info, RDCSR) & BIT0))
3390 static void tdma_reset(struct slgt_info *info)
3395 wr_reg32(info, TDCSR, BIT1);
3397 /* wait for enable bit cleared */
3398 for(i=0 ; i < 1000 ; i++)
3399 if (!(rd_reg32(info, TDCSR) & BIT0))
3404 * enable internal loopback
3405 * TxCLK and RxCLK are generated from BRG
3406 * and TxD is looped back to RxD internally.
3408 static void enable_loopback(struct slgt_info *info)
3410 /* SCR (serial control) BIT2=looopback enable */
3411 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2));
3413 if (info->params.mode != MGSL_MODE_ASYNC) {
3414 /* CCR (clock control)
3415 * 07..05 tx clock source (010 = BRG)
3416 * 04..02 rx clock source (010 = BRG)
3417 * 01 auxclk enable (0 = disable)
3418 * 00 BRG enable (1 = enable)
3422 wr_reg8(info, CCR, 0x49);
3424 /* set speed if available, otherwise use default */
3425 if (info->params.clock_speed)
3426 set_rate(info, info->params.clock_speed);
3428 set_rate(info, 3686400);
3433 * set baud rate generator to specified rate
3435 static void set_rate(struct slgt_info *info, u32 rate)
3438 static unsigned int osc = 14745600;
3440 /* div = osc/rate - 1
3442 * Round div up if osc/rate is not integer to
3443 * force to next slowest rate.
3448 if (!(osc % rate) && div)
3450 wr_reg16(info, BDR, (unsigned short)div);
3454 static void rx_stop(struct slgt_info *info)
3458 /* disable and reset receiver */
3459 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3460 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3461 wr_reg16(info, RCR, val); /* clear reset bit */
3463 slgt_irq_off(info, IRQ_RXOVER + IRQ_RXDATA + IRQ_RXIDLE);
3465 /* clear pending rx interrupts */
3466 wr_reg16(info, SSR, IRQ_RXIDLE + IRQ_RXOVER);
3470 info->rx_enabled = 0;
3471 info->rx_restart = 0;
3474 static void rx_start(struct slgt_info *info)
3478 slgt_irq_off(info, IRQ_RXOVER + IRQ_RXDATA);
3480 /* clear pending rx overrun IRQ */
3481 wr_reg16(info, SSR, IRQ_RXOVER);
3483 /* reset and disable receiver */
3484 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3485 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3486 wr_reg16(info, RCR, val); /* clear reset bit */
3491 /* set 1st descriptor address */
3492 wr_reg32(info, RDDAR, info->rbufs[0].pdesc);
3494 if (info->params.mode != MGSL_MODE_ASYNC) {
3495 /* enable rx DMA and DMA interrupt */
3496 wr_reg32(info, RDCSR, (BIT2 + BIT0));
3498 /* enable saving of rx status, rx DMA and DMA interrupt */
3499 wr_reg32(info, RDCSR, (BIT6 + BIT2 + BIT0));
3502 slgt_irq_on(info, IRQ_RXOVER);
3504 /* enable receiver */
3505 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1));
3507 info->rx_restart = 0;
3508 info->rx_enabled = 1;
3511 static void tx_start(struct slgt_info *info)
3513 if (!info->tx_enabled) {
3515 (unsigned short)(rd_reg16(info, TCR) | BIT1));
3516 info->tx_enabled = TRUE;
3519 if (info->tx_count) {
3520 info->drop_rts_on_tx_done = 0;
3522 if (info->params.mode != MGSL_MODE_ASYNC) {
3523 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3525 if (!(info->signals & SerialSignal_RTS)) {
3526 info->signals |= SerialSignal_RTS;
3528 info->drop_rts_on_tx_done = 1;
3532 slgt_irq_off(info, IRQ_TXDATA);
3533 slgt_irq_on(info, IRQ_TXUNDER + IRQ_TXIDLE);
3534 /* clear tx idle and underrun status bits */
3535 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
3537 if (!(rd_reg32(info, TDCSR) & BIT0)) {
3538 /* tx DMA stopped, restart tx DMA */
3540 /* set 1st descriptor address */
3541 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3542 if (info->params.mode == MGSL_MODE_RAW)
3543 wr_reg32(info, TDCSR, BIT2 + BIT0); /* IRQ + DMA enable */
3545 wr_reg32(info, TDCSR, BIT0); /* DMA enable */
3548 if (info->params.mode != MGSL_MODE_RAW) {
3549 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3550 add_timer(&info->tx_timer);
3554 /* set 1st descriptor address */
3555 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3557 slgt_irq_off(info, IRQ_TXDATA);
3558 slgt_irq_on(info, IRQ_TXIDLE);
3559 /* clear tx idle status bit */
3560 wr_reg16(info, SSR, IRQ_TXIDLE);
3563 wr_reg32(info, TDCSR, BIT0);
3566 info->tx_active = 1;
3570 static void tx_stop(struct slgt_info *info)
3574 del_timer(&info->tx_timer);
3578 /* reset and disable transmitter */
3579 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */
3580 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
3581 wr_reg16(info, TCR, val); /* clear reset */
3583 slgt_irq_off(info, IRQ_TXDATA + IRQ_TXIDLE + IRQ_TXUNDER);
3585 /* clear tx idle and underrun status bit */
3586 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
3590 info->tx_enabled = 0;
3591 info->tx_active = 0;
3594 static void reset_port(struct slgt_info *info)
3596 if (!info->reg_addr)
3602 info->signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
3605 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
3608 static void reset_adapter(struct slgt_info *info)
3611 for (i=0; i < info->port_count; ++i) {
3612 if (info->port_array[i])
3613 reset_port(info->port_array[i]);
3617 static void async_mode(struct slgt_info *info)
3621 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
3627 * 15..13 mode, 010=async
3628 * 12..10 encoding, 000=NRZ
3630 * 08 1=odd parity, 0=even parity
3631 * 07 1=RTS driver control
3633 * 05..04 character length
3638 * 03 0=1 stop bit, 1=2 stop bits
3641 * 00 auto-CTS enable
3645 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
3648 if (info->params.parity != ASYNC_PARITY_NONE) {
3650 if (info->params.parity == ASYNC_PARITY_ODD)
3654 switch (info->params.data_bits)
3656 case 6: val |= BIT4; break;
3657 case 7: val |= BIT5; break;
3658 case 8: val |= BIT5 + BIT4; break;
3661 if (info->params.stop_bits != 1)
3664 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3667 wr_reg16(info, TCR, val);
3671 * 15..13 mode, 010=async
3672 * 12..10 encoding, 000=NRZ
3674 * 08 1=odd parity, 0=even parity
3675 * 07..06 reserved, must be 0
3676 * 05..04 character length
3681 * 03 reserved, must be zero
3684 * 00 auto-DCD enable
3688 if (info->params.parity != ASYNC_PARITY_NONE) {
3690 if (info->params.parity == ASYNC_PARITY_ODD)
3694 switch (info->params.data_bits)
3696 case 6: val |= BIT4; break;
3697 case 7: val |= BIT5; break;
3698 case 8: val |= BIT5 + BIT4; break;
3701 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3704 wr_reg16(info, RCR, val);
3706 /* CCR (clock control)
3708 * 07..05 011 = tx clock source is BRG/16
3709 * 04..02 010 = rx clock source is BRG
3710 * 01 0 = auxclk disabled
3711 * 00 1 = BRG enabled
3715 wr_reg8(info, CCR, 0x69);
3721 /* SCR (serial control)
3723 * 15 1=tx req on FIFO half empty
3724 * 14 1=rx req on FIFO half full
3725 * 13 tx data IRQ enable
3726 * 12 tx idle IRQ enable
3727 * 11 rx break on IRQ enable
3728 * 10 rx data IRQ enable
3729 * 09 rx break off IRQ enable
3730 * 08 overrun IRQ enable
3735 * 03 reserved, must be zero
3736 * 02 1=txd->rxd internal loopback enable
3737 * 01 reserved, must be zero
3738 * 00 1=master IRQ enable
3740 val = BIT15 + BIT14 + BIT0;
3741 wr_reg16(info, SCR, val);
3743 slgt_irq_on(info, IRQ_RXBREAK | IRQ_RXOVER);
3745 set_rate(info, info->params.data_rate * 16);
3747 if (info->params.loopback)
3748 enable_loopback(info);
3751 static void hdlc_mode(struct slgt_info *info)
3755 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
3761 * 15..13 mode, 000=HDLC 001=raw sync
3765 * 07 1=RTS driver control
3766 * 06 preamble enable
3767 * 05..04 preamble length
3768 * 03 share open/close flag
3771 * 00 auto-CTS enable
3775 if (info->params.mode == MGSL_MODE_RAW)
3777 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
3780 switch(info->params.encoding)
3782 case HDLC_ENCODING_NRZB: val |= BIT10; break;
3783 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break;
3784 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break;
3785 case HDLC_ENCODING_BIPHASE_MARK: val |= BIT12; break;
3786 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break;
3787 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break;
3788 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
3791 switch (info->params.crc_type)
3793 case HDLC_CRC_16_CCITT: val |= BIT9; break;
3794 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
3797 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3800 switch (info->params.preamble_length)
3802 case HDLC_PREAMBLE_LENGTH_16BITS: val |= BIT5; break;
3803 case HDLC_PREAMBLE_LENGTH_32BITS: val |= BIT4; break;
3804 case HDLC_PREAMBLE_LENGTH_64BITS: val |= BIT5 + BIT4; break;
3807 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3810 wr_reg16(info, TCR, val);
3812 /* TPR (transmit preamble) */
3814 switch (info->params.preamble)
3816 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3817 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3818 case HDLC_PREAMBLE_PATTERN_ZEROS: val = 0x00; break;
3819 case HDLC_PREAMBLE_PATTERN_10: val = 0x55; break;
3820 case HDLC_PREAMBLE_PATTERN_01: val = 0xaa; break;
3821 default: val = 0x7e; break;
3823 wr_reg8(info, TPR, (unsigned char)val);
3827 * 15..13 mode, 000=HDLC 001=raw sync
3831 * 07..03 reserved, must be 0
3834 * 00 auto-DCD enable
3838 if (info->params.mode == MGSL_MODE_RAW)
3841 switch(info->params.encoding)
3843 case HDLC_ENCODING_NRZB: val |= BIT10; break;
3844 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break;
3845 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break;
3846 case HDLC_ENCODING_BIPHASE_MARK: val |= BIT12; break;
3847 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break;
3848 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break;
3849 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
3852 switch (info->params.crc_type)
3854 case HDLC_CRC_16_CCITT: val |= BIT9; break;
3855 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
3858 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3861 wr_reg16(info, RCR, val);
3863 /* CCR (clock control)
3865 * 07..05 tx clock source
3866 * 04..02 rx clock source
3872 if (info->params.flags & HDLC_FLAG_TXC_BRG)
3874 // when RxC source is DPLL, BRG generates 16X DPLL
3875 // reference clock, so take TxC from BRG/16 to get
3876 // transmit clock at actual data rate
3877 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3878 val |= BIT6 + BIT5; /* 011, txclk = BRG/16 */
3880 val |= BIT6; /* 010, txclk = BRG */
3882 else if (info->params.flags & HDLC_FLAG_TXC_DPLL)
3883 val |= BIT7; /* 100, txclk = DPLL Input */
3884 else if (info->params.flags & HDLC_FLAG_TXC_RXCPIN)
3885 val |= BIT5; /* 001, txclk = RXC Input */
3887 if (info->params.flags & HDLC_FLAG_RXC_BRG)
3888 val |= BIT3; /* 010, rxclk = BRG */
3889 else if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3890 val |= BIT4; /* 100, rxclk = DPLL */
3891 else if (info->params.flags & HDLC_FLAG_RXC_TXCPIN)
3892 val |= BIT2; /* 001, rxclk = TXC Input */
3894 if (info->params.clock_speed)
3897 wr_reg8(info, CCR, (unsigned char)val);
3899 if (info->params.flags & (HDLC_FLAG_TXC_DPLL + HDLC_FLAG_RXC_DPLL))
3901 // program DPLL mode
3902 switch(info->params.encoding)
3904 case HDLC_ENCODING_BIPHASE_MARK:
3905 case HDLC_ENCODING_BIPHASE_SPACE:
3907 case HDLC_ENCODING_BIPHASE_LEVEL:
3908 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL:
3909 val = BIT7 + BIT6; break;
3910 default: val = BIT6; // NRZ encodings
3912 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | val));
3914 // DPLL requires a 16X reference clock from BRG
3915 set_rate(info, info->params.clock_speed * 16);
3918 set_rate(info, info->params.clock_speed);
3924 /* SCR (serial control)
3926 * 15 1=tx req on FIFO half empty
3927 * 14 1=rx req on FIFO half full
3928 * 13 tx data IRQ enable
3929 * 12 tx idle IRQ enable
3930 * 11 underrun IRQ enable
3931 * 10 rx data IRQ enable
3932 * 09 rx idle IRQ enable
3933 * 08 overrun IRQ enable
3938 * 03 reserved, must be zero
3939 * 02 1=txd->rxd internal loopback enable
3940 * 01 reserved, must be zero
3941 * 00 1=master IRQ enable
3943 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);
3945 if (info->params.loopback)
3946 enable_loopback(info);
3950 * set transmit idle mode
3952 static void tx_set_idle(struct slgt_info *info)
3954 unsigned char val = 0xff;
3956 switch(info->idle_mode)
3958 case HDLC_TXIDLE_FLAGS: val = 0x7e; break;
3959 case HDLC_TXIDLE_ALT_ZEROS_ONES: val = 0xaa; break;
3960 case HDLC_TXIDLE_ZEROS: val = 0x00; break;
3961 case HDLC_TXIDLE_ONES: val = 0xff; break;
3962 case HDLC_TXIDLE_ALT_MARK_SPACE: val = 0xaa; break;
3963 case HDLC_TXIDLE_SPACE: val = 0x00; break;
3964 case HDLC_TXIDLE_MARK: val = 0xff; break;
3967 wr_reg8(info, TIR, val);
3971 * get state of V24 status (input) signals
3973 static void get_signals(struct slgt_info *info)
3975 unsigned short status = rd_reg16(info, SSR);
3977 /* clear all serial signals except DTR and RTS */
3978 info->signals &= SerialSignal_DTR + SerialSignal_RTS;
3981 info->signals |= SerialSignal_DSR;
3983 info->signals |= SerialSignal_CTS;
3985 info->signals |= SerialSignal_DCD;
3987 info->signals |= SerialSignal_RI;
3991 * set V.24 Control Register based on current configuration
3993 static void msc_set_vcr(struct slgt_info *info)
3995 unsigned char val = 0;
3997 /* VCR (V.24 control)
3999 * 07..04 serial IF select
4006 switch(info->if_mode & MGSL_INTERFACE_MASK)
4008 case MGSL_INTERFACE_RS232:
4009 val |= BIT5; /* 0010 */
4011 case MGSL_INTERFACE_V35:
4012 val |= BIT7 + BIT6 + BIT5; /* 1110 */
4014 case MGSL_INTERFACE_RS422:
4015 val |= BIT6; /* 0100 */
4019 if (info->signals & SerialSignal_DTR)
4021 if (info->signals & SerialSignal_RTS)
4023 if (info->if_mode & MGSL_INTERFACE_LL)
4025 if (info->if_mode & MGSL_INTERFACE_RL)
4027 wr_reg8(info, VCR, val);
4031 * set state of V24 control (output) signals
4033 static void set_signals(struct slgt_info *info)
4035 unsigned char val = rd_reg8(info, VCR);
4036 if (info->signals & SerialSignal_DTR)
4040 if (info->signals & SerialSignal_RTS)
4044 wr_reg8(info, VCR, val);
4048 * free range of receive DMA buffers (i to last)
4050 static void free_rbufs(struct slgt_info *info, unsigned int i, unsigned int last)
4055 /* reset current buffer for reuse */
4056 info->rbufs[i].status = 0;
4057 if (info->params.mode == MGSL_MODE_RAW)
4058 set_desc_count(info->rbufs[i], info->raw_rx_size);
4060 set_desc_count(info->rbufs[i], DMABUFSIZE);
4064 if (++i == info->rbuf_count)
4067 info->rbuf_current = i;
4071 * mark all receive DMA buffers as free
4073 static void reset_rbufs(struct slgt_info *info)
4075 free_rbufs(info, 0, info->rbuf_count - 1);
4079 * pass receive HDLC frame to upper layer
4081 * return 1 if frame available, otherwise 0
4083 static int rx_get_frame(struct slgt_info *info)
4085 unsigned int start, end;
4086 unsigned short status;
4087 unsigned int framesize = 0;
4089 unsigned long flags;
4090 struct tty_struct *tty = info->tty;
4091 unsigned char addr_field = 0xff;
4097 start = end = info->rbuf_current;
4100 if (!desc_complete(info->rbufs[end]))
4103 if (framesize == 0 && info->params.addr_filter != 0xff)
4104 addr_field = info->rbufs[end].buf[0];
4106 framesize += desc_count(info->rbufs[end]);
4108 if (desc_eof(info->rbufs[end]))
4111 if (++end == info->rbuf_count)
4114 if (end == info->rbuf_current) {
4115 if (info->rx_enabled){
4116 spin_lock_irqsave(&info->lock,flags);
4118 spin_unlock_irqrestore(&info->lock,flags);
4126 * 15 buffer complete
4129 * 02 eof (end of frame)
4133 status = desc_status(info->rbufs[end]);
4135 /* ignore CRC bit if not using CRC (bit is undefined) */
4136 if (info->params.crc_type == HDLC_CRC_NONE)
4139 if (framesize == 0 ||
4140 (addr_field != 0xff && addr_field != info->params.addr_filter)) {
4141 free_rbufs(info, start, end);
4145 if (framesize < 2 || status & (BIT1+BIT0)) {
4146 if (framesize < 2 || (status & BIT0))
4147 info->icount.rxshort++;
4149 info->icount.rxcrc++;
4154 struct net_device_stats *stats = hdlc_stats(info->netdev);
4156 stats->rx_frame_errors++;
4160 /* adjust frame size for CRC, if any */
4161 if (info->params.crc_type == HDLC_CRC_16_CCITT)
4163 else if (info->params.crc_type == HDLC_CRC_32_CCITT)
4167 DBGBH(("%s rx frame status=%04X size=%d\n",
4168 info->device_name, status, framesize));
4169 DBGDATA(info, info->rbufs[start].buf, min_t(int, framesize, DMABUFSIZE), "rx");
4172 if (framesize > info->max_frame_size)
4173 info->icount.rxlong++;
4175 /* copy dma buffer(s) to contiguous temp buffer */
4176 int copy_count = framesize;
4178 unsigned char *p = info->tmp_rbuf;
4179 info->tmp_rbuf_count = framesize;
4181 info->icount.rxok++;
4184 int partial_count = min(copy_count, DMABUFSIZE);
4185 memcpy(p, info->rbufs[i].buf, partial_count);
4187 copy_count -= partial_count;
4188 if (++i == info->rbuf_count)
4194 hdlcdev_rx(info,info->tmp_rbuf, framesize);
4197 ldisc_receive_buf(tty, info->tmp_rbuf, info->flag_buf, framesize);
4200 free_rbufs(info, start, end);
4208 * pass receive buffer (RAW synchronous mode) to tty layer
4209 * return 1 if buffer available, otherwise 0
4211 static int rx_get_buf(struct slgt_info *info)
4213 unsigned int i = info->rbuf_current;
4215 if (!desc_complete(info->rbufs[i]))
4217 DBGDATA(info, info->rbufs[i].buf, desc_count(info->rbufs[i]), "rx");
4218 DBGINFO(("rx_get_buf size=%d\n", desc_count(info->rbufs[i])));
4219 ldisc_receive_buf(info->tty, info->rbufs[i].buf,
4220 info->flag_buf, desc_count(info->rbufs[i]));
4221 free_rbufs(info, i, i);
4225 static void reset_tbufs(struct slgt_info *info)
4228 info->tbuf_current = 0;
4229 for (i=0 ; i < info->tbuf_count ; i++) {
4230 info->tbufs[i].status = 0;
4231 info->tbufs[i].count = 0;
4236 * return number of free transmit DMA buffers
4238 static unsigned int free_tbuf_count(struct slgt_info *info)
4240 unsigned int count = 0;
4241 unsigned int i = info->tbuf_current;
4245 if (desc_count(info->tbufs[i]))
4246 break; /* buffer in use */
4248 if (++i == info->tbuf_count)
4250 } while (i != info->tbuf_current);
4252 /* last buffer with zero count may be in use, assume it is */
4260 * load transmit DMA buffer(s) with data
4262 static void tx_load(struct slgt_info *info, const char *buf, unsigned int size)
4264 unsigned short count;
4266 struct slgt_desc *d;
4271 DBGDATA(info, buf, size, "tx");
4273 info->tbuf_start = i = info->tbuf_current;
4276 d = &info->tbufs[i];
4277 if (++i == info->tbuf_count)
4280 count = (unsigned short)((size > DMABUFSIZE) ? DMABUFSIZE : size);
4281 memcpy(d->buf, buf, count);
4286 if (!size && info->params.mode != MGSL_MODE_RAW)
4287 set_desc_eof(*d, 1); /* HDLC: set EOF of last desc */
4289 set_desc_eof(*d, 0);
4291 set_desc_count(*d, count);
4294 info->tbuf_current = i;
4297 static int register_test(struct slgt_info *info)
4299 static unsigned short patterns[] =
4300 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696};
4301 static unsigned int count = sizeof(patterns)/sizeof(patterns[0]);
4305 for (i=0 ; i < count ; i++) {
4306 wr_reg16(info, TIR, patterns[i]);
4307 wr_reg16(info, BDR, patterns[(i+1)%count]);
4308 if ((rd_reg16(info, TIR) != patterns[i]) ||
4309 (rd_reg16(info, BDR) != patterns[(i+1)%count])) {
4315 info->init_error = rc ? 0 : DiagStatus_AddressFailure;
4319 static int irq_test(struct slgt_info *info)
4321 unsigned long timeout;
4322 unsigned long flags;
4323 struct tty_struct *oldtty = info->tty;
4324 u32 speed = info->params.data_rate;
4326 info->params.data_rate = 921600;
4329 spin_lock_irqsave(&info->lock, flags);
4331 slgt_irq_on(info, IRQ_TXIDLE);
4333 /* enable transmitter */
4335 (unsigned short)(rd_reg16(info, TCR) | BIT1));
4337 /* write one byte and wait for tx idle */
4338 wr_reg16(info, TDR, 0);
4340 /* assume failure */
4341 info->init_error = DiagStatus_IrqFailure;
4342 info->irq_occurred = FALSE;
4344 spin_unlock_irqrestore(&info->lock, flags);
4347 while(timeout-- && !info->irq_occurred)
4348 msleep_interruptible(10);
4350 spin_lock_irqsave(&info->lock,flags);
4352 spin_unlock_irqrestore(&info->lock,flags);
4354 info->params.data_rate = speed;
4357 info->init_error = info->irq_occurred ? 0 : DiagStatus_IrqFailure;
4358 return info->irq_occurred ? 0 : -ENODEV;
4361 static int loopback_test_rx(struct slgt_info *info)
4363 unsigned char *src, *dest;
4366 if (desc_complete(info->rbufs[0])) {
4367 count = desc_count(info->rbufs[0]);
4368 src = info->rbufs[0].buf;
4369 dest = info->tmp_rbuf;
4371 for( ; count ; count-=2, src+=2) {
4372 /* src=data byte (src+1)=status byte */
4373 if (!(*(src+1) & (BIT9 + BIT8))) {
4376 info->tmp_rbuf_count++;
4379 DBGDATA(info, info->tmp_rbuf, info->tmp_rbuf_count, "rx");
4385 static int loopback_test(struct slgt_info *info)
4387 #define TESTFRAMESIZE 20
4389 unsigned long timeout;
4390 u16 count = TESTFRAMESIZE;
4391 unsigned char buf[TESTFRAMESIZE];
4393 unsigned long flags;
4395 struct tty_struct *oldtty = info->tty;
4398 memcpy(¶ms, &info->params, sizeof(params));
4400 info->params.mode = MGSL_MODE_ASYNC;
4401 info->params.data_rate = 921600;
4402 info->params.loopback = 1;
4405 /* build and send transmit frame */
4406 for (count = 0; count < TESTFRAMESIZE; ++count)
4407 buf[count] = (unsigned char)count;
4409 info->tmp_rbuf_count = 0;
4410 memset(info->tmp_rbuf, 0, TESTFRAMESIZE);
4412 /* program hardware for HDLC and enabled receiver */
4413 spin_lock_irqsave(&info->lock,flags);
4416 info->tx_count = count;
4417 tx_load(info, buf, count);
4419 spin_unlock_irqrestore(&info->lock, flags);
4421 /* wait for receive complete */
4422 for (timeout = 100; timeout; --timeout) {
4423 msleep_interruptible(10);
4424 if (loopback_test_rx(info)) {
4430 /* verify received frame length and contents */
4431 if (!rc && (info->tmp_rbuf_count != count ||
4432 memcmp(buf, info->tmp_rbuf, count))) {
4436 spin_lock_irqsave(&info->lock,flags);
4437 reset_adapter(info);
4438 spin_unlock_irqrestore(&info->lock,flags);
4440 memcpy(&info->params, ¶ms, sizeof(info->params));
4443 info->init_error = rc ? DiagStatus_DmaFailure : 0;
4447 static int adapter_test(struct slgt_info *info)
4449 DBGINFO(("testing %s\n", info->device_name));
4450 if ((info->init_error = register_test(info)) < 0) {
4451 printk("register test failure %s addr=%08X\n",
4452 info->device_name, info->phys_reg_addr);
4453 } else if ((info->init_error = irq_test(info)) < 0) {
4454 printk("IRQ test failure %s IRQ=%d\n",
4455 info->device_name, info->irq_level);
4456 } else if ((info->init_error = loopback_test(info)) < 0) {
4457 printk("loopback test failure %s\n", info->device_name);
4459 return info->init_error;
4463 * transmit timeout handler
4465 static void tx_timeout(unsigned long context)
4467 struct slgt_info *info = (struct slgt_info*)context;
4468 unsigned long flags;
4470 DBGINFO(("%s tx_timeout\n", info->device_name));
4471 if(info->tx_active && info->params.mode == MGSL_MODE_HDLC) {
4472 info->icount.txtimeout++;
4474 spin_lock_irqsave(&info->lock,flags);
4475 info->tx_active = 0;
4477 spin_unlock_irqrestore(&info->lock,flags);
4481 hdlcdev_tx_done(info);
4488 * receive buffer polling timer
4490 static void rx_timeout(unsigned long context)
4492 struct slgt_info *info = (struct slgt_info*)context;
4493 unsigned long flags;
4495 DBGINFO(("%s rx_timeout\n", info->device_name));
4496 spin_lock_irqsave(&info->lock, flags);
4497 info->pending_bh |= BH_RECEIVE;
4498 spin_unlock_irqrestore(&info->lock, flags);