2 * Copyright (C) 2005, 2006 IBM Corporation
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Kylene Hall <kjhall@us.ibm.com>
8 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 * Device driver for TCG/TCPA TPM (trusted platform module).
11 * Specifications at www.trustedcomputinggroup.org
13 * This device driver implements the TPM interface as defined in
14 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation, version 2 of the
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/pnp.h>
25 #include <linux/interrupt.h>
26 #include <linux/wait.h>
29 #define TPM_HEADER_SIZE 10
32 TPM_ACCESS_VALID = 0x80,
33 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
34 TPM_ACCESS_REQUEST_PENDING = 0x04,
35 TPM_ACCESS_REQUEST_USE = 0x02,
40 TPM_STS_COMMAND_READY = 0x40,
42 TPM_STS_DATA_AVAIL = 0x10,
43 TPM_STS_DATA_EXPECT = 0x08,
47 TPM_GLOBAL_INT_ENABLE = 0x80000000,
48 TPM_INTF_BURST_COUNT_STATIC = 0x100,
49 TPM_INTF_CMD_READY_INT = 0x080,
50 TPM_INTF_INT_EDGE_FALLING = 0x040,
51 TPM_INTF_INT_EDGE_RISING = 0x020,
52 TPM_INTF_INT_LEVEL_LOW = 0x010,
53 TPM_INTF_INT_LEVEL_HIGH = 0x008,
54 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
55 TPM_INTF_STS_VALID_INT = 0x002,
56 TPM_INTF_DATA_AVAIL_INT = 0x001,
60 TIS_MEM_BASE = 0xFED40000,
62 TIS_SHORT_TIMEOUT = 750, /* ms */
63 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
66 #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
67 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
68 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
69 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
70 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
71 #define TPM_STS(l) (0x0018 | ((l) << 12))
72 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
74 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
75 #define TPM_RID(l) (0x0F04 | ((l) << 12))
77 static LIST_HEAD(tis_chips);
78 static DEFINE_SPINLOCK(tis_lock);
80 static int check_locality(struct tpm_chip *chip, int l)
82 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
83 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
84 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
85 return chip->vendor.locality = l;
90 static void release_locality(struct tpm_chip *chip, int l, int force)
92 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
93 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
94 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
95 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
96 chip->vendor.iobase + TPM_ACCESS(l));
99 static int request_locality(struct tpm_chip *chip, int l)
104 if (check_locality(chip, l) >= 0)
107 iowrite8(TPM_ACCESS_REQUEST_USE,
108 chip->vendor.iobase + TPM_ACCESS(l));
110 if (chip->vendor.irq) {
111 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
114 chip->vendor.timeout_a);
119 /* wait for burstcount */
120 stop = jiffies + chip->vendor.timeout_a;
122 if (check_locality(chip, l) >= 0)
126 while (time_before(jiffies, stop));
131 static u8 tpm_tis_status(struct tpm_chip *chip)
133 return ioread8(chip->vendor.iobase +
134 TPM_STS(chip->vendor.locality));
137 static void tpm_tis_ready(struct tpm_chip *chip)
139 /* this causes the current command to be aborted */
140 iowrite8(TPM_STS_COMMAND_READY,
141 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
144 static int get_burstcount(struct tpm_chip *chip)
149 /* wait for burstcount */
150 /* which timeout value, spec has 2 answers (c & d) */
151 stop = jiffies + chip->vendor.timeout_d;
153 burstcnt = ioread8(chip->vendor.iobase +
154 TPM_STS(chip->vendor.locality) + 1);
155 burstcnt += ioread8(chip->vendor.iobase +
156 TPM_STS(chip->vendor.locality) +
161 } while (time_before(jiffies, stop));
165 static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
166 wait_queue_head_t *queue)
172 /* check current status */
173 status = tpm_tis_status(chip);
174 if ((status & mask) == mask)
177 if (chip->vendor.irq) {
178 rc = wait_event_interruptible_timeout(*queue,
185 stop = jiffies + timeout;
188 status = tpm_tis_status(chip);
189 if ((status & mask) == mask)
191 } while (time_before(jiffies, stop));
196 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
198 int size = 0, burstcnt;
199 while (size < count &&
201 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
202 chip->vendor.timeout_c,
203 &chip->vendor.read_queue)
205 burstcnt = get_burstcount(chip);
206 for (; burstcnt > 0 && size < count; burstcnt--)
207 buf[size++] = ioread8(chip->vendor.iobase +
208 TPM_DATA_FIFO(chip->vendor.
214 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
217 int expected, status;
219 if (count < TPM_HEADER_SIZE) {
224 /* read first 10 bytes, including tag, paramsize, and result */
226 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
227 dev_err(chip->dev, "Unable to read header\n");
231 expected = be32_to_cpu(*(__be32 *) (buf + 2));
232 if (expected > count) {
238 recv_data(chip, &buf[TPM_HEADER_SIZE],
239 expected - TPM_HEADER_SIZE)) < expected) {
240 dev_err(chip->dev, "Unable to read remainder of result\n");
245 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
246 &chip->vendor.int_queue);
247 status = tpm_tis_status(chip);
248 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
249 dev_err(chip->dev, "Error left over data\n");
256 release_locality(chip, chip->vendor.locality, 0);
261 module_param(itpm, bool, 0444);
262 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
265 * If interrupts are used (signaled by an irq set in the vendor structure)
266 * tpm.c can skip polling for the data to be available as the interrupt is
269 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
271 int rc, status, burstcnt;
275 if (request_locality(chip, 0) < 0)
278 status = tpm_tis_status(chip);
279 if ((status & TPM_STS_COMMAND_READY) == 0) {
282 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
283 &chip->vendor.int_queue) < 0) {
289 while (count < len - 1) {
290 burstcnt = get_burstcount(chip);
291 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
292 iowrite8(buf[count], chip->vendor.iobase +
293 TPM_DATA_FIFO(chip->vendor.locality));
297 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
298 &chip->vendor.int_queue);
299 status = tpm_tis_status(chip);
300 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
306 /* write last byte */
308 chip->vendor.iobase +
309 TPM_DATA_FIFO(chip->vendor.locality));
310 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
311 &chip->vendor.int_queue);
312 status = tpm_tis_status(chip);
313 if ((status & TPM_STS_DATA_EXPECT) != 0) {
320 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
322 if (chip->vendor.irq) {
323 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
325 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
326 tpm_calc_ordinal_duration(chip, ordinal),
327 &chip->vendor.read_queue) < 0) {
335 release_locality(chip, chip->vendor.locality, 0);
339 static const struct file_operations tis_ops = {
340 .owner = THIS_MODULE,
345 .release = tpm_release,
348 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
349 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
350 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
351 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
352 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
353 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
355 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
356 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
358 static struct attribute *tis_attrs[] = {
359 &dev_attr_pubek.attr,
361 &dev_attr_enabled.attr,
362 &dev_attr_active.attr,
363 &dev_attr_owned.attr,
364 &dev_attr_temp_deactivated.attr,
366 &dev_attr_cancel.attr, NULL,
369 static struct attribute_group tis_attr_grp = {
373 static struct tpm_vendor_specific tpm_tis = {
374 .status = tpm_tis_status,
375 .recv = tpm_tis_recv,
376 .send = tpm_tis_send,
377 .cancel = tpm_tis_ready,
378 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
379 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
380 .req_canceled = TPM_STS_COMMAND_READY,
381 .attr_group = &tis_attr_grp,
386 static irqreturn_t tis_int_probe(int irq, void *dev_id)
388 struct tpm_chip *chip = dev_id;
391 interrupt = ioread32(chip->vendor.iobase +
392 TPM_INT_STATUS(chip->vendor.locality));
397 chip->vendor.irq = irq;
399 /* Clear interrupts handled with TPM_EOI */
401 chip->vendor.iobase +
402 TPM_INT_STATUS(chip->vendor.locality));
406 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
408 struct tpm_chip *chip = dev_id;
412 interrupt = ioread32(chip->vendor.iobase +
413 TPM_INT_STATUS(chip->vendor.locality));
418 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
419 wake_up_interruptible(&chip->vendor.read_queue);
420 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
421 for (i = 0; i < 5; i++)
422 if (check_locality(chip, i) >= 0)
425 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
426 TPM_INTF_CMD_READY_INT))
427 wake_up_interruptible(&chip->vendor.int_queue);
429 /* Clear interrupts handled with TPM_EOI */
431 chip->vendor.iobase +
432 TPM_INT_STATUS(chip->vendor.locality));
433 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
437 static int interrupts = 1;
438 module_param(interrupts, bool, 0444);
439 MODULE_PARM_DESC(interrupts, "Enable interrupts");
441 static int tpm_tis_init(struct device *dev, resource_size_t start,
442 resource_size_t len, unsigned int irq)
444 u32 vendor, intfcaps, intmask;
446 struct tpm_chip *chip;
448 if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
451 chip->vendor.iobase = ioremap(start, len);
452 if (!chip->vendor.iobase) {
457 /* Default timeouts */
458 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
459 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
460 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
461 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
463 if (request_locality(chip, 0) != 0) {
468 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
471 "1.2 TPM (device-id 0x%X, rev-id %d)\n",
472 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
475 dev_info(dev, "Intel iTPM workaround enabled\n");
478 /* Figure out the capabilities */
480 ioread32(chip->vendor.iobase +
481 TPM_INTF_CAPS(chip->vendor.locality));
482 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
484 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
485 dev_dbg(dev, "\tBurst Count Static\n");
486 if (intfcaps & TPM_INTF_CMD_READY_INT)
487 dev_dbg(dev, "\tCommand Ready Int Support\n");
488 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
489 dev_dbg(dev, "\tInterrupt Edge Falling\n");
490 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
491 dev_dbg(dev, "\tInterrupt Edge Rising\n");
492 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
493 dev_dbg(dev, "\tInterrupt Level Low\n");
494 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
495 dev_dbg(dev, "\tInterrupt Level High\n");
496 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
497 dev_dbg(dev, "\tLocality Change Int Support\n");
498 if (intfcaps & TPM_INTF_STS_VALID_INT)
499 dev_dbg(dev, "\tSts Valid Int Support\n");
500 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
501 dev_dbg(dev, "\tData Avail Int Support\n");
503 /* INTERRUPT Setup */
504 init_waitqueue_head(&chip->vendor.read_queue);
505 init_waitqueue_head(&chip->vendor.int_queue);
508 ioread32(chip->vendor.iobase +
509 TPM_INT_ENABLE(chip->vendor.locality));
511 intmask |= TPM_INTF_CMD_READY_INT
512 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
513 | TPM_INTF_STS_VALID_INT;
516 chip->vendor.iobase +
517 TPM_INT_ENABLE(chip->vendor.locality));
519 chip->vendor.irq = irq;
520 if (interrupts && !chip->vendor.irq) {
522 ioread8(chip->vendor.iobase +
523 TPM_INT_VECTOR(chip->vendor.locality));
525 for (i = 3; i < 16 && chip->vendor.irq == 0; i++) {
526 iowrite8(i, chip->vendor.iobase +
527 TPM_INT_VECTOR(chip->vendor.locality));
529 (i, tis_int_probe, IRQF_SHARED,
530 chip->vendor.miscdev.name, chip) != 0) {
532 "Unable to request irq: %d for probe\n",
537 /* Clear all existing */
539 (chip->vendor.iobase +
540 TPM_INT_STATUS(chip->vendor.locality)),
541 chip->vendor.iobase +
542 TPM_INT_STATUS(chip->vendor.locality));
545 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
546 chip->vendor.iobase +
547 TPM_INT_ENABLE(chip->vendor.locality));
549 /* Generate Interrupts */
550 tpm_gen_interrupt(chip);
554 chip->vendor.iobase +
555 TPM_INT_ENABLE(chip->vendor.locality));
559 if (chip->vendor.irq) {
560 iowrite8(chip->vendor.irq,
561 chip->vendor.iobase +
562 TPM_INT_VECTOR(chip->vendor.locality));
564 (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
565 chip->vendor.miscdev.name, chip) != 0) {
567 "Unable to request irq: %d for use\n",
569 chip->vendor.irq = 0;
571 /* Clear all existing */
573 (chip->vendor.iobase +
574 TPM_INT_STATUS(chip->vendor.locality)),
575 chip->vendor.iobase +
576 TPM_INT_STATUS(chip->vendor.locality));
579 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
580 chip->vendor.iobase +
581 TPM_INT_ENABLE(chip->vendor.locality));
585 INIT_LIST_HEAD(&chip->vendor.list);
586 spin_lock(&tis_lock);
587 list_add(&chip->vendor.list, &tis_chips);
588 spin_unlock(&tis_lock);
590 tpm_get_timeouts(chip);
591 tpm_continue_selftest(chip);
595 if (chip->vendor.iobase)
596 iounmap(chip->vendor.iobase);
597 tpm_remove_hardware(chip->dev);
601 static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
602 const struct pnp_device_id *pnp_id)
604 resource_size_t start, len;
605 unsigned int irq = 0;
607 start = pnp_mem_start(pnp_dev, 0);
608 len = pnp_mem_len(pnp_dev, 0);
610 if (pnp_irq_valid(pnp_dev, 0))
611 irq = pnp_irq(pnp_dev, 0);
615 return tpm_tis_init(&pnp_dev->dev, start, len, irq);
618 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
620 return tpm_pm_suspend(&dev->dev, msg);
623 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
625 return tpm_pm_resume(&dev->dev);
628 static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
629 {"PNP0C31", 0}, /* TPM */
630 {"ATM1200", 0}, /* Atmel */
631 {"IFX0102", 0}, /* Infineon */
632 {"BCM0101", 0}, /* Broadcom */
633 {"BCM0102", 0}, /* Broadcom */
634 {"NSC1200", 0}, /* National */
635 {"ICO0102", 0}, /* Intel */
637 {"", 0}, /* User Specified */
638 {"", 0} /* Terminator */
640 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
642 static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
644 struct tpm_chip *chip = pnp_get_drvdata(dev);
646 tpm_dev_vendor_release(chip);
652 static struct pnp_driver tis_pnp_driver = {
654 .id_table = tpm_pnp_tbl,
655 .probe = tpm_tis_pnp_init,
656 .suspend = tpm_tis_pnp_suspend,
657 .resume = tpm_tis_pnp_resume,
658 .remove = tpm_tis_pnp_remove,
661 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
662 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
663 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
664 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
666 static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
668 return tpm_pm_suspend(&dev->dev, msg);
671 static int tpm_tis_resume(struct platform_device *dev)
673 return tpm_pm_resume(&dev->dev);
675 static struct platform_driver tis_drv = {
678 .owner = THIS_MODULE,
680 .suspend = tpm_tis_suspend,
681 .resume = tpm_tis_resume,
684 static struct platform_device *pdev;
687 module_param(force, bool, 0444);
688 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
689 static int __init init_tis(void)
694 rc = platform_driver_register(&tis_drv);
697 if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
698 return PTR_ERR(pdev);
699 if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
700 platform_device_unregister(pdev);
701 platform_driver_unregister(&tis_drv);
706 return pnp_register_driver(&tis_pnp_driver);
709 static void __exit cleanup_tis(void)
711 struct tpm_vendor_specific *i, *j;
712 struct tpm_chip *chip;
713 spin_lock(&tis_lock);
714 list_for_each_entry_safe(i, j, &tis_chips, list) {
715 chip = to_tpm_chip(i);
716 tpm_remove_hardware(chip->dev);
717 iowrite32(~TPM_GLOBAL_INT_ENABLE &
718 ioread32(chip->vendor.iobase +
719 TPM_INT_ENABLE(chip->vendor.
721 chip->vendor.iobase +
722 TPM_INT_ENABLE(chip->vendor.locality));
723 release_locality(chip, chip->vendor.locality, 1);
724 if (chip->vendor.irq)
725 free_irq(chip->vendor.irq, chip);
729 spin_unlock(&tis_lock);
732 platform_device_unregister(pdev);
733 platform_driver_unregister(&tis_drv);
735 pnp_unregister_driver(&tis_pnp_driver);
738 module_init(init_tis);
739 module_exit(cleanup_tis);
740 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
741 MODULE_DESCRIPTION("TPM Driver");
742 MODULE_VERSION("2.0");
743 MODULE_LICENSE("GPL");