2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Adjustable divider clock implementation
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
17 #include <linux/err.h>
18 #include <linux/string.h>
19 #include <linux/log2.h>
22 * DOC: basic adjustable divider clock that cannot gate
24 * Traits of this clock:
25 * prepare - clk_prepare only ensures that parents are prepared
26 * enable - clk_enable only ensures that parents are enabled
27 * rate - rate is adjustable. clk->rate = DIV_ROUND_UP(parent->rate / divisor)
28 * parent - fixed parent. No clk_set_parent support
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
33 #define div_mask(width) ((1 << (width)) - 1)
35 static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
37 unsigned int maxdiv = 0;
38 const struct clk_div_table *clkt;
40 for (clkt = table; clkt->div; clkt++)
41 if (clkt->div > maxdiv)
46 static unsigned int _get_table_mindiv(const struct clk_div_table *table)
48 unsigned int mindiv = UINT_MAX;
49 const struct clk_div_table *clkt;
51 for (clkt = table; clkt->div; clkt++)
52 if (clkt->div < mindiv)
57 static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
60 if (flags & CLK_DIVIDER_ONE_BASED)
61 return div_mask(width);
62 if (flags & CLK_DIVIDER_POWER_OF_TWO)
63 return 1 << div_mask(width);
65 return _get_table_maxdiv(table);
66 return div_mask(width) + 1;
69 static unsigned int _get_table_div(const struct clk_div_table *table,
72 const struct clk_div_table *clkt;
74 for (clkt = table; clkt->div; clkt++)
80 static unsigned int _get_div(const struct clk_div_table *table,
81 unsigned int val, unsigned long flags)
83 if (flags & CLK_DIVIDER_ONE_BASED)
85 if (flags & CLK_DIVIDER_POWER_OF_TWO)
88 return _get_table_div(table, val);
92 static unsigned int _get_table_val(const struct clk_div_table *table,
95 const struct clk_div_table *clkt;
97 for (clkt = table; clkt->div; clkt++)
103 static unsigned int _get_val(const struct clk_div_table *table,
104 unsigned int div, unsigned long flags)
106 if (flags & CLK_DIVIDER_ONE_BASED)
108 if (flags & CLK_DIVIDER_POWER_OF_TWO)
111 return _get_table_val(table, div);
115 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
117 const struct clk_div_table *table,
122 div = _get_div(table, val, flags);
124 WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
125 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
126 __clk_get_name(hw->clk));
130 return DIV_ROUND_UP(parent_rate, div);
132 EXPORT_SYMBOL_GPL(divider_recalc_rate);
134 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
135 unsigned long parent_rate)
137 struct clk_divider *divider = to_clk_divider(hw);
140 val = clk_readl(divider->reg) >> divider->shift;
141 val &= div_mask(divider->width);
143 return divider_recalc_rate(hw, parent_rate, val, divider->table,
147 static bool _is_valid_table_div(const struct clk_div_table *table,
150 const struct clk_div_table *clkt;
152 for (clkt = table; clkt->div; clkt++)
153 if (clkt->div == div)
158 static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
161 if (flags & CLK_DIVIDER_POWER_OF_TWO)
162 return is_power_of_2(div);
164 return _is_valid_table_div(table, div);
168 static int _round_up_table(const struct clk_div_table *table, int div)
170 const struct clk_div_table *clkt;
173 for (clkt = table; clkt->div; clkt++) {
174 if (clkt->div == div)
176 else if (clkt->div < div)
179 if ((clkt->div - div) < (up - div))
186 static int _round_down_table(const struct clk_div_table *table, int div)
188 const struct clk_div_table *clkt;
189 int down = _get_table_mindiv(table);
191 for (clkt = table; clkt->div; clkt++) {
192 if (clkt->div == div)
194 else if (clkt->div > div)
197 if ((div - clkt->div) < (div - down))
204 static int _div_round_up(const struct clk_div_table *table,
205 unsigned long parent_rate, unsigned long rate,
208 int div = DIV_ROUND_UP(parent_rate, rate);
210 if (flags & CLK_DIVIDER_POWER_OF_TWO)
211 div = __roundup_pow_of_two(div);
213 div = _round_up_table(table, div);
218 static int _div_round_closest(const struct clk_div_table *table,
219 unsigned long parent_rate, unsigned long rate,
223 unsigned long up_rate, down_rate;
225 up = DIV_ROUND_UP(parent_rate, rate);
226 down = parent_rate / rate;
228 if (flags & CLK_DIVIDER_POWER_OF_TWO) {
229 up = __roundup_pow_of_two(up);
230 down = __rounddown_pow_of_two(down);
232 up = _round_up_table(table, up);
233 down = _round_down_table(table, down);
236 up_rate = DIV_ROUND_UP(parent_rate, up);
237 down_rate = DIV_ROUND_UP(parent_rate, down);
239 return (rate - up_rate) <= (down_rate - rate) ? up : down;
242 static int _div_round(const struct clk_div_table *table,
243 unsigned long parent_rate, unsigned long rate,
246 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
247 return _div_round_closest(table, parent_rate, rate, flags);
249 return _div_round_up(table, parent_rate, rate, flags);
252 static bool _is_best_div(unsigned long rate, unsigned long now,
253 unsigned long best, unsigned long flags)
255 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
256 return abs(rate - now) < abs(rate - best);
258 return now <= rate && now > best;
261 static int _next_div(const struct clk_div_table *table, int div,
266 if (flags & CLK_DIVIDER_POWER_OF_TWO)
267 return __roundup_pow_of_two(div);
269 return _round_up_table(table, div);
274 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
275 unsigned long *best_parent_rate,
276 const struct clk_div_table *table, u8 width,
280 unsigned long parent_rate, best = 0, now, maxdiv;
281 unsigned long parent_rate_saved = *best_parent_rate;
286 maxdiv = _get_maxdiv(table, width, flags);
288 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
289 parent_rate = *best_parent_rate;
290 bestdiv = _div_round(table, parent_rate, rate, flags);
291 bestdiv = bestdiv == 0 ? 1 : bestdiv;
292 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
297 * The maximum divider we can use without overflowing
298 * unsigned long in rate * i below
300 maxdiv = min(ULONG_MAX / rate, maxdiv);
302 for (i = 1; i <= maxdiv; i = _next_div(table, i, flags)) {
303 if (!_is_valid_div(table, i, flags))
305 if (rate * i == parent_rate_saved) {
307 * It's the most ideal case if the requested rate can be
308 * divided from parent clock without needing to change
309 * parent rate, so return the divider immediately.
311 *best_parent_rate = parent_rate_saved;
314 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
316 now = DIV_ROUND_UP(parent_rate, i);
317 if (_is_best_div(rate, now, best, flags)) {
320 *best_parent_rate = parent_rate;
325 bestdiv = _get_maxdiv(table, width, flags);
326 *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
332 long divider_round_rate(struct clk_hw *hw, unsigned long rate,
333 unsigned long *prate, const struct clk_div_table *table,
334 u8 width, unsigned long flags)
338 div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
340 return DIV_ROUND_UP(*prate, div);
342 EXPORT_SYMBOL_GPL(divider_round_rate);
344 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
345 unsigned long *prate)
347 struct clk_divider *divider = to_clk_divider(hw);
350 /* if read only, just return current value */
351 if (divider->flags & CLK_DIVIDER_READ_ONLY) {
352 bestdiv = readl(divider->reg) >> divider->shift;
353 bestdiv &= div_mask(divider->width);
354 bestdiv = _get_div(divider->table, bestdiv, divider->flags);
355 return DIV_ROUND_UP(*prate, bestdiv);
358 return divider_round_rate(hw, rate, prate, divider->table,
359 divider->width, divider->flags);
362 int divider_get_val(unsigned long rate, unsigned long parent_rate,
363 const struct clk_div_table *table, u8 width,
366 unsigned int div, value;
368 div = DIV_ROUND_UP(parent_rate, rate);
370 if (!_is_valid_div(table, div, flags))
373 value = _get_val(table, div, flags);
375 return min_t(unsigned int, value, div_mask(width));
377 EXPORT_SYMBOL_GPL(divider_get_val);
379 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
380 unsigned long parent_rate)
382 struct clk_divider *divider = to_clk_divider(hw);
384 unsigned long flags = 0;
387 value = divider_get_val(rate, parent_rate, divider->table,
388 divider->width, divider->flags);
391 spin_lock_irqsave(divider->lock, flags);
393 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
394 val = div_mask(divider->width) << (divider->shift + 16);
396 val = clk_readl(divider->reg);
397 val &= ~(div_mask(divider->width) << divider->shift);
399 val |= value << divider->shift;
400 clk_writel(val, divider->reg);
403 spin_unlock_irqrestore(divider->lock, flags);
408 const struct clk_ops clk_divider_ops = {
409 .recalc_rate = clk_divider_recalc_rate,
410 .round_rate = clk_divider_round_rate,
411 .set_rate = clk_divider_set_rate,
413 EXPORT_SYMBOL_GPL(clk_divider_ops);
415 static struct clk *_register_divider(struct device *dev, const char *name,
416 const char *parent_name, unsigned long flags,
417 void __iomem *reg, u8 shift, u8 width,
418 u8 clk_divider_flags, const struct clk_div_table *table,
421 struct clk_divider *div;
423 struct clk_init_data init;
425 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
426 if (width + shift > 16) {
427 pr_warn("divider value exceeds LOWORD field\n");
428 return ERR_PTR(-EINVAL);
432 /* allocate the divider */
433 div = kzalloc(sizeof(*div), GFP_KERNEL);
435 return ERR_PTR(-ENOMEM);
438 init.ops = &clk_divider_ops;
439 init.flags = flags | CLK_IS_BASIC;
440 init.parent_names = (parent_name ? &parent_name: NULL);
441 init.num_parents = (parent_name ? 1 : 0);
443 /* struct clk_divider assignments */
447 div->flags = clk_divider_flags;
449 div->hw.init = &init;
452 /* register the clock */
453 clk = clk_register(dev, &div->hw);
462 * clk_register_divider - register a divider clock with the clock framework
463 * @dev: device registering this clock
464 * @name: name of this clock
465 * @parent_name: name of clock's parent
466 * @flags: framework-specific flags
467 * @reg: register address to adjust divider
468 * @shift: number of bits to shift the bitfield
469 * @width: width of the bitfield
470 * @clk_divider_flags: divider-specific flags for this clock
471 * @lock: shared register lock for this clock
473 struct clk *clk_register_divider(struct device *dev, const char *name,
474 const char *parent_name, unsigned long flags,
475 void __iomem *reg, u8 shift, u8 width,
476 u8 clk_divider_flags, spinlock_t *lock)
478 return _register_divider(dev, name, parent_name, flags, reg, shift,
479 width, clk_divider_flags, NULL, lock);
481 EXPORT_SYMBOL_GPL(clk_register_divider);
484 * clk_register_divider_table - register a table based divider clock with
485 * the clock framework
486 * @dev: device registering this clock
487 * @name: name of this clock
488 * @parent_name: name of clock's parent
489 * @flags: framework-specific flags
490 * @reg: register address to adjust divider
491 * @shift: number of bits to shift the bitfield
492 * @width: width of the bitfield
493 * @clk_divider_flags: divider-specific flags for this clock
494 * @table: array of divider/value pairs ending with a div set to 0
495 * @lock: shared register lock for this clock
497 struct clk *clk_register_divider_table(struct device *dev, const char *name,
498 const char *parent_name, unsigned long flags,
499 void __iomem *reg, u8 shift, u8 width,
500 u8 clk_divider_flags, const struct clk_div_table *table,
503 return _register_divider(dev, name, parent_name, flags, reg, shift,
504 width, clk_divider_flags, table, lock);
506 EXPORT_SYMBOL_GPL(clk_register_divider_table);
508 void clk_unregister_divider(struct clk *clk)
510 struct clk_divider *div;
513 hw = __clk_get_hw(clk);
517 div = to_clk_divider(hw);
522 EXPORT_SYMBOL_GPL(clk_unregister_divider);