2 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/export.h>
15 #include <linux/module.h>
16 #include <linux/regmap.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk-provider.h>
19 #include <linux/reset-controller.h>
24 #include "clk-regmap.h"
29 struct qcom_reset_controller reset;
30 struct clk_onecell_data data;
35 struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
44 /* Default to our fastest rate */
47 EXPORT_SYMBOL_GPL(qcom_find_freq);
49 int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
51 int i, num_parents = clk_hw_get_num_parents(hw);
53 for (i = 0; i < num_parents; i++)
54 if (src == map[i].src)
59 EXPORT_SYMBOL_GPL(qcom_find_src_index);
62 qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
66 struct device *dev = &pdev->dev;
68 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
69 base = devm_ioremap_resource(dev, res);
71 return ERR_CAST(base);
73 return devm_regmap_init_mmio(dev, base, desc->config);
75 EXPORT_SYMBOL_GPL(qcom_cc_map);
77 static void qcom_cc_del_clk_provider(void *data)
79 of_clk_del_provider(data);
82 static void qcom_cc_reset_unregister(void *data)
84 reset_controller_unregister(data);
87 static void qcom_cc_gdsc_unregister(void *data)
89 gdsc_unregister(data);
93 * Backwards compatibility with old DTs. Register a pass-through factor 1/1
94 * clock to translate 'path' clk into 'name' clk and regsiter the 'path'
95 * clk as a fixed rate clock if it isn't present.
97 static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
98 const char *name, unsigned long rate,
101 struct device_node *node = NULL;
102 struct device_node *clocks_node;
103 struct clk_fixed_factor *factor;
104 struct clk_fixed_rate *fixed;
106 struct clk_init_data init_data = { };
108 clocks_node = of_find_node_by_path("/clocks");
110 node = of_find_node_by_name(clocks_node, path);
111 of_node_put(clocks_node);
114 fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
118 fixed->fixed_rate = rate;
119 fixed->hw.init = &init_data;
121 init_data.name = path;
122 init_data.flags = CLK_IS_ROOT;
123 init_data.ops = &clk_fixed_rate_ops;
125 clk = devm_clk_register(dev, &fixed->hw);
132 factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
136 factor->mult = factor->div = 1;
137 factor->hw.init = &init_data;
139 init_data.name = name;
140 init_data.parent_names = &path;
141 init_data.num_parents = 1;
143 init_data.ops = &clk_fixed_factor_ops;
145 clk = devm_clk_register(dev, &factor->hw);
153 int qcom_cc_register_board_clk(struct device *dev, const char *path,
154 const char *name, unsigned long rate)
156 bool add_factor = true;
157 struct device_node *node;
159 /* The RPM clock driver will add the factor clock if present */
160 if (IS_ENABLED(CONFIG_QCOM_RPMCC)) {
161 node = of_find_compatible_node(NULL, NULL, "qcom,rpmcc");
162 if (of_device_is_available(node))
167 return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
169 EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
171 int qcom_cc_register_sleep_clk(struct device *dev)
173 return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
176 EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
178 int qcom_cc_really_probe(struct platform_device *pdev,
179 const struct qcom_cc_desc *desc, struct regmap *regmap)
182 struct device *dev = &pdev->dev;
184 struct clk_onecell_data *data;
186 struct qcom_reset_controller *reset;
188 size_t num_clks = desc->num_clks;
189 struct clk_regmap **rclks = desc->clks;
191 cc = devm_kzalloc(dev, sizeof(*cc) + sizeof(*clks) * num_clks,
199 data->clk_num = num_clks;
201 for (i = 0; i < num_clks; i++) {
203 clks[i] = ERR_PTR(-ENOENT);
206 clk = devm_clk_register_regmap(dev, rclks[i]);
212 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, data);
216 devm_add_action(dev, qcom_cc_del_clk_provider, pdev->dev.of_node);
219 reset->rcdev.of_node = dev->of_node;
220 reset->rcdev.ops = &qcom_reset_ops;
221 reset->rcdev.owner = dev->driver->owner;
222 reset->rcdev.nr_resets = desc->num_resets;
223 reset->regmap = regmap;
224 reset->reset_map = desc->resets;
226 ret = reset_controller_register(&reset->rcdev);
230 devm_add_action(dev, qcom_cc_reset_unregister, &reset->rcdev);
232 if (desc->gdscs && desc->num_gdscs) {
233 ret = gdsc_register(dev, desc->gdscs, desc->num_gdscs,
234 &reset->rcdev, regmap);
239 devm_add_action(dev, qcom_cc_gdsc_unregister, dev);
244 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
246 int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
248 struct regmap *regmap;
250 regmap = qcom_cc_map(pdev, desc);
252 return PTR_ERR(regmap);
254 return qcom_cc_really_probe(pdev, desc, regmap);
256 EXPORT_SYMBOL_GPL(qcom_cc_probe);
258 MODULE_LICENSE("GPL v2");