2 * Copyright (C) 2016 Maxime Ripard
3 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
13 #include <linux/delay.h>
18 void ccu_mux_helper_adjust_parent_for_prediv(struct ccu_common *common,
19 struct ccu_mux_internal *cm,
21 unsigned long *parent_rate)
27 if (!((common->features & CCU_FEATURE_FIXED_PREDIV) ||
28 (common->features & CCU_FEATURE_VARIABLE_PREDIV) ||
29 (common->features & CCU_FEATURE_ALL_PREDIV)))
32 if (common->features & CCU_FEATURE_ALL_PREDIV) {
33 *parent_rate = *parent_rate / common->prediv;
37 reg = readl(common->base + common->reg);
38 if (parent_index < 0) {
39 parent_index = reg >> cm->shift;
40 parent_index &= (1 << cm->width) - 1;
43 if (common->features & CCU_FEATURE_FIXED_PREDIV)
44 for (i = 0; i < cm->n_predivs; i++)
45 if (parent_index == cm->fixed_predivs[i].index)
46 prediv = cm->fixed_predivs[i].div;
48 if (common->features & CCU_FEATURE_VARIABLE_PREDIV)
49 if (parent_index == cm->variable_prediv.index) {
52 div = reg >> cm->variable_prediv.shift;
53 div &= (1 << cm->variable_prediv.width) - 1;
57 *parent_rate = *parent_rate / prediv;
60 int ccu_mux_helper_determine_rate(struct ccu_common *common,
61 struct ccu_mux_internal *cm,
62 struct clk_rate_request *req,
63 unsigned long (*round)(struct ccu_mux_internal *,
69 unsigned long best_parent_rate = 0, best_rate = 0;
70 struct clk_hw *best_parent, *hw = &common->hw;
73 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
74 unsigned long adj_parent_rate;
76 best_parent = clk_hw_get_parent(hw);
77 best_parent_rate = clk_hw_get_rate(best_parent);
79 adj_parent_rate = best_parent_rate;
80 ccu_mux_helper_adjust_parent_for_prediv(common, cm, -1,
83 best_rate = round(cm, adj_parent_rate, req->rate, data);
88 for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
89 unsigned long tmp_rate, parent_rate, adj_parent_rate;
90 struct clk_hw *parent;
92 parent = clk_hw_get_parent_by_index(hw, i);
96 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
97 struct clk_rate_request parent_req = *req;
98 int ret = __clk_determine_rate(parent, &parent_req);
103 parent_rate = parent_req.rate;
105 parent_rate = clk_hw_get_rate(parent);
108 adj_parent_rate = parent_rate;
109 ccu_mux_helper_adjust_parent_for_prediv(common, cm, i,
112 tmp_rate = round(cm, adj_parent_rate, req->rate, data);
113 if (tmp_rate == req->rate) {
114 best_parent = parent;
115 best_parent_rate = parent_rate;
116 best_rate = tmp_rate;
120 if ((req->rate - tmp_rate) < (req->rate - best_rate)) {
121 best_rate = tmp_rate;
122 best_parent_rate = parent_rate;
123 best_parent = parent;
131 req->best_parent_hw = best_parent;
132 req->best_parent_rate = best_parent_rate;
133 req->rate = best_rate;
137 u8 ccu_mux_helper_get_parent(struct ccu_common *common,
138 struct ccu_mux_internal *cm)
143 reg = readl(common->base + common->reg);
144 parent = reg >> cm->shift;
145 parent &= (1 << cm->width) - 1;
148 int num_parents = clk_hw_get_num_parents(&common->hw);
151 for (i = 0; i < num_parents; i++)
152 if (cm->table[i] == parent)
159 int ccu_mux_helper_set_parent(struct ccu_common *common,
160 struct ccu_mux_internal *cm,
167 index = cm->table[index];
169 spin_lock_irqsave(common->lock, flags);
171 reg = readl(common->base + common->reg);
172 reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift);
173 writel(reg | (index << cm->shift), common->base + common->reg);
175 spin_unlock_irqrestore(common->lock, flags);
180 static void ccu_mux_disable(struct clk_hw *hw)
182 struct ccu_mux *cm = hw_to_ccu_mux(hw);
184 return ccu_gate_helper_disable(&cm->common, cm->enable);
187 static int ccu_mux_enable(struct clk_hw *hw)
189 struct ccu_mux *cm = hw_to_ccu_mux(hw);
191 return ccu_gate_helper_enable(&cm->common, cm->enable);
194 static int ccu_mux_is_enabled(struct clk_hw *hw)
196 struct ccu_mux *cm = hw_to_ccu_mux(hw);
198 return ccu_gate_helper_is_enabled(&cm->common, cm->enable);
201 static u8 ccu_mux_get_parent(struct clk_hw *hw)
203 struct ccu_mux *cm = hw_to_ccu_mux(hw);
205 return ccu_mux_helper_get_parent(&cm->common, &cm->mux);
208 static int ccu_mux_set_parent(struct clk_hw *hw, u8 index)
210 struct ccu_mux *cm = hw_to_ccu_mux(hw);
212 return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index);
215 static unsigned long ccu_mux_recalc_rate(struct clk_hw *hw,
216 unsigned long parent_rate)
218 struct ccu_mux *cm = hw_to_ccu_mux(hw);
220 ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
226 const struct clk_ops ccu_mux_ops = {
227 .disable = ccu_mux_disable,
228 .enable = ccu_mux_enable,
229 .is_enabled = ccu_mux_is_enabled,
231 .get_parent = ccu_mux_get_parent,
232 .set_parent = ccu_mux_set_parent,
234 .determine_rate = __clk_mux_determine_rate,
235 .recalc_rate = ccu_mux_recalc_rate,
239 * This clock notifier is called when the frequency of the of the parent
240 * PLL clock is to be changed. The idea is to switch the parent to a
241 * stable clock, such as the main oscillator, while the PLL frequency
244 static int ccu_mux_notifier_cb(struct notifier_block *nb,
245 unsigned long event, void *data)
247 struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
250 if (event == PRE_RATE_CHANGE) {
251 mux->original_index = ccu_mux_helper_get_parent(mux->common,
253 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
255 } else if (event == POST_RATE_CHANGE) {
256 ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
257 mux->original_index);
260 udelay(mux->delay_us);
262 return notifier_from_errno(ret);
265 int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb)
267 mux_nb->clk_nb.notifier_call = ccu_mux_notifier_cb;
269 return clk_notifier_register(clk, &mux_nb->clk_nb);